Microcontroller system firmware upgrading method and device based on IAP technology

Abstract

The invention relates to a microcontroller system firmware upgrading method and device based on an IAP technology, and aims to solve the problem that in the prior art, an external FLASH memory needs to be added or the occupation of a high RAM (Random Access Memory) needs to be increased. Safe and reliable online updating of firmware is achieved through the built-in Bootloader program, additional storage hardware is not needed, and the requirement for RAM resources is reduced by means of a subpackage transmission and packet-by-packet verification write-in mechanism. Meanwhile, a dual identification mechanism of an update flag bit and a write protection flag bit is introduced, so that the system can automatically identify and take proper recovery measures if power failure or abnormal interruption occurs in the update process, and the situation that the system is unavailable due to partial update of firmware is prevented. The hardware cost and the system complexity are effectively reduced, the fault-tolerant capability of firmware updating and the system stability are improved, and the method is suitable for application scenes with high requirements for reliability and maintenance convenience such as industrial control, automotive electronics and remote terminal equipment.

Description

Technical Field

[0001] The present invention relates to the technical field of embedded system firmware upgrade, and particularly relates to a method and device for upgrading the firmware of a microcontroller system based on IAP technology. Background Art

[0002] In application scenarios such as industrial control, automotive electronics, and intelligent terminals, updating the controller firmware is a common requirement. Traditional firmware upgrades often require the controller to be taken offline and disassembled, and the program is rewritten through a programmer. This method not only consumes time and manpower but also causes equipment downtime, affecting production efficiency.

[0003] Although some existing online update methods can alleviate the above problems to a certain extent, they often require adding an external Flash memory in the system to temporarily store new firmware data during the update. For microcontrollers with limited resources, this method increases the hardware cost and complexity. However, other solutions either need to cache the entire new firmware file in memory when dealing with large-capacity firmware, which is not ideal for microcontrollers with tight RAM resources. In addition, if a power failure or abnormal interruption occurs during the update process, the system with an incomplete update may cause partial overwriting of the original APP firmware, resulting in the inability to continue normal operation and seriously affecting the reliability of the system.

[0004] Therefore, there is an urgent need for a firmware upgrade method that does not require an external FLASH, can achieve sub-packet online update under the condition of limited RAM resources, and has the ability to protect against abnormal interruptions. Summary of the Invention

[0005] The purpose of the present invention is to provide a method and device for upgrading the firmware of a microcontroller system based on IAP technology. The method and device can solve the deficiencies in the prior art. By transmitting the complete firmware in sub-packets, performing CRC checks on each packet, and immediately writing to the FLASH, it does not require additional external FLASH space or caching the entire file in the RAM at one time, thus adapting to the microcontroller environment with limited resources. At the same time, the present invention introduces an update flag bit and a write protection flag bit to ensure that power failure or abnormality during the update process can be automatically detected and safely processed, avoiding system failure caused by the semi-updated state of the firmware.

[0006] To achieve the above purpose, the present invention adopts the following technical solutions:

[0007] The present invention includes a method for upgrading the firmware of a microcontroller system based on IAP technology, and the method includes the following steps:

[0008] S1. The host computer loads the application program BIN file of the microcontroller to be updated and performs sub-packet processing, and sends an update instruction to the microcontroller through the CAN bus to start the firmware update process;

[0009] S2. After the microcontroller receives the update instruction, it sends a feedback to the host computer. After receiving the feedback, the host computer sends each data packet in sequence. After the host computer sends each data packet, the microcontroller returns a corresponding feedback instruction. The host computer determines whether to continue sending the next data packet or re-send the current data packet according to the feedback instruction.

[0010] S3. After the microcontroller is powered on, it executes the Bootloader program and reads the status of the flag bits in the internal FLASH of the microcontroller CPU. The flag bits include an update flag bit and a write protection flag bit.

[0011] S4. The host computer sends an update instruction to the application program of the microcontroller. After receiving the update instruction, the application program of the microcontroller sets the update flag bit in the FLASH to indicate that an update is required and jumps to the starting address of the Bootloader program to start the Bootloader program.

[0012] S5. After the Bootloader program starts, it reads the status of the update flag bit and the write protection flag bit stored in the FLASH and enters the normal update process.

[0013] S6. The Bootloader program sequentially receives each data packet sent by the host computer and writes it into the FLASH. After the writing is completed, the write protection flag bit and the update flag bit are reset, and the updated application program is started for execution.

[0014] As a further improvement of the above technical solution, the internal FLASH of the microcontroller CPU includes three areas: a Bootloader storage area, a flag bit storage area, and an APP storage area. The Bootloader storage area is used to store the Bootloader self-programming code. The flag bit storage area is used to store the update flag bit and the write protection flag bit. The APP storage area is used to store the user APP application code.

[0015] As a further improvement of the above technical solution, in step S3, the initial state of the update flag bit is no update required, and the initial state of the write protection flag bit is invalid.

[0016] As a further improvement of the above technical solution, in step S5, the status of the update flag bit is update required, and the status of the write protection flag bit is invalid.

[0017] As a further improvement of the above technical solution, in step S5, after the Bootloader program starts, it reads the status of the update flag bit and the write protection flag bit stored in the FLASH to determine the current system status according to the status of the update flag bit and the write protection flag bit; the system status includes three types: normal operation, to-be-updated status, and status to be restored after abnormal interruption.

[0018] As a further improvement of the above technical solution, if the system status is the to-be-updated status, that is, the update flag bit indicates that an update is required, the Bootloader program establishes communication with the host computer; the host computer decomposes the complete firmware into multiple data packets and sends them sequentially, and each data packet contains a firmware segment and CRC check information; the Bootloader program performs CRC check on each data packet. After the CRC check passes, it first sets the write protection flag bit, then writes the data into the APP storage area in the FLASH, and sends a feedback instruction to the host computer. After receiving the feedback instruction, the host computer sends the next data packet; when the last data packet is successfully written, the Bootloader program clears the update flag bit and the write protection flag bit, and jumps to the updated application program to run normally.

[0019] As a further improvement of the above technical solution, if the system status is the status to be restored after abnormal interruption, that is, a power failure, reset, or communication interruption occurs during the update process, resulting in the write protection flag bit remaining in an effective state, then when powering on next time, the Bootloader program determines that the previous update was not completed completely by detecting the write protection flag bit, and waits for the host computer to re-initiate an update request before re-updating to ensure that the system is not locked by a semi-updated program.

[0020] As a further improvement of the above technical solution, before the Bootloader program jumps to the updated application program to run normally, it first modifies the interrupt vector table of the application program to make it shift backward. The offset amount of the backward shift of the interrupt vector table of the application program is the size of the space occupied by the Bootloader program.

[0021] The present invention further includes a firmware upgrade device for a microcontroller system based on the IAP technology. The device includes a host computer and one or more STM32 controllers connected to the host computer through a CAN bus.

[0022] As a further improvement of the above technical solution, the host computer includes a CAN setting module, a controller information module, a data sending module, a file sending module, and a data receiving and real-time display module. The CAN setting module is used to enable the CAN interface and configure the CAN communication baud rate; the controller information module is used to display the specific information of the connected controller; the data sending module is used to send single-frame data packets and the CAN ID and format of the sent data packets; the file sending module is used to send the BIN file of the application program in packets during the IAP update process, select the packet size through the file sending module, and at the same time the user monitors the update progress through the operation log interface of the file sending module; the data receiving and real-time display module is used to display the CAN information content received by the host computer in real time and provide the specific instructions feedback by the controller for the maintenance personnel to refer to.

[0023] Compared with the prior art, the advantages of the present invention are as follows:

[0024] (1) Compared with some existing solutions that need to add external FLASH to temporarily store the firmware, the present invention uses the strategy of packet-by-packet transmission and immediate writing of each packet, making full use of the internal FLASH of the microcontroller itself, without additional hardware support, reducing the system cost and hardware complexity.

[0025] (2) The present invention does not need to cache the entire firmware file in the RAM at one time, but gradually verifies and writes in units of data packets, thus greatly reducing the requirement for memory resources. For resource-constrained microcontrollers, the present invention significantly broadens the applicable range of online update technology.

[0026] (3) Through the dual-identification mechanism of the update flag bit and the write protection flag bit, the present invention can automatically identify the last update interruption status when power is restored after encountering abnormal situations such as power failure and reset during the update process. Compared with the existing solutions lacking an abnormal recovery mechanism, the present invention can prevent the device from being paralyzed due to semi-updated firmware.

[0027] (4) The present invention can accept updates from the host computer in the normal state without stopping the machine and disassembling. Compared with the traditional update method that requires on-site machine stoppage and disassembly, the present invention can significantly shorten the downtime and reduce the maintenance cost. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Figure 1 It is a hardware device diagram of the microcontroller system firmware upgrade device based on the IAP technology in the present invention;

[0029] Figure 2 It is a schematic diagram of the interface of the host computer in the microcontroller system firmware upgrade device based on the IAP technology in the present invention;

[0030] Figure 3It is the space allocation diagram of the FLASH of the STM32 controller in the microcontroller system firmware upgrade device based on the IAP technology in the present invention;

[0031] Figure 4 It is the method flow chart of the microcontroller system firmware upgrade method based on the IAP technology in the present invention. Detailed implementation manners

[0032] The following further describes the present invention with reference to the accompanying drawings:

[0033] As Figure 1 shown in the hardware device diagram of the microcontroller system firmware upgrade device based on the IAP technology, the microcontroller system firmware upgrade device based on the IAP technology includes a host computer and one or more STM32 controllers connected to the host computer through a CAN bus. In this embodiment, multiple STM32 controllers are connected to the host computer through the CAN bus, and synchronous update of multiple STM32 controllers can be achieved.

[0034] As Figure 2 shown in the interface schematic diagram of the host computer, the host computer is used to load and parse the BIN file of the application program and split the BIN file package according to the data packet size selected by the user. The host computer initiates the firmware update process by sending an update instruction to the CAN bus and starts to send data packets in sequence after receiving the feedback instruction from the STM32 controller. After the host computer sends each packet of data, it will wait for the STM32 controller to return the relevant feedback instruction, and then the host computer decides whether to retransmit the current data packet or send the next packet according to the feedback instruction.

[0035] As Figure 3 shown in the space allocation diagram of the FLASH of the STM32 controller, the internal FLASH of the CPU of the STM32 controller is divided into three parts, namely, the Bootloader storage area for storing the self-programming code of the Bootloader, the flag bit storage area for storing the update flag bit and the write protection flag bit, and the APP storage area for storing the user APP application code.

[0036] Figure 4 It is the entire update process of the microcontroller system firmware upgrade method based on the IAP technology. After the microcontroller is powered on, the Bootloader program is executed first. At this time, the update flag bit in the FLASH is in the "no update required" state, and the write protection flag bit is in the invalid state, and the system jumps to the APP area for execution.

[0037] After the STM32 controller is powered on, it first runs the Bootloader program. The Bootloader program reads the update flag bit and the write protection flag bit in the flag bit storage area of the FLASH, and determines the status of the current system according to the update flag bit and the write protection flag bit. The status of the system includes three types: normal operation, pending update status, and the status to be restored after abnormal interruption.

[0038] If the update flag bit indicates that an update is required, the Bootloader program establishes communication with the host computer. The host computer decomposes the complete firmware into multiple data packets and sends them sequentially. Each data packet contains a firmware segment and CRC check information. The Bootloader program performs CRC check on each data packet. After the CRC check passes, it first sets the write protection flag bit, then writes the data into the APP storage area of the FLASH of the STM32 controller, and feeds back to the host computer. Then, the host computer sends the next data packet. When the last data packet is successfully written, the Bootloader program clears the update flag bit and the write protection flag bit, and jumps to the updated APP program to run normally.

[0039] If a power failure, reset, or communication interruption occurs during the update process, resulting in the write protection flag bit remaining in an effective state, when powered on next time, the Bootloader program knows through detecting the write protection flag bit that the previous update was not completed, and needs to wait for the host computer to initiate an update request again to ensure that the system is not locked by a semi-updated program. Specifically, during the firmware update process, once a power failure occurs, the sudden interruption of the power supply will cause the update operation to stop abruptly; the reset operation will instantly reset the system state and interrupt the ongoing update process; and the communication interruption will cut off the data transmission channel between the host computer and the microcontroller. These unexpected situations will all cause the write protection flag bit to remain in an effective state. When the microcontroller is powered on and starts up next time, its internal Bootloader program will quickly detect the write protection flag bit. As long as it detects that the flag bit is in an effective state, the Bootloader program can keenly judge that the previous firmware update was not completed. Based on this judgment, the Bootloader program will not try to start the possibly problematic semi-updated program by itself, but patiently wait for the host computer to initiate an update request again, so as to effectively ensure that the system will not be locked by the semi-updated program, thus ensuring the stability and reliability of the entire microcontroller system.

[0040] As a further improvement of the above technical solution, as Figure 4 shown, before the Bootloader program jumps to the updated application program to run normally, it first modifies the interrupt vector table of the application program to make it offset backward. The offset amount of the interrupt vector table of the application program offset backward is the size of the space occupied by the Bootloader program.

[0041] The interrupt vector table is a crucial data structure in a microcontroller, usually located at the starting address of the memory. It is a collection of the entry addresses of a series of interrupt service routines (ISRs). When an interrupt event occurs in the microcontroller, it will look up the corresponding entry address from the vector table according to the interrupt type, and then jump to that address to execute the corresponding interrupt service routine to handle the interrupt event. In a microcontroller system based on IAP (In-Application Programming) technology, the starting part of the FLASH is allocated to the Bootloader program. The main function of the Bootloader program is to perform some initialization operations when the microcontroller is powered on and detect whether a firmware update is required. If an update is needed, it is responsible for communicating with the host computer, receiving the new firmware data and writing it to the specified storage area; if no update is required, it will boot the system to jump to the APP program for execution. Since the Bootloader program occupies the starting position of the FLASH, the APP program cannot be stored starting from the starting address of the FLASH, but needs to be stored in the address space after the Bootloader program.

[0042] As a further improvement of the above technical solution, the host computer includes a CAN setting module, a controller information module, a data sending module, a file sending module, and a data receiving and real-time display module.

[0043] The CAN setting module is used to open the CAN interface and configure the CAN communication baud rate. The controller information module is used to display the specific information of the connected controller. The data sending module is used to send single-frame data packets and the CAN ID and format of the sent data packets, etc. The file sending module is used to send the application program BIN file in packets during the IAP update process. The packet size can be selected through the file sending module, and at the same time, the user can monitor the update progress through the operation log interface of the file sending module. The data receiving and real-time display module is used to display the CAN information content received by the host computer in real time. The data receiving and real-time display module provides the specific instructions fed back by the controller for maintenance personnel to refer to.

[0044] The working process of the present invention is as follows:

[0045] (1) The Bootloader program starts

[0046] When a firmware update is required, the maintenance personnel send an update instruction to the microcontroller through the host computer. After receiving the update instruction, the APP program sets the update flag in the FLASH to "need to update", and sends a normal update feedback to the host computer, and jumps to the starting address of the Bootloader program to start the Bootloader program.

[0047] (2) Data packet transmission

[0048] After the Bootloader program starts, it first reads the update flag bit and write protection flag bit stored in the FLASH. At this time, the update flag bit is "needs update" and the write protection flag bit is in the "invalid state", and it enters the normal update process. The Bootloader program sends a handshake command to the host computer. After the host computer completes the handshake, it reads the firmware information block by block from the BIN file and packs it into multiple data packets according to a predetermined size. Each packet of data contains a firmware segment and a CRC check code. The host computer sends each data packet to the Bootloader program in sequence.

[0049] (3) CRC check

[0050] After the Bootloader program receives a packet of data, it performs a CRC check, comparing the CRC check value calculated through the CRC check with the CRC check code in the data packet. If the CRC check of a packet of data passes, the write protection flag bit is set to valid, indicating that a write operation to the FLASH is about to be performed. After the write operation to the FLASH is completed, the Bootloader program sends a confirmation message to the host computer through the CAN bus, instructing the host computer to send the next packet of data. If the CRC check of a packet of data fails, the Bootloader program requests the host computer to retransmit the data packet until the check passes. After the last packet of data is successfully written, the Bootloader program clears the update flag bit and the write protection flag bit, indicating that the update process has ended successfully. Subsequently, the Bootloader program jumps the program instruction to the APP storage area and starts executing the updated APP program.

[0051] CRC check is a data transmission error detection function. By performing a specific algorithm calculation on the data to be transmitted, a check value is obtained and attached to the data packet for transmission together. After receiving the data, the Bootloader program recalculates the CRC value for the data part using the same algorithm and then compares it with the CRC information carried in the data packet. If the two are the same, it indicates that the data has probably not been corrupted during transmission; if they are different, it means that the data may have been damaged during transmission.

[0052] (4) Exception handling

[0053] If the update is not completed due to power failure, reset or communication interruption, when the system is powered on again and enters the Bootloader program, the write protection flag can be used to determine whether the last write process did not end normally, that is, whether the last update was completed normally. If it did not end normally, the Bootloader program will not jump to the APP at this time, and wait for the host computer to re-initiate the update command. When the host computer executes the update again, it can start from the beginning to send sub-packets to ensure that the update is successfully completed in the end.

[0054] In the above working process, APP refers to the user application program (Application). APP is stored in the APP storage area of the FLASH inside the microcontroller CPU. It is a collection of codes that implement specific functions of the microcontroller. When the microcontroller is working normally, if the update flag is "no update required", the system will jump from the Bootloader program to the APP storage area and start executing the APP program, so that the microcontroller can run according to the predetermined function. When the firmware upgrade is completed, the Bootloader program clears the update flag and the write protection flag, and then jumps the program instructions to the APP storage area to start executing the updated APP program. At this time, the microcontroller starts running the new version of the application to update or optimize the function. The Bootloader program is the first program executed after the microcontroller is powered on. It is responsible for detecting the system status and deciding whether to jump to the APP program for normal operation or enter the firmware update process. During the firmware update process, the Bootloader program is responsible for receiving the data packet sent by the host computer and writing it to the APP storage area. The host computer triggers the firmware update process by sending an update instruction and sends the updated APP program to the microcontroller in the form of a data packet. After the update is completed, the APP program running on the microcontroller is the new version of the program sent by the host computer.

[0055] In summary, the present invention aims to solve the problem of the need to add external FLASH memory or high RAM occupancy in the prior art. The built-in Bootloader program is used to achieve safe and reliable online updates of the firmware without the need for additional storage hardware, and the packet transmission and packet-by-packet verification write mechanism are used to reduce the demand for RAM resources. At the same time, a dual identification mechanism of the update flag and the write protection flag is introduced to ensure that if a power outage or abnormal interruption occurs during the update process, the system can automatically identify and take appropriate recovery measures to prevent the system from being unavailable due to partial firmware updates. The present invention effectively reduces hardware costs and system complexity, improves the fault tolerance and system stability of firmware updates, and is suitable for application scenarios such as industrial control, automotive electronics, and remote terminal equipment that have high requirements for reliability and ease of maintenance.

[0056] The above-described embodiments are merely descriptions of the preferred embodiments of the present invention and do not limit the scope of the present invention. Without departing from the design spirit of the present invention, various modifications and improvements made by those of ordinary skill in the art to the technical solutions of the present invention shall fall within the protection scope determined by the claims of the present invention.

Claims

1. A method for firmware upgrade of a microcontroller system based on IAP technology, characterized in that, The method includes the following steps: S1. The host computer loads the application program BIN file of the microcontroller to be updated and performs subcontracting processing, sends an update instruction to the microcontroller through the CAN bus, and starts the firmware update process; S2. After receiving the update instruction, the microcontroller sends a feedback to the host computer. After receiving the feedback, the host computer sends each data packet in sequence; after the host computer sends each data packet, the microcontroller returns a corresponding feedback instruction, and the host computer determines whether to continue sending the next data packet or re-send the current data packet according to the feedback instruction; S3. After the microcontroller is powered on, it executes the Bootloader program and reads the status of the flag bits in the internal FLASH of the microcontroller CPU; the flag bits include an update flag bit and a write protection flag bit; S4. The host computer sends an update instruction to the application program of the microcontroller. After receiving the update instruction, the application program of the microcontroller sets the update flag bit in the FLASH to indicate that an update is required, and jumps to the starting address of the Bootloader program to start the Bootloader program; S5. After the Bootloader program is started, it reads the status of the update flag bit and the write protection flag bit stored in the FLASH and enters the normal update process; S6. The Bootloader program sequentially receives each data packet sent by the host computer and writes it into the FLASH. After the writing is completed, the write protection flag bit and the update flag bit are reset, and the updated application program is started for execution.

2. The method for upgrading the firmware of a microcontroller system based on the IAP technology according to claim 1, wherein the internal FLASH of the microcontroller CPU includes three areas: a Bootloader storage area, a flag bit storage area, and an APP storage area; the Bootloader storage area is used to store the Bootloader self-programming code; the flag bit storage area is used to store the update flag bit and the write protection flag bit; the APP storage area is used to store the user APP application code.

3. The method for upgrading the firmware of a microcontroller system based on the IAP technology according to claim 2, wherein in step S3, the initial state of the update flag bit is no update required, and the initial state of the write protection flag bit is invalid.

4. The method for upgrading the firmware of a microcontroller system based on the IAP technology according to claim 3, wherein in step S5, the status of the update flag bit is update required, and the status of the write protection flag bit is invalid.

5. The method for upgrading the firmware of a microcontroller system based on the IAP technology according to claim 4, wherein in step S5, after the Bootloader program is started, it reads the status of the update flag bit and the write protection flag bit stored in the FLASH to determine the current system status according to the status of the update flag bit and the write protection flag bit; the system status includes three types: normal operation, update pending state, and state to be restored after abnormal interruption.

6. The method for upgrading the firmware of a microcontroller system based on the IAP technology according to claim 5, wherein If the system status is the to-be-updated status, that is, the update flag indicates that an update is required, the Bootloader program establishes communication with the host computer; the host computer decomposes the complete firmware into multiple data packets and sends them sequentially. Each data packet contains a firmware segment and CRC check information; the Bootloader program performs CRC check on each data packet. After the CRC check passes, it first sets the write protection flag, then writes the data into the APP storage area in the FLASH, and sends a feedback instruction to the host computer. After receiving the feedback instruction, the host computer sends the next data packet; when the last data packet is successfully written, the Bootloader program clears the update flag and the write protection flag, and jumps to the updated application program to run normally.

7. The method for firmware upgrade of a microcontroller system based on the IAP technology according to claim 6, characterized in that Before the Bootloader program jumps to the updated application program to run normally, it first modifies the interrupt vector table of the application program to make it offset backward.

8. The method for upgrading the firmware of a microcontroller system based on the IAP technology according to claim 6, characterized in that The offset amount by which the interrupt vector table of the application program is offset backward is the size of the space occupied by the Bootloader program.

9. The method for upgrading the firmware of a microcontroller system based on the IAP technology according to claim 5, characterized in that If the system status is the status to be restored after an abnormal interruption, that is, a power failure, reset, or communication interruption occurs during the update process, resulting in the write protection flag remaining in an effective state, then when powering on next time, the Bootloader program determines that the previous update was not completed completely by detecting the write protection flag, and waits for the host computer to re-initiate an update request before re-updating to ensure that the system is not locked by a semi-updated program.

10. A firmware upgrade device for a microcontroller system based on IAP technology, characterized in that, The device includes a host computer and one or more STM32 controllers connected to the host computer through a CAN bus; The host computer includes a CAN setting module, a controller information module, a data sending module, a file sending module, and a real-time data receiving and displaying module; The CAN setting module is used to enable the CAN interface and configure the CAN communication baud rate; the controller information module is used to display the specific information of the connected controller; the data sending module is used to send a single-frame data packet and the CAN ID and format of the sent data packet; the file sending module is used to send the BIN file of the application program in packets during the IAP update process. The packet size can be selected through the file sending module, and at the same time, the user monitors the update progress through the operation log interface of the file sending module; the real-time data receiving and displaying module is used to display the CAN information content received by the host computer in real time and provide the specific instructions fed back by the controller for the maintenance personnel to refer to.

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