Charge control method and digital control system based on dual active bridge resonant converter

Through the charge control method and digital control system based on the dual active bridge resonant converter, the precise integration of the resonant current and dynamic adjustment of switching timing are achieved, which solves the problem of insufficient dynamic response speed and power control accuracy of traditional converters, and improves the dynamic response capability and stability of the system.

CN120377677AActive Publication Date: 2025-07-25NANJING NORMAL UNIVERSITY

Patent Information

Application Number
CN202510868641.7
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-06-26
Publication Date
2025-07-25
Estimated Expiration
2045-06-26

AI Technical Summary

Technical Problem

Traditional dual active bridge resonant converters have shortcomings in terms of dynamic response speed and power control accuracy, especially when power demand changes suddenly, the system's dynamic performance is insufficient and cannot respond quickly, resulting in voltage and current oscillation, affecting system stability and reliability.

Method used

The charge control method based on the dual active bridge resonant converter is adopted, and the resettable integration circuit and digital control system are used to realize the accurate integration of the resonant current and dynamic adjustment of the switching timing, including current transformer sampling, integration conversion, ramp voltage superposition, comparator comparison and PWM signal generation, control the opening and closing of the switch tube, and realize the switching of four working modes.

Benefits of technology

It improves the dynamic response capability of the converter, shortens the system response time, reduces the voltage and current oscillation of the resonant loop, realizes efficient soft switch operation within the full load range, and improves the stability and reliability of the system.

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Abstract

The invention discloses a charge control method and a digital control system based on a dual-active bridge resonant converter, and belongs to the technical field of dual-active bridge resonant converter control. According to the method, a resettable integrating circuit is used for sampling resonance current and converting the resonance current into integrating voltage which is in a linear relation with charge injection quantity, and an integrating capacitor is discharged and reset before each time of injection; superposing the integral voltage and the ramp voltage; comparing the superposed signal with a threshold voltage output by a current loop through a comparator, and when the superposed signal reaches a threshold value, triggering to generate a PWM signal and switching the working mode of the converter; a switching tube is controlled to act according to a PWM signal, a switching time sequence is dynamically adjusted, effective control over transmission power is achieved, and a digital control system for achieving the method is established. According to the method, rapid dynamic response, efficient power transmission and stable operation of the dual-active bridge resonant converter are realized by controlling resonance current integration and a switching time sequence, and the energy conversion efficiency and the system reliability are effectively improved.
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Description

Technical Field

[0001] The present invention relates to the technical field of dual-active-bridge resonant converter control, and particularly relates to a charge control method and a digital control system based on a dual-active-bridge resonant converter. Background Art

[0002] With the development of the new energy industry, power electronic converters have become increasingly important in distributed power grid connection and energy storage system charging and discharging. The dual-active-bridge resonant converter (SRDAB) has become an ideal choice for new energy applications due to its advantages such as electrical isolation, bidirectional power transfer, and high power density. However, traditional modulation strategies are mostly phase-shift modulation and frequency modulation, which have limitations in terms of dynamic response speed and power control accuracy. Especially when the power demand suddenly changes, the dynamic performance of the system is insufficient and cannot respond quickly, resulting in voltage and current oscillations, which affect the stability and reliability of the system.

[0003] In the existing modulation strategies, due to the non-linear characteristics of the resonant cavity and the strong coupling effect of the modulation parameters during the transient process, it is easy to cause modulation failure and increased voltage fluctuations. For example, in traditional direct phase-shift variable-frequency control, when the phase-shift angle and frequency step change, it will trigger the step response and high-frequency oscillation of the resonant cavity circuit, resulting in overvoltage and overcurrent phenomena, increasing the risk of device damage and causing electromagnetic interference.

[0004] In addition, new types of pulsed loads have put forward response requirements at the millisecond or even microsecond level for power regulation speed. However, increasing the control bandwidth will excite the oscillation of the resonant cavity, making it difficult to reconcile the contradiction between fast response and system stability. The existing control methods lack in-depth exploration of the relationship between the resonant current and the charge injection amount, and it is difficult to achieve precise energy control, which limits the improvement of the converter performance. Therefore, developing advanced control methods that take into account fast dynamic response, stable operation, and precise energy control has become a key issue in promoting the wide application of dual-active-bridge resonant converters in the new energy field. Summary of the Invention

[0005] The present invention aims at the technical deficiencies described in the background, and proposes a charge control method and a digital control system based on a dual-active-bridge resonant converter, which is beneficial to improving the dynamic response ability of the converter.

[0006] The present invention is implemented by the following technical solutions: A charge control method based on a dual-active-bridge resonant converter, the dual-active-bridge resonant converter, that is, the main circuit has the ability of bidirectional power transfer, and its topological structure includes: a DC voltage source V 1. DC voltage source V 2. DC voltage source V The input capacitor on the 1 side C in ., DC voltage source VInput capacitance on the 2 side C o , the H full-bridge circuit on the primary side, the half-bridge circuit on the secondary side, and the high-frequency transformer in the middle T and the resonant cavity. The primary side consists of switching transistors S 1. Switching transistor S 2. Switching transistor S 3. Switching transistor S 4 to form an H full-bridge. The secondary side consists of switching transistors S 5. Switching transistor S 6 to form a half-bridge. The switching transistors are respectively provided with parasitic capacitances C s1 , parasitic capacitance C s2 , parasitic capacitance C s3 , parasitic capacitance C s4 , parasitic capacitance C s5 , parasitic capacitance C s6 and anti-parallel diodes. The transformer turns ratio is 1: n , and the resonant cavity consists of a resonant capacitance C r and a resonant inductor L r . The two switching transistors in each bridge arm are complementarily conducted with a 50% duty cycle, and a dead time of 0.45 μs is given on the primary side and a dead time of 0.65 μs is given on the secondary side to perform high-frequency modulation on the input voltage and the output voltage, so as to obtain the voltage of the midpoint between the bridges of the primary-side inverter full-bridge after being converted by the transformer to the secondary side v ab and the voltage of the midpoint between the bridges of the secondary-side full-bridge v cd . It is defined that the power transmitted from the DC voltage source V 1 to V 2 is the forward transmission mode, and the power transmitted from the DC voltage source V 2 to the DC voltage source V 1 is the reverse transmission mode; The implementation steps of the charge control method are as follows: Step S1: The resetable integrating circuit samples the resonant current i L through the current transformer, and integrates it through the sampling resistor R s to convert it into a voltage signal v s , and then generates an integration voltage v Ci that is linearly related to the charge injection amount Q through an integrating operational amplifier, and ensures that before each charge injection, the integration capacitance C i is quickly discharged to 0V by the reset signal; Step S2: vCi With the ramp voltage v Cramp Superimposed to generate a superimposed signal v sum ; Step S3, the comparator in the control circuit compares the superimposed signal v sum With the threshold value output by the current loop v th When v sum Reaches v th Triggers the logic module to generate a corresponding PWM signal and changes the four operating modes divided by the converter operation. The four operating modes together constitute a complete cycle. The threshold value v th Is the output of the PI regulator, and the input of the PI regulator comes from the output current feedback signal of the converter I o And the error between the given current reference value I ref ; I e ; Step S4, the control circuit controls the on and off of the switching tubes in the main circuit according to the generated PWM signal and the corresponding different operating modes, and controls the transmission power by dynamically adjusting the switching timing.

[0007] Furthermore, the dual-active-bridge resonant converter has bidirectional power transmission capability, including operating in the forward power transmission mode to make energy flow from the primary side to the secondary side, and operating in the reverse power transmission mode to make energy return from the secondary side to the primary side. The forward transmission mode includes four stages: Stage 1, t 0 is the starting moment, t The resonant current at the 0 moment i L Is 0A. When i L Crosses zero, the switching tubes S 1, the switching tube S 5, the switching tube S 4 are turned on. At this time v ab = nV 1, v cd = V 2 / 2, i L Starts to increase positively from 0, and the integration capacitor C i Starts to charge, t At the 1 moment iL The amplitude is the largest when the capacitor voltage is superimposed with the ramp compensation to reach the set threshold voltage v th At this time, the switching transistor S 4 is turned off, and the integrating capacitor stops charging and resets. Among them, the driving signals of the switching transistors S 1 and the switching transistor S 4 are logically inverted as the reset signal of the capacitor. This stage corresponds to a phase shift angle of φ , and the resonant current in stage 1 integrates to generate a charge quantity Q 1 for charge control; Stage 2: The switching transistors S 1, the switching transistor S 3, and the switching transistor S 5 are turned on, the switching transistor S 4 is turned off, and the integrating capacitor C i discharges rapidly, and the voltage drops to 0V. At this time, v ab =0, v cd = V 2 / 2, the resonant current continues to resonate until the moment t 2 when the resonant current crosses zero, and the positive half-cycle ends. The resonant current in stage 2 integrates to generate a charge quantity Q 2; Stage 3: When the resonant current changes from positive to negative, it enters the lower half-cycle. The actions of the switching transistors in this stage are symmetric to those in stage 1. The switching transistors S 1, the switching transistor S 5, and the switching transistor S 4 are turned off, v ab =- nV 1, v cd =- V 2 / 2, the resonant current i L increases in the reverse direction, t At the moment i L the amplitude is the largest, the integrating capacitor no longer performs the integration operation, maintains the 0V state, the charge quantity is 0, and a counter is used for counting to achieve symmetry in time between stage 3 and stage 1; Stage 4: The actions of the switching transistors in this stage are symmetric to those in stage 2. The switching transistors S 1, the switching transistor S 3, and the switching transistor S 5 are turned off, the switching transistor S 4 is turned on, v ab =0, v cd =- V2 / 2, the resonant current continues to resonate until t At time 4, the current passes through zero, completing a full switching cycle.

[0008] Furthermore, the reverse transmission mode includes four stages: Stage 1, t Starting from time 0, t The resonant current at time 0 i L is 0A. When i L passes through zero, the switching transistors S 1, switching transistor S 5, switching transistor S 3 turn on. At this time, v ab = nV 1, v cd = V 2 / 2, i L starts to increase in the reverse direction from 0, and the integrating capacitor C i starts to charge. t At time 1 i L the amplitude is the largest. When the capacitor voltage superimposed with the ramp compensation reaches the set threshold voltage v th , the switching transistor S 3 turns off, the switching transistor S 4 turns on, and the integrating capacitor stops charging and resets. Among them, the drive signals of the switching transistors S 1 and the switching transistor S 3 with the logic inverted are used as the reset signal of the capacitor. This stage corresponds to the phase shift angle of φ , and the resonant current integrates to generate the charge quantity Q 2 for charge control; Stage 2, the switching transistor S 3 turns off, the switching transistors S 1, the switching transistor S 5, the switching transistor S 4 turn on, and the integrating capacitor C i discharges rapidly, and the voltage drops to 0V. At this time, v ab = 0, v cd = V 2 / 2, and the resonant current continues to resonate until at time t 2 the resonant current passes through zero, and the positive half - cycle ends. The resonant current in stage 2 integrates to generate the charge quantity Q 1; Stage 3: When the resonant current changes from positive to negative, it enters the second half cycle. The operation of the switching device in this stage is symmetric to that in Stage 1. The switching device S 1. The switching device S 5. The switching device S 3 turns off, v ab =- nV 1, v cd =- V 2 / 2. The resonant current i L increases in the positive direction, t At time 3 i L the amplitude is the largest, but the integration capacitor no longer integrates. A counter is used for counting to achieve symmetry in time between Stage 3 and Stage 1; Stage 4: The operation of the switching device in this stage is symmetric to that in Stage 2. The switching device S 3 turns on, and the switching devices S 1. The switching device S 5. The switching device S 4 turn off, v ab =0, v cd =- V 2 / 2. The resonant current continues to resonate until t the current crosses zero at time 4, completing a full switching cycle.

[0009] Furthermore, the steady-state trajectory models of the four operating modes in step S3 are respectively: , where, V CrN is the resonant capacitor voltage, V oN is the ratio of the output voltage to the input voltage, i LN is the normalized resonant current, V Cr0N and I L0N are t the initial values of the normalized capacitor voltage and inductor current at time 0, V Cr1N and I L1N are t the initial values of the normalized capacitor voltage and inductor current at time 1, V Cr2N and I L2N are t the initial values of the normalized capacitor voltage and inductor current at time 2,V Cr3N and I L3N are t the initial values of the normalized capacitor voltage and inductor current at time 3.

[0010] In addition, the present invention also proposes a digital control system based on a dual-active-bridge resonant converter, the system is used for a charge control method based on a dual-active-bridge resonant converter, and the digital control system based on a dual-active-bridge resonant converter includes: A resetable integrating circuit: composed of two-stage operational amplifier OP1, two-stage operational amplifier OP2, integrating capacitor C i , sampling resistor R s , input resistor R 1 and input resistor R i 、 feedback resistor R 2 and a reset switch; the current transformer CT extracts the resonant current signal with a turns ratio of 1: N , the resonant current signal is converted into a voltage signal R s through the sampling resistor v s , this voltage signal passes through a first-stage inverting amplifier OP1 to obtain a voltage signal v ct after proportional scaling, and then passes through a first-stage integrating operational amplifier OP2 to convert the integral charge information of the current into the voltage information C i on the integrating capacitor v Ci ; the non-inverting input terminal of OP2 is connected to a DC voltage V ramp to achieve ramp compensation, and the current I ramp is equivalently generated through the superposition theorem for integration, and finally a voltage signal v sum including DC bias, ramp compensation and current integration is output; used to convert the resonant current signal into an integral voltage, realize charge quantization and ramp compensation to provide key signals for control; Current detection circuit: includes a proportional scaling unit, a DC bias superposition module and a signal conditioning circuit; the proportional scaling unit directly uses the voltage signal v ct output by the resetable integrating circuit, and the voltage V bias is added by the DC bias superposition moduleConvert it to a positive value, then filter and amplify it through a signal conditioning circuit, and output it to a digital controller. The digital signal processor DSP dynamically adjusts the current value required for the soft switch according to the comparison result to achieve zero-voltage turn-on, that is, to achieve the soft switch. The voltage signal v ct is the voltage signal scaled from the resonant cavity current and is consistent with the resonant current waveform; Digital controller: Composed of a digital signal processor DSP and a complex programmable logic device CPLD working together; the DSP integrates an analog-to-digital converter module, namely the ADC module, 4 digital-to-analog converter modules, namely the DAC module, 4 high-speed comparators, and a PI adjustment unit, which is used to sample voltage and current signals and perform loop calculations; the CPLD includes an edge detection module, a state machine module, and a dead-time complementary module, which are used to convert the DSP output signal into a complementary PWM wave with dead time to control the action of the switching tube.

[0011] Furthermore, the amplification factors of the two-stage operational amplifiers OP1 and OP2 in the resetable integration circuit K 1. K 2. The output voltage signal v sum are respectively: , wherein, k is the amplification factor from the resonant current to the voltage of the integration capacitor, i L is the resonant current, R i is the input resistance, t 1 is the termination time of stage 1.

[0012] Furthermore, the reset switch in the resetable integration circuit is controlled by the reset signal res output by the digital controller and is used to discharge the integration capacitor C i . During a half cycle, the integration capacitor C i synchronously integrates during the common turn-on time of switching tube S 1 and switching tube S 4, and quickly discharges to 0V at other times and remains at 0V when res is at a high level.

[0013] Furthermore, the ADC module in the digital controller samples the output current i o and subtracts it from the set current I ref , and outputs the loop calculation result V th, and then it is converted into an analog quantity through a DAC and connected to the inverting input terminal of the high-speed comparator 1. The non-inverting input terminal of the high-speed comparator 1 is connected to an external charge information signal v sum , when the charge information signal v sum reaches the threshold voltage V th , the rising edge pulse signal CMP_OUT1 of the output of the high-speed comparator 1 is used as the trigger signal of the CPLD, and the CPLD controls the turn-off S 4 and turns on S 3. Here, the DSP does not directly generate the PWM wave.

[0014] Further, the inverting input terminals of the high-speed comparator 2 and the high-speed comparator 3 in the digital controller are respectively connected to the resonant current detection signals of two nodes V t1 and V t6 , and after conversion, they respectively represent t the resonant current values at time 1 and t time 6. By adjusting the DAC output values of the inverting input terminals of the comparator 2 and the comparator 3, the resonant current values at the turn-on moments of the switching transistors S 1 and S 2 are controlled to achieve the soft switching of the switching transistors S 1 and S 2; the inverting input terminal of the comparator 4 is connected to the DC bias voltage V bias , and the non-inverting input terminal is connected to the resonant current signal V bias superimposed with v cmp . By comparing V bias with v cmp , the zero-crossing detection of the resonant current is performed to control the turn-on and turn-off of the switching transistors S 5 and the switching transistor S 6. By using the dead time before the turn-on of the switching transistor, the charge of its junction capacitance is released before the turn-on of the switching transistor to achieve the soft switching of the switching transistors S 5 and S 6.

[0015] Furthermore, the operation of the CPLD in the digital controller is as follows: First, the pulse signal generated by the edge detection module serves as a trigger signal to drive the state machine module to generate a PWM wave. The PWM wave is the original PWM wave for all switching tubes and the reset signal res. The original PWM wave is a complementary square wave signal with a 50% duty cycle and does not include dead time. Then, the dead time module inserts a period of delay at the rising edge of the original PWM signal, and finally generates two complementary PWM waves with dead time. The present invention has the following beneficial technical effects: (1) The present invention provides a charge control method and a digital control system based on a dual-active-bridge resonant converter. Through a precise charge integration control strategy, when the power demand changes suddenly, the system response time can be shortened from multiple switching cycles of the traditional method to the millisecond level or even the microsecond level, greatly reducing the oscillation duration of the voltage and current in the resonant circuit, realizing instant adjustment of the output power, and improving the dynamic response ability.

[0016] (2) The present invention provides a charge control method and a digital control system based on a dual-active-bridge resonant converter. Through a precise charge integration control strategy and an innovative decoupling algorithm, the influence of the phase shift of the resonant current on the modulation strategy during the transient process is effectively eliminated. When the phase shift angle and frequency undergo step changes, it can quickly suppress the high-frequency oscillation of the power loop, ensure the safe operation of the power devices, and significantly improve the transient stability of the system.

[0017] (3) The present invention provides a charge control method and a digital control system based on a dual-active-bridge resonant converter. Through a precise charge integration control strategy and based on the precise matching of the actions of the switching tubes and the state of the resonant current, high-efficiency soft-switching operation under the full load range and all working conditions is realized. Compared with the traditional control method, the switching loss is reduced, the electrical stress on the switching devices is reduced, the service life is extended, the overall efficiency and reliability of the converter are improved, and the system maintenance cost is reduced. Description of the Drawings

[0018] Figure 1 is the control block diagram of the charge control dual-active-bridge resonant converter; Figure 2 is the main waveform diagram during forward operation; Figure 3 is the corresponding control logic during forward operation; Figure 4 is the main waveform diagram during reverse operation; Figure 5 is the corresponding control logic during reverse operation; Figure 6 is the power regulation process diagram; Figure 7 is the input power supply voltage disturbance response diagram; Figure 8For the equivalent circuit and working trajectory of Mode 1; Figure 9 For the equivalent circuit and working trajectory of Mode 2; Figure 10 For the equivalent circuit and working trajectory of Mode 3; Figure 11 For the equivalent circuit and working trajectory of Mode 4; Figure 12 For the steady-state phase plane trajectory; Figure 13 For the loading state trajectory of the charge control method; Figure 14 For the driving diagram when realizing soft switching in the forward operation; Figure 15 For the driving diagram when realizing soft switching in the reverse operation; Figure 16 For the circuit design block diagram of the digital control system; Figure 17 For the resetable integrating circuit; Figure 18 For the current detection circuit; Figure 19 For the schematic diagram of Comparator 1 inside the DSP; Figure 20 For the schematic diagrams of Comparator 2 and Comparator 3 inside the DSP; Figure 21 For the schematic diagram of Comparator 4 inside the DSP; Figure 22 For the schematic diagram of the internal circuit of the CPLD; Figure 23 For the schematic diagram of the state machine; Figure 24 For the corresponding waveform diagram of the state machine output; Figure 25 For the simulation waveform of forward loading. Detailed implementation manners

[0019] In order to make the objectives, technical solutions and advantages of the present invention clearer, the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.

[0020] Based on the charge control method of a dual-active-bridge resonant converter, the dual-active-bridge resonant converter, that is, the main circuit has the ability of bidirectional power transmission, and its topological structure includes: a DC voltage source V 1. DC voltage source V 2. DC voltage source V The input capacitor on side 1 C in and the DC voltage source V The input capacitor on side 2C o the H full-bridge circuit on the primary side, the half-bridge circuit on the secondary side, and the high-frequency transformer in the middle T and the resonant cavity. The primary side consists of switching transistors S 1. Switching transistor S 2. Switching transistor S 3. Switching transistor S 4 to form an H full-bridge. The secondary side consists of switching transistors S 5. Switching transistor S 6 to form a half-bridge. The switching transistors are respectively provided with parasitic capacitances C s1 , parasitic capacitance C s2 , parasitic capacitance C s3 , parasitic capacitance C s4 , parasitic capacitance C s5 , parasitic capacitance C s6 and anti-parallel diodes. The transformer turns ratio is 1: n , and the resonant cavity consists of a resonant capacitor C r and a resonant inductor L r . The two switching transistors in each bridge arm conduct complementarily with a 50% duty cycle, and a dead time of 0.45 μs is given on the primary side and a dead time of 0.65 μs is given on the secondary side to perform high-frequency modulation on the input voltage and the output voltage, so as to obtain the voltage of the midpoint between the bridges of the primary full-bridge inverter after being converted by the transformer to the secondary side v ab and the voltage of the midpoint between the bridges of the secondary full-bridge v cd . It is defined that the power transmitted from the DC voltage source V 1 to V 2 is the forward transmission mode, and the power transmitted from the DC voltage source V 2 to the DC voltage source V 1 is the reverse transmission mode; As shown in Figure 1 , the implementation steps of the charge control method are as follows: Step S1: The resetable integrating circuit samples the resonant current i L through the current transformer, and integrates it through the sampling resistor R s to convert it into a voltage signal v s , and then generates an integral voltage v Ci that is linearly related to the charge injection amount Q through the integrating operational amplifier, and ensures that before each charge injection, the integrating capacitor C i is quickly discharged to 0V by the reset signal; Step S2: Thev Ci With the ramp voltage v Cramp Superimposed to generate a superimposed signal v sum ; Step S3: The comparator in the control circuit compares the superimposed signal v sum With the threshold value output by the current loop v th When v sum Reaches v th The trigger logic module generates a corresponding PWM signal and changes the four operating modes divided by the converter operation. The four operating modes together form a complete cycle. The threshold value v th Is the output of the PI regulator. The input of the PI regulator comes from the output current feedback signal of the converter I o And the given current reference value I ref Error of I e ; Step S4: The control circuit controls the on and off of the switching tubes in the main circuit according to the generated PWM signal and the corresponding different operating modes, and controls the transmission power by dynamically adjusting the switching timing.

[0021] Furthermore, the dual-active-bridge resonant converter has bidirectional power transmission capability, including operating in the forward power transmission mode to make energy flow from the primary side to the secondary side, and operating in the reverse power transmission mode to make energy return from the secondary side to the primary side. The forward transmission mode includes four stages. The key operating waveforms and control logic of the charge-controlled dual-active-bridge converter in the forward operating mode are as Figure 2 And Figure 3 Shown as: Stage 1: t 0 is the starting moment, t The resonant current at moment 0 i L Is 0A. When i L Passes through zero, the switching tubes S 1, switching tube S 5, switching tube S 4 are turned on. At this time v ab = nV 1, v cd = V 2 / 2, i LStarting from 0 and increasing positively, the integrating capacitor C i begins to charge, t At time 1 i L the amplitude is the largest. When the capacitor voltage is superimposed with the ramp compensation and reaches the set threshold voltage v th the switching transistor S 4 turns off, and the integrating capacitor stops charging and resets. Among them, the driving signals of the switching transistors S 1 and the switching transistor S 4 are logically inverted as the reset signal of the capacitor. This stage corresponds to a phase shift angle of φ , and the resonant current in stage 1 integrates to generate a charge quantity Q 1 for charge control; In stage 2, the switching transistors S 1, the switching transistor S 3, the switching transistor S 5 turn on, the switching transistor S 4 turns off, and the integrating capacitor C i discharges rapidly, and the voltage drops to 0V. At this time, v ab =0, v cd = V 2 / 2, and the resonant current continues to resonate until the resonant current crosses zero at time t 2, and the positive half cycle ends. The resonant current in stage 2 integrates to generate a charge quantity Q 2; In stage 3, when the resonant current changes from positive to negative, it enters the lower half cycle. The actions of the switching transistors in this stage are symmetric with those in stage 1. The switching transistors S 1, the switching transistor S 5, the switching transistor S 4 turn off, v ab =- nV 1, v cd =- V 2 / 2, and the resonant current i L increases in the reverse direction, t At time 3 i L the amplitude is the largest. The integrating capacitor no longer performs the integration operation and maintains the 0V state, and the charge quantity is 0. A counter is used for counting to achieve symmetry in time between stage 3 and stage 1; In stage 4, the actions of the switching transistors in this stage are symmetric with those in stage 2. The switching transistors S 1, the switching transistor S 3, the switching transistor S 5 turn off, and the switching transistor S4 is turned on, v ab = 0, v cd = - V 2 / 2, the resonant current continues to resonate until t the current passes through zero at time 4, completing a full switching cycle.

[0022] Furthermore, the reverse transmission mode includes four stages, as Figure 4 and Figure 5 shown: Stage 1, t 0 is the starting time, t the resonant current at time 0 i L is 0 A. When i L passes through zero, the switching transistors S 1, switching transistor S 5, switching transistor S 3 are turned on. At this time, v ab = nV 1, v cd = V 2 / 2, i L starts to increase in the reverse direction from 0, and the integrating capacitor C i starts to charge. t At time 1 i L the amplitude is the largest. When the capacitor voltage superimposed with the ramp compensation reaches the set threshold voltage v th the switching transistor S 3 is turned off, and the switching transistor S 4 is turned on. The integrating capacitor stops charging and resets. Among them, the driving signals of the switching transistors S 1 and the switching transistor S 3 take the logical inversion as the reset signal of the capacitor. This stage corresponds to the phase shift angle of φ , and the resonant current integrates to generate the charge quantity Q 2 for charge control; Stage 2, the switching transistor S 3 is turned off, and the switching transistors S 1, switching transistor S 5, switching transistor S 4 are turned on. The integrating capacitor C i rapidly discharges, and the voltage drops to 0 V. At this time, v ab = 0, v cd = V2 / 2, the resonant current continues to resonate until the moment t 2 the resonant current passes through zero, the positive half-cycle ends, and the integral of the resonant current in stage 2 generates a charge quantity Q 1; Stage 3: When the resonant current changes from positive to negative, it enters the lower half-cycle. The operation of the switching tube in this stage is symmetric to that in stage 1. The switching tube S 1. The switching tube S 5. The switching tube S 3 is turned off, v ab =- nV 1, v cd =- V 2 / 2, the resonant current i L increases in the positive direction, t at time 3 i L has the maximum amplitude, but the integral capacitor no longer integrates. A counter is used for counting to achieve symmetry in time between stage 3 and stage 1; Stage 4: The operation of the switching tube in this stage is symmetric to that in stage 2. The switching tube S 3 is turned on, and the switching tubes S 1. The switching tubes S 5. The switching tubes S 4 are turned off, v ab =0, v cd =- V 2 / 2, the resonant current continues to resonate until t the current passes through zero at time 4, completing a full switching cycle.

[0023] Furthermore, the power regulation process is as Figure 6 shown. The charge control method realizes fast power response by dynamically adjusting the phase shift angle φ . When the power increases or the load changes suddenly, the control system directly increases the external phase shift angle v th by increasing the charge comparison threshold φ , thereby quickly increasing the charge injection amount and current amplitude in the resonant cavity to achieve an instantaneous response of the output current. On the contrary, when the power demand decreases, the system automatically reduces the external phase shift angle φ by reducing the charge control amount in the resonant cavity to achieve a rapid decay of the resonant current and the output load current.

[0024] When the power supply voltage fluctuates, the adjustment process is as Figure 7As shown, the control system exhibits a unique self - regulating ability. A decrease in the power supply voltage leads to a reduced charge integration speed, causing the conduction time of the switch to automatically extend, and the phase - shift angle φ to passively increase to maintain power balance. When the power supply voltage rises, the charge integration speed increases, the system reaches the comparison threshold earlier, and the phase - shift angle φ automatically decreases. This control mechanism constructs a fast - responding inner - loop regulation system that can automatically adjust the working parameters in real - time during power disturbances, providing a fast dynamic response and ensuring the stable operation of the system.

[0025] Furthermore, the operation of the dual - active - bridge resonant converter is divided into four typical working modes. By selecting the resonant - cavity inductor current and capacitor voltage as state variables, the steady - state trajectory equation of the system is constructed.

[0026] (1) Mode 1: Its equivalent circuit is as Figure 8 shown, V Cr ( t ) is the resonant - capacitor voltage, i L ( t ) is the inductor current. According to the circuit characteristics, the following relational expressions can be established: , where, C r is the resonant - cavity capacitor, L r is the resonant - cavity inductor.

[0027] Assume that a switching period starts at t 0. U 0 and I 0 are the initial values of the capacitor voltage and inductor current at t 0 respectively. By solving the differential equations obtained by combining the above equations, the inductor - current value and capacitor - voltage value in Mode 1 can be obtained: , where is the resonant frequency, f s is the switching frequency, ω s = 2 f s is the switching angular frequency, F = f s / f r .

[0028] Normalize the resonant current and resonant - capacitor voltage. The voltage normalization parameter is 1 / V 1, and the current normalization parameter is V 1 / Z0, the normalized resonant current is i LN , the resonant capacitor voltage is V CrN , the initial value of the resonant current is I 0N , the initial value of the capacitor voltage is V Cr0N , and the formula is: , where V oN is the ratio of the output voltage to the input voltage: , Finally, the phase-plane trajectory equation is: , It can be seen from the above formula that its trajectory is a circle, as Figure 8 shown. The center of the circle is (1 - V oN / 2n, 0), and its position is determined by the voltage applied across the resonator, while the radius of its movement trajectory is determined by the initial energy state in the resonator cavity, specifically determined jointly by the initial value of the inductor current and the initial value of the resonant capacitor voltage.

[0029] (2) Mode 2: The equivalent circuit of Mode 2 is as Figure 9 shown, t After normalization, the initial value of the capacitor voltage and the initial value of the inductor current at time 1 are respectively V Cr1N and I L1N , and the derived trajectory equation is: , The position of the center of the phase-plane trajectory circle is ( V oN / 2 n , 0).

[0030] (3) Mode 3: The equivalent circuit of Mode 3 is as Figure 10 shown, t After normalization, the initial value of the capacitor voltage and the initial value of the inductor current at time 2 are respectively V Cr2N and I L2N , and the derived trajectory equation is: , (4) Mode 4: The equivalent circuit of Mode 4 is as Figure 11 shown, tThe initial values of the capacitor voltage and inductor current at time 3 are normalized to V Cr3N and I L3N respectively. The derived trajectory equation is: , According to the trajectory equations of Mode 1 to Mode 4, the phase-plane trajectories of the dual-active-bridge resonant converter in a complete cycle of steady-state operation are as shown in Figure 12 Figure. The two curves in the figure correspond to two steady-state operating conditions of light load and heavy load respectively. The curve with a smaller radius corresponds to the light-load condition, and the curve with a larger radius corresponds to the heavy-load condition. Within a complete switching cycle, the converter transitions from Mode 1 to Mode 2, Mode 3, and Mode 4 in sequence, and the transitions between each mode are continuous. Therefore, the trajectory of the converter during steady-state operation synthesizes into a closed arc polygon.

[0031] The size of the arc radius is determined by the energy in the resonant cavity: the greater the transmission power, the larger the radius; conversely, the smaller the transmission power, the smaller the radius. This characteristic intuitively reflects the quantitative relationship between the energy in the resonant cavity and the transmission power, providing an important graphical basis for analyzing the dynamic performance of the converter.

[0032] Figure 13 Figure shows the state trajectory curve of the SRDAB using charge control during load switching. The load-switching trajectory curve indicates that the system exhibits excellent dynamic performance: First, the steady-state switching process can be completed in only three operating cycles, much faster than traditional control methods; Second, the resonant current shows a smooth transition characteristic during the transient process, completely avoiding oscillation phenomena; In addition, the voltage / current stress is strictly limited within the full-load operating range, only slightly exceeding the maximum value range at full load.

[0033] The essential difference between the charge control method and the direct phase-shift frequency conversion control lies in its dynamic regulation mechanism. Different from the sudden change regulation of traditional methods, charge control precisely regulates the energy in the resonant cavity, enabling the system state to quickly converge to a new steady state along the optimal trajectory. Specifically, when the system is subjected to a step disturbance, this control method forcibly guides the state trajectory to transition along the shortest path by adjusting the charge input amount in each switching cycle in real time. This direct energy-based control method has two significant advantages: First, it completely avoids the traditional LC oscillation process and shortens the transient time to several switching cycles; Second, its control effect is not affected by the initial state of the resonant cavity, and only by ensuring the accuracy of energy control can rapid stability be achieved.

[0034] The direct phase-shifted frequency conversion control method undergoes a significant oscillatory transient process compared to charge control and requires multiple cycles to reach a steady state. Moreover, there is a phenomenon that the trajectory exceeds the final steady-state trajectory, indicating the risk of overvoltage and overcurrent in the transient process of the system.

[0035] Furthermore, to achieve zero-voltage turn-on of the switching device, it is necessary to ensure that the drain-source voltage of the switching device drops to zero when it is turned on. This requires that during the dead time before the switching device is turned on, the current in the resonant cavity has sufficient energy to discharge the charge on the output capacitor of the switching device. As Figure 14 shown, the corresponding current waveform and the timing diagram of the switching device drive signal when all switching devices are soft-switched in the forward operating mode are presented. When the dead time of the low-voltage side switching device is t d1 , and the dead time of the high-voltage side switching device is t d2 , within the dead time t d1 , the negative resonant current - I t1 completely discharges the junction capacitance of S 1, and the positive resonant current I t4 completely discharges the junction capacitance of S 3. Within the dead time t d2 , the resonant current - I t3 completely discharges the junction capacitance of S 5. The drive waveforms of the paired transistors under the same bridge arm are symmetric. Therefore, all switching devices in the dual-active-bridge resonant converter can achieve soft-switching during forward operation; From Figure 14 , it is known that the time nodes for turning on the switching device within half a cycle are t 1, t 3, t 4. Within one switching cycle, the output capacitances of the low-voltage side switching devices S1, S2, S3, and switching device S 4 are C oss1 , and the output capacitances of the high-voltage side switching devices S5 and S6 are C oss2 . To achieve soft-switching, the resonant cavity current when the low-voltage side S 2 and S 4 are driven to turn off needs to be large enough. The high-voltage side switching device is turned off when the resonant current passes through zero, and zero-voltage turn-on is achieved using the current generated during the dead time. Then, a sufficiently large dead time is required. The conditions to be satisfied for achieving zero-voltage turn-on of all switching devices are as follows: , When operating in the reverse direction, the current waveforms and switch drive diagrams corresponding to achieving soft switching for all switch tubes are as shown in Figure 15 as follows. During the dead time t d1 , the positive resonant current I ' t1 fully discharges the junction capacitance of S1, and the negative resonant current - I ' t4 fully discharges the junction capacitance of S 4. During the dead time t d2 , the negative resonant current fully discharges the junction capacitance of S 5. The drive waveforms of the paired tubes under the same bridge arm are symmetric. Therefore, all switch tubes in the dual-active-bridge resonant converter can achieve soft switching when operating in the reverse direction. The conditions for achieving zero-voltage turn-on of all switch tubes are as shown in the following formula: , At different power levels and voltage levels, the output capacitance of the switch tube will change, and the energy required for the switch tube to achieve zero-voltage turn-on is also different. The magnitude of the detected current and the dead time should be adjusted according to the operating conditions and the hardware parameters of the main circuit for optimization.

[0036] In addition, the present invention also proposes a digital control system based on a dual-active-bridge resonant converter, which is characterized in that the system is used to implement the charge control method based on the dual-active-bridge resonant converter described in claims 1-4. The digital control system based on the dual-active-bridge resonant converter includes, and its circuit design block diagram is as shown in Figure 14 as follows: The resetable integrator is as shown in Figure 15 : It is composed of two-stage operational amplifiers OP1, OP2, integration capacitor C i , sampling resistor R s , input resistor R 1, R i 、 feedback resistor R 2, and a reset switch; the current transformer CT extracts the resonant current signal with a turns ratio of 1:N, and converts it into a voltage signal R s through the sampling resistor v s . This voltage signal passes through a first-stage inverting amplifier OP1 and a first-stage integrating operational amplifier OP2 in sequence, converting the integral charge information of the current into the voltage information C i on the integration capacitor v Ci ; the non-inverting input terminal of OP2 is connected to a DC voltageV ramp Implement slope compensation and equivalently generate current through the superposition theorem I ramp Integrate, and finally output a voltage signal containing a DC bias, slope compensation, and current integration v sum ; used to convert the resonant current signal into an integrated voltage, implement charge quantization and slope compensation to provide key signals for control; The current detection circuit is as Figure 16 shown: It includes a scaling unit, a DC bias superposition module, and a signal conditioning circuit; the scaling unit directly uses the voltage signal output by the integration circuit v ct , an AC signal consistent with the resonant current waveform, adds a voltage through the DC bias superposition module V bias to convert it into a positive value, and then performs filtering and amplification processing through the signal conditioning circuit, and outputs it to the digital controller for zero-voltage turn-on detection and zero-crossing detection; used to detect the instantaneous value of the resonant current, achieve zero-voltage turn-on of the switching tube, and at the same time process the signal to make it adapt to the subsequent digital controller; the resonant cavity current collected through the current transformer is processed by the high-speed comparator in the current detection circuit and combined with the subsequent DSP to dynamically adjust the current value required for soft switching according to the comparison result, so that there is a large enough current in the resonant cavity during the dead time before the switching tube turns on to offset the junction capacitance charge, realizing full-range soft switching; Digital controller: Composed of a digital signal processor DSP and a complex programmable logic device CPLD working together; the DSP integrates an analog-to-digital converter (ADC) module, 4 digital-to-analog converter (DAC) modules, 4 high-speed comparators, and a PI regulation unit, which is used to sample voltage and current signals and perform loop calculations; the CPLD includes an edge detection module, a state machine module, and a dead-time complementary module, which are used to convert the DSP output signal into a complementary PWM wave with dead time to control the operation of the switching tube.

[0037] Furthermore, the amplification factors of the two-stage operational amplifiers OP1 and OP2 in the resetable integration circuit K 1, K 2 are respectively: .

[0038] Furthermore, the reset switch in the resetable integration circuit is controlled by the reset signal res output by the digital controller, and is used to perform discharge operation on the integration capacitor C i ; within half a cycle, the integration capacitor C iSynchronous integration is performed during the common conduction time of switching transistors S1 and S4, and rapid discharge to 0V is carried out at other times, and 0V is maintained when res is at a high level.

[0039] Furthermore, the ADC module in the digital controller samples the output current i o and subtracts it from the set current I ref to obtain the result of loop calculation output by the PI module V th . Then it is converted into an analog quantity through a DAC and connected to the inverting input terminal of comparator 1. The non-inverting input terminal of comparator 1 is connected to the external charge information signal v sum . The schematic diagram is as shown in Figure 17 . When the charge information signal v sum reaches the threshold voltage V th , the rising edge pulse signal CMP_OUT1 of the output of comparator 1 is used as the trigger signal for the CPLD, and the CPLD controls the turn-off of S4 and the turn-on of S3. Here, the DSP does not directly generate the PWM wave.

[0040] Furthermore, the non-inverting input terminals of comparator 2 and comparator 3 in the digital controller are respectively connected to the resonant current detection signals of two nodes V t1 and V t6 . After conversion, they respectively represent the resonant current values at time 1 and t time 6. By adjusting the DAC output values at the inverting input terminals of comparator 2 and comparator 3, as shown in t Figure 18 , the resonant current values at the turn-on moments of switching transistors S1 and S2 can be controlled, thereby realizing the soft switching of the low-voltage side switching transistors S1 and S2. The inverting input terminal of comparator 4 is connected to the DC bias voltage V bias , and the non-inverting input terminal is connected to the resonant current signal superimposed with V bias . By comparing v cmp with V bias v cmp , zero-crossing detection of the resonant current is performed, as shown in Figure 19 . Furthermore, the turn-on and turn-off of switching transistors S5 and S6 are controlled. By using the dead time before the turn-on of the switching transistors, the charge of their junction capacitors is released before the switching transistors are turned on, thereby realizing the soft switching of the high-voltage side switching transistors S5 and S6. ​​

[0041] Furthermore, the operation of the CPLD in the digital controller is as follows: First, the pulse signal generated by the edge detection module serves as a trigger signal to drive the state machine module to generate a PWM wave. The PWM wave is the original PWM wave for all switching tubes and the reset signal res. The original PWM wave is a complementary square wave signal with a duty cycle of 50% and does not include dead time. Then, the dead band module inserts a delay at the rising edge of the original PWM signal to finally generate two complementary PWM waves with dead band.

[0042] The internal schematic diagram of the CPLD includes three main modules: the edge detection module (Edge Detect), the state machine module (State Machine), and the dead band complementary module (Dead Band), as Figure 20 shown. When the pulse signals from the comparator of the digital signal processor (DSP) are input to the CPLD, these signals cannot be directly utilized by the CPLD. Therefore, the edge detection module plays a key role. Its function is to convert the rising edge or falling edge signals into triggerable pulse signals, and these trigger signals then act on the state machine module.

[0043] Subsequently, the state machine module starts to operate. Its main function is to generate the original PWM wave. The pulse signal generated by the edge detection module serves as a trigger signal to drive the state machine module to generate the PWM wave. These PWM waves are the original PWM waves for all switching tubes and res the reset signal. The original PWM wave is a complementary square wave signal with a duty cycle of 50% and does not include dead time. The original PWM wave needs to be sent to the dead band module for processing. The dead band module inserts a delay at the rising edge of the original PWM signal to generate two complementary PWM waves with dead band.

[0044] Furthermore, the operating principle of the state machine module will be elaborated in detail below.

[0045] The internal principle design block diagram of the state machine is as Figure 21 shown. The state machine mainly operates in four states: the first state, i.e., the First Stage state, the second state, i.e., the Second Stage state, the third state, i.e., the Third Stage state, and the fourth state, i.e., the Fourth Stage state. Each state represents the switching state of the switching tubes. Initially, the state machine is in the FirstStage state. At this time, switching tubes S 1 and S 4 are turned on, and the counters Count1 and Countq1 start spontaneous counting from 0 until they receive the edge signal Edge_D1 when the charge integration reaches the threshold. Then the state machine enters the Second Stage state. SThe four switches are turned off, and the counters Count2 and Countq1 are cleared. In the Second Stage state, Count1 continues to count until it reaches the maximum value PRD_MAX or receives the edge signal Edge_D3 of current detection and Count1 has exceeded the minimum count PRD_MIN. Subsequently, the counter Count1 stops counting, and the state machine enters the Third Stage state. In the Third Stage state, S 1 and S 4 are both turned off. The counters Count2 and Countq2 start spontaneous counting from 0 until the count value of counter Countq2 reaches the value before the stop of counter Countq1. Then the state machine enters the Fourth Stage state. In the Fourth Stage state, S 4 is turned on, and the counters Count1 and Countq2 are cleared. The counter Count2 continues to count until it reaches the maximum value MAX or receives the edge signal Edge_D2 of current detection and Count2 has exceeded the minimum count PRD_MIN. Subsequently, the counter Count2 stops counting, and the state machine returns to the First Stage state.

[0046] In addition, if the edge signal Edge_D3 of current detection is detected in the First Stage state, the state machine will skip the Second Stage state and directly enter the Third Stage state; if the edge signal Edge_D2 of current detection is detected in the Third Stage state, the state machine will skip the Fourth Stage state and directly return to the First Stage state.

[0047] CLPD in the digital controller completes the switching frequency limiting function by setting the counting range of the counter. The waveform output by the state machine is as Figure 22 shown. Both counters Count1 and Count2 adopt the up counting mode, and count once per clock cycle. In the first half cycle, the counter Count1 increments from 0. If the counter Count1 increments to the maximum count value PRD_MAX without receiving the trigger signal Edge_D2, the counter Count1 is reset and enters the second half cycle, thereby limiting the upper frequency limit. If the trigger signal Edge_D2 is received during the counting process and the current count value is greater than the minimum count value PRD_MIN, the counter Count1 is immediately reset and enters the second half cycle; if the count value is still less than PRD_MIN when the trigger signal Edge_D2 is received, the counter Count1 continues to count until it reaches PRD_MIN, thereby limiting the lower frequency limit.

[0048] In other words, only when the trigger signal Edge_D2 falls between the maximum count value PRD_MAX and the minimum count value PRD_MIN, will the counter Count1 be reset and enter the second half cycle. Figure 23 The value of PRD_MIN in Figure 23 corresponds to the minimum half cycle, that is, the upper frequency limit; the value of PRD_MAX corresponds to the longest half cycle, that is, the lower frequency limit. The working process of counter Count2 is similar to that of counter Count1, so it will not be elaborated here. Counters Count1 and Count2 are used to generate the original PWM wave signals of switching tubes S 1 and S 2.

[0049] The forward loading dynamic response waveform diagram of charge control is as Figure 23 shown. The direct phase-shifted frequency conversion control changes the transmission power by directly changing the phase-shift angle and frequency through feedback. The charge control changes the charge integration, causing the phase-shift angle and switching frequency to change passively, and the transmission power changes accordingly. During loading, compared with the direct frequency conversion control method, the dual active bridge resonant converter using charge control has a significant improvement in dynamic response. It can be seen that when switching from a 250W steady state to a 500W steady state, only 150 us of transient time is required, which is 3.945 ms faster than the direct phase-shifted frequency conversion control method. The peak value of the resonant inductor current is 5.62 A, which is 4.38 A smaller than that of the direct phase-shifted frequency conversion control method. The peak value of the resonant capacitor voltage is 273 V, which is 137 V smaller than that of the direct phase-shifted frequency conversion control method.

[0050] The performance differences between charge control and direct phase-shifted frequency conversion control are compared in Table 4.1.

[0051] Table 4.1 Comparison of the effects of charge control and direct phase-shifted frequency conversion control

[0052] As shown in the comparison of the effects of the direct phase-shifted frequency conversion control and the charge control of the dual active bridge resonant converter in the table, it can be seen that: during the process of switching from half load to full load, charge control can shorten the dynamic response time by 96.25% compared with direct phase-shifted frequency conversion control, reduce the resonant current stress by 30.6%, and reduce the resonant capacitor voltage stress by 33.4%; during the process of switching from full load to half load, charge control can shorten the dynamic response time by 96.25% compared with direct phase-shifted frequency conversion control, reduce the resonant current stress by 1.79%, and reduce the resonant capacitor voltage stress by 30.77%. Whether it is the loading or unloading condition, the peak values of voltage and current of the dual active bridge resonant converter with charge control do not exceed the full load rated value during the transient process.

[0053] The technical means disclosed by the solution of the present invention are not limited to the technical means disclosed in the above embodiments, and also include technical solutions composed of any combination of the above technical features. It should be noted that for those of ordinary skill in the art, without departing from the principle of the present invention, several improvements and modifications can be made, and these improvements and modifications are also regarded as the protection scope of the present invention.

Claims

1. A charge control method based on a dual-active-bridge resonant converter, characterized in that The dual-active-bridge resonant converter, i.e., the main circuit, has bidirectional power transmission capability, and its topological structure includes: a DC voltage source V 1. DC voltage source V 2. DC voltage source V Input capacitor on side 1 C in and DC voltage source V Input capacitor on side 2 C o The primary-side H-bridge circuit, the secondary-side half-bridge circuit, the intermediate high-frequency transformer T and the resonant cavity. The primary side consists of switching transistors S 1, switching transistor S 2, switching transistor S 3, and switching transistor S 4 to form an H-bridge. The secondary side consists of switching transistors S 5 and switching transistor S 6 to form a half-bridge. The switching transistors each have a parasitic capacitance C s1 , parasitic capacitance C s2 , parasitic capacitance C s3 , parasitic capacitance C s4 , parasitic capacitance C s5 , parasitic capacitance C s6 and a reverse-parallel diode. The transformer turns ratio is 1: n . The resonant cavity consists of a resonant capacitor C r and a resonant inductor L r . The two switching transistors in each bridge arm conduct complementarily with a 50% duty cycle, and a dead time of 0.45 μs is given on the primary side and a dead time of 0.65 μs is given on the secondary side to perform high-frequency modulation on the input voltage and the output voltage, obtaining the voltage of the midpoint between the bridges of the primary-side full-bridge inverter after being converted by the transformer to the secondary side v ab and the voltage of the midpoint between the bridges of the secondary-side full-bridge v cd . It is defined that the power transmitted from the DC voltage source V 1 to V 2 is the forward transmission mode, and the power transmitted from the DC voltage source V 2 to the DC voltage source V 1 is the reverse transmission mode; The implementation steps of the charge control method are as follows: Step S1: The resetable integrating circuit samples the resonant current through a current transformer i L , and through a sampling resistor R s it is integrally converted into a voltage signal v s , and then an integrating voltage linearly related to the charge injection amount Q is generated through an integrating operational amplifier v Ci , and it is ensured that before each charge injection, the integrating capacitor C i is quickly discharged to 0V by the reset signal; Step S2: Combine v Ci with the ramp voltage v Cramp to generate a superimposed signal v sum ; Step S3. The comparator in the control circuit compares the superimposed signal v sum with the threshold value output by the current loop v th . When v sum reaches v th , the logic module is triggered to generate a corresponding PWM signal and change the four operating modes divided by the converter operation. The four operating modes together constitute a complete cycle. The threshold value v th is the output of the PI regulator. The input of the PI regulator comes from the error I o between the output current feedback signal of the converter I ref and the given current reference value I e ; Step S4: The control circuit controls the on and off of the switching tubes in the main circuit according to the generated PWM signal and the corresponding different working modes, and controls the transmission power by dynamically adjusting the switching timing.

2. The charge control method based on a dual active bridge resonant converter according to claim 1, characterized in that The dual-active-bridge resonant converter has bidirectional power transmission capability, including operating in the forward power transmission mode to make energy flow from the primary side to the secondary side, and operating in the reverse power transmission mode to make energy return from the secondary side to the primary side. The forward transmission mode includes four stages: Phase 1, t 0 is the starting moment, t The resonant current at moment 0 i L is 0A. When i L passes through zero, the switching tubes S 1. The switching tube S 5. The switching tube S 4 turns on. At this time v ab = nV 1, v cd = V 2 / 2, i L starts to increase positively from 0, and the integrating capacitor C i starts to charge, t At moment 1 i L the amplitude is the largest. When the capacitor voltage is superimposed with the ramp compensation and reaches the set threshold voltage v th at this time, the switching tube S 4 turns off, the integrating capacitor stops charging and resets. Among them, the driving signals of the switching tubes S 1 and the switching tube S 4 take the logical inverse as the reset signal of the capacitor. This stage corresponds to the phase shift angle of φ , and the resonant current integral in Phase 1 generates the charge quantity Q 1 for charge control; Phase 2, Switching Transistor S 1. Switching Transistor S 3. Switching Transistor S 5 turns on, the switching transistor S 4 turns off, the integrating capacitor C i rapidly discharges, the voltage drops to 0V. At this time, v ab = 0, v cd = V 2 / 2, the resonant current continues to resonate until the moment t 2 the resonant current crosses zero, the positive half - cycle ends, and the resonant current in Phase 2 integrates to generate a charge quantity Q 2; Phase 3: When the resonant current changes from positive to negative, it enters the second half cycle. The operation of the switching device in this phase is symmetric to that in Phase 1. The switching device S 1. The switching device S 5. The switching device S 4 turns off, v ab =- nV 1, v cd =- V 2 / 2. The resonant current i L increases in the reverse direction, t At time 3 i L the amplitude is the largest. The integration capacitor no longer performs the integration operation and remains in the 0V state with a charge of 0. A counter is used for counting to achieve symmetry in time between Phase 3 and Phase 1; Phase 4. The operation of the switching device in this phase is symmetric to that in Phase 2. The switching device S 1. The switching device S 3. The switching device S 5 is turned off, and the switching device S 4 is turned on. v ab = 0, v cd = - V 2 / 2. The resonant current continues to resonate until t the current becomes zero at time 4, completing a full switching cycle.

3. The charge control method based on a dual-active-bridge resonant converter according to claim 2, wherein The reverse transmission mode includes four stages: Phase 1 t 0 is the starting moment, t the resonant current at moment 0 i L is 0A. When i L passes through zero, the switching transistor S 1, the switching transistor S 5, the switching transistor S 3 turns on. At this time v ab = nV 1, v cd = V 2 / 2, i L starts to increase in the reverse direction from 0, and the integrating capacitor C i starts to charge. t At moment 1 i L the amplitude is the largest. When the capacitor voltage is superimposed with the ramp compensation and reaches the set threshold voltage v th the switching transistor S 3 turns off, the switching transistor S 4 turns on, and the integrating capacitor stops charging and resets. Among them, the driving signals of the switching transistor S 1 and the switching transistor S 3 take the logical inversion as the reset signal of the capacitor. This stage corresponds to the phase shift angle of φ , and the resonant current integrates to generate the charge quantity Q 2 for charge control; Phase 2, switching transistor S 3 turns off, switching transistor S 1, switching transistor S 5, switching transistor S 4 turns on, integrating capacitor C i Rapid discharge, voltage drops to 0V. At this time, v ab = 0, v cd = V 2 / 2, resonant current continues to resonate until time t 2 resonant current crosses zero, positive half - cycle ends, and the resonant current in phase 2 integrates to generate a charge quantity Q 1; Phase 3: When the resonant current changes from positive to negative, it enters the second half cycle. The operation of the switching device in this phase is symmetric to that in Phase 1. The switching device S 1. The switching device S 5. The switching device S 3 is turned off, v ab =- nV 1, v cd =- V 2 / 2. The resonant current i L increases in the positive direction, t At time 3 i L the amplitude is the largest, but the integration capacitor no longer integrates. The counter is used for counting to achieve symmetry in time between Phase 3 and Phase 1; Phase 4. The operation of the switching device in this phase is symmetric to that in Phase 2. The switching device S 3 is turned on, and the switching device S 1, the switching device S 5, the switching device S 4 is turned off. v ab = 0, v cd = - V 2 / 2. The resonant current continues to resonate until t the current crosses zero at time 4, completing a full switching cycle.

4. The charge control method based on a dual-active-bridge resonant converter according to claim 1, wherein The steady-state trajectory models of the four working modes in step S3 are respectively: , Wherein, V CrN is the resonant capacitor voltage, V oN is the ratio of the output voltage to the input voltage, i LN is the normalized resonant current, V Cr0N and I L0N are t the initial values of the normalized capacitor voltage and the initial value of the inductor current at time 0, V Cr1N and I L1N are t the initial values of the normalized capacitor voltage and the initial value of the inductor current at time 1, V Cr2N and I L2N are t the initial values of the normalized capacitor voltage and the initial value of the inductor current at time 2, V Cr3N and I L3N are t the initial values of the normalized capacitor voltage and the initial value of the inductor current at time 3.

5. Digital control system based on a dual-active-bridge resonant converter, characterized in that, The system is used to implement the charge control method based on the dual-active-bridge resonant converter described in claims 1-4. The digital control system based on the dual-active-bridge resonant converter includes: Resetable Integrating Circuit: It consists of two-stage operational amplifier OP1, two-stage operational amplifier OP2, integrating capacitor C i , sampling resistor R s , input resistor R 1 and input resistor R i 、 feedback resistor R 2 and a reset switch; The current transformer CT extracts the resonant current signal with a turns ratio of 1: N , converts it into a voltage signal through the sampling resistor R s . This voltage signal passes through a first-stage inverting amplifier OP1 to obtain a voltage signal with proportional scaling v s . Then, it passes through a first-stage integrating operational amplifier OP2 to convert the integral charge information of the current into the voltage information on the integrating capacitor v ct C i . The non-inverting input terminal of OP2 is connected to a DC voltage v Ci V ramp to achieve ramp compensation. By the superposition theorem, an equivalent generated current I ramp is used for integration, and finally a voltage signal containing DC bias, ramp compensation, and current integration is output v sum . It is used to convert the resonant current signal into an integral voltage, realize charge quantization and ramp compensation, and provide key signals for control;​​ Current detection circuit: including a scaling unit, a DC bias superposition module and a signal conditioning circuit; the scaling unit directly utilizes the voltage signal output by the resetable integration circuit v ct , adds a voltage through the DC bias superposition module V bias to convert it into a positive value, and then performs filtering and amplification processing through the signal conditioning circuit, and outputs it to the digital controller. The digital signal processor DSP dynamically adjusts the current value required for the soft switch according to the comparison result to achieve zero-voltage turn-on, that is, to achieve soft switching. The voltage signal v ct is a proportional scaling voltage signal of the resonant cavity current and is consistent with the resonant current waveform; Digital controller: It is jointly composed of a digital signal processor DSP and a complex programmable logic device CPLD. The DSP integrates an analog-to-digital converter module, i.e., the ADC module, 4 digital-to-analog converter modules, i.e., the DAC module, 4 high-speed comparators, and a PI adjustment unit, which is used to sample voltage and current signals and perform loop calculations. The CPLD includes an edge detection module, a state machine module, and a dead-time complementary module, which are used to convert the DSP output signal into a complementary PWM wave with dead time to control the action of the switching tubes.

6. The digital control system based on a dual-active-bridge resonant converter according to claim 5, wherein The amplification factors of the two-stage operational amplifiers OP1 and OP2 in the resetable integrating circuit K 1、 K 2. The output voltage signal v sum are respectively: , Among them, k is the amplification factor from the resonant current to the voltage across the integrating capacitor, i L is the resonant current, R i is the input resistance, t 1 is the termination time of stage 1.

7. The digital control system based on a dual-active-bridge resonant converter according to claim 5, wherein The reset switch in the resetable integrating circuit is controlled by the reset signal res output by the digital controller and is used to discharge the integrating capacitor C i In a half cycle, the integrating capacitor C i During the common conduction time of switch tubes S 1 and switch tube S 4, synchronous integration is performed, and in the remaining time, it is quickly discharged to 0V and maintained at 0V when res is at a high level.

8. The digital control system based on a dual-active-bridge resonant converter according to claim 5, characterized in that The ADC module in the digital controller samples the output current i o and subtracts it from the set current I ref to obtain the loop calculation result output by the PI module V th . Then it is converted into an analog quantity through the DAC and connected to the inverting input terminal of the high-speed comparator 1. The non-inverting input terminal of the high-speed comparator 1 is connected to the external charge information signal v sum . When the charge information signal v sum reaches the threshold voltage V th , the rising-edge pulse signal CMP_OUT1 output by the high-speed comparator 1 is used as the trigger signal for the CPLD, and the CPLD controls the turn-off of S 4 and the turn-on of S 3. Here, the DSP does not directly generate the PWM wave.

9. The digital control system based on a dual-active-bridge resonant converter according to claim 5, wherein The inverting inputs of the high-speed comparator 2 and the high-speed comparator 3 in the digital controller are respectively connected to the resonant current detection signals of two nodes V t1 and V t6 , which respectively represent t the resonant current values at time 1 and t time 6 after conversion. By adjusting the DAC output values at the inverting inputs of comparator 2 and comparator 3, the resonant current values at the turn-on moments of the switching transistors S 1 and S 2 are controlled, and the soft switching of the switching transistors S 1 and S 2 is achieved; the inverting input of comparator 4 is connected to the DC bias voltage V bias , and the non-inverting input is connected to the resonant current signal V bias superimposed with v cmp . By comparing V bias with v cmp , the zero-crossing detection of the resonant current is performed to control the turn-on and turn-off of the switching transistors S 5 and the switching transistor S 6. Using the dead time before the turn-on of the switching transistors, the charge of their junction capacitors is released before the switching transistors are turned on, and the soft switching of the switching transistors S 5 and S 6 is achieved.

10. The digital control system based on the dual-active-bridge resonant converter according to claim 5, characterized in that, The work of the CPLD in the digital controller is as follows: First, the pulse signal generated by the edge detection module is used as a trigger signal to drive the state machine module to generate a PWM wave. The PWM wave is the original PWM wave of all switching tubes and the reset signal res. The original PWM wave is a complementary square wave signal with a duty cycle of 50%, but does not include dead time. Then, the dead-time module inserts a period of delay at the rising edge of the original PWM signal, and finally generates two complementary PWM waves with dead time.

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