CLLLC converter light load efficiency improvement and load expansion circuit based on variable resonant cavity regulation and control and control method thereof

Abstract

The invention discloses a CLLLC converter light load efficiency improvement and load expansion circuit based on variable resonant cavity regulation and control and a control method thereof. The circuit comprises a primary side full bridge, a variable resonant cavity, a secondary side rectifier and an output loop, the digital control unit detects the load in real time, and drives and switches the parallel or series capacitor branch to adjust the equivalent resonant capacitor; and the auxiliary buffer branch is used for soft start and sudden change buffer. According to the control method, capacitance is reduced during light load, efficiency is improved, capacitance is increased during heavy load, gain linearity is kept, the load range is widened, and smooth starting is achieved. The device is compact in structure and easy to control, the light load efficiency can be remarkably improved, the load application range is expanded, and the device has high reliability and good industrialization prospects.

Description

Technical Field

[0001] The present invention relates to the technical field of power electronic converters, and particularly to a circuit and its control method for improving the light-load efficiency and expanding the load range of a CLLLC converter based on variable resonant cavity regulation. Background Art

[0002] Due to its high efficiency and high power density characteristics, the CLLLC resonant converter is widely used in occasions that require efficient energy conversion, such as electric vehicle charging, renewable energy power generation (solar energy, wind energy), data center power supplies, and industrial power supplies. The CLLLC topology generally includes a primary-side full-bridge inverter, an electrical isolation transformer, and resonant elements (inductors, capacitors) on the primary and secondary sides, and can achieve bidirectional energy transfer and soft switching of the switching tubes. However, there are still some deficiencies in the existing CLLLC converters in practical applications:

[0003] Poor light-load performance: Under light-load conditions, the quality factor q of the CLLLC circuit changes (usually decreases), resulting in a significant decrease in the converter efficiency. In addition, the sensitivity of the voltage gain to the switching frequency increases, making control difficult. That is, when the load is very light, to maintain the output voltage, the switching frequency needs to be much higher than the resonant frequency, generating high switching losses and a significant reduction in the overall efficiency.

[0004] Limited load range: When the load increases (the load resistance decreases), the quality factor q of the CLLLC circuit becomes larger, which may cause non-monotonic changes in the voltage gain, increasing the control difficulty. In the case of heavy loads, to obtain the same gain, it may be necessary to reduce the switching frequency and enter the sub-resonant region. At this time, the linear regulation ability of the gain to the frequency weakens, and even the gain may be less than 1. Therefore, it is difficult for traditional CLLLC converters to simultaneously achieve stable gain control and high efficiency from light load to full load, and the applicable load range is relatively narrow.

[0005] Dynamic stress and startup problems: In the prior art, the CLLLC converter is prone to large transient currents and voltage stresses during initial startup or load mutation. Without effective soft-start or buffering measures, high surge stresses may damage the reliability of power devices. At the same time, due to the non-linear change of the gain characteristics in the case of large load jumps, the response of the control system may lag, resulting in problems such as transient overshoot or unstable output.

[0006] To solve the above problems, existing research has proposed introducing a variable resonant cavity structure based on the traditional CLLLC topology. For example, by adding switchable resonant capacitor branches and connecting or disconnecting some resonant capacitors according to the load conditions, the quality factor can be flexibly adjusted. This method can improve the efficiency under light load to a certain extent and expand the load range. However, since the change of the resonant capacitor will cause the resonant frequency to shift, its adjustment range is limited, and an appropriate control strategy is required to maintain the system stability. In addition, existing methods mostly use pre-set thresholds for switching, lacking adaptive fine control of load changes, and not fully considering issues such as stress suppression during the start-up process and dynamic process, leaving room for further improvement. Summary of the Invention

[0007] Technical Objective: Aiming at the deficiencies of the above existing technologies, the present invention discloses a CLLLC converter light-load efficiency improvement and load expansion circuit and its control method based on variable resonant cavity regulation, which can improve the working efficiency of the CLLLC converter under light load conditions, reduce light-load energy loss; expand the load range for the converter to operate stably and efficiently, taking into account the performance from light load to full load; improve the response of the converter under start-up and load mutation conditions, reduce transient voltage and current stress, and improve system reliability.

[0008] Technical Solution: To achieve the above technical objective, the present invention adopts the following technical solution:

[0009] A CLLLC converter light-load efficiency improvement and load expansion circuit based on variable resonant cavity regulation includes a power supply module, a primary full-bridge circuit, a variable resonant cavity, a secondary rectifier full-bridge circuit, and an output loop;

[0010] The power supply module includes an input power supply, which is connected to the primary full-bridge circuit and is used to provide direct current for the primary full-bridge circuit;

[0011] The first input end of the primary full-bridge circuit is connected to the positive pole of the input power supply, and the second input end is connected to the negative pole of the input power supply, and is used to invert the direct current power supply into high-frequency alternating current;

[0012] The variable resonant cavity is connected in series between the primary full-bridge circuit and the secondary rectifier full-bridge circuit, and includes a parallel switch tube S1 and a series switch tube S2. Its first input end and second input end are respectively connected to the middle parts of the left and right bridge arms of the primary full-bridge circuit, and are used to provide appropriate resonant characteristics under different loads;

[0013] The middle parts of the left and right bridge arms of the secondary rectifier full-bridge circuit are respectively connected to the first output end and the second output end of the variable resonant cavity, and its output end is connected to the output loop, and is used to rectify the alternating voltage on the secondary side of the high-frequency isolation transformer into direct current output;

[0014] Both ends of the output circuit are connected to the output terminals of the secondary rectifier full-bridge circuit, and are used to transmit the DC output to the load;

[0015] It further includes a digital control unit and an auxiliary buffer branch. The digital control unit is electrically connected to the primary full-bridge circuit and the variable resonant cavity, and is used to detect the input and output voltages and currents of the converter in real time and execute an adaptive control algorithm, and adjust the working parameters of the primary full-bridge circuit according to the load conditions, so as to dynamically optimize the light-load efficiency and load range;

[0016] The auxiliary buffer branch includes a buffer resistor and a buffer switch tube, which are connected between the primary full-bridge circuit and the variable resonant cavity, and are controlled by the digital control unit to conduct when the CLLLC converter starts or the load changes suddenly to limit the surge current or voltage stress.

[0017] Preferably, the primary full-bridge circuit includes a first switch tube S11, a second switch tube S12, a third switch tube S13 and a fourth switch tube S14. The first switch tube S11 and the second switch tube S12 form the left bridge arm of the primary full-bridge circuit, and the third switch tube S13 and the fourth switch tube S14 form the right bridge arm of the primary full-bridge circuit. The drain of the first switch tube S11 is connected to the positive input terminal of the power supply module, the source of the first switch tube S11 is connected to the drain of the second switch tube S12, the source of the second switch tube is respectively connected to the negative input terminal of the power supply module and the source of the fourth switch tube S14, the drain of the third switch tube S13 is connected to the drain of the first switch tube S11, the source of the third switch tube S13 is connected to the drain of the fourth switch tube S14, and capacitors C11, C12, C13 and C14 are respectively connected in parallel between the drains and sources of the first switch tube S11, the second switch tube S12, the third switch tube S13 and the fourth switch tube S14.

[0018] Preferably, the secondary rectifier full-bridge circuit includes a secondary first switching transistor S21, a secondary second switching transistor S22, a secondary third switching transistor S23, and a secondary fourth switching transistor S24. The secondary first switching transistor S21 and the secondary second switching transistor S22 form the left bridge arm of the secondary rectifier full-bridge circuit, and the secondary third switching transistor S23 and the secondary fourth switching transistor S24 form the right bridge arm of the secondary rectifier full-bridge circuit. The source of the secondary first switching transistor S21 is connected to the first output terminal of the variable resonant cavity and the drain of the secondary second switching transistor S22. The drain of the secondary first switching transistor S21 is connected to the drain of the secondary third switching transistor S23. The source of the secondary second switching transistor S22 is connected to the source of the secondary fourth switching transistor S24. The source of the secondary third switching transistor S23 is connected to the second output terminal of the variable resonant cavity and the drain of the secondary fourth switching transistor S24. The drain of the secondary third switching transistor S23 is connected to the output circuit. The source of the secondary fourth switching transistor S24 is connected to the output circuit. Moreover, capacitors C21, C22, C23, and C24 are respectively connected in parallel between the drains and sources of the secondary first switching transistor S21, the secondary second switching transistor S22, the secondary third switching transistor S23, and the secondary fourth switching transistor S24.

[0019] Preferably, the variable resonant cavity includes a primary resonant inductor Lr, a secondary resonant inductor Ls, a primary resonant capacitor Cr, a secondary resonant capacitor Cs, a parallel switching transistor S1, a parallel resonant capacitor Cr1, a series switching transistor S2, a series resonant capacitor Cr2, an exciting inductor Lm, and a transformer. The drain of the parallel switching transistor S1 is connected to the middle of the left bridge arm of the primary full-bridge circuit and the parallel resonant capacitor Cr1. The source of the parallel switching transistor S1 is connected to the positive terminal of the parallel resonant capacitor Cr1. The drain of the series switching transistor S2 is connected to the drain of the parallel switching transistor S1 and the negative terminal of the primary resonant capacitor Cr. The source of the series switching transistor S2 is connected to one end of the primary resonant inductor Lr and the negative terminal of the series resonant capacitor Cr2. The other end of the primary resonant inductor Lr is connected to one end of the exciting inductor Lm and one end of the primary side of the transformer. The other end of the primary side of the transformer is connected to the other end of the exciting inductor Lm and the middle of the left bridge arm of the primary full-bridge circuit. One end of the secondary side of the transformer is connected to the middle of the left bridge arm of the secondary rectifier full-bridge circuit after being connected in series with the secondary resonant inductor Ls and the secondary resonant capacitor Cs. The other end of the secondary side of the transformer is connected to the middle of the right bridge arm of the secondary rectifier full-bridge circuit.

[0020] Preferably, the digital control unit adopts an adaptive control strategy based on real-time load impedance detection. By detecting the output voltage and current to calculate the load change, when the load is higher than the preset threshold, it triggers to enter the light load mode, and when the load is lower than the preset threshold, it triggers to enter the full load mode. The equivalent parameters of the variable resonant cavity and the full-bridge drive are adjusted in different modes to ensure the high-efficiency operation of the converter under different loads.

[0021] Preferably, the digital control unit is configured with control logics of at least two operating modes, including a light load mode and a full load mode; in the light load mode, a low equivalent resonant capacitor and a corresponding full-bridge modulation method are set to reduce the light load loss, and in the full load mode, a high equivalent resonant capacitor and corresponding control parameters are set to ensure the efficiency and stability at full power output; the digital control unit can automatically determine and switch the control mode according to the real-time change of the load, realizing the automatic optimized operation of the light load and full load conditions.

[0022] A control method for a light load efficiency improvement and load extension circuit of a CLLLC converter based on variable resonant cavity regulation, characterized in that it is applied to a light load efficiency improvement and load extension circuit of a CLLLC converter based on variable resonant cavity regulation as described above, and includes the following steps:

[0023] Step 1, collect the voltage and current information of the output loop of the CLLLC converter in real time, calculate the load power or equivalent impedance, and compare with a preset threshold to determine whether the current load state belongs to light load, medium load or full load;

[0024] Step 2, select the corresponding working mode according to the load state. When the light load state is detected, enter the light load mode control. When the full load state is detected, enter the full load mode control. Otherwise, maintain in the normal mode;

[0025] Step 3, control the parallel switch tube S1 and the series switch tube S2 in the variable resonant cavity according to the selected mode. In the light load mode, drive the parallel switch tube S2 and the series switch tube S1 to remain off to connect the series resonant capacitor Cr2 into the resonant circuit and reduce the total value of the resonant capacitor; in the full load mode, drive the series switch tube S1 and the parallel switch tube S2 to remain on to connect the parallel resonant capacitor Cr1 into the resonant circuit and increase the total value of the resonant capacitor; synchronously adjust the switching frequency or phase of the primary full-bridge circuit during mode switching to ensure a smooth transition of the output voltage;

[0026] Step 4, implement PWM control on the primary full-bridge circuit through the digital control unit. In the light load mode, set the switching frequency of the primary full-bridge circuit at a fixed value close to the resonant frequency and adopt an intermittent turn-on or phase-shift control method to reduce the effective power output; in the full load mode, adopt frequency conversion control to adjust the switching frequency according to the output voltage error to enter the sub-resonant or over-resonant region to maintain the required gain; in the normal mode, work according to the traditional CLLLC control strategy or smoothly transition between the light load and full load modes;

[0027] Step 5: Embed a model predictive control algorithm or a fuzzy control algorithm in the above control process to predict or perform fuzzy inference on the state of the CLLLC converter in the next sampling period, and adjust the switching frequency adjustment amplitude and the switching timings of the parallel switch tube S1 and the series switch tube S2 in real time according to the prediction results, so as to minimize the output error and switching losses and achieve the adaptive optimization of control parameters;

[0028] Step 6: When the converter is powered on initially, control the buffer switch tube of the auxiliary buffer branch to conduct for a preset time, so that the resonant cavity components are slowly charged and then put into normal resonant operation; monitor the output change when the load changes suddenly. If it is detected that the transient deviation of the output voltage exceeds the threshold, temporarily conduct the buffer switch tube to connect the buffer resistor to absorb or provide energy, reduce the fluctuations of the output voltage and current, and then return to the normal state;

[0029] Step 7: Repeat Steps 1 to 6, periodically sample the feedback signal and adjust the control instruction to ensure that the converter operates stably and efficiently within the entire load range.

[0030] Preferably, a model predictive control algorithm is adopted in Step 5, that is, based on the mathematical model of the CLLLC converter, the effects of different control variable adjustments, including the state switching of the parallel switch tube S1, the series switch tube S2, and the change of the primary full-bridge switching frequency on the output voltage deviation and circuit losses at the next moment, are predicted. The control action with the lowest expected loss and the smallest output error is selected through online rolling optimization and implemented, so as to achieve the optimal adjustment of the resonant parameters and output control.

[0031] Preferably, a fuzzy control algorithm is adopted in Step 5 to adjust the variable resonant cavity parameters. The fuzzy control algorithm sets the light load degree, output deviation, and frequency offset amount as fuzzy input variables, and the increase or decrease of the resonant capacitor and frequency adjustment as fuzzy output variables, and determines the switching conditions of the parallel switch tube S1 and the series switch tube S2 and the frequency correction amount of the primary full-bridge circuit through fuzzy rule inference.

[0032] Beneficial effects: The CLLLC converter light load efficiency improvement and load expansion circuit and its control method based on variable resonant cavity regulation provided by the present invention have the following beneficial effects:

[0033] 1. By introducing a variable resonant capacitor and corresponding control strategies, the present invention maintains the effective quality factor of the resonant network within a reasonable range under light load, reducing unnecessary switching losses. The simulation results show that compared with the traditional CLLLC topology where the efficiency drops below 80% under light load, the present invention can increase the light-load efficiency to above about 90%, significantly reducing the energy losses during no-load and light-load operations; by adopting dynamic adjustment of the resonant cavity parameters and multi-mode control, the present invention overcomes the non-linear instability problem of the gain curve under extreme loads. Experiments show that the traditional CLLLC converter may not be able to maintain a stable gain under over-heavy load or over-light load, while the present invention can achieve stable output control throughout the range from no-load (~0% rated) to full-load (100% rated), ensuring a wider load adaptability.

[0034] 2. The adaptive control of the present invention can respond quickly when the load changes suddenly, avoiding large fluctuations in the output. In addition, the addition of the auxiliary buffer circuit makes the startup process smooth and shock-free, reducing the electrical stress on the devices and the risk of damage to the switching tubes and resonant components due to over-stress. Overall, it improves the dynamic performance and operation reliability of the converter; the control parameters and strategies can be flexibly adjusted through software to achieve automatic switching and optimized control of different operation modes. This digital intelligent control has higher precision and reconfigurability compared with traditional analog control, facilitating upgrade and iteration according to application requirements; moreover, the control system of the present invention can be compatible with multiple control logics and automatically switch under different working conditions. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings required for the description of the embodiments or the prior art.

[0036] Figure 1 It is a schematic diagram of the circuit structure of the CLLLC converter of the present invention;

[0037] Figure 2 It is an equivalent circuit diagram of the CLLLC resonant converter of the present invention;

[0038] Figure 3 It is a characteristic curve graph of the efficiency of the CLLLC converter varying with the switching frequency (normalized to the resonant frequency);

[0039] Figure 4 It is a curve graph of the efficiency of the CLLLC converter varying with the ratio k of the exciting inductance to the resonant inductance;

[0040] Figure 5 It is a curve graph of the efficiency of the CLLLC converter varying with the quality factor q;

[0041] Figure 6 It is a frequency response gain curve graph of the converter under the condition of a fixed exciting ratio k;

[0042] Figure 7 It is a converter frequency response gain curve diagram under the condition of a fixed quality factor q;

[0043] Figure 8 It is a comparison diagram of the influence on the efficiency of the CLLLC converter after considering the ratio h of the secondary resonant capacitor to the primary resonant capacitor;

[0044] Figure 9 It is a schematic diagram of the auxiliary buffer branch circuit structure of the present invention;

[0045] Figure 10 It is a comparison diagram of the efficiency curves of a traditional CLLLC converter and the resonant capacitor variable type CLLLC converter of the present invention under different loads;

[0046] Figure 11 It is a comparison diagram of the output gain characteristics of a traditional CLLLC converter and the converter of the present invention under different load conditions;

[0047] Figure 12 It is a flow block diagram of the control method of the present invention. Detailed implementation manners

[0048] The present invention will be more clearly and completely described below by way of a preferred embodiment in conjunction with the accompanying drawings, but the present invention is not limited to the scope of the described embodiment.

[0049] As Figure 1 shown, a CLLLC converter light load efficiency improvement and load expansion circuit based on variable resonant cavity regulation includes a power supply module, a primary full-bridge circuit, a variable resonant cavity, a secondary rectifier full-bridge circuit, and an output loop;

[0050] The power supply module includes an input power supply Vin, which is connected to the primary full-bridge circuit and is used to provide direct current for the primary full-bridge circuit. The power supply module further includes a resistor Rin3, a resistor Rin1, and a capacitor Cin1. One end of the resistor Rin3 is connected to the positive pole of the input power supply Vin, and the other end is connected in parallel with the resistor Rin1 and the capacitor Cin1. After the resistor Rin1 and the capacitor Cin1 are connected in series, both ends are respectively connected to the primary full-bridge circuit;

[0051] The first input end of the primary full-bridge circuit is connected to the positive pole of the input power supply, and the second input end is connected to the negative pole of the input power supply, and is used to invert the direct current power supply into high-frequency alternating current;

[0052] The variable resonant cavity is connected in series between the primary full-bridge circuit and the secondary rectifier full-bridge circuit, and includes a parallel switch tube S1 and a series switch tube S2. Its first input terminal and second input terminal are respectively connected to the middle parts of the left bridge arm and the right bridge arm of the primary full-bridge circuit, and are used to provide appropriate resonant characteristics under different loads;

[0053] The middle parts of the left bridge arm and the right bridge arm of the secondary rectifier full-bridge circuit are respectively connected to the first output terminal and the second output terminal of the variable resonant cavity, and its output terminal is connected to the output loop, and is used to rectify the AC voltage on the secondary side of the high-frequency isolation transformer into a DC output;

[0054] Both ends of the output loop are connected to the output terminal of the secondary rectifier full-bridge circuit, and are used to transmit the DC output to the load. The output loop includes a load Rout and a capacitor Cout, and after the two are connected in series, both ends are respectively connected to both ends of the secondary rectifier circuit;

[0055] It also includes a digital control unit and an auxiliary buffer branch. The digital control unit is electrically connected to the primary full-bridge circuit and the variable resonant cavity, and is used to detect the input and output voltages and currents of the converter in real time and execute an adaptive control algorithm, and adjust the working parameters of the primary full-bridge circuit according to the load conditions, so as to dynamically optimize the light-load efficiency and the load range;

[0056] As Figure 9 shown, the auxiliary buffer branch includes a buffer resistor Rb and a buffer switch tube S31, which are connected between the primary full-bridge circuit and the variable resonant cavity, and are controlled by the digital control unit. When the CLLLC converter starts or the load changes suddenly, it conducts to limit the inrush current or voltage stress. The drain of the buffer switch tube S31 is connected to the drains of the first switch tube S11, the second switch tube S12, and the positive pole of the input power supply Vin. The source of the buffer switch tube S31 is connected to one end of the buffer resistor Rb, and the other end of the buffer resistor Rb is connected to the positive pole of the input power supply Vin.

[0057] The primary full-bridge circuit includes a first switching transistor S11, a second switching transistor S12, a third switching transistor S13, and a fourth switching transistor S14. The first switching transistor S11 and the second switching transistor S12 form the left bridge arm of the primary full-bridge circuit, and the third switching transistor S13 and the fourth switching transistor S14 form the right bridge arm of the primary full-bridge circuit. The drain of the first switching transistor S11 is connected to the positive input terminal of the power supply module, the source of the first switching transistor S11 is connected to the drain of the second switching transistor S12, the source of the second switching transistor is connected to both the negative input terminal of the power supply module and the source of the fourth switching transistor S14, the drain of the third switching transistor S13 is connected to the drain of the first switching transistor S11, the source of the third switching transistor S13 is connected to the drain of the fourth switching transistor S14, and capacitors C11, C12, C13, and C14 are respectively connected in parallel between the drains and sources of the first switching transistor S11, the second switching transistor S12, the third switching transistor S13, and the fourth switching transistor S14.

[0058] The variable resonant cavity includes a primary resonant inductor Lr, a secondary resonant inductor Ls, a primary resonant capacitor Cr, a secondary resonant capacitor Cs, a parallel switching transistor S1, a parallel resonant capacitor Cr1, a series switching transistor S2, a series resonant capacitor Cr2, an exciting inductor Lm, and a transformer. The drain of the parallel switching transistor S1 is connected to the middle of the left bridge arm of the primary full-bridge circuit and the parallel resonant capacitor Cr1, the source of the parallel switching transistor S1 is connected to the positive terminal of the parallel resonant capacitor Cr1, the drain of the series switching transistor S2 is connected to the drain of the parallel switching transistor S1 and the negative terminal of the primary resonant capacitor Cr, the source of the series switching transistor S2 is connected to one end of the primary resonant inductor Lr and the negative terminal of the series resonant capacitor Cr2, the other end of the primary resonant inductor Lr is connected to one end of the exciting inductor Lm and one end of the primary side of the transformer, the other end of the primary side of the transformer is connected to the other end of the exciting inductor Lm and the middle of the left bridge arm of the primary full-bridge circuit, one end of the secondary side of the transformer is connected to the middle of the left bridge arm of the secondary rectifier full-bridge circuit after being connected in series with the secondary resonant inductor Ls and the secondary resonant capacitor Cs, and the other end of the secondary side of the transformer is connected to the middle of the right bridge arm of the secondary rectifier full-bridge circuit.

[0059] The secondary rectifying full-bridge circuit includes a secondary first switching transistor S21, a secondary second switching transistor S22, a secondary third switching transistor S23, and a secondary fourth switching transistor S24. The secondary first switching transistor S21 and the secondary second switching transistor S22 form the left bridge arm of the secondary rectifying full-bridge circuit, and the secondary third switching transistor S23 and the secondary fourth switching transistor S24 form the right bridge arm of the secondary rectifying full-bridge circuit. The source of the secondary first switching transistor S21 is connected to the first output terminal of the variable resonant cavity and the drain of the secondary second switching transistor S22. The drain of the secondary first switching transistor S21 is connected to the drain of the secondary third switching transistor S23. The source of the secondary second switching transistor S22 is connected to the source of the secondary fourth switching transistor S24. The source of the secondary third switching transistor S23 is connected to the second output terminal of the variable resonant cavity and the drain of the secondary fourth switching transistor S24. The drain of the secondary third switching transistor S23 is connected to the output circuit. The source of the secondary fourth switching transistor S24 is connected to the output circuit. And capacitors C21, C22, C23, and C24 are respectively connected in parallel between the drains and sources of the secondary first switching transistor S21, the secondary second switching transistor S22, the secondary third switching transistor S23, and the secondary fourth switching transistor S24.

[0060] To analyze the transmission efficiency of the resonant network of the present invention, refer to Figure 2 the equivalent circuit model shown. In this model, the primary resonant branch is equivalent to Lr-C eff , where Lr is the equivalent resonant inductor, and C eff is the equivalent resonant capacitor. The secondary is equivalently coupled to Lm, and the equivalent load Req is connected in parallel across Ce ff at both ends. Based on this, the input impedance Zin and the voltage gain G can be deduced.

[0061] Define the normalized frequency f n as f s is the switching frequency, f r is the resonant frequency, and the characteristic impedance Z r is The quality factor q is defined as The ratio k of the exciting inductor to the resonant inductor is defined as The equivalent load Req is If R is the load, then the efficiency of the CLLLC converter can be deduced from the equivalent model diagram of the CLLLC resonant converter as follows:

[0062]

[0063] Furthermore, based on the FHA equivalent model of the CLLLC resonant converter, by using the linear circuit solution method, the voltage gain of the CLLLC resonant converter is obtained as:

[0064]

[0065] By exploring the impedance characteristics of the converter, the conditions for the switch to achieve ZVS can be further obtained. According to Figure 2 the input impedance of the converter can be obtained as:

[0066]

[0067] According to the efficiency formula, the curve of efficiency varying with frequency can be plotted as Figure 3 shown. According to the above formula, the frequency response efficiency curves of converters with different k values under the same q value and the frequency response efficiency curves of converters with different q values under the same k value are respectively as Figure 4 and Figure 5 shown. The frequency response gain curves of the converter are respectively as Figure 6 and Figure 7 shown. The efficiency comparison diagram after adding the ratio relationship between the secondary side and the primary side resonant capacitors is as Figure 8 shown.

[0068] From Figure 4 and Figure 6 it can be seen that when the quality factor q remains unchanged, that is, under the condition of constant load, on the one hand, as the k value increases, the maximum gain of the converter decreases, the switching frequency corresponding to the maximum gain decreases, and the under-resonant amplification region gradually shows non-linearity. If the k value is too large, the converter will even lose the amplification ability; on the other hand, as the k value decreases, the efficiency of the converter will also decrease significantly. Therefore, from different perspectives, an appropriate k value should be selected to ensure that the converter has higher efficiency under the condition of meeting the gain.

[0069] From Figure 5 and Figure 7 it can be obtained that when the k value is fixed, the quality factor q represents the weight of the load. The larger the quality factor q, the heavier the load. At the same frequency, the voltage gain is also smaller. When the load is too heavy, in the under-resonant region, the linear regulation ability of frequency to gain will be lost, and even the situation where the gain is less than 1 will occur. The smaller the quality factor q, the lighter the load. At the same frequency, the voltage gain is also larger. When the load is too light, when the quality factor q becomes 1 / 4 of the original, the efficiency of the converter drops significantly.

[0070] From Figure 8 it can be obtained that the efficiency comparison diagram after adding the ratio relationship between the secondary side and the primary side resonant capacitors. In the figure, h is the ratio of the secondary side resonant capacitor to the primary side resonant capacitor. The dotted line relationship in the figure is the efficiency curve of the converter after adding h, and the solid line relationship is the efficiency curve without adding h. By comparison, it can be obtained that the influence of h on the efficiency of the converter is not significant and can be ignored.

[0071] The digital control unit adopts an adaptive control strategy based on real-time load impedance detection. It calculates the load change by detecting the output voltage and current. When the load is higher than the preset threshold, it triggers to enter the light load mode. When the load is lower than the preset threshold, it triggers to enter the full load mode. The equivalent parameters of the variable resonator cavity and the full-bridge drive are adjusted in different modes to ensure the high-efficiency operation of the converter under different loads.

[0072] The digital control unit is configured with control logics for at least two operating modes, including the light load mode and the full load mode. In the light load mode, a lower equivalent resonant capacitance and corresponding full-bridge modulation methods are set to reduce the light load loss. In the full load mode, a higher equivalent resonant capacitance and corresponding control parameters are set to ensure the efficiency and stability at full power output. The digital control unit can automatically determine and switch the control mode according to the real-time change of the load, realizing the automatic optimized operation under light load and full load conditions.

[0073] Each part of the above circuit is connected as a whole through a variable resonant cavity: the output of the primary full-bridge circuit is fed into the transformer through the variable resonant cavity, and the secondary side of the transformer provides a DC output to the load through the secondary rectifier full-bridge circuit. In the variable resonant cavity, the parallel switch tube S1 and the parallel resonant capacitor Cr1 are connected in series and then connected in parallel across both ends of the primary resonant capacitor Cr; the series switch tube S2 and the series resonant capacitor Cr2 are connected in parallel to form a branch, one end is connected to the node between the primary resonant capacitor Cr and the primary resonant inductor Lr, and the other end is connected to the connection node between the resonant inductor Lr and the primary winding of the transformer. By controlling the on and off of S1 and S2, the participation mode of the equivalent resonant capacitor in the loop can be changed: when S1 is turned on, it is equivalent to connecting an additional parallel resonant capacitor Cr1 in parallel to the primary resonant capacitor Cr, increasing the total resonant capacitor; when S2 is turned off, the series resonant capacitor Cr2 is connected in series to the resonant loop, reducing the total resonant capacitor. Each switch tube S11–S14 of the primary full-bridge circuit conducts alternately in pairs to generate a high-frequency alternating current: the midpoint of the first switch tube S11 and the second switch tube S12 is connected to one end of the primary resonant capacitor Cr, and the midpoint of the third switch tube S13 and the fourth switch tube S14 is connected to the other end of the primary winding of the transformer. In the secondary rectifier full-bridge circuit, the midpoint of the secondary first switch tube S21 and the secondary second switch tube S22 is connected to one end of the secondary resonant inductor Ls through the secondary resonant capacitor Cs, and the other end of Ls is connected to one end of the secondary winding of the transformer; the midpoint of the secondary third switch tube S23 and the secondary fourth switch tube S24 is connected to the other end of the secondary winding of the transformer. In this way, a complete power circuit of the traditional CLLLC resonant converter is formed. Through different state combinations of S1 and S2, dynamic regulation of the resonant parameters (especially the resonant capacitance value) can be realized inside the resonant cavity, so as to adapt to different load conditions. The digital control unit controls the on and off of the S11–S14 full-bridge, S1, S2 and the auxiliary branch S31 respectively through an optocoupler or a drive circuit, realizing the comprehensive management of the energy flow direction and the resonant parameters.

[0074] As Figure 12 shown, the present invention also provides a control method for improving the light-load efficiency and expanding the load of a CLLLC converter based on variable resonant cavity regulation, which is applied to a CLLLC converter light-load efficiency improvement and load expansion circuit based on variable resonant cavity regulation as described above, and includes the following steps:

[0075] Step 1, collect the voltage and current information of the output loop of the CLLLC converter in real time, calculate the load power or equivalent impedance, and compare it with a preset threshold to judge whether the current load state belongs to light load, medium load or full load;

[0076] The digital control unit collects the output voltage and current, estimates the load impedance or output power to determine the current load status. For example, it determines whether the load belongs to the light load, medium or full load range. The light load threshold and full load threshold can be set. When the load level is higher than the light load threshold, it is considered to enter the light load mode. When it is lower than the full load threshold, it is considered to be in the full load mode. Otherwise, it is in the normal mode.

[0077] Step 2: Select the corresponding operating mode according to the load status. When the detected status is light load, enter the light load mode control. When the detected status is full load, enter the full load mode control. Otherwise, maintain the normal mode.

[0078] Automatically switch the control mode according to the detected load status, and correspondingly control the on-off combination of S1 and S2 in the resonant cavity:

[0079] In the light load mode (large load, low output power), the control unit drives the series switch tube S2 to turn off and keeps the parallel switch tube S1 off, connecting the series resonant capacitor Cr2 to the resonant circuit. At this time, the energy of the primary resonant capacitor Cr needs to be transferred to the resonant inductor Lr after being connected in series with Cr2, effectively reducing the total capacitance value in the resonant cavity, compensating for the influence of the small quality factor q under light load on the reduction of the converter efficiency. At the same time, by reducing the resonant capacitor, the resonant frequency is correspondingly increased, enabling the converter to maintain the output without increasing the switching frequency under light load, reducing the switching loss and improving the light load efficiency.

[0080] In the full load mode (small load, close to full load output), the control unit drives the parallel switch tube S1 to conduct, and at the same time ensures that the series switch tube S2 is off, connecting the parallel resonant capacitor Cr1 to the resonant circuit (at this time, the energy of the primary resonant capacitor Cr needs to be transferred to the resonant inductor Lr after being connected in parallel with Cr1). In this way, the total capacitance value in the resonant cavity is effectively increased, reducing the influence of load changes on the quality factor q, and avoiding the situation that the gain curve is too steep or even the gain is less than 1 and out of control. It restores the linear regulation characteristic of the frequency to the gain, ensuring stable control in the full load and heavy load regions. At the same time, since increasing the resonant capacitor will reduce the resonant frequency, the switching frequency can be reduced in the full load mode (compared with the light load mode), so as to maintain high efficiency during high-power output and avoid converter detuning.

[0081] Under medium load (rated load), the converter can be configured to the default state (S1 off, S2 on). At this time, the resonant cavity only includes the originally designed resonant inductor Lr, the primary resonant capacitor Cr (as well as the transformer leakage inductance and magnetizing inductance). In this state, the converter is equivalent to the traditional CLLLC topology and has the best designed efficiency when approaching the rated power. Through the switching of the above three states, the present invention can inherit the high efficiency advantage of the traditional CLLLC at the rated power throughout the load range, and significantly improve the light load efficiency and broaden the load range.

[0082] Step 3: Control the parallel switch tube S1 and the series switch tube S2 in the variable resonant cavity according to the selected mode. In the light load mode, drive the parallel switch tube S2 and the series switch tube S1 to remain off to connect the series resonant capacitor Cr2 into the resonant circuit and reduce the total value of the resonant capacitors; in the full load mode, drive the series switch tube S1 and the parallel switch tube S2 to remain on to connect the parallel resonant capacitor Cr1 into the resonant circuit and increase the total value of the resonant capacitors; when switching modes, synchronously adjust the switching frequency or phase of the primary full-bridge circuit to ensure a smooth transition of the output voltage.

[0083] Step 4: Implement PWM control on the primary full-bridge circuit through the digital control unit. In the light load mode, set the switching frequency of the primary full-bridge circuit at a fixed value close to the resonant frequency and adopt an intermittent turn-on or phase-shift control method to reduce the effective power output; in the full load mode, adjust the switching frequency according to the output voltage error to enter the sub-resonant or over-resonant region by variable frequency control to maintain the required gain; in the normal mode, operate according to the traditional CLLLC control strategy or smoothly transition between the light load and full load modes.

[0084] Step 5: Embed a model predictive control algorithm or a fuzzy control algorithm in the above control process to predict or perform fuzzy inference on the state of the CLLLC converter in the next sampling period, and adjust the switching frequency adjustment amplitude and the switching timings of the parallel switch tube S1 and the series switch tube S2 in real time according to the prediction results to minimize the output error and switching losses and achieve adaptive optimization of the control parameters.

[0085] The digital control unit runs an advanced control algorithm internally to determine the switching timing of S1 and S2 and the driving parameters of the main power tubes. Preferably, the present invention adopts a Model Predictive Control (MPC) algorithm to predict the response of the system in the next several switching cycles according to the established converter model, compare the effects of different control actions (such as changing the state of S1 / S2 or adjusting the frequency and phase), and select a set of control actions with the optimal optimization index (such as the highest efficiency or the lowest loss). The MPC algorithm can predict the trend of the load change before or just when it occurs, adjust the states of S1 and S2 in advance, and achieve a smooth transition of the resonant cavity parameters, avoiding hysteresis and oscillation caused by hysteresis or manual threshold judgment. In addition, in the case of large model uncertainty, a fuzzy control algorithm can also be selected: according to the pre-designed fuzzy rules, the duty cycle or switching state of S1 and S2 is adjusted in real time based on fuzzy input quantities such as the load change rate and the output deviation to achieve flexible adjustment of the resonant cavity. Whether using MPC or fuzzy control, the above adaptive strategy upgrades the control of S1 and S2 from the original open-loop / semi-open-loop switching based on fixed thresholds to a closed-loop intelligent adjustment, greatly improving the efficiency optimization and stable control capabilities under different loads.

[0086] The digital control unit samples the input voltage, output voltage, and current signals using a high-speed ADC, and calculates the output power and error in real time. In each switching cycle of the controller, the control instructions are updated according to the feedback, including the switching frequency, phase-shift angle or duty cycle of the primary full-bridge, and the switching states of S1 and S2. For the main power transistors of the full-bridge, the present invention can combine a hybrid control strategy of variable-frequency control + phase-shift control: different modulation schemes are adopted in different modes. For example, in the full-load mode, the output is mainly adjusted by variable frequency, and in the light-load mode, it operates at a fixed frequency close to the resonance frequency, and the power output is adjusted by adjusting the phase-shift angle between the primary full-bridge circuit and the secondary rectifier full-bridge circuit or intermittent oscillation stop control. The control unit automatically switches the above control modes according to the load conditions, and utilizes the high resolution and rapidity of digital control to achieve seamless transition and precise control during mode switching.

[0087] Step 6: At the initial power-on of the converter, control the buffer switch tube of the auxiliary buffer branch to conduct for a preset time, so that the resonant cavity components are slowly charged before entering normal resonant operation; monitor the output change when the load changes. If it is detected that the transient deviation of the output voltage exceeds the threshold, temporarily conduct the buffer switch tube to connect the buffer resistor to absorb or provide energy, reduce the fluctuations of the output voltage and current, and then return to the normal state;

[0088] In the initial power-on stage of the converter, the control unit first keeps the main power switches S11–S14 closed, and closes the auxiliary buffer switch tube S31, allowing the input power supply to charge the DC bus capacitor and the primary resonant capacitor Cr through the buffer resistor Rb, restricting the rising rate of the inrush current. When the bus voltage and the resonant circuit voltage reach a certain level, then turn on the main circuit and turn off S31 to bypass Rb, entering the normal operation mode. Similarly, when the load suddenly decreases (from heavy load to no load or light load), the controller can temporarily reduce the switching frequency and trigger the auxiliary buffer branch to conduct for a moment through fuzzy logic to absorb the excess energy or charge the resonant capacitor to prevent the transient overshoot of the output voltage. The auxiliary buffer branch is intelligently managed by the control unit throughout the operation process, and is only put into operation for a short time when needed, without significantly affecting the efficiency. Through the above soft start and dynamic buffer measures, the present invention effectively reduces the stress during startup and dynamic processes, and addresses the problems of large current impact during open-loop startup and severe voltage oscillation during load mutation of traditional CLLLC converters.

[0089] Step 7: Repeat Steps 1 to 6, periodically sample the feedback signal and adjust the control instructions to ensure that the converter operates stably and efficiently throughout the load range.

[0090] In summary, by changing the size of the resonant capacitor, this circuit inherits the high-efficiency ability of the traditional CLLLC converter at the rated power, reduces the influence of load variation on the quality factor of the traditional CLLLC converter, improves the efficiency of the circuit under light load, and broadens the load range of the circuit. This solution can also be used in other resonant circuits, but the change range is limited. Since the resonant frequency will change with the change of the resonant capacitor, the resonant capacitor should not be adjusted too large or too small, and the resonant frequency should be kept within a reasonable range.

[0091] As Figure 10 shown is the comparison of the efficiency curves between the traditional CLLLC converter and the CLLLC converter with variable resonant capacitor at a rated power of 6 kW.

[0092] Among them, the black curve is the efficiency curve of the traditional CLLLC converter at different loads. It can be seen that the efficiency of the converter drops rapidly to below 80% under light load. The red curve is the efficiency curve of the CLLLC converter with variable resonant capacitor at different loads. It can be seen that the efficiency of the converter drops slowly under light load and remains at a relatively high level. By comparison, it can be obtained that the efficiency of the CLLLC converter with variable resonant capacitor is significantly improved under light load.

[0093] As Figure 11 shown is the comparison of the gain curves between the traditional CLLLC converter and the CLLLC converter with variable resonant capacitor. Among them, the black curve is the gain curve of the traditional CLLLC converter under light load and heavy load. It can be seen that the converter loses the linear regulation ability of frequency on gain at full load, and the sensitivity of frequency to gain increases under light load. The red curve is the gain curve of the CLLLC converter with variable resonant capacitor under light load and heavy load. It can be seen that the gain curve of the converter remains monotonic and rises gently under light load or full load. By comparison, it can be seen that the CLLLC converter with variable resonant capacitor can broaden the load range of the converter.

[0094] Embodiment 1

[0095] This embodiment provides a CLLLC resonant converter circuit based on a variable resonant cavity, including a primary full-bridge circuit, a variable resonant cavity, and a secondary rectifier circuit.

[0096] The primary full-bridge circuit is composed of power switching tubes S11, S12, S13, and S14 such as MOSFETs. The full-bridge DC bus input is Vin. S11 and S12 form one bridge arm, and S13 and S14 form the other bridge arm. One end of the primary resonant capacitor Cr is connected to the midpoint of S11 and S12, and one end of the primary winding of the transformer is connected to the midpoint of S13 and S14. The primary full-bridge circuit is sent a PWM signal by the digital control unit and conducts alternately in a diagonal manner (S11 and S14, S12 and S13 conduct in pairs respectively), generating a high-frequency AC voltage and sending it into the variable resonant cavity.

[0097] The variable resonant cavity includes a resonant inductor Lr and a resonant capacitor Cr on the primary side, and a resonant inductor Ls and a resonant capacitor Cs on the secondary side. The two form a resonant network across the primary and secondary sides through transformer coupling. In addition, the variable resonant cavity also includes an excitation inductor Lm (provided by the magnetic circuit of the transformer) and two switchable resonant capacitor branches: a parallel branch S1–Cr1 and a series branch S2–Cr2. The parallel switch tube S1 is connected in series with the parallel resonant capacitor Cr1 and is connected across both ends of the primary resonant capacitor Cr. The series switch tube S2 is connected in parallel with the series resonant capacitor Cr2 to form a branch, one end is connected to the node of the primary resonant capacitor Cr and the primary resonant inductor Lr, and the other end is connected to the connection point of the primary resonant inductor Lr and the primary winding of the transformer. The primary resonant capacitor Cr and the primary resonant inductor Lr form a basic resonant circuit, and its natural resonant frequency The secondary resonant inductor Ls and the resonant capacitor Cs are connected in series with the secondary side of the transformer. Usually, in the design, after the secondary resonant elements are converted to the primary side for equivalence, they satisfy a certain proportional relationship with the primary resonant elements. In this embodiment, in the analysis and design process, the second-order influence of the ratio difference between the secondary resonant capacitor Cs and the primary resonant capacitor Cr on the efficiency is ignored, and it is equivalent to the primary side calculation, that is, it is assumed that the ratio h = Cs / Cr has little influence on the efficiency, as Figure 8 shown.

[0098] In the default configuration of the variable resonant cavity, that is, S1 is disconnected and S2 is conducting, Cr1 is disconnected and Cr2 is short-circuited and bypassed by S2. The resonant circuit only includes the primary resonant capacitor Cr, the primary resonant inductor Lr, and the excitation inductor Lm. At this time, the working mode of the converter is equivalent to the traditional CLLLC topology. When the load is close to the rated value, the control system can choose to maintain this configuration, so as to achieve the highest efficiency at the rated point using the original design parameters.

[0099] When the load gradually increases from the rated value and enters the light load region, if the original resonant parameters are continued to be maintained, the quality factor q will decrease, the circuit efficiency will decrease significantly, and the output gain adjustment will become difficult. For this reason, the present invention introduces a light load mode: when the control unit detects that the load increases to below the preset threshold, it switches S2 off and keeps S1 off at the same time, and connects Cr2 in series to the circuit. The effect of this is equivalent to reducing the total capacitance value of the resonant cavity, because the equivalent capacitance after Cr and Cr2 are connected in series is smaller than Cr itself, eliminating the influence of the decrease in the quality factor q on the converter efficiency during light load. At the same time, the resonant frequency increases accordingly, so that the converter can maintain the output without increasing the switching frequency during light load, reducing the switching loss and improving the light load efficiency. In addition, the smaller equivalent capacitance means that the current peak value decreases under light load power, reducing the current stress of the switch tube to a certain extent and improving the light load efficiency. Therefore, the converter efficiency curve in the light load mode is significantly better than the traditional mode, see Figure 10The improvement of the red curve relative to the black curve in the light load region.

[0100] Conversely, when the load decreases to full load or even the overload critical point, the present invention enters the full load mode: the control unit controls S1 to conduct, while keeping S2 conducting, and connects Cr1 in parallel to the resonant circuit. The effect of this is equivalent to increasing the total capacitance value of the resonant cavity, because the equivalent capacitance after Cr and Cr1 are connected in parallel is greater than Cr itself. The resonant frequency then decreases, such that even when the load is heavy and a higher gain is required, it is not necessary to make the frequency too high to provide the required gain, avoiding the problem that the gain curve flattens or even drops in the deep under-resonance state. Since reducing the resonant frequency allows operation at a lower switching frequency, the high-frequency switching losses are reduced. At the same time, the larger resonant capacitance reduces the influence of load changes on the gain, avoiding the situation where the gain is too high or even out of control. Figure 11 Shown is the change in the gain characteristics of the present invention under different loads. It can be seen that even under a very heavy load, the gain can still be monotonously controlled, without the gain drop situation like that of the traditional LLC.

[0101] Through the automatic switching of the above three configurations of the light load mode, default (medium load) mode and full load mode, the present invention significantly broadens the operating range of the converter from no load to full load. Experiments and simulations both show that the variable resonant cavity scheme can enable the CLLLC converter to maintain high efficiency and easily controllable gain characteristics in a wider load range.

[0102] The secondary rectifier full-bridge circuit adopts a full-bridge rectification structure, similar to the traditional design. In this embodiment, we select synchronous rectification MOSFETs as S21~S24 to reduce the rectification loss. The two ends of the secondary side of the transformer are respectively connected to a pair of bridge arms (S21 / S22 and S23 / S24). Among them, the common node of S21 and S22 is connected to the secondary side resonant capacitor Cs through the secondary side resonant inductor Ls, and the other end of Ls is connected to one end of the secondary side winding of the transformer; the common node of S23 and S24 is directly connected to the other end of the secondary side of the transformer. When a pair of switches in the primary side full-bridge conducts, the corresponding diagonal rectifier diodes in the secondary side conduct, rectifying the high-frequency alternating current into a direct current output Vo. For the sake of simplified analysis, we assume that the secondary side resonant parameters are designed corresponding to the primary side, so that the main behavior of the resonant network can be equivalently analyzed on the primary side.

[0103] Embodiment 2

[0104] This embodiment focuses on the implementation and control process of the digital control unit. The digital control unit can be implemented using a DSP of TI Corporation (such as the TMS320F2837x series) or a control board based on FPGA, and internally includes an ADC sampling, voltage and current sensing interfaces, and a PWM waveform generation module.

[0105] During operation, the digital control unit executes the main control algorithm once every fixed control period (e.g., every 100 μs), including the following steps:

[0106] Data acquisition and status judgment: Obtain the input voltage Vin, output voltage Vo, and output current Io through sensors, and calculate the output power Po = Vo × Io. Then judge the load status according to the preset thresholds. If Po or Io is lower than the light load threshold, mark the current as the light load state; if it is higher than the full load threshold, mark it as the full load state; if it is between the two, it is in the normal (medium load) state. The light load threshold and full load threshold can be determined by experiments. For example, the light load threshold is taken as 20% of the rated output power, and the full load threshold is taken as 80% of the rated power.

[0107] Mode decision and resonator configuration: Determine the mode to be switched according to the judgment result of the previous step, and correspondingly set the configuration of the variable capacitance branch in the resonator:

[0108] If the current is in the light load state and was not in the light load mode before, trigger to enter the light load mode: The control signal makes S2 open and S1 remain open, so as to connect Cr2 into the resonance circuit and reduce the resonance capacitance value.

[0109] If the current is in the full load state and was not in the full load mode before, trigger to enter the full load mode: The control signal makes S1 conduct and S2 remain conducting (or if it was turned off for other reasons before, turn it on again), connect Cr1 into the resonance circuit, and increase the equivalent resonance capacitance.

[0110] If the current is in the medium / rated load state and was in the light load or full load mode before, restore the default mode: The control signal makes S1 open and S2 conduct, and only the primary side Cr participates in the resonance.

[0111] If the state does not change across the threshold, keep the original mode and the corresponding states of S1 and S2 unchanged.

[0112] During the switching process, the control unit uses zero current or zero voltage detection to select the best moment for switching S1 and S2, so as to achieve zero current switching (ZCS) or zero voltage switching (ZVS) as much as possible, and minimize the disturbance to the circuit operation caused by dynamic adjustment. At the same time, a certain amount of hysteresis judgment is introduced to avoid frequent jitter in switching modes near the threshold.

[0113] Main power control: Adjust the drive parameters of the primary full bridge according to the current mode and load error situation:

[0114] In the light load mode, since the resonance frequency increases and the gain decreases, the control unit mainly adjusts the output through frequency conversion control: When it detects that the output voltage is lower than the given value, slightly reduce the switching frequency f s (enter the sub-resonance region) to increase the gain, otherwise increase f sMaintain stable output. Since the resonant parameters are optimized in the light load mode, the gain varies linearly and gently with frequency, and the controller can quickly adjust the frequency to reach the steady state by using PI closed-loop control. The driving of the synchronous rectifier switches S21~S24 is also automatically generated by the control unit according to the conduction timing of the primary side bridge to achieve ZCS turn-off of the secondary side switching tubes.

[0115] In the full load mode, due to the reduced resonant frequency and high gain, the control unit can fix the switching frequency to operate near the resonant frequency to ensure ZVS of the primary side bridge switches. At the same time, by adjusting the phase shift angle or duty cycle to reduce the effective duty cycle (or implementing an intermittent operation mode, that is, making the full bridge stop oscillating periodically to reduce the effective frequency), the appropriate power is output to maintain the stability of Vo. In this way, the switching loss of the primary side bridge is further reduced when full loaded.

[0116] In the default mode (medium load), the control law follows the control method of traditional CLLLC. Generally, a strategy of fixed frequency or slow frequency conversion combined with phase shift is adopted to maintain the output. When the load is close to the rated value and the converter operates near the resonant point, the controller can lock the frequency and mainly fine-tune the output by adjusting the phase or duty cycle of the secondary side synchronous rectification to ensure operation at the highest efficiency point.

[0117] Model prediction / fuzzy tuning: The above main power control gives the basic frequency or phase adjustment direction. However, in order to further improve the response speed and optimize the performance, the control unit superimposes a model prediction or fuzzy control module to estimate and correct the behavior of the converter at the next moment. For example, under model predictive control, the controller calls the offline modeling data of the converter (such as the state space model or transfer function) in real time, predicts the influence of different control actions (such as increasing or decreasing the frequency by a certain amplitude, whether the mode needs to be switched, etc.) on the output deviation and efficiency in the next few cycles, and selects the scheme with the minimum cost function to execute. Another example is when using fuzzy control. According to fuzzy variables such as the current frequency offset and the change rate of the output error, it is judged whether to switch the mode in advance or adjust the frequency increment through a preset rule table, so as to perform a feed-forward correction before the system has a large deviation. The introduction of these intelligent control algorithms makes the system more adaptable to load and input changes, reduces the steady-state error and oscillation, and ensures high-efficiency operation throughout the process.

[0118] Auxiliary branch and protection control: In each control cycle, the control unit checks whether the system is in an abnormal or stress state, such as detecting the start flag, load sudden change flag, and whether the voltage and current at each key node exceed the limit. Once it is determined that the system is in the initial startup stage or the load has changed drastically, the control unit immediately activates the auxiliary buffer branch: the buffer resistor Rb is inserted by controlling the conduction of S31. If it is the startup stage, S31 conducts for a preset time (such as several milliseconds) to limit the initial charging current, and then S31 is turned off to resume normal operation after the main power control is established normally. If it is the load mutation stage, S31 is temporarily conducted as needed to absorb the excess energy of the resonant circuit or buffer the voltage jump. In addition, the control unit is also responsible for monitoring overvoltage and overcurrent conditions. If it detects that the output voltage exceeds the safety threshold or the current of the switching device increases abnormally, it enters the protection mode (such as turning off the full-bridge output, triggering the circuit breaker, etc.) to protect the system safety.

[0119] The above control process is executed at high speed in a digital control platform, realizing the full-process management of the converter operation state. Through this adaptive multi-mode control, the CLLLC converter of the present invention can automatically adjust to the optimal operation state under different loads and different working conditions. For example, when the load gradually decreases from full load, the control system will successively go through stages such as frequency increase (maintaining gain), entering the default mode, and then entering the light load mode, with smooth transitions at each stage and maintaining high efficiency. When the load increases again, the process is reversed, minimizing the efficiency loss while ensuring stable output. During the whole process, the output voltage fluctuation is controlled within a very small range, and the switching devices always work in the soft-switching interval, without a sudden increase in hard-switching losses.

[0120] The above are only the preferred embodiments of the present invention. It should be pointed out that for those of ordinary skill in the art, without departing from the principle of the present invention, several improvements and refinements can still be made, and these improvements and refinements should also be regarded as the protection scope of the present invention.

Claims

1. A circuit for improving light-load efficiency and expanding load of a CLLLC converter based on variable resonant cavity regulation, characterized in that It includes a power supply module, a primary full-bridge circuit, a variable resonant cavity, a secondary rectifier full-bridge circuit, and an output loop; The power supply module includes an input power supply, which is connected to the primary full-bridge circuit and is used to provide a DC current for the primary full-bridge circuit; The first input terminal of the primary full-bridge circuit is connected to the positive pole of the input power supply, and the two ends are connected. The second input terminal is connected to the negative pole of the input power supply and is used to invert the DC power input into a high-frequency AC; The variable resonant cavity is connected in series between the primary full-bridge circuit and the secondary rectifier full-bridge circuit. It includes a parallel switch tube S1 and a series switch tube S2. Its first input terminal and second input terminal are respectively connected to the middle part of the left bridge arm and the middle part of the right bridge arm of the primary full-bridge circuit, and is used to provide appropriate resonant characteristics under different loads; The middle part of the left bridge arm and the middle part of the right bridge arm of the secondary rectifier full-bridge circuit are respectively connected to the first output terminal and the second output terminal of the variable resonant cavity, and its output terminal is connected to the output loop, and is used to rectify the AC voltage on the secondary side of the high-frequency isolation transformer into a DC output; Both ends of the output loop are connected to the output terminal of the secondary rectifier full-bridge circuit and are used to transmit the DC output to the load; It also includes a digital control unit and an auxiliary buffer branch. The digital control unit is electrically connected to the primary full-bridge circuit and the variable resonant cavity, and is used to detect the input and output voltage and current of the converter in real time and execute an adaptive control algorithm, and adjust the working parameters of the primary full-bridge circuit according to the load conditions, so as to dynamically optimize the light-load efficiency and the load range; The auxiliary buffer branch includes a buffer resistor and a buffer switch tube, which are connected between the primary full-bridge circuit and the variable resonant cavity and are controlled by the digital control unit to conduct when the CLLLC converter starts or when the load changes to limit the surge current or voltage stress.

2. The light load efficiency improvement and load extension circuit of a CLLLC converter based on variable resonant cavity regulation according to claim 1, characterized in that The primary full-bridge circuit includes a first switch tube S11, a second switch tube S12, a third switch tube S13, and a fourth switch tube S14. The first switch tube S11 and the second switch tube S12 form the left bridge arm of the primary full-bridge circuit, and the third switch tube S13 and the fourth switch tube S14 form the right bridge arm of the primary full-bridge circuit. The drain of the first switch tube S11 is connected to the positive input terminal of the power supply module, the source of the first switch tube S11 is connected to the drain of the second switch tube S12, the source of the second switch tube is respectively connected to the negative input terminal of the power supply module and the source of the fourth switch tube S14, the drain of the third switch tube S13 is connected to the drain of the first switch tube S11, the source of the third switch tube S13 is connected to the drain of the fourth switch tube S14, and capacitors C11, C12, C13, and C14 are respectively connected in parallel between the drains and sources of the first switch tube S11, the second switch tube S12, the third switch tube S13, and the fourth switch tube S14.

3. The circuit for improving light-load efficiency and extending load of a CLLLC converter based on variable resonant cavity control according to claim 1, characterized in that: The secondary rectifier full-bridge circuit includes a secondary first switching transistor S21, a secondary second switching transistor S22, a secondary third switching transistor S23, and a secondary fourth switching transistor S24. The secondary first switching transistor S21 and the secondary second switching transistor S22 form the left bridge arm of the secondary rectifier full-bridge circuit, and the secondary third switching transistor S23 and the secondary fourth switching transistor S24 form the right bridge arm of the secondary rectifier full-bridge circuit. The source of the secondary first switching transistor S21 is connected to the first output terminal of the variable resonant cavity and the drain of the secondary second switching transistor S22. The drain of the secondary first switching transistor S21 is connected to the drain of the secondary third switching transistor S23. The source of the secondary second switching transistor S22 is connected to the source of the secondary fourth switching transistor S24. The source of the secondary third switching transistor S23 is connected to the second output terminal of the variable resonant cavity and the drain of the secondary fourth switching transistor S24. The drain of the secondary third switching transistor S23 is connected to the output circuit, and the source of the secondary fourth switching transistor S24 is connected to the output circuit. Capacitors C21, C22, C23, and C24 are respectively connected in parallel between the drains and sources of the secondary first switching transistor S21, the secondary second switching transistor S22, the secondary third switching transistor S23, and the secondary fourth switching transistor S24.

4. A light load efficiency improvement and load extension circuit for a CLLLC converter based on variable resonator cavity regulation according to claim 1, characterized in that, The variable resonant cavity includes a primary resonant inductor Lr, a secondary resonant inductor Ls, a primary resonant capacitor Cr, a secondary resonant capacitor Cs, a parallel switching transistor S1, a parallel resonant capacitor Cr1, a series switching transistor S2, a series resonant capacitor Cr2, an excitation inductor Lm, and a transformer. The drain of the parallel switching transistor S1 is connected to the middle of the left bridge arm of the primary full-bridge circuit and the parallel resonant capacitor Cr1. The source of the parallel switching transistor S1 is connected to the positive terminal of the parallel resonant capacitor Cr1. The drain of the series switching transistor S2 is connected to the drain of the parallel switching transistor S1 and the negative terminal of the primary resonant capacitor Cr. The source of the series switching transistor S2 is connected to one end of the primary resonant inductor Lr and the negative terminal of the series resonant capacitor Cr2. The other end of the primary resonant inductor Lr is connected to one end of the excitation inductor Lm and one end of the primary side of the transformer. The other end of the primary side of the transformer is connected to the other end of the excitation inductor Lm and the middle of the left bridge arm of the primary full-bridge circuit. One end of the secondary side of the transformer is connected to the middle of the left bridge arm of the secondary rectifier full-bridge circuit after being connected in series with the secondary resonant inductor Ls and the secondary resonant capacitor Cs. The other end of the secondary side of the transformer is connected to the middle of the right bridge arm of the secondary rectifier full-bridge circuit.

5. The circuit for improving light-load efficiency and extending load of a CLLLC converter based on variable resonant cavity control according to claim 1, characterized in that: The digital control unit adopts an adaptive control strategy based on real-time load impedance detection. It calculates the load change by detecting the output voltage and current. When the load is higher than the preset threshold, it triggers to enter the light load mode. When the load is lower than the preset threshold, it triggers to enter the full load mode. It adjusts the equivalent parameters of the variable resonant cavity and the full-bridge drive in different modes to ensure the high-efficiency operation of the converter under different loads.

6. A light load efficiency improvement and load extension circuit of a CLLLC converter based on variable resonant cavity regulation according to claim 5, characterized in that, The digital control unit is configured with control logic for at least two operating modes, including a light-load mode and a full-load mode; in the light-load mode, a low equivalent resonant capacitor and a corresponding full-bridge modulation method are set to reduce light-load losses; in the full-load mode, a high equivalent resonant capacitor and corresponding control parameters are set to ensure efficiency and stability at full power output; The digital control unit can automatically determine and switch the control mode according to the real-time changes of the load, thereby realizing automatic optimization operation under light load and full load conditions.

7. A control method for a light load efficiency improvement and load extension circuit of a CLLLC converter based on variable resonant cavity regulation, characterized in that, A circuit for improving light-load efficiency and extending load of a CLLLC converter based on variable resonant cavity control as described in any one of claims 1 to 6 comprises the following steps: Step 1: Collect the voltage and current information of the CLLLC converter output circuit in real time, calculate the load power or equivalent impedance, and compare it with the preset threshold to determine whether the current load state is light load, medium load or full load; Step 2: Select the corresponding working mode according to the load status. When the detection is light load state, enter the light load mode control; when the detection is full load state, enter the full load mode control; otherwise, maintain the normal mode; Step 3: Control the parallel switch S1 and the series switch S2 in the variable resonant cavity according to the selected mode. In the light-load mode, the parallel switch S2 and the series switch S1 are driven to remain disconnected, so that the series resonant capacitor Cr2 is connected to the resonant circuit to reduce the total value of the resonant capacitor. In the full-load mode, the series switch S1 and the parallel switch S2 are driven to remain on, and the parallel resonant capacitor Cr1 is connected to the resonant circuit to increase the total value of the resonant capacitor. When switching modes, the switching frequency or phase of the primary full-bridge circuit is synchronously adjusted to ensure a smooth transition of the output voltage. Step 4: Implement PWM control on the primary full-bridge circuit through a digital control unit. In light-load mode, the switching frequency of the primary full-bridge circuit is set to a fixed value close to the resonant frequency and intermittent switching or phase-shift control is used to reduce the effective power output. In full-load mode, variable frequency control is used to adjust the switching frequency to enter the under-resonance or over-resonance region according to the output voltage error to maintain the required gain. In normal mode, the circuit operates according to the traditional CLLLC control strategy or smoothly transitions between light-load and full-load modes. Step 5: Embed a model predictive control algorithm or a fuzzy control algorithm in the above control process to predict or perform fuzzy inference on the state of the CLLLC converter in the next sampling period. Based on the prediction results, the switching frequency adjustment amplitude and the switching timing of the parallel switch S1 and the series switch S2 are modified in real time to minimize the output error and switching loss, thereby achieving adaptive optimization of the control parameters. Step 6: When the converter is initially powered on, the buffer switch of the auxiliary buffer branch is controlled to be turned on for a preset time to allow the resonant cavity components to be slowly charged before normal resonant operation is resumed. When a sudden load change occurs, the output change is monitored. If a transient deviation of the output voltage is detected to exceed a threshold, the buffer switch is temporarily turned on to connect to the buffer resistor to absorb or provide energy, thereby reducing fluctuations in the output voltage and current, and then returning to normal operation. Step 7: Repeat Steps 1 to 6, periodically sample the feedback signal and adjust the control command to ensure that the converter operates stably and efficiently across the entire load range.

8. The control method of a light load efficiency improvement and load extension circuit for a CLLLC converter based on variable resonant cavity regulation according to claim 7, characterized in that, In Step 5, a model predictive control algorithm is adopted, that is, based on the mathematical model of the CLLLC converter, the effects of different control variable adjustments, including the state switching of the parallel switch tube S1, the series switch tube S2, and the change in the primary full-bridge switching frequency on the output voltage deviation and circuit loss at the next moment, are predicted. Through online rolling optimization, the control action with the lowest expected loss and the smallest output error is selected and implemented, thereby achieving the optimal adjustment of the resonant parameters and output control.

9. The control method of a circuit for improving light load efficiency and expanding load of a CLLLC converter based on variable resonant cavity regulation according to claim 7, characterized in that, In Step 5, a fuzzy control algorithm is used to adjust the variable resonant cavity parameters. The fuzzy control algorithm sets the fuzzy input variables of the light load degree, output deviation, and frequency offset, and the fuzzy output variables of the increase or decrease of the resonant capacitor and frequency adjustment. The switching conditions of the parallel switch tube S1 and the series switch tube S2 and the frequency correction amount of the primary full-bridge circuit are determined through fuzzy rule reasoning.

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