Filter based on heterogeneous integrated piezoelectric single crystal film and preparation method

Abstract

The invention relates to the technical field of piezoelectric single-crystal filters, in particular to a filter based on a heterogeneous integrated piezoelectric single-crystal thin film and a preparation method, the filter comprises a Si substrate, a dry film, the piezoelectric single-crystal thin film, a SiO2 layer and a Si wafer are sequentially arranged on the Si substrate, metal balls are arranged on the Si wafer, the metal balls are connected with electrodes, and the electrodes are connected with the piezoelectric single-crystal thin film. And the electrode passes through the Si wafer and the SiO2 layer and is connected with the piezoelectric single crystal film. When the filter is prepared, bonding packaging can be performed after a cavity area is etched on a dry film, a resonance area is directly defined through a photoetching process, the influence of etching on the strength of the piezoelectric single crystal film is avoided, a silicon wafer bonding technology can be combined, double-sided packaging can be realized, and batch production is supported; in the process, only the electrode patterning step needs to be adjusted according to the type of the filter, and then the existing MEMS process integration is utilized, so that the preparation of the FBAR and the XBAR on the same production line is realized, the process compatibility is good, and the problems that the existing preparation method is poor in compatibility and is difficult to realize large-scale production are solved.

Description

Technical Field

[0001] The present invention relates to the technical field of piezoelectric single crystal filters, and particularly to a filter based on hetero-integrated piezoelectric single crystal thin films and a preparation method thereof. Background Art

[0002] Wireless communication technology has penetrated all aspects of our lives, greatly changing people's work and lifestyle. It has freed people from the constraints of time and space and enabled free communication. From the initial first-generation mobile communication technology (1G) to the latest fifth-generation mobile communication technology (5G), each generation of communication technology has brought new services and faster data transmission speeds. With the progress of communication technology, the data transmission rate has been significantly improved. To meet the demand for higher transmission rates, more electromagnetic spectrum resources are required, which makes the design of radio frequency systems more complex and challenging.

[0003] Micro-Electro-Mechanical Systems (MEMS) devices are micro-devices or systems that use micro-machining technology to integrate mechanical components, sensors, actuators, and electronic components on the same chip. They have the characteristics of miniaturization, integration, low power consumption, and high sensitivity, and are widely used in multiple fields such as consumer electronics, automotive electronics, aerospace, and biomedicine. With the development of 5G high-frequency mobile communication and the Internet of Things, the demand for MEMS devices is increasing day by day, further promoting the development of key semiconductor devices such as radio frequency filters, sensors, and transducers based on the piezoelectric effect.

[0004] Early acoustic filters were usually made of piezoelectric ceramic materials such as lead zirconate titanate (Pb(ZrTi)O3). Although piezoelectric ceramics have strong piezoelectricity and high dielectric constants, they have low mechanical quality factors, large electrical losses, and poor stability. Therefore, they are not suitable for high-frequency and high-stability applications. In contrast, piezoelectric single crystal filters have higher mechanical quality factors, more excellent temperature stability, higher piezoelectric coefficients, and better frequency stability and reliability. These characteristics make piezoelectric single crystal filters perform better in high-frequency and high-stability applications, especially in situations where precise control and high performance are required.

[0005] Existing piezoelectric filters mainly include Film Bulk Acoustic Resonator (FBAR), Surface Acoustic Wave Resonator (SAW), and Laterally Excited Bulk Acoustic Resonator (XBAR). Among them, as new types of piezoelectric filters, FBAR and XBAR have the advantages of high frequency, large bandwidth, low loss, and miniaturization. Such filters will better meet the applications in the current and future communication fields.

[0006] Currently, piezoelectric single-crystal thin-film filters mainly use two materials, aluminum nitride and lithium niobate. Aluminum nitride is used for FBAR resonant filters, while lithium niobate is used for XBAR filters; the production of FBAR and XBAR belongs to two different process flows. FBAR is based on the sacrificial layer technology. After forming a flat substrate through silicon-based groove etching, sacrificial layer filling, and Chemical Mechanical Polishing (CMP), the bottom electrode, AlN piezoelectric layer, and top electrode are deposited in sequence. Then, the sacrificial layer is removed by wet etching to form an air cavity to localize acoustic waves. Finally, device integration is completed through wafer-level packaging technology; XBAR is based on a lithium niobate (LiNbO3) single-crystal thin film. By combining photolithography or nanoimprint technology, sub-micron interdigital transducers (IDTs) are formed. The air cavity is released by dry / wet etching to excite Lamb waves, and finally, device sealing is completed through wafer-level packaging technology. Both of these processes adopt the route of first preparing the core device and then completing the packaging. However, both FBAR and XBAR have structures on both the upper and lower surfaces, which increases the difficulty in the subsequent packaging process and is likely to damage their acoustic resonance structures during packaging, resulting in a low yield rate. Secondly, in the XBAR architecture, the Piezoelectric-on-Insulator (POI) heterogeneous integration structure faces problems such as insufficient mechanical strength and poor mass production process stability, making it still difficult for XBAR to be commercially available. Although significant progress has been made by improving the Q value, reducing the insertion loss, and improving the thermal stability, key technical bottlenecks still exist at the large-scale production level. Due to the poor compatibility between the preparation of XBAR and FBAR, two different production lines need to be built separately for XBAR and FBAR, leading to problems such as duplicate equipment investment, low resource utilization rate, and high costs due to double investment in factory space, cleanroom grade, personnel training, etc., making large-scale production difficult. Summary of the Invention

[0007] Aiming at the problems of poor compatibility in the preparation method of piezoelectric single-crystal thin-film filters and difficulty in realizing large-scale production in the existing technology, the present invention provides a filter based on hetero-integrated piezoelectric single-crystal thin film and a preparation method thereof.

[0008] To achieve the above object, the present invention adopts the following technical solutions: The present invention provides a filter based on hetero-integrated piezoelectric single-crystal thin film, including an Si substrate, on which a dry film, a piezoelectric single-crystal thin film, an SiO2 layer, and an Si wafer are sequentially arranged; Metal stud balls are arranged on the Si wafer, the metal stud balls are connected with electrodes, and the electrodes pass through the Si wafer and the SiO2 layer and are connected with the piezoelectric single-crystal thin film.

[0009] Optionally, the electrode is an IDT electrode structure and is located between the piezoelectric single-crystal thin film and the SiO2 layer.

[0010] Optionally, the electrode includes a top electrode and a bottom electrode, the top electrode is located between the piezoelectric single-crystal thin film and the SiO2 layer, and the bottom electrode is located between the piezoelectric single-crystal thin film and the dry film.

[0011] Optionally, the thickness of the piezoelectric single-crystal thin film is 300 nm to 2 μm; the thickness of the SiO2 layer is 0.3 to 3 μm; the thickness of the dry film is 5 to 15 μm; the thicknesses of the Si substrate and the Si wafer are both 100 to 200 μm.

[0012] The present invention also provides a preparation method of the filter based on hetero-integrated piezoelectric single-crystal thin film as described above, including: Performing ion implantation on the surface of a piezoelectric single-crystal wafer; Sequentially preparing an electrode and an SiO2 layer on the piezoelectric single-crystal wafer after ion implantation; According to the type of the filter of the piezoelectric single-crystal thin film, etching a first cavity on the SiO2 layer to expose the electrode; Bonding an Si wafer on the SiO2 layer with the exposed electrode to obtain a first combination; Performing annealing treatment on the first combination to peel the piezoelectric single-crystal wafer at the ion implantation depth position to obtain a second combination with a piezoelectric single-crystal thin film; Covering a dry film on the Si substrate and etching a second cavity on the dry film according to the type of the filter of the piezoelectric single-crystal thin film to obtain a third combination; Bonding the second combination and the third combination, thinning the Si wafer and forming TSV holes by etching the Si wafer and the SiO2 layer and leading out the electrodes to the surface of the Si wafer to connect with metal stud balls to obtain the filter.

[0013] Optionally, the piezoelectric single crystal wafer is a piezoelectric single crystal wafer block or a single crystal thin film composite; the piezoelectric single crystal wafer block is quartz, lithium niobate, lithium tantalate or a relaxor ferroelectric single crystal; the single crystal thin film composite includes a substrate, on which a piezoelectric thin film is provided, the substrate is silicon or sapphire, and the piezoelectric thin film is an aluminum nitride thin film, a zinc oxide thin film, a lithium niobate thin film or a lead magnesium titanate thin film.

[0014] Optionally, the substrate is sapphire and the piezoelectric thin film is an aluminum nitride thin film.

[0015] Optionally, the aluminum nitride thin film is prepared on sapphire by magnetron sputtering, pulsed laser deposition, metal organic chemical vapor deposition, physical vapor transport or molecular beam epitaxy technology.

[0016] Optionally, the ion implantation depth is equal to the thickness of the piezoelectric single crystal thin film.

[0017] Optionally, it further includes surface CMP polishing and lattice repair of the piezoelectric single crystal thin film of the second combination.

[0018] Compared with the prior art, the present invention has the following beneficial effects: A filter based on heterogeneous integration of a piezoelectric single crystal thin film according to the present invention, the filter includes an Si substrate, on which a dry film, a piezoelectric single crystal thin film, an SiO2 layer and an Si wafer are sequentially provided, jointly forming an "Si - SiO2 - piezoelectric thin film - DF - Si" structure; metal solder balls are provided on the Si wafer, the metal solder balls are connected with electrodes, and the electrodes pass through the Si wafer and the SiO2 layer and are connected with the piezoelectric single crystal thin film. In the "Si - SiO2 - piezoelectric thin film - DF - Si" structure of this filter, after etching a cavity area on the dry film, bonding and encapsulation can be used instead of directly etching on the piezoelectric single crystal thin film substrate, and the resonant area can be directly defined through a lithography process, avoiding the influence of etching on the strength of the piezoelectric single crystal thin film, greatly improving the mechanical stability of the piezoelectric single crystal thin film while retaining the acoustic isolation performance, and can be combined with the silicon wafer bonding technology to achieve double-sided encapsulation, ensuring the reliability of the device at high temperature and high frequency, and at the same time supporting wafer-level mass production. At the same time, based on the modular design of the unified material stack "Si - SiO2 - piezoelectric single crystal thin film - DF - Si", during the preparation of the filter, only the electrode patterning step needs to be adjusted according to the type of the filter, and through standardized MEMS processes such as thin film growth, wafer bonding, and through-silicon via technology integration, the preparation of FBAR and XBAR can be simultaneously compatible on the same production line, with good process compatibility, significantly reducing the R & D and manufacturing costs, and at the same time meeting the diverse requirements of 5G multi-band and wide coverage of the Internet of Things.

[0019] The present invention also provides a method for preparing a filter based on a hetero-integrated piezoelectric single-crystal thin film as described above. The method includes performing ion implantation on the surface of a piezoelectric single-crystal wafer; sequentially preparing an electrode, an SiO2 layer, a first cavity, and an Si wafer on the piezoelectric single-crystal wafer after ion implantation to obtain a first assembly; then annealing the first assembly to obtain a second assembly with a piezoelectric single-crystal thin film; covering a dry film on an Si substrate, and etching a second cavity on the dry film according to the type of the filter based on the piezoelectric single-crystal thin film to obtain a third assembly; subsequently bonding the second assembly and the third assembly, thinning the Si wafer, forming TSV holes by etching the Si wafer and the SiO2 layer, and leading out the electrode to the surface of the Si wafer to connect with a metal stud ball to obtain the filter. This method is compatible with the preparation processes of both XBAR and FBAR at the same time, enabling the preparation of two types of devices on one production line, greatly saving resources. It can not only achieve the unified preparation of the two types of devices, but also simultaneously prepare the two types of devices on the same wafer or complete the coupling of FBAR and XBAR in one filter, which cannot be achieved by the current existing process routes and device structures. When performing top encapsulation, the piezoelectric single-crystal thin film has not been peeled off yet. This not only protects the piezoelectric thin film, but also protects the structure above the piezoelectric single-crystal thin film, ensuring that the surface of the core device never contacts the instrument platform during the entire preparation process, thus avoiding unnecessary damage to the core device. Compared with the traditional process of first preparing the core device and then performing encapsulation, this method is not only simple in process, high in yield, low in preparation cost, but also good in product quality. Compared with the traditional process for preparing FBAR that requires the use of a sacrificial layer technology, this method directly forms the cavity required for acoustic resonance and uses a mature encapsulation process to replace the complex sacrificial layer technology. This not only further improves the production efficiency and yield, but also further reduces the complexity of the process, providing the necessary basic conditions for large-scale production. In addition, for the preparation of high-quality ultra-thin single crystals required for acoustic piezoelectric thin-film filters, this method uses the ion implantation and peeling method to achieve nanoscale thickness control by precisely controlling the ion energy and dose, low-temperature process compatibility, and material universality, and at the same time has core advantages such as a firm bonding interface, becoming a key technology for preparing high-quality single-crystal thin films in the semiconductor and MEMS fields. This technology can not only be used for the peeling of bulk single crystals, but also for the substrate transfer of high-quality single-crystal thin films. It has extremely strong process compatibility and can be used to transfer high-quality AlN thin films grown on a sapphire substrate to a silicon substrate, simultaneously solving the problems of incompatibility between sapphire-based AlN and MEMS and poor performance of silicon-based AlN. This technology can not only complete the preparation of aluminum nitride and lithium niobate thin films, but also be used for the preparation of thin films of other new high-quality piezoelectric single crystals, providing a usable processing platform for future possible new materials. Description of the Drawings

[0020] Figure 1Schematic diagram of the structure of a filter based on hetero-integrated piezoelectric single crystal thin film according to the present invention; a is a cross-sectional view of an XBAR filter; b is a cross-sectional view of an FBAR filter.

[0021] Figure 2 Flow chart of the preparation method of the filter based on hetero-integrated piezoelectric single crystal thin film according to the present invention.

[0022] Figure 3 Detailed drawing of the preparation method of the filter based on hetero-integrated piezoelectric single crystal thin film according to the present invention.

[0023] Figure 4 Process state diagram of the preparation method of the filter based on hetero-integrated piezoelectric single crystal thin film according to the present invention.

[0024] Among them, 1 - Si substrate, 2 - dry film, 3 - piezoelectric single crystal thin film, 4 - SiO2 layer, 5 - Si wafer, 6 - metal ball grid array, 7 - electrode, 71 - top electrode, 72 - bottom electrode. Specific embodiments

[0025] To make the objectives, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are some but not all of the embodiments of the present invention. Usually, the components of the embodiments of the present invention described and illustrated herein can be arranged and designed in various different configurations.

[0026] Therefore, the following detailed description of the embodiments of the present invention provided in the drawings is not intended to limit the scope of the claimed present invention, but merely represents selected embodiments of the present invention. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the scope of protection of the present invention.

[0027] It should be noted that: similar reference numerals and letters denote similar items in the following drawings. Therefore, once an item is defined in one drawing, it does not need to be further defined and explained in subsequent drawings.

[0028] In the description of the embodiments of the present invention, it should be noted that if terms such as "upper", "lower", "horizontal", "inner", etc. indicate an orientation or positional relationship based on the orientation or positional relationship shown in the drawings, or the orientation or positional relationship in which the product of the present invention is usually placed during use, it is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of the present invention. In addition, terms such as "first", "second", etc. are only used for distinguishing descriptions and cannot be construed as indicating or implying relative importance.

[0029] In addition, when the term "horizontal" appears, it does not mean that the component is required to be absolutely horizontal, but it can be slightly inclined. For example, "horizontal" only means that its direction is more horizontal relative to "vertical", and it does not mean that the structure must be completely horizontal, but it can be slightly inclined.

[0030] In the description of the embodiments of the present invention, it should also be noted that unless otherwise clearly specified and limited, when the terms "arranged", "installed", "connected", and "coupled" appear, they should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be directly connected or indirectly connected through an intermediate medium, and it can be the communication inside two components. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to specific situations.

[0031] The present invention will be further described in detail below in conjunction with specific embodiments, which are explanations rather than limitations of the present invention.

[0032] Embodiment 1 Referring to Figure 1 , the present invention provides a filter based on a heterogeneous integrated piezoelectric single crystal thin film, including an Si substrate 1, on which a dry film 2, a piezoelectric single crystal thin film 3, an SiO2 layer 4, and an Si wafer 5 are sequentially arranged; A metal stud 6 is arranged on the Si wafer 5, the metal stud 6 is connected to an electrode 7, and the electrode 7 passes through the Si wafer 5 and the SiO2 layer 4 and is connected to the piezoelectric single crystal thin film 3.

[0033] Preferably, the thickness of the piezoelectric single crystal thin film 3 is 300 nm to 2 μm; the thickness of the SiO2 layer 4 is 0.3 to 3 μm; the thickness of the dry film 2 is 5 to 15 μm; the thicknesses of the Si substrate 1 and the Si wafer 5 are both 100 to 200 μm.

[0034] This filter jointly forms a "Si - SiO2 - piezoelectric thin film - DF - Si" structure by the Si substrate 1, the dry film 2, the piezoelectric single crystal thin film 3, the SiO2 layer 4, and the Si wafer 5. In the process of manufacturing the filter, only the electrode patterning step needs to be adjusted according to the type of the filter, and through standardized MEMS processes such as thin film growth, wafer bonding, and TSV integration, the preparation of both FBAR and XBAR can be compatible on the same production line, with good process compatibility, which can significantly reduce the R & D and manufacturing costs, and at the same time meet the diverse requirements of 5G multi - bands and wide coverage of the Internet of Things.

[0035] Embodiment 2 Referring to Figure 1a. The present invention provides a filter based on a hetero-integrated piezoelectric single-crystal thin film. The filter is an XBAR filter, which includes an Si substrate 1, on which a dry film 2, a piezoelectric single-crystal thin film 3, an electrode 7, an SiO2 layer 4, and an Si wafer 5 are sequentially arranged; A metal stud 6 is arranged on the Si wafer 5. The metal stud 6 is connected to the electrode 7. The electrode 7 is in an interdigital electrode structure, and the electrode 7 passes through the Si wafer 5 and the SiO2 layer 4 and is connected to the piezoelectric single-crystal thin film 3.

[0036] Preferably, the thickness of the piezoelectric single-crystal thin film 3 is 300 nm to 2 μm; the thickness of the SiO2 layer 4 is 0.3 to 3 μm; the thickness of the dry film 2 is 5 to 15 μm; and the thicknesses of both the Si substrate 1 and the Si wafer 5 are 100 to 200 μm.

[0037] Traditional XBAR filters rely on back cavity etching to release acoustic energy, which is directly etched on the substrate of the piezoelectric thin film. Therefore, the cavity design of the POI structure easily leads to a decrease in mechanical strength, affecting the packaging reliability, and it is difficult to achieve high-density integration and large-scale production. The preparation of this filter abandons the traditional POI structure and adopts a "Si - SiO2 - piezoelectric thin film - DF - Si" architecture, using the dry film 2 to replace the traditional cavity etching. During the preparation process, after etching a cavity area on the dry film 2, it can be bonded to the bottom of the piezoelectric single-crystal thin film 3, not only retaining the acoustic isolation performance but also greatly improving the mechanical stability; ensuring the reliability of the device at high temperatures and high frequencies, while supporting wafer-level batch production and promoting the commercialization of XBAR filters.

[0038] Example 3 See Figure 1 b. The present invention provides a filter based on a hetero-integrated piezoelectric single-crystal thin film. The filter is an FBAR filter, which includes an Si substrate 1, on which a dry film 2, a piezoelectric single-crystal thin film 3, an SiO2 layer 4, and an Si wafer 5 are sequentially arranged; A metal stud 6 is arranged on the Si wafer 5. The metal stud 6 is connected to the electrode 7. The electrode 7 passes through the Si wafer 5 and the SiO2 layer 4 and is connected to the piezoelectric single-crystal thin film 3.

[0039] The electrode 7 includes a top electrode and a bottom electrode respectively disposed on both sides of the piezoelectric single-crystal thin film 3.

[0040] Preferably, the thickness of the piezoelectric single-crystal thin film 3 is 300 nm to 2 μm; the thickness of the SiO2 layer 4 is 0.3 to 3 μm; the thickness of the dry film 2 is 5 to 15 μm; and the thicknesses of both the Si substrate 1 and the Si wafer 5 are 100 to 200 μm.

[0041] Compared with the traditional process for preparing FBAR which requires the use of sacrificial layer technology, for the FBAR filter of this structure, the cavity required for acoustic resonance can be directly formed on the dry film 2, and the mature packaging process can be used to replace the complex sacrificial layer technology. This not only can further improve the production efficiency and the yield rate, but also reduces the complexity of the process, providing the necessary basic conditions for large-scale production.

[0042] Example 4 See Figures 2 to 4 , the present invention also provides a preparation method of a filter based on hetero-integrated piezoelectric single crystal thin film as described above, including: S1: Perform ion implantation on the surface of the piezoelectric single crystal wafer; Preferably, the ions for ion implantation are H and / or He, and the ion implantation depth is preferably equal to the thickness of the piezoelectric single crystal thin film 3. Preferably, the piezoelectric single crystal wafer is a piezoelectric single crystal wafer block or a single crystal thin film composite; the piezoelectric single crystal wafer block is quartz, lithium niobate, lithium tantalate or relaxor ferroelectric single crystal; the single crystal thin film composite includes a substrate, and a piezoelectric thin film is provided on the substrate, the substrate is silicon or sapphire, and the piezoelectric thin film is aluminum nitride thin film, zinc oxide thin film, lithium niobate thin film or lead magnesium titanate thin film.

[0043] Preferably, the quartz is synthesized by the hydrothermal method; lithium niobate and lithium tantalate are grown in a crucible by the Czochralski method; the relaxor ferroelectric single crystal relies on the Bridgman method or the flux method to control the lead volatilization.

[0044] S2: On the piezoelectric single crystal wafer after ion implantation, electrode 7 and SiO2 layer 4 are sequentially prepared. Specifically: According to the type of the filter, the interdigital electrodes of the XBAR filter or the top electrode 71 of the FBAR and the patterning of the corresponding filter circuit are performed by photolithography or etching process, and electrode 7 is prepared after patterning; Deposit a SiO2 layer 4 with a thickness of 0.3 - 3 μm on the upper surface of electrode 7, and the required thickness can be achieved by multiple depositions, and the surface of the SiO2 layer 4 is flattened by chemical mechanical polishing.

[0045] S3: According to the type of the filter of the piezoelectric single crystal thin film, etch the first cavity on the SiO2 layer 4 to expose electrode 7. Specifically: Etch away the SiO2 covering the surface of the interdigital electrodes IDT of the XBAR filter or the top electrode 71 of the FBAR and form the cavity required for the XBAR filter or the FBAR filter, so as to expose the IDT or the top electrode 71 of the FBAR.

[0046] S4: Bond the Si wafer 5 on the SiO2 layer 4 where electrode 7 is exposed to obtain the first combination. Specifically: Bond the Si wafer 5 to the surface of the SiO2 layer 4 using direct bonding technology to complete the top encapsulation of the filter, obtaining the first assembly.

[0047] S5: Anneal the first assembly to peel the piezoelectric single crystal wafer at the ion implantation depth position, obtaining the second assembly with the piezoelectric single crystal thin film 3, specifically: Perform annealing treatment to peel off the piezoelectric single crystal thin film 3 and its upper multi-layer structure, and perform surface CMP polishing on the peeling interface of the piezoelectric single crystal thin film 3. Then, perform heat treatment to repair the crystal lattice of the piezoelectric single crystal thin film, and process the bottom electrode 72 on the bottom peeling surface of the piezoelectric single crystal thin film 3, obtaining the second assembly with the piezoelectric single crystal thin film 3. For the preparation of the XBAR filter, the bottom electrode structure mode can be selected to be constructed, or it can be skipped and the next step can be directly carried out.

[0048] S6: Cover the Si substrate 1 with a dry film 2, and etch a second cavity on the dry film 2 according to the type of the piezoelectric single crystal thin film filter, obtaining the third assembly, specifically: Cover the Si substrate 1 with the dry film 2, and lithograph a second cavity in the electrode resonance region of XBAR or FBAR on the dry film 2 corresponding to the position and type of the first cavity, obtaining the third assembly.

[0049] S7: Bond the second assembly and the third assembly, thin the Si wafer 5 and form TSV holes by etching the Si wafer 5 and the SiO2 layer 4, and lead out the electrode 7 to the surface of the Si wafer 5 to connect the metal stud 6, obtaining the filter, specifically: Align the cavities of the second assembly and the third assembly for bonding to form an XBAR filter or an FBAR filter with double-sided cavities, complete the bottom encapsulation, and finally thin the Si wafer 5 to the target thickness by CMP; use deep reactive ion etching or laser drilling technology to make TSV holes, and the positions of the holes correspond to the pads where the wires need to be led out for XBAR or FBAR. Electroplate the redistribution layer (RDL) metal to connect the wires to the silicon surface through the TSVs for subsequent metal studs 6, obtaining the filter.

[0050] This method is compatible with the manufacturing processes of both XBAR and FBAR simultaneously, enabling the fabrication of two types of devices on a single production line, which greatly saves resources. It can not only achieve the unified fabrication of the two types of devices, but also fabricate the two types of devices simultaneously on the same wafer or complete the coupling of FBAR and XBAR in a single filter, which cannot be achieved by the existing process routes and device structures currently. When performing the top encapsulation, the piezoelectric single-crystal thin film has not been peeled off yet, which not only protects the piezoelectric thin film, but also protects the structure above the piezoelectric single-crystal thin film, ensuring that the surface of the core device never comes into contact with the instrument platform during the entire fabrication process, thus avoiding unnecessary damage to the core device. Compared with the traditional process of fabricating the core device first and then encapsulating, this method is not only simple in process, high in yield, but also low in fabrication cost and good in product quality.

[0051] Example 5 Inject H and / or He ions into the surface of the lithium niobate piezoelectric single-crystal wafer, and the ion implantation depth is equal to the thickness of the piezoelectric single-crystal thin film 3. Then, perform patterning of the interdigital electrodes 7 and the circuit of the XBAR filter through photolithography or etching processes, and fabricate the electrodes 7 after patterning; deposit a SiO2 layer 4 with a thickness of 0.3 - 3 μm on the upper surface of the electrodes 7, and planarize the surface of the SiO2 layer 4 through CMP technology. Etch away the SiO2 covering the surface of the IDT and form the cavity required for the XBAR filter to expose the IDT. Bond the Si wafer 5 to the surface of the SiO2 layer 4 using direct bonding technology to obtain the first assembly, and perform annealing treatment to peel off the piezoelectric single-crystal thin film 3 and its upper multi-layer structure, and perform surface CMP polishing on the peeling interface of the piezoelectric single-crystal thin film 3, and then perform heat treatment to repair the crystal lattice of the piezoelectric single-crystal thin film to obtain the second assembly with the piezoelectric single-crystal thin film 3. Cover the Si substrate 1 with the dry film 2, and photolithograph the second cavity at the position and type corresponding to the first cavity on the dry film 2 in the electrode resonance region of the XBAR to obtain the third assembly. Finally, align and bond the cavities of the second assembly and the third assembly to form an XBAR filter with cavities on both sides to complete the bottom encapsulation, and finally thin the Si wafer 5 to the target thickness through CMP; use DRIE or laser drilling technology to fabricate TSV holes, and the positions of the holes correspond to the pads where the XBAR needs to lead out wires. Electroplate the RDL layer metal to connect the wires to the silicon surface through the TSVs for subsequent metal ball implantation 6 to obtain the XBAR filter.

[0052] Traditional XBAR filters rely on back cavity etching to release acoustic energy. However, the cavity design of the POI structure easily leads to a decrease in mechanical strength, affecting packaging reliability, and it is difficult to achieve high-density integration and mass production. In the preparation method of the XBAR filter provided in this embodiment, after etching a cavity region on the dry film 2, it is bonded to the bottom of the piezoelectric single crystal thin film 3, which not only retains the acoustic isolation performance but also greatly improves the mechanical stability; ensures the reliability of the device at high temperature and high frequency, and supports wafer-level mass production.

[0053] Embodiment 6 The aluminum nitride thin film is prepared on sapphire by magnetron sputtering, pulsed laser deposition, metal-organic chemical vapor deposition, physical vapor transport, or molecular beam epitaxy techniques to obtain a piezoelectric single crystal wafer. H and / or He ions are implanted into the surface of the piezoelectric single crystal wafer, and the ions are implanted to the connection surface between the aluminum nitride thin film and sapphire. Then, photolithography or etching processes are used to pattern the top electrode 71 and the circuit of the FBAR filter, and the top electrode 71 is prepared after patterning; a SiO2 layer 4 with a thickness of 0.3 - 3 μm is deposited on the upper surface of the top electrode 71, and the surface of the SiO2 layer 4 is planarized by CMP technology. The SiO2 covering the local surface of the top electrode 71 is etched away to form the cavity required for the FBAR filter, exposing the top electrode 71. The Si wafer 5 is bonded to the surface of the SiO2 layer 4 by direct bonding technology to obtain a first assembly, and annealing treatment is performed. The piezoelectric single crystal thin film 3 and its upper multi-layer structure are peeled off, and the peeling interface of the piezoelectric single crystal thin film 3 is polished by surface CMP. Then, heat treatment is performed to repair the crystal lattice of the piezoelectric single crystal thin film, and a bottom electrode 72 is prepared at the bottom of the piezoelectric single crystal thin film 3 to obtain a second assembly with the piezoelectric single crystal thin film 3. The dry film 2 is used to cover the Si substrate 1, and a second cavity is lithographed at the position and type corresponding to the first cavity on the dry film 2 in the electrode resonance region of the FBAR to obtain a third assembly. Finally, the cavities of the second assembly and the third assembly are aligned and bonded to form an FBAR filter with double-sided cavities, completing the bottom packaging. Finally, the Si wafer 5 is thinned to the target thickness by CMP; TSV holes are made by DRIE or laser drilling technology, and the positions of the holes correspond to the pads where the wires of the FBAR need to be led out. The RDL layer metal is electroplated to connect the wires to the silicon surface through the TSVs for subsequent metal ball implantation 6 to obtain the FBAR filter.

[0054] On a traditional sapphire substrate, an AlN thin film with excellent crystal quality can be grown. However, the extremely strong chemical stability of sapphire brings difficulties to the etching of vias, greatly increasing the complexity and cost of the process, making it impossible to effectively utilize the excellent properties of the AlN single crystal thin film on the sapphire substrate. In the preparation process of this embodiment, the ion implantation and stripping technology is adopted. An AlN piezoelectric single crystal thin film can be grown on the sapphire substrate to ensure the orientation of the film growth, and then during the preparation process, it is bonded to the Si substrate 1 through processes such as stripping and bonding, significantly reducing the thermal stress and avoiding lattice distortion. The Si substrate 1 is naturally compatible with the CMOS process, and there is a complete industrial process for TSV filling to achieve circuit interconnection, simplifying the process flow and reducing the cost.

[0055] The above are only the preferred embodiments of the present invention, and are not used to limit the technical solutions of the present invention. Those skilled in the art should understand that without departing from the spirit and principles of the present invention, the technical solutions can be subject to several simple modifications and substitutions, and these modifications and substitutions also fall within the protection scope covered by the claims.

Claims

1. A filter based on a hetero-integrated piezoelectric single crystal thin film, characterized in that, It includes an Si substrate (1), on which a dry film (2), a piezoelectric single-crystal thin film (3), an SiO2 layer (4), and an Si wafer (5) are sequentially provided; A metal stud bump (6) is provided on the Si wafer (5), the metal stud bump (6) is connected to an electrode (7), and the electrode (7) passes through the Si wafer (5) and the SiO2 layer (4) and is connected to the piezoelectric single-crystal thin film (3).

2. The filter based on a hetero-integrated piezoelectric single crystal thin film according to claim 1, wherein The electrode (7) is an IDT electrode structure and is located between the piezoelectric single-crystal thin film (3) and the SiO2 layer (4).

3. The filter based on the hetero-integrated piezoelectric single crystal thin film according to claim 1, wherein The electrode (7) includes a top electrode (71) and a bottom electrode (72), the top electrode (71) is located between the piezoelectric single-crystal thin film (3) and the SiO2 layer (4), and the bottom electrode (72) is located between the piezoelectric single-crystal thin film (3) and the dry film (2).

4. The filter based on the hetero-integrated piezoelectric single crystal thin film according to claim 1, wherein The thickness of the piezoelectric single-crystal thin film (3) is 300 nm to 2 μm; the thickness of the SiO2 layer (4) is 0.3 to 3 μm; the thickness of the dry film (2) is 5 to 15 μm; the thicknesses of the Si substrate (1) and the Si wafer (5) are both 100 to 200 μm.

5. The preparation method of the filter based on hetero-integrated piezoelectric single crystal thin film according to any one of claims 1-4, characterized in that, It includes: Performing ion implantation on the surface of a piezoelectric single-crystal wafer; On the piezoelectric single-crystal wafer after ion implantation, an electrode (7) and an SiO2 layer (4) are sequentially prepared; According to the type of the filter of the piezoelectric single-crystal thin film, etching a first cavity on the SiO2 layer (4) to expose the electrode (7); Bonding an Si wafer (5) on the SiO2 layer (4) where the electrode (7) is exposed to obtain a first combination; Performing annealing treatment on the first combination to peel the piezoelectric single-crystal wafer at the ion implantation depth position to obtain a second combination with a piezoelectric single-crystal thin film (3); Covering a dry film (2) on the Si substrate (1) and etching a second cavity on the dry film (2) according to the type of the filter of the piezoelectric single-crystal thin film to obtain a third combination; Bonding the second combination and the third combination, thinning the Si wafer (5) and forming TSV holes by etching the Si wafer (5) and the SiO2 layer (4) to lead out the electrode (7) to the surface of the Si wafer (5) to connect the metal stud bump (6) to obtain a filter.

6. The manufacturing method of the filter based on the hetero-integrated piezoelectric single crystal thin film according to claim 5, characterized in that, The piezoelectric single-crystal wafer is a piezoelectric single-crystal wafer block or a single-crystal thin film composite; the piezoelectric single-crystal wafer block is quartz, lithium niobate, lithium tantalate, or a relaxor ferroelectric single crystal; the single-crystal thin film composite includes a substrate, on which a piezoelectric thin film is provided, the substrate is silicon or sapphire, and the piezoelectric thin film is an aluminum nitride thin film, a zinc oxide thin film, a lithium niobate thin film, or a lead magnesium niobate titanate thin film.

7. The manufacturing method of the filter based on hetero-integrated piezoelectric single crystal thin film according to claim 6, characterized in that, The substrate is sapphire and the piezoelectric thin film is an aluminum nitride thin film.

8. The preparation method of the filter based on hetero-integrated piezoelectric single crystal thin film according to claim 7, wherein, The aluminum nitride thin film is prepared on sapphire by magnetron sputtering, pulsed laser deposition, metal organic chemical vapor deposition, physical vapor transport, or molecular beam epitaxy technology.

9. The manufacturing method of the filter based on hetero-integrated piezoelectric single crystal thin film according to claim 5, characterized in that, The ion implantation depth is equal to the thickness of the piezoelectric single-crystal thin film (3).

10. The preparation method of the filter based on hetero-integrated piezoelectric single crystal thin film according to claim 5, characterized in that, It also includes surface CMP polishing and lattice repair of the piezoelectric single-crystal thin film (3) of the second combination.

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