Trench type MOSFET polycrystalline silicon chemical mechanical polishing method and device

Abstract

The invention provides a chemical mechanical polishing method and device for polycrystalline silicon of a groove type MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor), and relates to the technical field of preparation of the groove type MOSFET. According to the method, the polishing pressure partition control mode is adopted in the preliminary polishing stage, polycrystalline silicon in all areas is evenly removed, and the uniformity of the residual film thickness of the polycrystalline silicon is ensured. In the fine polishing stage, constant-pressure polishing is conducted, when a certain area reaches the polishing end point, the polishing pressure of the area is adjusted to be small so as to stop polishing of the area, the situation that the pressure is continuously adjusted when the area is close to the polishing end point is avoided, polishing rate drifting is avoided, end point control accuracy is improved, and polishing efficiency is improved. And the defects of over-polishing and under-polishing of the polycrystalline silicon at the groove structure are reduced. And in the residue removing and polishing stage, a third polishing pad with low hardness is adopted. The hardness of the polishing pad is small, the contact area between the polishing pad and the corner of the groove structure is increased, and residual polycrystalline silicon at the corner of the groove structure can be rapidly removed.

Description

Technical Field

[0001] The present invention relates to the technical field of trench MOSFET preparation, and in particular to a trench MOSFET polysilicon chemical mechanical polishing method and device. Background Art

[0002] Trench MOSFETs are vertically structured trench-type metal oxide field-effect transistors (MOSFETs). Unlike traditional planar MOSFETs, trench MOSFETs utilize a trench structure. Deep trenches are etched into the silicon wafer surface, and the MOSFET gate is placed within the trench. This increases the effective area between the gate and the channel, improving device performance. In the trench MOSFET manufacturing process, polysilicon is typically used as the gate material. For example, after the trench is etched, a polysilicon layer is grown to fill the trench. Polysilicon chemical mechanical polishing is used to remove the polysilicon layer from the wafer surface, outside the trench.

[0003] The existing polysilicon chemical mechanical polishing process generally uses a two-pad polishing process: (1) First, the polysilicon layer is roughly polished on a harder polishing pad 1, using an initial set pressure constant pressure control to make the average thickness of the polysilicon layer reach the target thickness. (2) On the same polishing pad 2, the remaining polysilicon layer on the wafer surface is removed by detecting the change in the drive motor current. After the polysilicon on the wafer surface is completely removed, the polishing speed of the oxide layer exposed below is relatively slow, and the friction between the wafer and the polishing pad changes, thereby changing the rotational torque of the polishing head and the current of the polishing head drive motor. The sensor on the polishing machine monitors the change in the drive motor current to detect whether the polishing end point has been reached.

[0004] The existing method uses a fixed initial set pressure constant pressure control in the first stage. When the average thickness reaches the target thickness, the uniformity of the remaining polysilicon film on the wafer surface is poor. This poor surface uniformity can easily lead to over-polishing in some areas during the second polishing stage, resulting in excessive dishing, under-polishing in some areas, and over-polishing in others. Furthermore, due to the unique nature of the groove structure, polysilicon residue is very likely to remain in the groove corners. Increasing the polishing time will increase over-polishing in other areas, making polishing accuracy difficult to control. Summary of the Invention

[0005] The embodiments of the present invention provide a trench MOSFET polysilicon chemical mechanical polishing method and device to solve the problems that the existing trench MOSFET polysilicon chemical mechanical polishing method is prone to over-polishing or under-polishing and the polishing accuracy is difficult to control.

[0006] In a first aspect, an embodiment of the present invention provides a method for chemical mechanical polishing of polysilicon of a trench MOSFET, which is applied to polishing a polysilicon layer filling a trench structure on a trench MOSFET wafer; the method comprises:

[0007] On the first polishing pad, the polysilicon layer of the wafer is preliminarily polished by adjusting the polishing pressure of each zone in real time using a polishing pressure zone control method until the remaining film thickness of the polysilicon layer in each zone on the wafer is simultaneously reduced to a target thickness;

[0008] On the second polishing pad, a constant polishing pressure control method is used to fine-polish the wafer after the initial polishing. During the fine polishing process, if any area reaches the polishing endpoint, the polishing pressure of the area is reduced from the initial polishing pressure to a preset pressure to stop polishing the area until all areas reach the polishing endpoint.

[0009] On the third polishing pad, a constant time control method is adopted to circulate the grinding liquid and deionized water to perform residue polishing on the wafer after fine polishing; wherein the hardness of the third polishing pad is less than that of the first polishing pad and the second polishing pad.

[0010] In a possible implementation, before fine polishing the initially polished wafer, the method further includes:

[0011] Obtaining the remaining film thickness of the polysilicon layer in each area of ​​the wafer surface after preliminary polishing;

[0012] Based on the remaining film thickness in each area, the initial polishing pressure for fine polishing of each area is determined with the same remaining polishing time as the target.

[0013] In one possible implementation, based on the remaining film thickness of each region and with the same remaining polishing time as a target, determining the initial polishing pressure for fine polishing of each region includes:

[0014] For any area on the wafer surface, the remaining film thickness of the area is divided by the target remaining polishing time to obtain the target polishing rate of the area;

[0015] Based on the target polishing rate of the region, a polishing pressure corresponding to the target polishing rate is determined as the initial polishing pressure of the region.

[0016] In a possible implementation, the preliminary polishing of the polysilicon layer of the wafer includes:

[0017] Obtaining the initial thickness of the polysilicon layer in each area on the wafer;

[0018] For any region, determining an initial polishing pressure based on the initial thickness of the region;

[0019] performing preliminary polishing of the polysilicon layer of the wafer based on the initial polishing pressure of each region, while simultaneously monitoring the remaining thickness of the polysilicon layer in each region in real time;

[0020] According to the difference between the remaining thickness of the polysilicon layer and the target thickness obtained by real-time monitoring, the polishing pressure of each partition is adjusted in real time until the remaining film thickness of the polysilicon layer in each partition on the wafer is reduced to the target thickness at the same time.

[0021] In a possible implementation, adjusting the polishing pressure of each partition in real time based on the difference between the remaining thickness of the polysilicon layer and the target thickness obtained by real-time monitoring includes:

[0022] Adjust the polishing pressure of each zone based on the following formula:

[0023] ΔP=K×ΔT

[0024] Among them, ΔP represents the adjustment amount of the polishing pressure in the target area; ΔT represents the difference between the remaining thickness of the target area obtained by real-time monitoring and the target thickness; K represents the preset relationship between the thickness difference and the polishing pressure adjustment amount.

[0025] In a possible implementation, the polishing liquid is a silicon dioxide polishing liquid.

[0026] In a possible implementation, the compression ratio of the third polishing pad ranges from 9% to 20%.

[0027] In a possible implementation, the preset pressure ranges from 0.2 to 0.8 psi.

[0028] In a possible implementation, the hardness of the second polishing pad is smaller than that of the first polishing pad.

[0029] In a second aspect, an embodiment of the present invention provides a trench MOSFET device, wherein the polysilicon layer filling the trench structure on the trench MOSFET wafer is prepared based on the trench MOSFET polysilicon chemical mechanical polishing method as described in any one of the first aspects.

[0030] Embodiments of the present invention provide a method and device for chemical mechanical polishing of polysilicon in trench MOSFETs. By employing zoned polishing pressure control in the preliminary polishing stage, polysilicon is uniformly removed from each region, ensuring uniformity in the remaining polysilicon film thickness. During the fine polishing stage, constant pressure polishing is performed. When a region reaches the polishing endpoint, the polishing pressure in that region is adjusted to a lower level to stop polishing. This avoids constant pressure adjustment near the polishing endpoint and prevents polishing rate drift, improving endpoint control accuracy and reducing over- and under-polishing defects in the polysilicon trench structure. During the residual polishing stage, a third polishing pad with a lower hardness is employed. The lower hardness of the polishing pad increases the contact area with the corners of the trench structure, enabling rapid removal of residual polysilicon in these corners. Polishing is performed using a circulating polishing fluid and deionized water. Through the dual effects of physical friction and solution rinsing, polishing byproducts, such as polysilicon particles, can be quickly removed, while residual polishing fluid can also be rapidly removed. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] Figure 1 This is a schematic structural diagram of a polishing device provided by an embodiment of the present invention;

[0032] Figure 2 This is a schematic diagram of a trench structure filled with polysilicon provided by an embodiment of the present invention;

[0033] Figure 3 This is a schematic diagram of a groove structure after polishing provided by an embodiment of the present invention;

[0034] Figure 4 A flow chart of a method for chemical mechanical polishing of polysilicon in trench MOSFETs provided by an embodiment of the present invention;

[0035] Figure 5 Schematic diagram of the white light interferometry endpoint detection principle provided by an embodiment of the present invention;

[0036] Figure 6 Schematic diagram of the contact between the third polishing pad and the groove corner provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0037] To help those skilled in the art better understand this solution, the following will clearly describe the technical solutions in the embodiments of this solution in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of this solution, not all of it. Based on the embodiments of this solution, all other embodiments obtained by those skilled in the art without creative work should fall within the scope of protection of this solution.

[0038] Throughout the specification, claims, and accompanying figures of this solution, the term "including" and any variations thereof mean "including, but not limited to," and are intended to cover non-exclusive inclusions and are not limited to the examples listed herein. Furthermore, the terms "first" and "second," etc., are used to distinguish between different objects, not to describe a specific order.

[0039] The following is a detailed description of the implementation of the present invention with reference to the accompanying drawings:

[0040] Power MOSFETs, a staple of power semiconductor devices, are widely used in communications, computers, automobiles, and consumer electronics, and are a crucial component in discrete devices and intelligent power integrated circuits. To further reduce the on-resistance of power MOSFETs, a new vertical structure, the Trench MOSFET, has been developed. Trench MOSFETs offer lower on-resistance and lower gate-drain charge density, resulting in lower conduction and switching losses and faster switching speeds. Furthermore, the vertical channel structure of the Trench MOSFET allows for higher channel density, smaller chip size, and lower on-resistance.

[0041] Figure 1 This is a schematic diagram of the structure of a polishing device provided by an embodiment of the present invention; Figure 1 The wafer is fixed to a wafer carrier, connected to the carrier by a carrier film, and the wafer carrier rotates continuously. During polishing, the wafer is in close contact with the polishing pad on the rotating polishing platform, and polishing slurry is injected between the two. Under the polishing pressure (downward pressure), the abrasive particles in the slurry mechanically grind the wafer surface, and the chemical substances in the slurry react with the wafer surface material to produce easily removable substances. The combined action of mechanical grinding and chemical etching achieves flatness of the wafer surface.

[0042] During the polysilicon chemical mechanical polishing process, due to the structural peculiarities of TrenchMOSFET devices, polysilicon residue can form at trench corners and in uneven gate oxide areas. Polysilicon residue at trench corners can cause parasitic leakage currents and device failure. Increasing the polishing time can remove polysilicon residue at trench corners. However, increasing the over-polishing time also creates larger dishing in the trench area, severely distorting the pattern and making subsequent photolithography alignment difficult, thus affecting device performance. This is explained in detail below.

[0043] Figure 2 Schematic diagram of a trench structure filled with polysilicon provided by an embodiment of the present invention; Figure 2In the trench MOSFET wafer process, a thermal oxide film grows after the trench is etched. This film forms through an oxidation reaction with silicon, consuming a portion of the silicon substrate. Rounding the trench corners eliminates stress-induced defects. Polysilicon is first deposited in the trench, followed by chemical mechanical polishing (CMP) to remove excess polysilicon from the wafer surface.

[0044] Conventional polishing pads have a hardness Shore D of 47-63, resulting in high hardness, fast polishing speed, and high efficiency. However, due to the unique structure of trench MOSFETs, the contact area between the polishing pad and the wafer trench corners is small, making it very easy for polysilicon to remain in the trench corners. Furthermore, if the oxide film thickness in the source region is inconsistent, polysilicon will remain after polishing, causing device leakage. Figure 3 This is a schematic diagram of a groove structure after polishing provided by an embodiment of the present invention; Figure 3 ,The black part in the trench represents the residual polysilicon.

[0045] Figure 4 This is a flow chart of a method for chemical mechanical polishing of polysilicon in a trench MOSFET according to an embodiment of the present invention. Figure 4 The embodiment of the present invention provides a method for chemical mechanical polishing of trench MOSFET polysilicon, which is applied to polishing a polysilicon layer filling a trench structure on a trench MOSFET wafer; the method comprises:

[0046] Step 401: On a first polishing pad, a polishing pressure zoning control method is used to adjust the polishing pressure of each zone in real time to perform preliminary polishing on the polysilicon layer of the wafer until the residual film thickness of the polysilicon layer in each zone on the wafer is reduced to a target thickness simultaneously.

[0047] In some embodiments, a white light detection endpoint control method is used to monitor the wafer surface thickness in real time. At the same time, during the wafer processing process, when polishing each part of the wafer surface, the polishing head pressure zone of the area is controlled so that after the first polishing pad is processed, when each area of ​​the wafer surface stops at the target thickness at the same time, the uniformity within the wafer surface reaches a better state.

[0048] Figure 5 This is a schematic diagram of the white light interferometry endpoint detection principle provided by an embodiment of the present invention; Figure 5An incident light beam I1 is projected at a certain angle onto the interface between the air and the transparent layer. Part of the incident light beam is reflected at point A, resulting in reflection IA, returning to the air. Another part enters the transparent layer, is reflected at the interface B between the substrate and the transparent layer, and is refracted at point C, resulting in reflection IB, which reenters the air. Due to the difference in path length between the two reflected beams IA and IB, they have different phases, causing interference. Receiving sensors are typically installed at points IA and IB. The light is converted into electrical signals, which, after detection, filtering, shaping, and amplification, are converted into data or graphics to determine the endpoint position.

[0049] In some embodiments, the average thickness of the polysilicon layer before polishing is 3800 angstroms. The polishing process of this embodiment includes:

[0050] (1) The polysilicon layer on the wafer surface is rough-polished using the first polishing pad (Hardness Shore D: 47-63). When polishing begins, the input initial pressure is used for polishing. The initial pressure setting is determined by the thickness of the polysilicon layer on the wafer surface and the polysilicon polishing rate. The wafer surface is divided into sections, and the initial pressure is calculated based on the polysilicon thickness and removal rate in the corresponding area to set the initial pressure.

[0051] During the polishing process, the thickness of the polysilicon layer on the wafer surface is measured online in real time using the film thickness measurement method of white light reflection spectroscopy. The white light band used is 380-750nm. The software divides the wafer surface into regions and adjusts the pressure of the polishing head in real time by detecting the thickness of the polysilicon layer in different areas of the wafer surface.

[0052] For example, using the film thickness of one region as a reference, pressure is adjusted in other regions. The pressure adjustment range is typically ±10% to 20% of the initial pressure, ensuring that every region of the wafer reaches the target thickness of 1500 angstroms simultaneously. The table below shows the region division locations and pressure adjustment ranges.

[0053] Partition number Wafer range Initial pressure Lower pressure limit Pressure limit unit protection circle 8 8 10 Psi Zone1 ±145-150mm 3.38 3.04 3.72 Psi Zone2 ±139-145mm 3.02 2.72 3.32 Psi Zone3 ±125-139mm 3.14 2.83 3.45 Psi Zone4 ±95-125mm 3.14 2.83 3.45 Psi Zone5 ±70-95mm 3.17 3.17 3.17 Psi Zone 6 ±40-70mm 3.22 2.90 3.54 Psi Zone7 ±0-40mm 3.21 2.89 3.53 Psi

[0054] This method of real-time online monitoring of film thickness and pressure adjustment ensures the accuracy and consistency of polishing, while also avoiding the influence of polishing rate and improving the accuracy of endpoint detection.

[0055] During the wafer polishing process, the polishing head first brings the wafer to the polishing pad. Simultaneously, the polishing head controls the pressure applied to the back of the wafer in different zones through the edge polishing retaining ring and pressure membrane, and polishes the wafer by rotating. During the polishing process, as the film thickness on the wafer surface changes, the pressure in different zones is dynamically adjusted, so that each zone of the wafer reaches the target thickness at the same time, and the thickness uniformity of the remaining polysilicon layer on the wafer surface can be well controlled.

[0056] In a possible implementation, the preliminary polishing of the polysilicon layer of the wafer includes:

[0057] Step 4011: Obtain the initial thickness of the polysilicon layer in each area on the wafer.

[0058] Step 4012: For any region, determine the initial polishing pressure based on the initial thickness of the region.

[0059] Step 4013: Based on the initial polishing pressure of each region, the polysilicon layer of the wafer is preliminarily polished, and the remaining thickness of the polysilicon layer in each region is monitored in real time.

[0060] Step 4014: According to the difference between the remaining thickness of the polysilicon layer obtained by real-time monitoring and the target thickness, the polishing pressure of each partition is adjusted in real time until the remaining film thickness of the polysilicon layer in each partition on the wafer is reduced to the target thickness at the same time.

[0061] In some embodiments, adjusting the polishing pressure of each partition in real time based on the difference between the remaining thickness of the polysilicon layer and the target thickness obtained by real-time monitoring includes adjusting the polishing pressure of each partition based on the following formula:

[0062] ΔP=K×ΔT

[0063] Where ΔP represents the polishing pressure adjustment in the target area; ΔT represents the difference between the target thickness and the remaining thickness in the target area, as measured in real time; and K represents the preset relationship between the thickness difference and the polishing pressure adjustment. The coefficient K can be determined experimentally or based on analysis of historical data.

[0064] Step 402: Fine polishing is performed on the wafer after the initial polishing on the second polishing pad using a constant polishing pressure control method. During the fine polishing process, if any area reaches the polishing endpoint, the polishing pressure of the area is reduced from the initial polishing pressure to a preset pressure to stop polishing the area until all areas reach the polishing endpoint.

[0065] Exemplarily, the preset pressure ranges from 0.2 to 0.8 psi.

[0066] Illustratively, the second polishing pad has a harderness than the first polishing pad.

[0067] After initial polishing on the first polishing pad, the remaining polysilicon on the wafer needs to be removed by the second polishing pad. During fine polishing, white light spectroscopy endpoint detection is also used. Because the remaining film thickness on the first polishing pad is thinner, lower pressure is used during polishing on the second polishing pad. The initial pressure setting method for fine polishing can be the same as for initial polishing. For example, the thickness of the remaining polysilicon layer on the wafer surface and the polysilicon removal rate can be calculated.

[0068] It should be noted that the pressure on the second polishing pad is no longer adjusted in real time, but the film thickness is monitored in real time.

[0069] When all polysilicon is removed, the film thickness no longer changes dynamically. The endpoint detection system detects the characteristic change points where the film thickness in each area of ​​the wafer no longer changes dynamically. When the polishing of a certain area of ​​polysilicon is detected to be complete, the polishing pressure in that area is reduced to 0.2-0.8 psi until all areas of the wafer surface are polished. This endpoint detection method can greatly improve the problem of large butterfly defects on the wafer surface caused by over-polishing.

[0070] In a possible implementation, before fine polishing the initially polished wafer, the method further includes:

[0071] Obtaining the remaining film thickness of the polysilicon layer in each area of ​​the wafer surface after preliminary polishing;

[0072] Based on the remaining film thickness in each area, the initial polishing pressure for fine polishing of each area is determined with the same remaining polishing time as the target.

[0073] In one possible implementation, based on the remaining film thickness of each region and with the same remaining polishing time as a target, determining the initial polishing pressure for fine polishing of each region includes:

[0074] For any area on the wafer surface, the remaining film thickness of the area is divided by the target remaining polishing time to obtain the target polishing rate of the area;

[0075] Based on the target polishing rate of the region, a polishing pressure corresponding to the target polishing rate is determined as the initial polishing pressure of the region.

[0076] Step 403: On a third polishing pad, using a constant time control method, circulating the grinding liquid and deionized water, perform residue polishing on the wafer after fine polishing; wherein the hardness of the third polishing pad is less than that of the first polishing pad and the second polishing pad.

[0077] Exemplarily, the polishing liquid is a silicon dioxide polishing liquid.

[0078] Exemplarily, the compression ratio of the third polishing pad ranges from 9% to 20%.

[0079] Due to the structure of the Trench MOSFET itself, the mainstream polishing pad (for example, Hardness Shore D: 47-63) is used. Due to its high hardness, even during endpoint monitoring, the mainstream polishing pad has a small contact area with the corner area of ​​the wafer trench, which makes it easy for polysilicon residue to form in the trench corner area. In addition, when the thickness of the gate oxide growth film in the source region is inconsistent, polysilicon residue will also exist in this area after polishing. To address this defect, the present invention uses a third polishing pad with lower hardness to polish again. When polishing to the critical surface between polysilicon and gate oxide (i.e., oxide film), the contact area between the polishing pad and the trench corner and the gate oxide area with poor uniformity can be increased, effectively reducing polysilicon residue in specific locations.

[0080] The polishing pad used in the embodiments of the present invention has a dynamic compression ratio (Dynamic Compressibility) in the range of 9-20%, a pore density (Pore Density) in the range of 2000-6000, and a Pore Size in the range of 200-500 square microns. Due to this excellent compression ratio, the polishing pad maintains good contact with the wafer surface at trench corners and uneven gate oxide areas during polishing, making it easier to remove polysilicon residue in specific locations during polishing. Figure 6 Schematic diagram of the contact between the third polishing pad and the groove corner provided by an embodiment of the present invention.

[0081] During the processing of the first polishing pad and the second polishing pad, due to long-term polishing, the polishing liquid used and the additive components in the polishing liquid, as well as particles generated by the wear of the polishing pad during polishing, will remain on the wafer surface.

[0082] The method of the embodiment of the present invention utilizes a SiO2 polishing slurry for polishing on a third polishing pad, thereby removing polysilicon residue while protecting the gate oxide film. Furthermore, the polishing process is optimized, utilizing a polishing slurry and deionized water cycle, with polishing on the third polishing pad controlled by time. For example, the SiO2 polishing slurry has a pH range of 10-11, a solid loading of 10%, and a particle size of 90 nm.

[0083] For example, the following table shows the process of polishing on the third polishing pad, which can remove polysilicon residue while reducing the residual grinding fluid and polishing by-products during wafer surface polishing, thereby improving the defects on the wafer surface and further improving the product yield.

[0084]

[0085]

[0086] The polishing method provided by the embodiment of the present invention uniformly removes polysilicon from each area by adopting a zoning control method for polishing pressure in the preliminary polishing stage, thereby ensuring the uniformity of the remaining polysilicon film thickness. In the fine polishing stage, constant pressure polishing is performed, and when a certain area reaches the polishing endpoint, the polishing pressure in that area is adjusted to a lower level to stop polishing that area. This avoids constantly adjusting the pressure when approaching the polishing endpoint and avoids causing polishing rate drift, thereby improving the accuracy of endpoint control and reducing over- and under-polishing defects of polysilicon in the groove structure. In the residual polishing stage, a third polishing pad with lower hardness is used. The lower hardness of the polishing pad increases the contact area with the corners of the groove structure, which can quickly remove residual polysilicon in the corners of the groove structure. The polishing is circulated using grinding fluid and deionized water. Under the dual effects of physical friction and solution rinsing, on the one hand, polishing by-products such as polysilicon particles can be quickly removed; on the other hand, residual grinding fluid can also be quickly removed.

[0087] An embodiment of the present invention provides a trench MOSFET device, wherein a polysilicon layer filling a trench structure on a trench MOSFET wafer is prepared based on the trench MOSFET polysilicon chemical mechanical polishing method as described in any one of the above.

[0088] The above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit the same. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the various embodiments of the present invention.

Claims

1. A chemical mechanical polishing method for trench MOSFET polysilicon, characterized in that: The method is applied to polishing a polysilicon layer filling a trench structure on a trench MOSFET wafer; the method comprises: On the first polishing pad, the polysilicon layer of the wafer is preliminarily polished by adjusting the polishing pressure of each zone in real time using a polishing pressure zone control method until the remaining film thickness of the polysilicon layer in each zone on the wafer is simultaneously reduced to a target thickness; On the second polishing pad, a constant polishing pressure control method is used to fine-polish the wafer after the initial polishing. During the fine polishing process, if any area reaches the polishing endpoint, the polishing pressure of the area is reduced from the initial polishing pressure to a preset pressure to stop polishing the area until all areas reach the polishing endpoint. On the third polishing pad, a constant time control method is adopted to circulate the grinding liquid and deionized water to perform residue polishing on the wafer after fine polishing; wherein the hardness of the third polishing pad is less than that of the first polishing pad and the second polishing pad.

2. The chemical mechanical polishing method for trench MOSFET polysilicon according to claim 1, wherein: Before fine polishing the wafer after initial polishing, it also includes: Obtaining the remaining film thickness of the polysilicon layer in each area of ​​the wafer surface after preliminary polishing; Based on the remaining film thickness in each area, the initial polishing pressure for fine polishing of each area is determined with the same remaining polishing time as the target.

3. The chemical mechanical polishing method for trench MOSFET polysilicon according to claim 2, wherein: Based on the remaining film thickness of each area and with the same remaining polishing time as the goal, the initial polishing pressure for fine polishing of each area is determined as follows: For any area on the wafer surface, the remaining film thickness of the area is divided by the target remaining polishing time to obtain the target polishing rate of the area; Based on the target polishing rate of the region, a polishing pressure corresponding to the target polishing rate is determined as the initial polishing pressure of the region.

4. The chemical mechanical polishing method for trench MOSFET polysilicon according to claim 1, wherein: The preliminary polishing of the polysilicon layer of the wafer comprises: Obtaining the initial thickness of the polysilicon layer in each area on the wafer; For any region, determining an initial polishing pressure based on the initial thickness of the region; performing preliminary polishing of the polysilicon layer of the wafer based on the initial polishing pressure of each region, while simultaneously monitoring the remaining thickness of the polysilicon layer in each region in real time; According to the difference between the remaining thickness of the polysilicon layer and the target thickness obtained by real-time monitoring, the polishing pressure of each partition is adjusted in real time until the remaining film thickness of the polysilicon layer in each partition on the wafer is reduced to the target thickness at the same time.

5. The chemical mechanical polishing method for trench MOSFET polysilicon according to claim 1, wherein: According to the difference between the remaining thickness of the polysilicon layer and the target thickness obtained by real-time monitoring, the polishing pressure of each partition is adjusted in real time, including: Adjust the polishing pressure of each zone based on the following formula: ΔP=K×ΔT Among them, ΔP represents the adjustment amount of the polishing pressure in the target area; ΔT represents the difference between the remaining thickness of the target area obtained by real-time monitoring and the target thickness; K represents the preset relationship between the thickness difference and the polishing pressure adjustment amount.

6. The chemical mechanical polishing method for trench MOSFET polysilicon according to claim 1, wherein: The grinding liquid is silicon dioxide grinding liquid.

7. The chemical mechanical polishing method for trench MOSFET polysilicon according to claim 1, wherein: The compression ratio of the third polishing pad ranges from 9% to 20%.

8. The chemical mechanical polishing method for trench MOSFET polysilicon according to claim 1, wherein: The preset pressure ranges from 0.2 to 0.8 psi.

9. The chemical mechanical polishing method for trench MOSFET polysilicon according to claim 1, wherein: The second polishing pad has a lower hardness than the first polishing pad.

10. A trench MOSFET device, characterized in that: The polysilicon layer filling the trench structure on the trench MOSFET wafer is prepared based on the chemical mechanical polishing method for trench MOSFET polysilicon according to any one of claims 1 to 9.

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