Wafer level glass through hole metallization method

Abstract

The invention discloses a method for metalizing a wafer-level glass through hole, which comprises the following steps of: providing a glass wafer which is provided with a micro through hole; a carrier wafer is provided, the size of the carrier wafer is 12 inches, and the size of the carrier wafer is larger than that of the glass wafer; sputtering a seed layer on the first surface of the carrier wafer, wherein the material of the seed layer is Ti / Cu; temporarily bonding the glass wafer and the seed layer on the first surface of the carrier wafer, and forming a PIN contact area at the edge of the seed layer; a single-face electroplating process is carried out on the glass wafer, so that the micro through hole is metalized, and the electroplating PIN realizes current transmission through a PIN contact area; and de-bonding, and removing the carrier wafer and the seed layer to obtain the glass wafer filled with the micro-through-hole metallization. According to the method, the technological process and technical difficulty of TGV through hole metallization are simplified, micro through hole metallization can be achieved through single-face electroplating, and the effects of saving cost and improving efficiency are achieved to a great extent.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and more particularly to a method for wafer-level glass through-hole metallization. Background Art

[0002] Through silicon via (TSV) technology is a high-density packaging technology that is gradually replacing the mature wire bonding process and is considered the fourth generation of packaging technology. TSV technology achieves vertical electrical interconnection through silicon vias by filling them with conductive materials such as copper, tungsten, and polysilicon. Through vertical interconnection, TSV technology can reduce interconnect length, minimize signal delay, and lower capacitance / inductance, enabling low power consumption, high-speed communication between chips, increased bandwidth, and miniaturized device integration.

[0003] Glass and ceramic materials have no freely moving charges, have excellent dielectric properties, and have a thermal expansion coefficient close to that of silicon. Through Glass Via (TGV) technology, which uses glass instead of silicon, can avoid the problem of poor TGV insulation. It also does not require the deposition of an insulating layer on the substrate surface or inside the TGV, and has strong mechanical stability. When the thickness of the adapter plate is less than 100um, the warpage is still small. In addition, large-sized ultra-thin glass substrates are easier to obtain. Therefore, TGV and related technologies have broad application prospects in optical communications, radio frequency, microwave, microelectromechanical systems, microfluidic devices, and three-dimensional integration.

[0004] However, traditional TGV through-hole metallization uses the TGV double-sided electroplating process, which often faces process difficulties and high tooling investment costs.

[0005] It should be noted that current through-hole filling typically uses a dual-electrolytic bath plating process, which typically begins with pulse plating to create a butterfly-shaped wing in the middle of the through-hole, followed by a DC power supply to fill the blind vias with copper. This process is performed in different plating baths and tanks, significantly increasing process cost and complexity.

[0006] Therefore, there is an urgent need to provide a new method for wafer-level glass through-hole metallization. Summary of the Invention

[0007] In order to solve the above problems, the present invention provides a method for wafer-level glass through-hole metallization, which can simplify the process flow and technical difficulty of TGV through-hole metallization.

[0008] The present invention discloses a method for metallizing a wafer-level through-glass via, the method comprising the following steps: S1. Providing a glass wafer, wherein the glass wafer is provided with micro-through holes; S2. Providing a carrier wafer, wherein the carrier wafer has a size of 12 inches and is larger than the glass wafer; sputtering a seed layer on a first surface of the carrier wafer, wherein the seed layer material is Ti / Cu; S3, temporarily bonding the glass wafer and the seed layer on the first surface of the carrier wafer, forming a PIN contact area at the edge of the seed layer; S4. Performing a single-sided electroplating process on the glass wafer to metallize the micro-through holes, and electroplating the PIN pins to achieve current transmission through the PIN pin contact area; S5. Debonding, removing the carrier wafer and the seed layer to obtain a glass wafer filled with micro-through hole metallization.

[0009] Preferably, the size of the glass wafer is 100 mm-294 mm.

[0010] Preferably, the aspect ratio of the micro-through hole is 1:1-1:6.

[0011] Preferably, the thickness of the seed layer is 1000A-3000A Ti / 1000A-20000A Cu.

[0012] Preferably, the width of the PIN needle contact area is 3-5 mm.

[0013] Compared with the prior art, the present invention has the following beneficial effects: The electroplating process involved in the present invention uses a carrier wafer prepared with a seed layer and a glass wafer to bond the micro-through holes into blind holes; and creatively sets the size of the glass wafer to be smaller than the size of the carrier wafer, so that a PIN needle contact area is formed at the edge of the seed layer, so that when the micro-through hole is metallized, the electroplated PIN needle can realize the transmission of current through the PIN needle contact area, and there is no need to prepare a seed layer in the micro-through hole. This avoids the two processes of pulse electroplating to make butterfly wings and DC filling blind holes in the prior art, simplifies the process flow and technical difficulty of TGV through-hole metallization, and can achieve micro-through-hole metallization by single-sided electroplating, which achieves the effect of cost saving and efficiency improvement to a large extent. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 Schematic diagram of the structure of the glass wafer in the present invention; Figure 2 Schematic diagram of the structure of the carrier wafer; Figure 3 Schematic diagram of the structure of the bonded glass wafer and carrier wafer; Figure 4 Schematic diagram of the structure of micro-through hole metallization of glass wafer; Figure 5 Schematic diagram of the structure of the glass wafer after micro-via metallization filling; Figure 6 Schematic diagram of the structure of the PIN needle contact area.

[0015] Description of reference numerals: glass wafer 1 , micro-via 2 , carrier wafer 3 , first surface 31 , seed layer 4 , PIN contact area 41 , metallization 5 . DETAILED DESCRIPTION

[0016] The technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all the embodiments.

[0017] The present invention discloses a method for metallizing a wafer-level through-glass via, the method comprising the following steps: S1, such as Figure 1 As shown, a glass wafer 1 is provided, wherein the glass wafer 1 is provided with micro-through holes 2 .

[0018] S2, such as Figure 2 As shown, a carrier wafer 3 is provided. The size of the carrier wafer 3 is 12 inches, and the size of the carrier wafer 3 is larger than that of the glass wafer 1 . A seed layer 4 is sputtered on the first surface 31 of the carrier wafer 3 , and the material of the seed layer 4 is Ti / Cu. S3, such as Figure 3 As shown, the glass wafer 1 and the seed layer 4 on the first surface 31 of the carrier wafer 3 are temporarily bonded, and the edge of the seed layer 4 forms a PIN needle contact area 41; the structural schematic diagram of the PIN needle contact area 41 is shown in FIG. Figure 6 shown.

[0019] S4, such as Figure 4 As shown, a single-sided electroplating process is performed on the glass wafer 1 to metallize the micro-vias 2 5 , and the electroplated PIN pins realize current transmission through the PIN pin contact area 41 .

[0020] S5, debonding, removing the carrier wafer 3 and the seed layer 4, and obtaining the glass wafer 1 filled with the micro-through hole 2 metallization 5, the structure of which is as follows Figure 5 shown.

[0021] The size of the glass wafer 1 is 100mm-294mm. In actual operation, its size is slightly smaller than that of the carrier wafer 3, while ensuring the size of the PIN needle contact area 41; the size of the PIN needle contact area 41 can be sufficient to ensure full contact of the electroplated PIN needle. Therefore, the width of the PIN needle contact area 41 is 3-5mm to meet the requirements, starting from the edge of the carrier wafer 3 inward. On the other hand, it is not necessary to deliberately control the width of the PIN needle contact area 41. According to the size of the glass wafer 1 and the size of the carrier wafer 3, when the two are bonded, try to ensure that they are bonded in a concentric circle manner without a large distance offset. Then the size difference area between the two is the PIN needle contact area 41, which is sufficient to ensure full contact of the electroplated PIN needle.

[0022] The aspect ratio of the micro-through hole 2 is 1:1-1:6.

[0023] The thickness of the seed layer 4 is 1000A-3000A Ti / 1000A-20000A Cu.

[0024] In the present invention, the micro-through hole 2 is made into a blind hole by bonding a carrier wafer 3 prepared with a seed layer 4 and a glass wafer 1; and the size of the glass wafer 1 is creatively set to be smaller than the size of the carrier wafer 3, so that a PIN needle contact area 41 is formed at the edge of the seed layer 4, so that when the micro-through hole 2 is metallized 5, the electroplated PIN needle can realize the transmission of current through the PIN needle contact area 41, and there is no need to make a seed layer 4 in the micro-through hole 2, which avoids the two processes of pulse electroplating to make butterfly wings and DC filling blind holes in the prior art, simplifies the process flow and technical difficulty of TGV through-hole metallization 5, and single-sided electroplating can realize micro-through hole 2 metallization 5, which achieves the effect of saving costs and improving efficiency to a large extent.

[0025] The electroplating method involved in the present invention is the same as the currently mature process of preparing copper pillars or Cu posts using sputtering, photolithography, and electroplating processes, and uses the patterned holes of the TGV itself instead of the PRPhoto process, making the process flow simpler.

[0026] In terms of electroplating solution, the use of the plating solution with fast and hole-filling characteristics for high copper pillar electroplating operations in the current industry can meet the needs, and there are no higher requirements.

[0027] In terms of the machine, since the present invention uses a glass wafer 1 that is smaller than the standard size to be temporarily bonded to a 12-inch carrier wafer 3, a position for the electroplated conductive pin to contact the seed layer 4 is reserved, and the electroplated PIN needle can realize the transmission of current through the PIN needle contact area 41, so any equipment that meets the requirements of conventional 12-inch electroplating operations can be applied to the present invention.

[0028] In the single-sided electroplating process of the present invention, the electroplating height of the metallization 5 can be controlled by the electroplating operation time. The operation can be completed as long as the micro-through hole 2 is fully filled with metal. The double sides of the glass wafer 1 do not involve metal growth, so the CMP operation in the prior art can be avoided, and the equipment requirements are low.

[0029] The temporary bonding process of the glass wafer 1 and the carrier wafer 3 in the present invention can be carried out in the following two ways: The first method is to use a mechanical bonding method, in which no temporary bonding adhesive or film material is involved between the glass wafer 1 and the carrier wafer 3. This bonding process has relatively high technical requirements.

[0030] The second method is to use a thermal bonding film, that is, to apply a temporary bonding film on one side of the glass wafer 1, and to make through holes corresponding to the micro-through holes 2 on the temporary bonding film by laser opening, and then to achieve temporary bonding with the carrier wafer 3. This method has low technical requirements, low cost and high feasibility.

[0031] The above are only some embodiments of the present invention. It should be pointed out that for ordinary technicians in this field, other variations and improvements can be made without departing from the creative concept of the present invention, and these all fall within the scope of protection of the present invention.

Claims

1. A method for wafer-level glass through-hole metallization, characterized in that: The method comprises the following steps: S1. Providing a glass wafer, wherein the glass wafer is provided with micro-through holes; S2. Providing a carrier wafer, wherein the carrier wafer has a size of 12 inches and is larger than the glass wafer; sputtering a seed layer on a first surface of the carrier wafer, wherein the seed layer material is Ti / Cu; S3, temporarily bonding the glass wafer and the seed layer on the first surface of the carrier wafer, forming a PIN contact area at the edge of the seed layer; S4. Performing a single-sided electroplating process on the glass wafer to metallize the micro-through holes, and electroplating the PIN pins to achieve current transmission through the PIN pin contact area; S5. Debonding, removing the carrier wafer and the seed layer to obtain a glass wafer filled with micro-through hole metallization.

2. The method according to claim 1, characterized in that The size of the glass wafer is 100mm-294mm.

3. The method according to claim 2, characterized in that The aspect ratio of the micro-through hole is 1:1-1:

6.

4. The method according to claim 3, characterized in that The thickness of the seed layer is 1000A-3000A Ti / 1000A-20000A Cu.

5. The method according to claim 4, characterized in that The width of the PIN needle contact area is 3-5 mm.

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