Grid charge measuring method and device for MOSFET (Metal Oxide Semiconductor Field Effect Transistor) device

Abstract

The invention discloses a gate charge measuring method and device for an MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) device, and relates to the technical field of power electronic test and measurement. The first end of the load module is electrically connected with the drain electrode of the tested power device, and the second end of the load module is electrically connected with the first end of the bus capacitor; the gate driving module is electrically connected between the gate and the source of the tested power device, and the source of the tested power device is electrically connected with the second end of the bus capacitor; the gate driving module comprises a driving resistor; the high-voltage differential voltage probe is electrically connected to two ends of a drain electrode and a source electrode of a tested power device, the low-voltage differential probe with the high common-mode rejection ratio is electrically connected to two ends of the driving resistor, and the low-voltage differential voltage probe is electrically connected to two ends of a grid electrode and the source electrode of the tested power device; and the current probe is electrically connected to a test loop formed between the source electrode of the tested power device and the second end of the bus capacitor. According to the invention, the gate charge measurement accuracy is obviously improved.

Description

Technical Field

[0001] The present invention belongs to the technical field of power electronic testing and measurement, and in particular relates to a gate charge measurement method and device for MOSFET devices. Background Art

[0002] Measuring the gate charge of power devices is a core component of metal-oxide semiconductor field-effect transistor (MOSFET) data sheet calibration, and its accuracy directly impacts the efficiency, cost, heat dissipation, and reliability of power electronic device designs. Accurately measuring the gate charge (Qg) of power devices and their sub-parameters, gate-source charge (Qgs) and gate-drain charge (Qgd), optimizes circuit design, reduces switching losses, increases switching frequency, and allows selection of appropriate power devices for specific application scenarios, ultimately enabling the construction of high-performance power electronic systems. Furthermore, accurate gate charge measurement helps power device manufacturers accurately evaluate their design solutions during the R&D phase.

[0003] In the prior art, the traditional power device gate charge measurement method uses a constant current source (Ig) to charge the gate of the power device, and measures the time it takes for the constant current source to charge the gate, and calculates the gate charge based on the time and constant current value. However, this method has the following defects: 1. It does not match the actual working conditions. The constant current source cannot simulate the dynamic characteristics of the actual drive circuit, such as the rise and fall time of the drive signal, the change in drive capability, etc., resulting in the measured gate charge parameters deviating from the actual application scenario; 2. The measurement error is large. The output of the constant current source is not monitored. The circuit is affected by parasitic parameters and output side voltage jumps, and is prone to fluctuations during the test process. The test result error is caused by the incomplete constant current source; 3. The system complexity is high, the constant current source circuit design is complex, the cost is increased, and the calibration process is cumbersome.

[0004] Therefore, there is an urgent need to provide a gate charge measurement method and device for MOSFET devices to improve the defects in the prior art. Summary of the Invention

[0005] In order to solve the above problems existing in the prior art, the present invention provides a gate charge measurement method and device for MOSFET devices. The technical problem to be solved by the present invention is achieved through the following technical solutions: In a first aspect, the present invention provides a gate charge measurement device for a MOSFET device, comprising: Power device under test; A load module, wherein the first end of the load module is electrically connected to the drain of the power device under test, and the second end of the load module is electrically connected to the first end of the bus capacitor; the load module is used to simulate the freewheeling state of the power device under test when it is turned off. A gate drive module is electrically connected between the gate and source of the power device under test, and the source of the power device under test is electrically connected to the second end of the bus capacitor; the gate drive module includes a drive resistor, and the gate drive module is used to drive the power device under test to turn on and off; A high-voltage differential voltage probe, a low-voltage differential probe with a high common-mode rejection ratio, a low-voltage differential voltage probe and a current probe. The high-voltage differential voltage probe is electrically connected to the drain and source of the power device under test, and is used to measure the voltage across the drain and source of the power device under test. The low-voltage differential probe with a high common-mode rejection ratio is electrically connected to the two ends of the driving resistor, and is used to measure the voltage across the driving resistor. The low-voltage differential voltage probe is electrically connected to the gate and source of the power device under test, and is used to measure the voltage across the gate and source of the power device under test. The current probe is electrically connected to the test loop formed between the source of the power device under test and the second end of the bus capacitor, and is used to measure the current flowing through the power device under test.

[0006] In a second aspect, the present invention further provides a gate charge measurement method for a MOSFET device, which is applied to the gate charge measurement device for a MOSFET device provided above in the present invention, comprising: Generate a first pulse signal to control the power device under test to turn on; Adjusting the pulse time of the first pulse signal and adjusting the parameters of the load module electrically connected to the drain of the power device under test to control the magnitude of the current flowing through the power device under test until the current flowing through the power device under test reaches a preset current; collecting the voltage across the drain-source of the power device under test, the voltage across the driving resistor, the voltage across the gate-source of the power device under test, and the current flowing through the power device under test, and analyzing them to determine the first test condition; Generate a second pulse signal within a preset interval, collect the voltage across the drain and source of the power device under test, the voltage across the driving resistor, the voltage across the gate and source of the power device under test, and the current flowing through the power device under test, and analyze the collected data to determine a second test condition. When the second test condition is met, calculate the gate current of the power device under test, and; The gate current of the power device under test is integrated to obtain the gate charge of the power device under test.

[0007] Beneficial effects of the present invention: The present invention provides a gate charge measurement method and device for MOSFET devices, comprising a power device under test, a load module electrically connected to the drain of the power device under test, and a gate drive module electrically connected between the gate and the source of the power device under test, wherein the gate drive module is used to drive the power device under test to turn on and off, and the load module is used to simulate the freewheeling state of the power device under test when it is turned off; the method and device also include a high-voltage differential voltage probe, a low-voltage differential probe with a high common-mode rejection ratio, a low-voltage differential voltage probe, and a current probe, wherein the high-voltage differential voltage probe is used to measure the voltage across the drain and source of the power device under test, and the low-voltage differential probe with a high common-mode rejection ratio is used to measure the voltage across the drain and source of the power device under test. It is used to measure the voltage across the driving resistor, the low-voltage differential voltage probe is used to measure the voltage across the gate source of the power device under test, and the current probe is used to measure the current flowing through the power device under test; the driving resistor included in the gate driving module of the present invention is a large driving resistor, and a low-voltage differential probe with a high common-mode rejection ratio is set to measure the voltage across the driving resistor. The gate current of the power device under test is directly obtained based on Ohm's law, which can effectively suppress common-mode noise and effectively solve the error problem caused by the traditional gate charge dependence on the constant current source performance and the inability to monitor in real time. Compared with the traditional test method, the gate charge measurement accuracy is significantly improved and the test complexity is reduced.

[0008] The present invention will be further described in detail below with reference to the accompanying drawings and embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] Figure 1 1 is a schematic diagram of a gate charge measurement device for a MOSFET device provided by an embodiment of the present invention; Figure 2 This is a flow chart of a gate charge measurement method for a MOSFET device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0010] The present invention will be further described in detail below with reference to specific examples, but the embodiments of the present invention are not limited thereto.

[0011] See Figure 1 , Figure 1 1 is a schematic diagram of a gate charge measurement device for a MOSFET device provided by an embodiment of the present invention. The gate charge measurement device for a MOSFET device provided by the present invention includes: A power device under test 10; The load module 20 has a first end electrically connected to the drain of the power device 10 under test, and a second end electrically connected to the first end of the bus capacitor C; the load module 20 is used to simulate the freewheeling state of the power device 10 under test when it is turned off. The gate drive module 30 is electrically connected between the gate and source of the power device under test 10, and the source of the power device under test 10 is electrically connected to the second end of the bus capacitor C; the gate drive module 30 includes a drive resistor Rg, and the gate drive module 30 is used to drive the power device under test 10 to turn on and off; A high-voltage differential voltage probe, a low-voltage differential probe with a high common-mode rejection ratio, a low-voltage differential voltage probe and a current probe, wherein the high-voltage differential voltage probe is electrically connected to the drain and source of the power device under test 10, and is used to measure the voltage Vds across the drain and source of the power device under test 10; the low-voltage differential probe with a high common-mode rejection ratio is electrically connected to the two ends of the driving resistor Rg, and is used to measure the voltage VRg across the driving resistor Rg; the low-voltage differential voltage probe is electrically connected to the gate and source of the power device under test 10, and is used to measure the voltage Vgs across the gate and source of the power device under test 10; the current probe is electrically connected to the test loop formed between the source of the power device under test 10 and the second end of the bus capacitor C, and is used to measure the current Ids flowing through the power device under test 10.

[0012] Specifically, a gate charge measurement device for a MOSFET device provided in this embodiment includes a power device under test 10, a load module 20 electrically connected to the drain of the power device under test 10, and a gate drive module 30 electrically connected between the gate and the source of the power device under test 10, wherein the gate drive module 30 is used to drive the power device under test 10 to turn on and off, and the load module 20 is used to simulate the freewheeling state when the power device under test 10 is turned off; and further includes a high-voltage differential voltage probe, a low-voltage differential probe with a high common-mode rejection ratio, a low-voltage differential voltage probe and a current probe, wherein the high-voltage differential voltage probe is used to measure the voltage Vds across the drain and source of the power device under test 10, and the low-voltage differential probe with a high common-mode rejection ratio is used to measure The voltage VRg across the driving resistor Rg, the low-voltage differential voltage probe is used to measure the voltage Vgs across the gate-source of the power device 10 under test, and the current probe is used to measure the current Ids flowing through the power device 10 under test; it should be noted that in this embodiment, the driving resistor Rg included in the gate driving module 30 is a large driving resistor Rg, and a low-voltage differential probe with a high common-mode rejection ratio is set to measure the voltage VRg across the driving resistor Rg. The gate current of the power device 10 under test is directly obtained based on Ohm's law, which can effectively suppress common-mode noise and effectively solve the error problem caused by the traditional gate charge dependence on the constant current source performance and the inability to monitor in real time. Compared with the traditional test method, the gate charge measurement accuracy is significantly improved and the test complexity is reduced.

[0013] In an optional embodiment of the present invention, the load module 20 includes a load inductor L and a diode D connected in parallel, a first end of the load inductor L is electrically connected to the drain of the power device under test 10, a second end of the load inductor L is electrically connected to the first end of the bus capacitor C, a first end of the diode D is electrically connected to the drain of the power device under test 10, and a second end of the diode D is electrically connected to the first end of the bus capacitor C; The load inductor L is used to simulate an inductive load, and the diode D is used to provide a freewheeling path for the load inductor L when the power device under test 10 is turned off.

[0014] Specifically, in this embodiment, the load module 20 includes a load inductor L and a diode D. The load inductor L is connected in parallel with the diode D to simulate the freewheeling state when the power device under test 10 is turned off. The stored charge of the parallel freewheeling diode D used should be as small as possible to avoid affecting the gate charge measurement. Optionally, the diode D is a SiC Schottky diode. Optionally, to simulate actual working conditions, the body diode of the power device under test 10 can also be used as a freewheeling diode.

[0015] In an optional embodiment of the present invention, the gate drive module 30 also includes a drive circuit 31, a signal generator 32 and a drive power supply 33. The drive circuit 31 is electrically connected between the gate of the power device under test 10 and the first end of the drive resistor Rg, and the second end of the drive resistor Rg is electrically connected to the source of the power device under test 10. The drive circuit 31 is used to convert the pulse signal into a power signal, control the opening and closing of the power device under test 10, and provide a gate charge measurement point of the power device under test 10. The signal generator 32 is electrically connected to the drive circuit 31 for generating a pulse signal. The drive power supply 33 is electrically connected to the signal generator 32 for providing a supply voltage to the drive circuit 31 and the signal generator 32.

[0016] Specifically, in this embodiment, the driving power supply 33 provides a power supply voltage for the driving circuit 31 and the signal generator 32. The signal generator 32 is used to provide a pulse signal to the driving circuit 31. The driving circuit 31 converts the pulse signal into a power signal, controls the turning on and off of the power device under test 10, and provides a gate charge measurement point. The driving circuit 31 replaces the traditional constant current source, provides gate driving conditions, and realizes the turning on or off of the power device under test 10 by charging and discharging the gate charge.

[0017] It should be noted that in this embodiment, the driving resistor Rg is arranged between the driving circuit 31 and the source of the power device 10 under test. The resistance value of the driving resistor Rg can be appropriately increased according to the test results. Compared with the position of the traditional driving resistor Rg, the jump voltage and signal-to-noise ratio at both ends of the driving resistor Rg are reduced.

[0018] It should be noted that if Figure 1As shown, in this embodiment, the drive circuit 31 uses an inductive load half-bridge test circuit that reflects the device's dynamic characteristics. This circuit is closer to the device's actual operating conditions and reflects the most realistic gate charge characteristics. Compared to traditional constant current source circuits that do not conform to actual application circuits, the drive circuit 31 in this embodiment is a common push-pull circuit, which is closer to real-world application scenarios and fits actual operating conditions.

[0019] In an optional embodiment of the present invention, it also includes: An oscilloscope is electrically connected to a high-voltage differential voltage probe, a low-voltage differential probe with a high common-mode rejection ratio, a low-voltage differential voltage probe, and a current probe, and is used to collect and process the voltage Vds across the drain and source of the power device under test 10, the voltage VRg across the driving resistor Rg, the voltage Vgs across the gate and source of the power device under test 10, and the current Ids flowing through the power device under test 10.

[0020] In an optional embodiment of the present invention, it also includes: A DC voltage source Vdd, wherein a first end of the DC voltage source Vdd is electrically connected to a first end of the bus capacitor C, and a second end of the DC voltage source Vdd is electrically connected to a second end of the bus capacitor C; the DC voltage source Vdd is used to charge the bus capacitor C.

[0021] Specifically, in this embodiment, the DC voltage source Vdd is used to charge the bus capacitor C; optionally, to ensure the instantaneous power requirement of the test loop, the DC voltage source Vdd is used to charge the bus capacitor C and then discharge it to the test loop.

[0022] Based on the same inventive concept, see Figure 2 , Figure 2 : is a flow chart of a gate charge measurement method for a MOSFET device provided by an embodiment of the present invention. The present invention also provides a gate charge measurement method for a MOSFET device, which is applied to the gate charge measurement device for a MOSFET device provided by the above embodiment of the present invention. The embodiment of the device can be referred to above and will not be repeated here. The method includes: S101 : Generate a first pulse signal to control the power device under test 10 to turn on.

[0023] Specifically, in this embodiment, the driving power supply 33 and the DC voltage source Vdd are turned on, a first pulse signal is generated by the signal generator 32, and the driving circuit 31 controls the power device under test to turn on in response to the first pulse signal.

[0024] S102. Adjust the pulse time of the first pulse signal, and adjust the parameters of the load module 20 electrically connected to the drain of the power device under test 10 to control the magnitude of the current Ids flowing through the power device under test 10 until the current Ids flowing through the power device under test 10 reaches a preset current; collect the voltage Vds across the drain and source of the power device under test 10, the voltage VRg across the driving resistor Rg, the voltage Vgs across the gate and source of the power device under test 10, and the current Ids flowing through the power device under test 10, and analyze them to determine the first test condition.

[0025] Specifically, in this embodiment, the pulse time of the first pulse signal generated by the signal generator 32, the parameters of the load inductance L, and the magnitude of the current Ids flowing through the power device under test 10 are adjusted, so that the current Ids flowing through the power device under test 10 reaches a preset current, and the voltage Vds across the drain and source of the power device under test 10, the voltage VRg across the driving resistor Rg, the voltage Vgs across the gate and source of the power device under test 10, and the current Ids flowing through the power device under test 10 are collected and analyzed by an oscilloscope.

[0026] It should be noted that the load inductor L is charged through the DC voltage source Vdd. When the voltage of the bus capacitor C stabilizes at the drain-source voltage Vds of the power device under test 10, the driving circuit 31 charges and discharges the gate of the power device under test 10, wherein the pulse width corresponding to the first pulse signal should satisfy the drain-source current of the power device under test 10 reaching the preset current Ids.

[0027] S103. Within a preset interval, a second pulse signal is generated, and the voltage Vds across the drain and source of the power device under test 10, the voltage VRg across the driving resistor Rg, the voltage Vgs across the gate and source of the power device under test 10, and the current Ids flowing through the power device under test 10 are collected and analyzed to determine a second test condition. When the second test condition is met, the gate current of the power device under test 10 is calculated.

[0028] Specifically, in this embodiment, after the power device under test 10 is turned off, after a preset interval, the signal generator 32 generates a second pulse signal, and the driving circuit 31 responds to the second pulse signal to control the power device under test 10 to turn on; the voltage Vds across the drain and source of the power device under test 10, the voltage VRg across the driving resistor Rg, the voltage Vgs across the gate and source of the power device under test 10, and the current Ids flowing through the power device under test 10 are collected, and the gate current of the power device under test 10 is calculated to form a waveform, and the gate current is calculated.

[0029] Gate current of the power device under test 10 The expression is: ; in, Represents the voltage difference across the driving resistor Rg, Indicates the resistance value of the driving resistor Rg.

[0030] It should be noted that the resistance of the driving resistor Rg is greater than or equal to 500Ω.

[0031] It should be noted that the preset interval satisfies the requirement for the load module 20 to maintain a stable continuous current.

[0032] S104 , integrating the gate current of the power device 10 under test to obtain the gate charge of the power device 10 under test.

[0033] Specifically, in this embodiment, the gate charge is the amount of charge that needs to be charged to the gate source of the power device 10 under test during the turn-on time, and its value is obtained by integrating the gate current during the power supply process. During the turn-on phase of the power device 10 under test, the driving circuit 31 continuously charges the gate, detects the charging current and integrates it to obtain the gate charge.

[0034] Among them, the gate charge of the power device 10 under test is The expression is: ; in, Indicates the moment when the gate current starts to act, Indicates the time when the gate current ends, Indicates the gate current of the power device under test.

[0035] It should be noted that the purpose of collecting the voltage Vds across the drain and source of the power device under test 10 and the voltage Vgs across the gate and source of the power device under test 10 is to determine the test conditions. Different devices have different test requirements, and the final requirements are met by determining the test conditions.

[0036] In summary, the present invention provides a gate charge measurement method for MOSFET devices, which simulates the dynamic working conditions of the power device 10 under test and the operating environment of actual applications, and determines the matching of the power device 10 under test with the target application while simplifying the test process; it breaks through the traditional problem of being unable to accurately measure the gate charge and the measurement's dependence on a constant current source. The present invention combines a push-pull drive circuit 31 with differential detection technology, which improves the accuracy of measuring the gate charge while approaching the actual working conditions, providing more reliable test data for the selection and circuit design of the power device 10 under test, and has significant industrial application value.

[0037] It should be noted that, in this document, relational terms such as first and second are used solely to distinguish one entity or operation from another, and do not necessarily require or imply any actual relationship or order between these entities or operations. Furthermore, the terms "comprise," "include," or any other variations thereof are intended to encompass non-exclusive inclusion, such that an article or device comprising a list of elements includes not only those elements but also other elements not explicitly listed. Without further limitation, an element defined by the phrase "comprising a..." does not preclude the presence of additional identical elements in the article or device comprising the element. Terms such as "connected" or "connected" are not limited to physical or mechanical connections but may include electrical connections, whether direct or indirect. References to orientations or positional relationships, such as "upper," "lower," "left," and "right," are based on the orientations or positional relationships shown in the accompanying drawings and are intended solely to facilitate description and simplify the description of the present invention. They do not indicate or imply that the device or element referred to must have, be constructed, or operate in a specific orientation, and are therefore not to be construed as limiting the present invention.

[0038] In the description of this specification, the reference terms "one embodiment," "some embodiments," "example," "specific example," or "some examples" mean that the specific features or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features or characteristics described can be combined in any suitable manner in any one or more embodiments or examples. In addition, those skilled in the art can combine and combine different embodiments or examples described in this specification.

[0039] The above is a further detailed description of the present invention in conjunction with specific preferred embodiments, and the specific implementation of the present invention should not be considered to be limited to these descriptions. For those skilled in the art of the present invention, without departing from the concept of the present invention, several simple deductions or substitutions can be made, which should be considered to fall within the scope of protection of the present invention.

Claims

1. A gate charge measurement device for a MOSFET device, characterized in that: include: Power device under test; A load module, wherein a first end of the load module is electrically connected to the drain of the power device under test, and a second end of the load module is electrically connected to the first end of the bus capacitor; the load module is used to simulate the freewheeling state of the power device under test when it is turned off, A gate drive module is electrically connected between the gate and source of the power device under test, wherein the source of the power device under test is electrically connected to the second end of the bus capacitor; the gate drive module includes a drive resistor, and the gate drive module is used to drive the power device under test to turn on and off; A high-voltage differential voltage probe, a low-voltage differential probe with a high common-mode rejection ratio, a low-voltage differential voltage probe and a current probe, wherein the high-voltage differential voltage probe is electrically connected to the drain and source of the power device under test, and is used to measure the voltage across the drain and source of the power device under test; the low-voltage differential probe with a high common-mode rejection ratio is electrically connected to the two ends of the driving resistor, and is used to measure the voltage across the driving resistor; the low-voltage differential voltage probe is electrically connected to the gate and source of the power device under test, and is used to measure the voltage across the gate and source of the power device under test; the current probe is electrically connected to a test loop formed between the source of the power device under test and the second end of the bus capacitor, and is used to measure the current flowing through the power device under test.

2. The gate charge measurement device for MOSFET devices according to claim 1, characterized in that: The load module includes a load inductor and a diode connected in parallel, a first end of the load inductor is electrically connected to the drain of the power device under test, a second end of the load inductor is electrically connected to the first end of the bus capacitor, a first end of the diode is electrically connected to the drain of the power device under test, and a second end of the diode is electrically connected to the first end of the bus capacitor; The load inductor is used to simulate an inductive load, and the diode is used to provide a freewheeling path for the load inductor when the power device under test is turned off.

3. The gate charge measurement device for MOSFET devices according to claim 1, characterized in that: The gate drive module also includes a drive circuit, a signal generator and a drive power supply. The drive circuit is electrically connected between the gate of the power device under test and the first end of the drive resistor, and the second end of the drive resistor is electrically connected to the source of the power device under test. The drive circuit is used to convert the pulse signal into a power signal, control the on and off of the power device under test, and provide a gate charge measurement point of the power device under test. The signal generator is electrically connected to the drive circuit for generating a pulse signal. The drive power supply is electrically connected to the signal generator for providing a supply voltage to the drive circuit and the signal generator.

4. The gate charge measurement device for MOSFET devices according to claim 1, characterized in that: Also includes: An oscilloscope, the oscilloscope being electrically connected to the high-voltage differential voltage probe, the low-voltage differential probe with a high common-mode rejection ratio, the low-voltage differential voltage probe, and the current probe, respectively, and being used to collect and process the voltage across the drain-source of the power device under test, the voltage across the driving resistor, the voltage across the gate-source of the power device under test, and the current flowing through the power device under test.

5. The gate charge measurement device for MOSFET device according to claim 1, characterized in that: Also includes: a DC voltage source, wherein a first end of the DC voltage source is electrically connected to a first end of the bus capacitor, and a second end of the DC voltage source is electrically connected to a second end of the bus capacitor; The DC voltage source is used to charge the bus capacitor.

6. A gate charge measurement method for a MOSFET device, applied to the gate charge measurement device for a MOSFET device according to any one of claims 1 to 5, characterized in that: include: Generate a first pulse signal to control the power device under test to turn on; Adjusting the pulse time of the first pulse signal and adjusting the parameters of a load module electrically connected to the drain of the power device under test to control the magnitude of the current flowing through the power device under test until the current flowing through the power device under test reaches a preset current; collecting the voltage across the drain-source of the power device under test, the voltage across the driving resistor, the voltage across the gate-source of the power device under test, and the current flowing through the power device under test, and analyzing them to determine a first test condition; Generate a second pulse signal within a preset interval, collect the voltage across the drain and source of the power device under test, the voltage across the driving resistor, the voltage across the gate and source of the power device under test, and the current flowing through the power device under test, and analyze the collected data to determine a second test condition. When the second test condition is met, calculate the gate current of the power device under test; The gate current of the power device under test is integrated to obtain the gate charge of the power device under test.

7. The gate charge measurement method for a MOSFET device according to claim 6, wherein: The gate current of the power device under test The expression is: ； in, Represents the voltage difference across the driving resistor, Indicates the resistance value of the driving resistor.

8. The gate charge measurement method for a MOSFET device according to claim 7, wherein: The resistance of the driving resistor is greater than or equal to 500Ω.

9. The gate charge measurement method for a MOSFET device according to claim 6, wherein: The gate charge of the power device under test The expression is: ； in, Indicates the moment when the gate current starts to act, Indicates the time when the gate current ends, Indicates the gate current of the power device under test.

10. The gate charge measurement method for MOSFET device according to claim 6, characterized in that: The preset interval satisfies the requirement of stable continuous current of the load module.

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