Plasma processing apparatus

Abstract

Provided is a technique capable of improving in-plane uniformity of a substrate during plasma processing. The plasma processing apparatus includes: a plasma processing chamber; a substrate support part; a substrate chuck electrode; at least one annular suction cup electrode; a substrate bias electrode; an annular bias electrode; a first voltage pulse generator; a second voltage pulse generator; and a switch configured to switch between a first connection state in which the first voltage pulse generator is electrically connected to the substrate bias electrode and the second voltage pulse generator is electrically connected to the ring bias electrode, and a second connection state in which the second voltage pulse generator is electrically connected to the ring bias electrode. The second connection state is a state in which the first voltage pulse generator is electrically connected to the annular bias electrode and the second voltage pulse generator is electrically connected to the substrate bias electrode.

Description

Technical Field

[0001] Exemplary embodiments of the present disclosure relate to a plasma processing apparatus. Background Art

[0002] In a plasma processing apparatus, as a technique for supplying a high frequency and a pulse voltage to a plurality of electrodes, there is a technique described in Patent Document 1.

[0003] Prior art literature

[0004] Patent Literature

[0005] Patent Document 1: U.S. Patent Application Publication No. 2022 / 003719 Summary of the Invention

[0006] The present disclosure provides a technology capable of improving the in-plane uniformity of a substrate during plasma processing.

[0007] The plasma processing apparatus according to an exemplary embodiment of the present disclosure includes: a plasma processing chamber; a substrate support portion disposed in the plasma processing chamber, the substrate support portion including: a base, an electrostatic chuck disposed on the base and having a substrate supporting surface and a ring supporting surface, and at least one annular component disposed on the ring supporting surface so as to surround a substrate disposed on the substrate supporting surface; a substrate chuck electrode disposed below the substrate supporting surface in the electrostatic chuck; at least one annular chuck electrode disposed below the ring supporting surface in the electrostatic chuck; a substrate bias electrode disposed in the electrostatic chuck and below the substrate chuck electrode; and an annular bias electrode disposed below the substrate chuck electrode. In the electrostatic chuck, and arranged below at least one annular chuck electrode; a first voltage pulse generator, configured to generate a first voltage pulse sequence having a first voltage level; a second voltage pulse generator, configured to generate a second voltage pulse sequence having a second voltage level; and a switch, configured to switch between a first connection state and a second connection state, the first connection state being a state in which the first voltage pulse generator is electrically connected to the substrate bias electrode and the second voltage pulse generator is electrically connected to the annular bias electrode, and the second connection state being a state in which the first voltage pulse generator is electrically connected to the annular bias electrode and the second voltage pulse generator is electrically connected to the substrate bias electrode.

[0008] Effects of the Invention

[0009] According to an exemplary embodiment of the present disclosure, a technology capable of improving in-plane uniformity of a substrate in plasma processing may be provided. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] Figure 1 It is a diagram for explaining an example configuration of a plasma processing system.

[0011] Figure 2 This is a diagram for explaining a configuration example of a capacitively coupled plasma processing apparatus.

[0012] Figure 3 It is a diagram for explaining a configuration example of a substrate supporting portion and a DC power supply in the first exemplary embodiment.

[0013] Figure 4 It is a diagram for explaining a configuration example of a bias electrode in a plan view.

[0014] Figure 5 This is a diagram showing an example of a voltage pulse.

[0015] Figure 6 It is a diagram showing a configuration example of a switch.

[0016] Figure 7 It is a diagram for explaining the fluctuation of the plasma sheath on the substrate.

[0017] Figure 8 It is a diagram for explaining the fluctuation of the plasma sheath on the substrate.

[0018] Figure 9 This is a diagram for explaining the fluctuation of the plasma sheath on the substrate when the ring assembly is thick.

[0019] Figure 10 This is a diagram for explaining the change in the plasma sheath on the substrate when the thickness of the ring assembly is reduced.

[0020] Figure 11 It is a diagram for explaining another arrangement example of the annular bias electrode.

[0021] Figure 12 It is a diagram for explaining another arrangement example of the annular bias electrode.

[0022] Figure 13 It is a diagram for explaining a configuration example of a substrate supporting portion and a DC power supply in a second exemplary embodiment.

[0023] Figure 14 It is a diagram for explaining a configuration example of a substrate supporting portion and a DC power supply in a second exemplary embodiment.

[0024] Description of Reference Numerals

[0025] 1…plasma processing apparatus; 10…chamber; 11…substrate support portion; 112…ring assembly; 1111…electrostatic chuck; 200…substrate chuck electrode; 201…annular chuck electrode; 202…substrate bias electrode; 203…annular bias electrode; 250…first DC power supply; 251…second DC power supply; 260…first voltage pulse generator; 261…second voltage pulse generator; 280…switch; W…substrate. DETAILED DESCRIPTION

[0026] Hereinafter, each embodiment of the present disclosure will be described.

[0027] In an exemplary embodiment, a plasma processing apparatus is provided, comprising: a plasma processing chamber; a substrate support portion disposed in the plasma processing chamber, the substrate support portion comprising: a base, an electrostatic chuck disposed on the base and having a substrate supporting surface and a ring supporting surface, at least one annular component disposed on the ring supporting surface so as to surround a substrate disposed on the substrate supporting surface; a substrate chuck electrode disposed in the electrostatic chuck below the substrate supporting surface; at least one annular chuck electrode disposed in the electrostatic chuck below the ring supporting surface; a substrate bias electrode disposed in the electrostatic chuck and below the substrate chuck electrode; and an annular bias electrode. Configured in an electrostatic suction cup and configured below at least one annular suction cup electrode; a first voltage pulse generator, configured to generate a first voltage pulse sequence having a first voltage level; a second voltage pulse generator, configured to generate a second voltage pulse sequence having a second voltage level; and a switch, configured to switch between a first connection state and a second connection state, the first connection state being a state in which the first voltage pulse generator is electrically connected to the substrate bias electrode and the second voltage pulse generator is electrically connected to the annular bias electrode, and the second connection state being a state in which the first voltage pulse generator is electrically connected to the annular bias electrode and the second voltage pulse generator is electrically connected to the substrate bias electrode.

[0028] In an exemplary embodiment, the switch includes a rotatable component and a first wiring and a second wiring installed on the rotatable component, and is configured to switch between a first connection state and a second connection state by rotation of the rotatable component, the first connection state being a state in which the first voltage pulse generator is electrically connected to the substrate bias electrode via the first wiring and the second voltage pulse generator is electrically connected to the ring bias electrode via the second wiring, and the second connection state being a state in which the second voltage pulse generator is electrically connected to the ring bias electrode via the first wiring and the second voltage pulse generator is electrically connected to the substrate bias electrode via the second wiring.

[0029] In one exemplary embodiment, the switch is an electronic circuit.

[0030] In one exemplary embodiment, the first voltage level and the second voltage level have negative polarity.

[0031] In one exemplary embodiment, an absolute value of the first voltage level is higher than an absolute value of the second voltage level.

[0032] In one exemplary embodiment, the substrate bias electrode and the ring bias electrode are arranged at the same height.

[0033] In one exemplary embodiment, the substrate bias electrode and the ring bias electrode are arranged at different heights from each other.

[0034] In one exemplary embodiment, the annular bias electrode is disposed at a position lower than the substrate bias electrode.

[0035] In one exemplary embodiment, the substrate bias electrode has an outer edge region, and the ring-shaped bias electrode has an inner edge region longitudinally overlapping the outer edge region of the substrate bias electrode.

[0036] In one exemplary embodiment, the annular chuck electrode includes an inner annular chuck electrode to which a first annular chuck voltage having a first polarity is applied and an outer annular chuck electrode to which a second annular chuck voltage having a second polarity is applied.

[0037] In an exemplary embodiment, a plasma processing apparatus is provided, comprising: a plasma processing chamber; a substrate support portion disposed in the plasma processing chamber, the substrate support portion comprising: a base, an electrostatic chuck disposed on the base and having a substrate supporting surface and a ring supporting surface, and at least one annular component disposed on the ring supporting surface so as to surround a substrate disposed on the substrate supporting surface; a substrate chuck electrode disposed below the substrate supporting surface in the electrostatic chuck; at least one annular chuck electrode disposed below the ring supporting surface in the electrostatic chuck; a substrate bias electrode disposed in the electrostatic chuck and below the substrate chuck electrode; an annular bias electrode disposed in the electrostatic chuck and below the at least one annular chuck electrode; a first DC power supply configured to generate a first primary DC signal having a first primary voltage level; a second DC power supply configured to generate a second primary DC signal having a second primary voltage level; and a voltage superimposer configured to generate a first secondary DC signal having a first secondary voltage level and a second secondary DC signal from the first primary DC signal and the second primary DC signal. There is a second secondary DC signal with a second secondary voltage level, and is configured to be able to switch between a first generation state and a second generation state, the first generation state is a state in which the first secondary DC signal is generated in a manner that the first secondary voltage level has the same voltage level as the first primary voltage level and the second secondary DC signal is generated in a manner that the second secondary voltage level has a voltage level obtained by superimposing the first primary voltage level and the second primary voltage level, and the second generation state is a state in which the first secondary DC signal is generated in a manner that the first secondary voltage level has a voltage level obtained by superimposing the first primary voltage level and the second primary voltage level and the second secondary DC signal is generated in a manner that the second secondary voltage level has the same voltage level as the first primary voltage level; a first voltage pulse generator, electrically connected to the substrate bias electrode, configured to generate a first voltage pulse sequence with the first secondary voltage level from the first secondary DC signal; and a second voltage pulse generator, electrically connected to the annular bias electrode, configured to generate a second voltage pulse sequence with the second secondary voltage level from the second secondary DC signal.

[0038] In one exemplary embodiment, the first primary voltage level and the second primary voltage level have negative polarity.

[0039] In one exemplary embodiment, an absolute value of the first primary voltage level is higher than an absolute value of the second primary voltage level.

[0040] In one exemplary embodiment, the absolute value of the first primary voltage level is more than five times the absolute value of the second primary voltage level.

[0041] In one exemplary embodiment, the substrate bias electrode and the ring bias electrode are arranged at the same height.

[0042] In one exemplary embodiment, the substrate bias electrode and the ring bias electrode are arranged at different heights from each other.

[0043] In one exemplary embodiment, the annular bias electrode is disposed at a position lower than the substrate bias electrode.

[0044] In one exemplary embodiment, the substrate bias electrode has an outer edge region, and the ring-shaped bias electrode has an inner edge region longitudinally overlapping the outer edge region of the substrate bias electrode.

[0045] In one exemplary embodiment, the annular chuck electrode includes an inner annular chuck electrode to which a first annular chuck voltage having a first polarity is applied and an outer annular chuck electrode to which a second annular chuck voltage having a second polarity is applied.

[0046] Below, various embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. Identical or similar elements are denoted by the same reference numerals in the various drawings, and repeated descriptions are omitted. Unless otherwise specified, positional relationships, such as up, down, left, and right, are described based on the positional relationships shown in the drawings. The dimensional ratios in the drawings do not represent actual proportions, and actual proportions are not limited to those shown in the drawings.

[0047] <An Example of a Plasma Processing Apparatus>

[0048] Figure 1 1 is a diagram for illustrating an example of the configuration of a plasma processing system. In one embodiment, the plasma processing system includes a plasma processing device 1 and a controller 2. The plasma processing system is an example of a substrate processing system, and the plasma processing device 1 is an example of a substrate processing device. The plasma processing device 1 includes a plasma processing chamber 10, a substrate support portion 11, and a plasma generating portion 12. The plasma processing chamber 10 has a plasma processing space. In addition, the plasma processing chamber 10 has at least one gas supply port for supplying at least one processing gas to the plasma processing space and at least one gas exhaust port for exhausting gas from the plasma processing space. The gas supply port is connected to the gas supply portion 20 described later, and the gas exhaust port is connected to the exhaust system 40 described later. The substrate support portion 11 is arranged in the plasma processing space and has a substrate supporting surface for supporting a substrate.

[0049] The plasma generating section 12 is configured to generate plasma from at least one processing gas supplied into the plasma processing space. The plasma formed in the plasma processing space may be a capacitively coupled plasma (CCP: Capacitively Coupled Plasma), an inductively coupled plasma (ICP: Inductively Coupled Plasma), an ECR plasma (Electron-Cyclotron-Resonance Plasma), a helicon wave excited plasma (HWP: Helicon Wave Plasma) or a surface wave plasma (SWP: Surface Wave Plasma), etc. In addition, various types of plasma generating sections including an alternating current plasma generating section and a direct current plasma generating section may also be used. In one embodiment, the alternating current signal (AC power) used in the alternating current plasma generating section has a frequency in the range of 100kHz to 10GHz. Therefore, the alternating current signal includes a radio frequency (RF) signal and a microwave signal. In one embodiment, the RF signal has a frequency in the range of 100kHz to 150MHz.

[0050] The control unit 2 processes computer-executable instructions that cause the plasma processing apparatus 1 to perform the various processes described in the present disclosure. The control unit 2 can be configured to control the various elements of the plasma processing apparatus 1 to perform the various processes described herein. In one embodiment, a portion or all of the control unit 2 may be included in the plasma processing apparatus 1. The control unit 2 may include, for example, a computer 2a. The computer 2a may include, for example, a processing unit (CPU: Central Processing Unit) 2a1, a storage unit 2a2, and a communication interface 2a3. The processing unit 2a1 may be configured to perform various control operations by reading a program from the storage unit 2a2 and executing the read program. The program may be pre-stored in the storage unit 2a2 or may be obtained via a medium when necessary. The obtained program is stored in the storage unit 2a2 and read and executed from the storage unit 2a2 by the processing unit 2a1. The medium may be various storage media readable by the computer 2a or a communication circuit connected to the communication interface 2a3. The storage unit 2a2 may include RAM (Random Access Memory), ROM (Read Only Memory), HDD (Hard Disk Drive), SSD (Solid State Drive), or a combination thereof. The communication interface 2a3 may also communicate with the plasma processing apparatus 1 via a communication circuit such as a LAN (Local Area Network).

[0051] Hereinafter, a configuration example of a capacitively coupled plasma processing apparatus will be described as an example of the plasma processing apparatus 1 . Figure 2 This is a diagram for explaining a configuration example of a capacitively coupled plasma processing apparatus.

[0052] The capacitively coupled plasma processing apparatus 1 includes a plasma processing chamber 10, a gas supply unit 20, a power supply 30, and an exhaust system 40. In addition, the substrate processing apparatus 1 includes a substrate support unit 11 and a gas inlet unit. The gas inlet unit is configured to introduce at least one processing gas into the plasma processing chamber 10. The gas inlet unit includes a shower head 13. The substrate support unit 11 is disposed in the plasma processing chamber 10. The shower head 13 is disposed above the substrate support unit 11. In one embodiment, the shower head 13 constitutes at least a portion of the ceiling of the plasma processing chamber 10. The plasma processing chamber 10 has a plasma processing space 10s defined by the shower head 13, the sidewall 10a of the plasma processing chamber 10, and the substrate support unit 11. The plasma processing chamber 10 is grounded. The shower head 13 and the substrate support unit 11 are electrically insulated from the frame of the plasma processing chamber 10.

[0053] The substrate support portion 11 includes a main body 111 and a ring assembly (edge ​​ring assembly) 112. The main body 111 has a central area 111a for supporting a substrate W and an annular area 111b for supporting the ring assembly 112. A wafer is an example of a substrate W. The annular area 111b of the main body 111 surrounds the central area 111a of the main body 111 when viewed from above. The substrate W is arranged on the central area 111a of the main body 111, and the ring assembly 112 is arranged on the annular area 111b of the main body 111 in a manner that surrounds the substrate W on the central area 111a of the main body 111. Therefore, the central area 111a is also referred to as a substrate supporting surface for supporting the substrate W, and the annular area 111b is also referred to as a ring supporting surface for supporting the ring assembly 112.

[0054] In one embodiment, the main body 111 includes a base 1110 and an electrostatic chuck 1111. The base 1110 includes a conductive component. The conductive component of the base 1110 can function as a lower electrode. The electrostatic chuck 1111 is arranged on the base 1110. The electrostatic chuck 1111 includes a ceramic component 1111a and an electrostatic electrode 1111b arranged in the ceramic component 1111a. The ceramic component 1111a has a central area 111a. In one embodiment, the ceramic component 1111a also includes an annular area 111b. In addition, other components surrounding the electrostatic chuck 1111, such as an annular electrostatic chuck or an annular insulating component, may also have an annular area 111b. In this case, the ring assembly 112 can be arranged on the annular electrostatic chuck or the annular insulating component, and can be arranged on both the electrostatic chuck 1111 and the annular insulating component. In addition, an RF or DC electrode can also be arranged in the ceramic component 1111a. In this case, the RF or DC electrode functions as a lower electrode. When the bias RF signal or DC signal described later is connected to the RF or DC electrode, the RF or DC electrode is also referred to as a bias electrode. In addition, the conductive member of the base 1110 and the RF or DC electrode can also function as two lower electrodes.

[0055] The ring assembly 112 includes one or more ring components. In one embodiment, the one or more ring components include one or more edge rings and at least one cover ring. The edge ring is formed of a conductive material or an insulating material, and the cover ring is formed of an insulating material.

[0056] In addition, the substrate support portion 11 may also include a temperature control module, which is configured to adjust at least one of the electrostatic chuck 1111, the ring assembly 112 and the substrate to a target temperature. The temperature control module may include a heater, a heat transfer medium, a flow path 1110a or a combination thereof. A heat transfer fluid such as brine or gas flows through the flow path 1110a. In one embodiment, the flow path 1110a is formed in the base 1110, and one or more heaters are provided in the ceramic component 1111a of the electrostatic chuck 1111. In addition, the substrate support portion 11 may also include a heat transfer gas supply portion, which is configured to supply heat transfer gas between the back side of the substrate W and the central area 111a.

[0057] The showerhead 13 is configured to introduce at least one processing gas from the gas supply unit 20 into the plasma processing space 10s. The showerhead 13 includes at least one gas supply port 13a, at least one gas diffusion chamber 13b, and a plurality of gas inlet ports 13c. The processing gas supplied to the gas supply port 13a is introduced into the plasma processing space 10s from the plurality of gas inlet ports 13c through the gas diffusion chamber 13b. In addition, the showerhead 13 includes an upper electrode. In addition, the gas inlet portion may include, in addition to the showerhead 13, one or more side gas injection units (SGIs) installed in one or more openings formed in the side wall 10a.

[0058] The gas supply unit 20 may include at least one gas source 21 and at least one flow controller 22. In one embodiment, the gas supply unit 20 is configured to supply at least one process gas from each corresponding gas source 21 via each corresponding flow controller 22 to the showerhead 13. Each flow controller 22 may, for example, include a mass flow controller or a pressure-controlled flow controller. Furthermore, the gas supply unit 20 may include one or more flow modulation devices for modulating or pulsing the flow of the at least one process gas.

[0059] The power supply 30 includes an RF power supply 31, which is coupled to the plasma processing chamber 10 via at least one impedance matching circuit. The RF power supply 31 is configured to provide at least one RF signal (RF power), such as a source RF signal and a bias RF signal, to at least one lower electrode and / or at least one upper electrode. This generates a plasma from at least one process gas supplied to the plasma processing space 10s. Therefore, the RF power supply 31 can function as at least a portion of the plasma generating unit 12. Furthermore, by supplying the bias RF signal to the at least one lower electrode, a bias potential is generated on the substrate W, enabling the introduction of ion components in the generated plasma into the substrate W.

[0060] In one embodiment, the RF power supply 31 includes a first RF generating unit 31a and a second RF generating unit 31b. The first RF generating unit 31a is configured to couple with at least one lower electrode and / or at least one upper electrode via at least one impedance matching circuit to generate a source RF signal (source RF power) for plasma generation. In one embodiment, the source RF signal has a frequency in the range of 10 MHz to 150 MHz. In one embodiment, the first RF generating unit 31a can also be configured to generate a plurality of source RF signals with different frequencies. The generated one or more source RF signals are supplied to at least one lower electrode and / or at least one upper electrode.

[0061] The second RF generating unit 31b is configured to couple with at least one lower electrode via at least one impedance matching circuit to generate a bias RF signal (bias RF power). The frequency of the bias RF signal may be the same as or different from the frequency of the source RF signal. In one embodiment, the bias RF signal has a frequency lower than the frequency of the source RF signal. In one embodiment, the bias RF signal has a frequency in the range of 100kHz to 60MHz. In one embodiment, the second RF generating unit 31b may also be configured to generate a plurality of bias RF signals with different frequencies. The generated one or more bias RF signals are supplied to at least one lower electrode. In addition, in various embodiments, at least one of the source RF signal and the bias RF signal may be pulsed.

[0062] The power supply 30 may also include a DC power supply 32 coupled to the plasma processing chamber 10. The DC power supply 32 includes a first DC generator 32a and a second DC generator 32b. In one embodiment, the first DC generator 32a is connected to at least one lower electrode and generates a first DC signal. The generated first DC signal is applied to the at least one lower electrode. In one embodiment, the second DC generator 32b is connected to at least one upper electrode and generates a second DC signal. The generated second DC signal is applied to the at least one upper electrode.

[0063] In various embodiments, the first and second DC signals can be pulsed. In this case, a DC-based voltage pulse sequence is applied to at least one lower electrode and / or at least one upper electrode. The voltage pulses can have a rectangular, trapezoidal, triangular, or a combination thereof pulse waveform. In one embodiment, a waveform generator for generating a voltage pulse sequence from a DC signal is connected between the first DC generator 32a and the at least one lower electrode. Thus, the first DC generator 32a and the waveform generator constitute a voltage pulse generator. In the case where the second DC generator 32b and the waveform generator constitute a voltage pulse generator, the voltage pulse generator is connected to the at least one upper electrode. The voltage pulses can have a positive polarity or a negative polarity. In addition, the voltage pulse sequence can include one or more positive polarity voltage pulses and one or more negative polarity voltage pulses within a cycle. In addition, the first and second DC generators 32a and 32b can be provided in addition to the RF power supply 31, and the first DC generator 32a can also be provided in place of the second RF generator 31b.

[0064] The exhaust system 40 can be connected to the gas exhaust port 10e provided at the bottom of the plasma processing chamber 10, for example. The exhaust system 40 can include a pressure regulating valve and a vacuum pump. The pressure in the plasma processing space 10s is regulated by the pressure regulating valve. The vacuum pump can include a turbomolecular pump, a dry pump, or a combination thereof.

[0065] <First Exemplary Embodiment>

[0066] A first exemplary embodiment of the above-described plasma processing apparatus 1 will be described. Figure 3 This figure illustrates an example configuration of the substrate support unit 11 and the DC power supply 32 in the first exemplary embodiment. In one embodiment, the substrate support unit 11 includes a substrate chuck electrode 200, an annular chuck electrode 201, a substrate bias electrode 202, and an annular bias electrode 203 within an electrostatic chuck 1111. The substrate chuck electrode 200 and the annular chuck electrode 201 may be examples of the electrostatic electrode 1111b described above.

[0067] In one embodiment, the DC power supply 32 includes a first DC power supply 250 , a second DC power supply 251 , a first voltage pulse generator 260 , a second voltage pulse generator 261 , an impedance matcher 270 , and a switch 280 .

[0068] The substrate chuck electrode 200 can be disposed below the substrate support surface within the electrostatic chuck 1111. In one embodiment, the substrate chuck electrode 200 has a circular shape. In one embodiment, the substrate chuck electrode 200 is connected to a direct current (DC) power supply 301 via a switch 300. When a DC voltage from the DC power supply 301 is applied to the substrate chuck electrode 200, an electrostatic attraction (Coulomb force) is generated between the substrate chuck electrode 200 and the substrate W. The substrate W is attracted to the electrostatic chuck 1111 by this electrostatic attraction and is held by the substrate support surface.

[0069] In one embodiment, the annular chuck electrode 201 may be disposed within the electrostatic chuck 1111 below the ring support surface. In one embodiment, the annular chuck electrode 201 includes an inner annular chuck electrode 400 and an outer annular chuck electrode 401. In one embodiment, the inner annular chuck electrode 400 is connected to a DC power supply 411 via a switch 410. In one embodiment, the outer annular chuck electrode 401 is disposed outside the inner annular chuck electrode 400. In one embodiment, the outer annular chuck electrode 401 is connected to a DC power supply 421 via a switch 420. In one embodiment, the annular chuck electrode 201 generates a potential difference between the inner annular chuck electrode 400 and the outer annular chuck electrode 401, which serves to maintain the ring assembly 112 on the ring support surface. In one embodiment, the polarity of the first annular chuck voltage applied to the inner annular chuck electrode 400 is different from the polarity of the second annular chuck voltage applied to the outer annular chuck electrode 401.

[0070] In one embodiment, in the electrostatic chuck 1111, the substrate bias electrode 202 may be disposed below the substrate support surface, vertically overlapping the substrate support surface. Within the electrostatic chuck 1111, the ring bias electrode 203 may be disposed below the ring support surface, vertically overlapping the ring support surface. The substrate bias electrode 202 and the ring bias electrode 203 may be disposed at the same height.

[0071] like Figure 4 As shown, the substrate bias electrode 202 may have a circular shape. The annular bias electrode 203 may have a circular ring shape with a width in the radial direction. In one embodiment, the annular bias electrode 203 has a diameter greater than that of the substrate bias electrode 202 and is disposed outside the substrate bias electrode 202.

[0072] like Figure 3 As shown, the first DC power supply 250 can generate a first DC signal DC1 having a first primary voltage level V1. The first primary voltage level V1 can have a negative polarity. The first DC power supply 250 is electrically connected to the first voltage pulse generator 260. The generated first DC signal DC1 can be supplied to the first voltage pulse generator 260.

[0073] The second DC power supply 251 may generate a second DC signal DC2 having a second primary voltage level V2. The second primary voltage level V2 may have a negative polarity. The second DC power supply 251 is electrically connected to a second voltage pulse generator 261. The generated second DC signal DC2 may be supplied to the second voltage pulse generator 261. The absolute value of the first primary voltage level V1 may be higher than the absolute value of the second primary voltage level V2, and the absolute value of the first primary voltage level V1 may be at least five times the absolute value of the second primary voltage level V2.

[0074] The first voltage pulse generator 260 can generate a first voltage pulse signal DC3 having a first voltage level V1 from a first DC signal DC1 supplied from the first DC power supply 250. The first voltage level can have the same voltage level (V1) as the first primary voltage level. The first voltage pulse signal DC3 can include a first voltage pulse sequence. The first voltage pulse generator 260 is electrically connected to the switch 280 via the impedance matcher 270. The generated first voltage pulse signal DC3 can be supplied to the switch 280. The first voltage pulse generator 260 is electrically connected to the second voltage pulse generator 261 and can supply the first DC signal DC1 supplied from the first DC power supply 250 to the second voltage pulse generator 261.

[0075] The second voltage pulse generator 261 can generate a second voltage pulse signal DC4 having a second voltage level V3 (V1+V2) that is a superposition of the first primary voltage level V1 and the second primary voltage level V2 from the second DC signal DC2 supplied from the second DC power supply 251 and the first DC signal DC1 supplied from the first DC power supply 250 (first voltage pulse generator 260). The absolute value of the second voltage level V3 can be higher than the absolute value of the first voltage level V1. The second voltage pulse signal DC4 may include a second voltage pulse sequence. The second voltage pulse generator 261 is electrically connected to the switch 280 via the impedance matcher 270. The generated second voltage pulse signal DC4 may be supplied to the switch 280. In addition, if the second voltage level is greater than the first voltage level, it may be the same voltage level (V2) as the second primary voltage level.

[0076] Figure 5 An example of the first voltage pulse signal DC3 and the second voltage pulse signal DC4 is shown. The first voltage pulse signal DC3 may have a voltage pulse sequence PS1 during a first state S1 within a repetition period T, wherein the voltage pulse sequence PS1 has a first voltage level V1, and continuously has a reference voltage level V during a second state S2 within the repetition period T. ref That is, during the second state S2, the first voltage pulse signal DC3 can be maintained at the reference voltage level V ref . Reference voltage level V ref The absolute value of is less than the absolute value of the first voltage level V1. In one embodiment, the first voltage level V1 has a negative polarity. In one embodiment, the reference voltage level V ref Has a zero voltage level.

[0077] The second voltage pulse signal DC4 may have a voltage pulse sequence PS2 during the first state S1 within the repetition period T, the voltage pulse sequence PS2 having the second voltage level V3, and may continuously have the reference voltage level V during the second state S2 within the repetition period T. ref That is, during the second state S2, the second voltage pulse signal DC4 can be maintained at the reference voltage level V ref . Reference voltage level V ref The absolute value of the second voltage level V3 is less than the absolute value of the second voltage level V3. In one embodiment, the second voltage level V3 has a negative polarity, and the reference voltage level V ref Has a zero voltage level.

[0078] In one embodiment, Figure 3The illustrated switch 280 is configured to switch an electrical connection state. In one embodiment, the switch 280 can be switched between a first connection state in which the first voltage pulse generator 260 is electrically connected to the substrate bias electrode 202 and the second voltage pulse generator 261 is electrically connected to the annular bias electrode 203, and a second connection state in which the first voltage pulse generator 260 is electrically connected to the annular bias electrode 203 and the second voltage pulse generator 261 is electrically connected to the substrate bias electrode 202.

[0079] Figure 6 is a diagram illustrating an example configuration of switch 280. Switch 280 can mechanically switch between a first connection state and a second connection state. In one embodiment, switch 280 may include a rotatable member 500 and first and second wirings 510 and 511 mounted on rotatable member 500. Rotating rotatable member 500 180 degrees can change the position of terminal 510a of first wiring 510 and terminal 511a of second wiring 511.

[0080] The rotatable member 500 can switch to the first connection state ( Figure 6 (a) state) and the second connection state ( Figure 6 In the first connection state (a), the terminal 510a of the first wiring 510 is connected to the wiring terminal 520 connected to the substrate bias electrode 202, the first voltage pulse generator 260 and the substrate bias electrode 202 are electrically connected, the terminal 511a of the second wiring 511 is connected to the wiring terminal 521 connected to the annular bias electrode 203, and the second voltage pulse generator 261 and the annular bias electrode 203 are electrically connected. In the second connection state (b), the terminal 510a of the first wiring 510 is connected to the wiring terminal 521 of the annular bias electrode 203, the first voltage pulse generator 260 and the annular bias electrode 203 are electrically connected, the terminal 511a of the second wiring 511 is connected to the wiring terminal 520 of the substrate bias electrode 202, and the second voltage pulse generator 261 and the substrate bias electrode 202 are electrically connected.

[0081] In one embodiment, in the first connection state (a), Figure 3In the illustrated embodiment, a first voltage pulse having a first voltage level V1 generated by a first voltage pulse generator 260 is applied to the substrate bias electrode 202, and a second voltage pulse having a second voltage level V3 generated by a second voltage pulse generator 261 is applied to the ring-shaped bias electrode 203. In the second connection state (b), a second voltage pulse having a second voltage level V3 generated by the second voltage pulse generator 261 is applied to the substrate bias electrode 202, and a first voltage pulse having a first voltage level V1 generated by the first voltage pulse generator 260 is applied to the ring-shaped bias electrode 203.

[0082] <An Example of Plasma Treatment Method>

[0083] The plasma processing method includes an etching process for etching a film on a substrate W using plasma. In one embodiment, the plasma processing method is executed by a control unit 2 in a plasma processing apparatus 1 .

[0084] First, the substrate W is carried into the chamber 10 by the transfer arm and is placed on the substrate support 11 by the elevator. Figure 2 As shown, the substrate is held by suction on the substrate support portion 11 .

[0085] Next, the processing gas is supplied to the shower head 13 by the gas supply unit 20 and then supplied to the plasma processing space 10s from the shower head 13. The processing gas supplied at this time includes a gas for generating active species required for etching the substrate W.

[0086] One or more RF signals are supplied to the upper electrode and / or the lower electrode from the RF power supply 31. Ambient gas within the plasma processing space 10s may be exhausted from the gas outlet 10e to reduce the pressure within the plasma processing space 10s. This generates plasma on the substrate support 11 within the plasma processing space 10s, thereby etching the substrate W.

[0087] When the plasma is generated, Figure 3 The first and second voltage pulse generators 260 and 261 supply voltage pulse signals to the substrate bias electrode 202 and the ring bias electrode 203, respectively, applying voltage pulses. This generates bias signals based on the voltage pulses on the substrate W and the ring assembly 112, and ions in the plasma on the substrate W are drawn toward the substrate W.

[0088] In one embodiment, Figure 7As shown, when the plasma sheath PS generated above the substrate W and the ring assembly 112 is lower above the ring assembly 112 than above the substrate W, the voltage level of the voltage pulse applied to the ring bias electrode 203 is set higher than the voltage level of the voltage pulse applied to the substrate bias electrode 202. Specifically, by switching the switch 280 to the first connection state (a), the first voltage pulse generator 260 supplies a first voltage pulse signal DC3 having a first voltage level V1 to the substrate bias electrode 202, while the second voltage pulse generator 261 supplies a second voltage pulse signal DC4 having a second voltage level V3 higher than the first voltage level V1 to the ring bias electrode 203. As a result, the plasma sheath PS is nearly parallel (horizontal) to the substrate W, and within the plane of the substrate W, the angle at which the plasma ions enter the substrate W (the ion incidence angle) is nearly perpendicular to the substrate W.

[0089] In one embodiment, Figure 8 As shown, when the plasma sheath PS is higher above the ring assembly 112 than above the substrate W, the voltage level of the voltage pulse applied to the substrate bias electrode 202 is set higher than the voltage level of the voltage pulse applied to the ring bias electrode 203. Specifically, by switching the switch 280 to the second connection state (b), the first voltage pulse generator 260 supplies a first voltage pulse signal DC3 having a first voltage level V1 to the ring bias electrode 203, while the second voltage pulse generator 261 supplies a second voltage pulse signal DC4 having a second voltage level V3 higher than the first voltage level V1 to the substrate bias electrode 202. As a result, the plasma sheath PS becomes nearly parallel (horizontal) to the substrate W, and within the plane of the substrate W, the angle at which the plasma ions enter the substrate W (the ion incidence angle) is nearly perpendicular to the substrate W.

[0090] According to this exemplary embodiment, the plasma processing apparatus 1 includes a substrate support 11, a substrate bias electrode 202, an annular bias electrode 203, a first voltage pulse generator 260, a second voltage pulse generator 261, and a switch 280. Thus, the in-plane ion incident angle of the substrate W can be controlled during plasma processing. As a result, the in-plane uniformity of the substrate during plasma processing can be improved.

[0091] According to this exemplary embodiment, Figure 9As shown, the thickness of the ring assembly 112 can be increased at the time of shipment (initial stage). In this case, since the upper surface 112a of the ring assembly 112 is positioned higher, the plasma sheath PS is higher above the ring assembly 112. Therefore, by switching the switch 280 to the second connection state (b), the voltage level of the voltage pulse applied to the substrate bias electrode 202 is set higher than the voltage level of the voltage pulse applied to the ring bias electrode 203. As a result, the plasma sheath PS is nearly parallel (horizontal) to the substrate W, and within the plane of the substrate W, the angle at which the plasma ions enter the substrate W (the ion incident angle) is nearly perpendicular to the substrate W.

[0092] In addition, if Figure 10 As shown, when the ring assembly 112 is consumed by plasma processing and its thickness decreases, the position of the upper surface 112a of the ring assembly 112 drops, and the plasma sheath PS becomes lower above the ring assembly 112. In this case, by switching the switch 280 to the first connection state (a), the voltage level of the voltage pulse applied to the ring bias electrode 203 is set higher than the voltage level of the voltage pulse applied to the substrate bias electrode 202. As a result, the plasma sheath PS is approximately parallel (horizontal) with respect to the substrate W, and the angle at which the plasma ions enter the substrate W (the ion incident angle) within the plane of the substrate W is approximately perpendicular to the substrate W. By increasing the initial thickness of the ring assembly 112 and controlling the plasma sheath PS based on subsequent consumption of the ring assembly 112, the service life (lifespan) of the ring assembly 112 can be extended and the number of replacements of the ring assembly 112 can be reduced.

[0093] In the above embodiment, if Figure 11 As shown, the substrate bias electrode 202 and the annular bias electrode 203 of the substrate support portion 11 can be arranged at different heights. In one embodiment, the annular bias electrode 203 can be arranged at a position lower than the substrate bias electrode 202. In addition, in one embodiment, as shown in FIG. Figure 12 As shown, the outer edge region 202a of the substrate bias electrode 202 may longitudinally overlap with the inner edge region 203a of the annular bias electrode 203. The radial width D1 of the overlapping portion of the substrate bias electrode 202 and the annular bias electrode 203 may be 9 mm to 11 mm.

[0094] In addition, the annular bias electrode 203 may be arranged at a position higher than the substrate bias electrode 202 .

[0095] In the above embodiment, the switch 280 mechanically switches between the first connection state and the second connection state, but may also be an electronic circuit that electrically switches.

[0096] <Second Exemplary Embodiment>

[0097] Next, a second exemplary embodiment of the plasma processing apparatus 1 will be described. Figure 13 and Figure 14 3 is a diagram for explaining a configuration example of the substrate support portion 11 and the DC power supply 32 in the second exemplary embodiment. In one embodiment, the substrate support portion 11 may be the same as that in the first exemplary embodiment described above.

[0098] In one embodiment, the DC power supply 32 includes a first DC power supply 600 , a second DC power supply 601 , a voltage superimposer 610 , a first voltage pulse generator 620 , a second voltage pulse generator 621 , and an impedance matcher 630 .

[0099] The first DC power supply 600 may generate a first primary DC signal DC1 having a first primary voltage level V1. The first primary voltage level V1 may have a negative polarity. The first DC power supply 600 is electrically connected to the voltage superimposed device 610. The generated first primary DC signal DC1 may be supplied to the voltage superimposed device 610.

[0100] The second DC power supply 601 can generate a second primary DC signal DC2 having a second primary voltage level V2. The second primary voltage level V2 can have a negative polarity. The second DC power supply 601 is electrically connected to a voltage superimposer 610. The generated second primary DC signal DC2 can be supplied to the voltage superimposer 610. The absolute value of the first primary voltage level V1 can be higher than the absolute value of the second primary voltage level V2, and the absolute value of the first primary voltage level V1 can be at least five times the absolute value of the second primary voltage level V2.

[0101] The voltage superimposer 610 may generate a first secondary DC signal DC3 having a first secondary voltage level and a second secondary DC signal DC4 having a second secondary voltage level using the first primary DC signal DC1 and the second primary DC signal DC2 .

[0102] In one embodiment, the voltage superimposer 610 is configured to switch between a first generating state and a second generating state. Figure 13 As shown, a first secondary DC signal DC3 having a first secondary voltage level V1 which is the same voltage level as the first primary voltage level V1 is generated, and a second secondary DC signal DC4 having a second secondary voltage level V3 (V1+V2) is generated. The second secondary voltage level V3 is a voltage level obtained by superimposing the first primary voltage level V1 and the second secondary voltage level V2. In the second generation state, as shown Figure 14As shown, a first secondary DC signal DC3 having a first secondary voltage level V3 (V1+V2) is generated, wherein the first secondary voltage level V3 is a voltage level obtained by superimposing the first primary voltage level V1 and the second primary voltage level V2, and a second secondary DC signal DC4 having a second secondary voltage level V1 which is the same voltage level as the first primary voltage level V1 is generated.

[0103] The voltage superimposer 610 is electrically connected to the first voltage pulse generator 620 and the second voltage pulse generator 621. The first secondary DC signal DC3 generated by the voltage superimposer 610 may be supplied to the first voltage pulse generator 620, and the second secondary DC signal DC4 may be supplied to the second voltage pulse generator 621.

[0104] The first voltage pulse generator 620 may generate a first voltage pulse signal DC5 having a first secondary voltage level (V1 or V3) from the first secondary DC signal DC3 supplied from the voltage superimposer 610. The first voltage pulse signal DC5 may include a first voltage pulse sequence. In one embodiment, the first voltage pulse sequence has the same Figure 5 The first voltage pulse generator 620 is electrically connected to the substrate bias electrode 202. The generated first voltage pulse signal DC5 can be supplied to the substrate bias electrode 202. By supplying the first voltage pulse signal DC5 to the substrate bias electrode 202, a bias pulse signal based on a DC voltage can be generated, thereby directing ion components in the plasma generated on the substrate W on the substrate support portion 11 toward the substrate bias electrode 202.

[0105] The second voltage pulse generator 621 may generate a second voltage pulse signal DC6 having a second secondary voltage level (V1 or V3) from the second secondary DC signal DC4 supplied from the voltage superimposer 610. The second voltage pulse signal DC6 may include a second voltage pulse sequence. In one embodiment, the second voltage pulse sequence has the same Figure 5 The second voltage pulse generator 621 is electrically connected to the annular bias electrode 203. The generated second voltage pulse signal DC6 can be supplied to the annular bias electrode 203. By supplying the second voltage pulse signal DC6 to the annular bias electrode 203, a bias pulse signal based on a DC voltage can be generated, thereby directing ion components in the plasma generated on the substrate W on the substrate support portion 11 toward the annular bias electrode 203.

[0106] When the plasma is generated, Figure 7As shown in FIG. 1 , when the plasma sheath PS generated above the substrate W and the ring assembly 112 is lower above the ring assembly 112 than above the substrate W, the voltage level of the voltage pulse applied to the ring bias electrode 203 is made higher than the voltage level of the voltage pulse applied to the substrate bias electrode 202. That is, as Figure 13 As shown, the voltage superimposer 610 switches to the first generation state, generating a first secondary DC signal DC3 having a first secondary voltage level V1 and a second secondary DC signal DC4 having a second secondary voltage level V3. Then, the first voltage pulse generator 260 supplies a first voltage pulse signal DC5 having a first secondary voltage level V1 to the substrate bias electrode 202, and the second voltage pulse generator 261 supplies a voltage pulse signal DC6 having a second secondary voltage level V3 higher than the first secondary voltage level V1 to the annular bias electrode 203. As a result, as shown in FIG. Figure 7 As shown, the plasma sheath PS is nearly parallel (horizontal) to the substrate W, and within the surface of the substrate W, the angle at which the ion components of the plasma enter the substrate W (ion incident angle) is nearly vertical to the substrate W.

[0107] In one embodiment, Figure 8 As shown in FIG, when the plasma sheath PS is higher above the ring assembly 112 than above the substrate W, the voltage level of the voltage pulse applied to the substrate bias electrode 202 is made higher than the voltage level of the voltage pulse applied to the ring bias electrode 203. Figure 14 As shown, the voltage superimposer 610 switches to the second generation state, generating a first secondary DC signal DC3 having a first secondary voltage level V3 and a second secondary DC signal DC4 having a second secondary voltage level V1. Then, the first voltage pulse generator 260 supplies a first voltage pulse signal DC5 having a first secondary voltage level V3 higher than the second secondary voltage level V1 to the substrate bias electrode 202, and the second voltage pulse generator 261 supplies a voltage pulse signal DC6 having the second secondary voltage level V1 to the annular bias electrode 203. As a result, the plasma sheath PS becomes nearly parallel (horizontal) relative to the substrate W, and within the plane of the substrate W, the angle at which the ion components of the plasma enter the substrate W (the ion incidence angle) is nearly perpendicular to the substrate W.

[0108] In the second embodiment, as in the first embodiment, the substrate bias electrode 202 and the annular bias electrode 203 of the substrate support portion 11 can be arranged at different heights. The annular bias electrode 203 can be arranged at a lower position than the substrate bias electrode 202. The outer edge region 202a of the substrate bias electrode 202 can overlap with the inner edge region 203a of the annular bias electrode 203 in the longitudinal direction. The annular bias electrode 203 can be arranged at a higher position than the substrate bias electrode 202.

[0109] In the first and second embodiments above, Figure 3 The annular chuck electrode 201 shown has two electrodes 400 and 401 with different polarities, but may also have a single electrode with a single polarity. The substrate bias electrode 202 and the annular bias electrode 203 may each be composed of a plurality of electrodes.

[0110] In the above embodiment, a capacitively coupled plasma apparatus is used as an example, but the present invention is not limited thereto and can be applied to other plasma apparatuses. For example, an inductively coupled plasma apparatus can be used instead of a capacitively coupled plasma apparatus.

[0111] The embodiments of the present disclosure also include the following aspects.

[0112] (Note 1)

[0113] A plasma processing device, comprising:

[0114] plasma processing chamber;

[0115] a substrate supporting portion disposed in the plasma processing chamber, the substrate supporting portion comprising: a base, an electrostatic chuck disposed on the base and having a substrate supporting surface and a ring supporting surface, and at least one annular component disposed on the ring supporting surface so as to surround the substrate disposed on the substrate supporting surface;

[0116] a substrate chuck electrode, disposed below the substrate supporting surface within the electrostatic chuck;

[0117] at least one annular chuck electrode disposed within the electrostatic chuck below the annular support surface;

[0118] a substrate bias electrode disposed within the electrostatic chuck and below the substrate chuck electrode;

[0119] an annular bias electrode disposed within the electrostatic chuck and below the at least one annular chuck electrode;

[0120] a first voltage pulse generator configured to generate a first voltage pulse sequence having a first voltage level;

[0121] a second voltage pulse generator configured to generate a second voltage pulse train having a second voltage level; and

[0122] The switch is configured to switch between a first connection state and a second connection state, wherein the first connection state is a state in which the first voltage pulse generator is electrically connected to the substrate bias electrode and the second voltage pulse generator is electrically connected to the annular bias electrode, and the second connection state is a state in which the first voltage pulse generator is electrically connected to the annular bias electrode and the second voltage pulse generator is electrically connected to the substrate bias electrode.

[0123] (Note 2)

[0124] The plasma processing apparatus according to Supplementary Note 1, wherein the switch comprises:

[0125] rotatable elements; and

[0126] A first wiring and a second wiring mounted on the rotatable member,

[0127] The switch is configured to switch between the first connection state and the second connection state by the rotation of the rotatable member.

[0128] The first connection state is a state in which the first voltage pulse generator is electrically connected to the substrate bias electrode via the first wiring and the second voltage pulse generator is electrically connected to the ring bias electrode via the second wiring.

[0129] The second connection state is a state in which the first voltage pulse generator is electrically connected to the ring-shaped bias electrode via the first wiring, and the second voltage pulse generator is electrically connected to the substrate bias electrode via the second wiring.

[0130] (Note 3)

[0131] The plasma processing apparatus according to Supplementary Note 1, wherein the switch is an electronic circuit.

[0132] (Note 4)

[0133] The plasma processing apparatus according to any one of Supplementary Notes 1 to 3, wherein the first voltage level and the second voltage level have negative polarity.

[0134] (Note 5)

[0135] The plasma processing apparatus according to any one of Supplementary Notes 1 to 4, wherein an absolute value of the first voltage level is higher than an absolute value of the second voltage level.

[0136] (Note 6)

[0137] The plasma processing apparatus according to any one of Supplementary Notes 1 to 5, wherein the substrate bias electrode and the ring bias electrode are arranged at the same height.

[0138] (Note 7)

[0139] The plasma processing apparatus according to any one of Supplementary Notes 1 to 5, wherein the substrate bias electrode and the ring bias electrode are arranged at different heights.

[0140] (Note 8)

[0141] The plasma processing apparatus according to Supplementary Note 7, wherein the annular bias electrode is arranged at a position lower than the substrate bias electrode.

[0142] (Note 9)

[0143] The plasma processing apparatus according to Supplementary Note 8, wherein the substrate bias electrode has an outer edge region,

[0144] The annular bias electrode has an inner edge region that overlaps with the outer edge region of the substrate bias electrode in a longitudinal direction.

[0145] (Note 10)

[0146] The plasma processing apparatus according to any one of Supplementary Notes 1 to 9, wherein the annular chuck electrode comprises:

[0147] an inner annular chuck electrode to which a first annular chuck voltage having a first polarity is applied; and

[0148] The outer annular chuck electrode is applied with a second annular chuck voltage having a second polarity.

[0149] (Note 11)

[0150] A plasma processing device, comprising:

[0151] plasma processing chamber;

[0152] a substrate supporting portion disposed in the plasma processing chamber, the substrate supporting portion comprising: a base, an electrostatic chuck disposed on the base and having a substrate supporting surface and a ring supporting surface, and at least one annular component disposed on the ring supporting surface so as to surround the substrate disposed on the substrate supporting surface;

[0153] a substrate chuck electrode, disposed below the substrate supporting surface within the electrostatic chuck;

[0154] at least one annular chuck electrode disposed within the electrostatic chuck below the annular support surface;

[0155] a substrate bias electrode disposed within the electrostatic chuck and below the substrate chuck electrode;

[0156] an annular bias electrode disposed within the electrostatic chuck and below the at least one annular chuck electrode;

[0157] a first DC power supply configured to generate a first primary DC signal having a first primary voltage level;

[0158] a second DC power supply configured to generate a second primary DC signal having a second primary voltage level;

[0159] a voltage superimposer configured to generate a first secondary DC signal having a first secondary voltage level and a second secondary DC signal having a second secondary voltage level from the first primary DC signal and the second primary DC signal, and configured to be capable of switching between a first generation state and a second generation state;

[0160] The first generation state is a state in which the first secondary DC signal is generated in a manner that the first secondary voltage level has the same voltage level as the first primary voltage level, and the second secondary DC signal is generated in a manner that the second secondary voltage level has a voltage level obtained by superimposing the first primary voltage level and the second primary voltage level.

[0161] The second generation state is a state in which the first secondary DC signal is generated in such a manner that the first secondary voltage level has a voltage level obtained by superimposing the first primary voltage level and the second primary voltage level, and the second secondary DC signal is generated in such a manner that the second secondary voltage level has a voltage level identical to the first primary voltage level;

[0162] a first voltage pulse generator electrically connected to the substrate bias electrode, configured to generate a first voltage pulse sequence having the first secondary voltage level from the first secondary DC signal; and

[0163] The second voltage pulse generator is electrically connected to the annular bias electrode and is configured to generate a second voltage pulse sequence having the second secondary voltage level according to the second secondary DC signal.

[0164] (Note 12)

[0165] The plasma processing apparatus according to Supplementary Note 11, wherein the first preliminary voltage level and the second preliminary voltage level have negative polarity.

[0166] (Note 13)

[0167] The plasma processing apparatus according to Supplementary Note 11 or 12, wherein an absolute value of the first primary voltage level is higher than an absolute value of the second primary voltage level.

[0168] (Note 14)

[0169] The plasma processing apparatus according to Supplementary Note 13, wherein an absolute value of the first primary voltage level is five times or more the absolute value of the second primary voltage level.

[0170] (Note 15)

[0171] The plasma processing apparatus according to any one of Supplementary Notes 11 to 14, wherein the substrate bias electrode and the ring bias electrode are arranged at the same height.

[0172] (Note 16)

[0173] The plasma processing apparatus according to any one of Supplementary Notes 11 to 14, wherein the substrate bias electrode and the ring bias electrode are arranged at different heights.

[0174] (Note 17)

[0175] The plasma processing apparatus according to Supplementary Note 16, wherein the annular bias electrode is arranged at a position lower than the substrate bias electrode.

[0176] (Note 18)

[0177] The plasma processing apparatus according to Supplementary Note 17, wherein the substrate bias electrode has an outer edge region,

[0178] The annular bias electrode has an inner edge region that overlaps with the outer edge region of the substrate bias electrode in a longitudinal direction.

[0179] (Note 19)

[0180] The plasma processing apparatus according to any one of Supplementary Notes 11 to 18, wherein the annular chuck electrode comprises:

[0181] an inner annular chuck electrode to which a first annular chuck voltage having a first polarity is applied; and

[0182] The outer annular chuck electrode is applied with a second annular chuck voltage having a second polarity.

[0183] The above embodiments are described for the purpose of illustration and are not intended to limit the scope of the present disclosure. Various modifications may be made to the embodiments without departing from the scope and spirit of the present disclosure. For example, some of the components in a certain embodiment may be added to other embodiments. In addition, some of the components in a certain embodiment may be replaced with corresponding components in other embodiments.

Claims

1. A plasma processing apparatus, comprising: plasma processing chamber; A substrate support portion is disposed in the plasma processing chamber, the substrate support portion comprising: a base; an electrostatic chuck disposed on the base and having a substrate supporting surface and a ring supporting surface; and at least one annular component disposed on the ring supporting surface in a manner of surrounding the substrate disposed on the substrate supporting surface; a substrate chuck electrode, disposed below the substrate supporting surface within the electrostatic chuck; at least one annular chuck electrode disposed within the electrostatic chuck below the annular support surface; a substrate bias electrode disposed within the electrostatic chuck and below the substrate chuck electrode; an annular bias electrode disposed within the electrostatic chuck and below the at least one annular chuck electrode; a first voltage pulse generator configured to generate a first voltage pulse sequence having a first voltage level; a second voltage pulse generator configured to generate a second voltage pulse train having a second voltage level; and The switch is configured to switch between a first connection state and a second connection state, wherein the first connection state is a state in which the first voltage pulse generator is electrically connected to the substrate bias electrode and the second voltage pulse generator is electrically connected to the annular bias electrode, and the second connection state is a state in which the first voltage pulse generator is electrically connected to the annular bias electrode and the second voltage pulse generator is electrically connected to the substrate bias electrode.

2. The plasma processing apparatus according to claim 1, wherein The switch comprises: rotatable elements; and A first wiring and a second wiring mounted on the rotatable member, The switch is configured to switch between the first connection state and the second connection state by rotating the rotatable member. The first connection state is a state in which the first voltage pulse generator is electrically connected to the substrate bias electrode via the first wiring and the second voltage pulse generator is electrically connected to the ring bias electrode via the second wiring. The second connection state is a state in which the first voltage pulse generator is electrically connected to the ring-shaped bias electrode via the first wiring, and the second voltage pulse generator is electrically connected to the substrate bias electrode via the second wiring.

3. The plasma processing apparatus according to claim 1, wherein: The switch is an electronic circuit.

4. The plasma processing apparatus according to claim 1, wherein The first voltage level and the second voltage level have negative polarity.

5. The plasma processing apparatus according to claim 4, wherein: An absolute value of the first voltage level is higher than an absolute value of the second voltage level. The plasma processing apparatus according to claim 1 , wherein: The substrate bias electrode and the ring bias electrode are arranged at the same height.

7. The plasma processing apparatus according to claim 1, wherein: The substrate bias electrode and the ring bias electrode are arranged at different heights from each other.

8. The plasma processing apparatus according to claim 7, wherein: The annular bias electrode is arranged at a position lower than the substrate bias electrode.

9. The plasma processing apparatus according to claim 8, wherein: The substrate bias electrode has an outer edge region, The annular bias electrode has an inner edge region that overlaps with the outer edge region of the substrate bias electrode in a longitudinal direction.

10. The plasma processing apparatus according to claim 1, wherein The annular suction cup electrode comprises: an inner annular chuck electrode to which a first annular chuck voltage having a first polarity is applied; and The outer annular chuck electrode is applied with a second annular chuck voltage having a second polarity.

11. A plasma processing apparatus comprising: plasma processing chamber; A substrate support portion is disposed in the plasma processing chamber, the substrate support portion comprising: a base; an electrostatic chuck disposed on the base and having a substrate supporting surface and a ring supporting surface; and at least one annular component disposed on the ring supporting surface in a manner of surrounding the substrate disposed on the substrate supporting surface; a substrate chuck electrode, disposed below the substrate supporting surface within the electrostatic chuck; at least one annular chuck electrode disposed within the electrostatic chuck below the annular support surface; a substrate bias electrode disposed within the electrostatic chuck and below the substrate chuck electrode; an annular bias electrode disposed within the electrostatic chuck and below the at least one annular chuck electrode; a first DC power supply configured to generate a first primary DC signal having a first primary voltage level; a second DC power supply configured to generate a second primary DC signal having a second primary voltage level; a voltage superimposer configured to generate a first secondary DC signal having a first secondary voltage level and a second secondary DC signal having a second secondary voltage level from the first primary DC signal and the second primary DC signal, and configured to be capable of switching between a first generation state and a second generation state; The first generation state is a state in which the first secondary DC signal is generated in a manner that the first secondary voltage level has the same voltage level as the first primary voltage level, and the second secondary DC signal is generated in a manner that the second secondary voltage level has a voltage level obtained by superimposing the first primary voltage level and the second primary voltage level. The second generation state is a state in which the first secondary DC signal is generated in such a manner that the first secondary voltage level has a voltage level obtained by superimposing the first primary voltage level and the second primary voltage level, and the second secondary DC signal is generated in such a manner that the second secondary voltage level has a voltage level identical to the first primary voltage level; a first voltage pulse generator electrically connected to the substrate bias electrode, configured to generate a first voltage pulse sequence having the first secondary voltage level from the first secondary DC signal; and The second voltage pulse generator is electrically connected to the annular bias electrode and is configured to generate a second voltage pulse sequence having the second secondary voltage level according to the second secondary DC signal.

12. The plasma processing apparatus according to claim 11, wherein: The first primary voltage level and the second primary voltage level have negative polarity.

13. The plasma processing apparatus according to claim 12, wherein: An absolute value of the first primary voltage level is higher than an absolute value of the second primary voltage level.

14. The plasma processing apparatus according to claim 13, wherein: An absolute value of the first primary voltage level is more than five times an absolute value of the second primary voltage level.

15. The plasma processing apparatus according to claim 11, wherein The substrate bias electrode and the ring bias electrode are arranged at the same height.

16. The plasma processing apparatus according to claim 11, wherein The substrate bias electrode and the ring bias electrode are arranged at different heights from each other.

17. The plasma processing apparatus according to claim 16, wherein: The annular bias electrode is arranged at a position lower than the substrate bias electrode.

18. The plasma processing apparatus according to claim 17, wherein: The substrate bias electrode has an outer edge region, The annular bias electrode has an inner edge region that overlaps with the outer edge region of the substrate bias electrode in a longitudinal direction.

19. The plasma processing apparatus according to claim 11, wherein The annular suction cup electrode comprises: an inner annular chuck electrode to which a first annular chuck voltage having a first polarity is applied; and The outer annular chuck electrode is applied with a second annular chuck voltage having a second polarity.

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