Integrated speed regulation fan and abnormal state detection circuit
By integrating the speed-regulating fan drive and abnormal state detection circuit, the problems of large fan detection circuit occupation area, high cost and single state detection in the existing technology are solved, and the fan speed can be adjusted and multiple abnormal state detection can be detected.
Patent Information
- Application Number
- CN202510945651.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-07-09
- Publication Date
- 2025-09-26
- Estimated Expiration
- 2045-07-09
AI Technical Summary
Existing fan detection circuits occupy a large PCB area, are costly, cannot detect multiple abnormal conditions, and the fan speed cannot be adjusted.
The integrated speed-regulating fan drive circuit and abnormal state detection circuit include a current expansion drive module, a logic control module, and a sampling detection module. The fan speed regulation and various state detections are achieved through a combination of LDO voltage regulation and resistors.
The system realizes fan status detection with simple PCB layout and low cost, supports multiple abnormal status judgments, and can adjust the fan speed.
Smart Images

Figure CN120701598A_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the technical field of integrated circuits, and in particular relates to a circuit integrating a speed-regulating fan and abnormal state detection. Background Art
[0002] With the increasing integration of electronic circuits, heat dissipation has become a critical issue for power electronics. This is especially true when circuits operate at high power and voltage, generating significant heat over extended periods. Without timely heat dissipation, prolonged operation can lead to elevated device temperatures, potentially shortening device lifespan and even damaging them. Consequently, device heat dissipation issues are becoming increasingly prominent.
[0003] To effectively overcome the heat dissipation challenges of device circuits, fans are widely used in the integrated circuit field as an efficient heat dissipation method. Currently, there are various fan operating status detection technologies on the market, a typical approach being to monitor the fan motor status. For example, patent publication number CN101113992A describes a fan detection circuit that includes an overcurrent protection device, a clamping circuit, a voltage divider circuit, and an electronic switch. The overcurrent protection device's terminals are connected to the fan power supply and the first terminal of the fan interface, respectively. The clamping circuit comprises D1 and D2, and the voltage divider circuit comprises R2 and R3. The clamping circuit and voltage divider circuit are connected between the second terminal of the fan interface and ground. The control terminal of the electronic switch device, T1, is connected to the central junction of the voltage divider circuit. The circuit detects fan status by measuring the fan power supply current. The clamping voltage of the diode during forward conduction is used to determine whether the fan is in place and whether there is a short circuit or short-circuit fault. The turn-on characteristic of a bipolar transistor is utilized to convert the fan operating status into a digital value for use by the monitoring system.
[0004] However, existing fan detection is mostly implemented through discrete device designs, which occupy a large PCB board area and have high discrete device costs. At the same time, using a single fan detection method, the fan speed cannot be adjusted and multiple abnormal conditions cannot be detected. Summary of the Invention
[0005] The purpose of the present invention is to provide a circuit that integrates fan speed regulation and abnormal state detection. Compared with single fan detection or direct drive fan solutions, the present invention integrates an adjustable speed fan drive circuit and realizes detection of multiple fan abnormal states, with the outstanding advantages of simple PCB board layout and low cost.
[0006] To solve the above technical problems, the present invention provides a circuit for integrating speed-regulating fans and abnormal state detection, comprising:
[0007] The current expansion drive module provides the fan with a voltage FCC stabilized by an LDO and expands the output current of the LDO to drive the fan;
[0008] The logic control module is connected to the current expansion drive module and adjusts the control signal ADJ <n:0>By changing the value of the voltage FCC output by the LDO, the speed of the fan is adjusted;
[0009] A sampling detection module is connected to the logic control module and the fan, samples the current of the fan through a sampling resistor and converts it into a voltage V0, compares the voltage V0 with a reference voltage Vref, and outputs a voltage signal to a level shift circuit. The voltage signal is level-shifted by the level shift circuit to output a status flag FTO, and the abnormal state corresponding to the fan is determined according to the waveform and level of the status flag FTO.
[0010] Preferably, the current expansion drive module includes: a transistor Q1, a resistor R0 and an LDO; the emitter of the transistor Q1 and one end of the resistor R0 are connected to the working power supply VCC, the base of the transistor Q1 is connected to the other end of the resistor R0 and the VIN port of the LDO, and the collector of the transistor Q1 is connected to the output end of the LDO and the fan.
[0011] Preferably, a resistor R1 is further included, and the resistor R1 is connected between the base of the transistor Q1 and the other end of the resistor R0.
[0012] Preferably, it further comprises an EN port and an ADJ port, and the LDO is connected to the logic control module via the EN port and the ADJ port respectively.
[0013] Preferably, the sampling and detection module includes: a resistor R0', resistors R12~R13, resistors R15~R16, a comparator CMP, a transistor N1 and a level shift circuit; one end of the resistor R0' is connected to the fan and the non-inverting input end of the comparator CMP, and the other end is grounded; the inverting input end of the comparator CMP is connected to one end of the resistor R15 and the resistor R16 with a voltage divider function, one end of the resistor R16 with a voltage divider function is connected to the working power supply VDD, and the other end is grounded; the other end of the resistor R15 is connected to the collector of the transistor N1, the emitter of the transistor N1 is grounded, the base of the transistor N1 is connected to one end of the resistor R12, the other end of the resistor R12 is connected to one end of the resistor R13 and is connected to the logic control module as a SEN port, and the other end of the resistor R13 is connected to the working power supply VDD; the output end of the comparator CMP is connected to the input end of the level shift circuit, and the output end of the level shift circuit outputs the status flag FTO to the logic control module.
[0014] Preferably, the resistor R16 with the voltage dividing function is a resistor string structure.
[0015] Preferably, the logic control module is an MCU, and the power supply terminal of the MCU is connected to the working power supply VDD.
[0016] Preferably, judging the abnormal state corresponding to the fan according to the waveform and level of the state flag FTO includes:
[0017] In the initial state, the SEN port is configured to a high level through the internal pull-up mode. If the status flag FTO is a square wave with a fixed period, it is determined that the fan is in a normal working state;
[0018] If the status flag FTO is continuously at a low level, it is determined that the fan is in an open circuit state;
[0019] If the status flag FTO is continuously high, it is preliminarily judged to be a stalled or short-circuit state. At this time, the MCU will immediately pull down the SEN port level. If the status flag FTO becomes low, it is judged that the fan is in a short-circuit state, otherwise the fan is in a stalled state.
[0020] Compared with the prior art, the present invention has the following beneficial effects:
[0021] The present invention integrates an adjustable speed fan drive circuit and multiple abnormality detection circuits on-chip, replacing the existing discrete device design that wastes PCB board area, achieving the function of detecting multiple fan states at low cost. Moreover, the present invention realizes the function of expanding the fan's current with higher power by using a combination of resistors R0 and R1 and a flow expansion tube Q1. By designing a sampling resistor R0' in the sampling detection module, the sampling function is simplified. BRIEF DESCRIPTION OF THE DRAWINGS
[0022] Figure 1 The present invention provides a circuit diagram of a circuit integrating a speed-regulating fan and abnormal state detection. DETAILED DESCRIPTION
[0023] The present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. The advantages and features of the present invention will become more apparent from the following description. It should be noted that the drawings are greatly simplified and not to exact scale, and are only used to facilitate and clearly illustrate the embodiments of the present invention.
[0024] like Figure 1 As shown, a' is a circuit design integrated in the chip, b' is a current expansion drive module; c' is a sampling detection module. The embodiment of the present invention specifically provides a circuit for integrating speed control fans and abnormal state detection, including:
[0025] The current expansion drive module provides the fan with the voltage FCC after LDO regulation and expands the output current of LDO to drive the fan;
[0026] The logic control module is connected to the current expansion drive module and adjusts the control signal ADJ <n:0>By changing the value of the voltage FCC output by the LDO, the speed of the fan is adjusted;
[0027] A sampling detection module is connected to the logic control module and the fan, samples the current of the fan through a sampling resistor and converts it into a voltage V0, compares the voltage V0 with a reference voltage Vref, and outputs a voltage signal to a level shift circuit. The voltage signal is level-shifted by the level shift circuit to output a status flag FTO, and the abnormal state corresponding to the fan is determined according to the waveform and level of the status flag FTO.
[0028] The current expansion drive module includes: a transistor Q1, a resistor R0 and an LDO; the emitter of the transistor Q1 and one end of the resistor R0 are connected to the working power supply VCC, the base of the transistor Q1 is connected to the other end of the resistor R0 and the VIN port of the LDO, and the collector of the transistor Q1 is connected to the output end of the LDO and the fan. It also includes a resistor R1, which is connected between the base of the transistor Q1 and the other end of the resistor R0. The above-mentioned current expansion drive module is mainly used by users to enhance the driving capability of the LDO when using a high-power fan. At this time, the LDO acts as a voltage clamp. At the same time, in order to divert the power consumption of the LDO to the current expansion tube Q1, the LDO power on the chip is reduced, and the temperature of the chip is reduced to protect the chip.
[0029] It also includes an EN port and an ADJ port, and the LDO is connected to the logic control module through the EN port and the ADJ port respectively.
[0030] The sampling and detection module includes: a resistor R0', resistors R12-R13, resistors R15-R16, a comparator CMP, a transistor N1, and a level shift circuit; one end of the resistor R0' is connected to the fan and the non-inverting input of the comparator CMP, and the other end is grounded; the inverting input of the comparator CMP is connected to one end of the resistor R15 and a resistor R16 with a voltage divider function; one end of the resistor R16 with a voltage divider function is connected to an operating power supply VDD, and the other end is grounded; the other end of the resistor R15 is connected to the collector of the transistor N1, the emitter of the transistor N1 is grounded, and the base of the transistor N1 is connected to one end of the resistor R12; the other end of the resistor R12 is connected to one end of the resistor R13 and connected to the logic control module as a SEN port; the other end of the resistor R13 is connected to the operating power supply VDD; the output end of the comparator CMP is connected to the input end of the level shift circuit, and the output end of the level shift circuit outputs a status flag FTO to the logic control module. The resistor R0' is used as a sampling resistor, and its resistance is about 10Ω. At the same time, a resistor with a large power tolerance is selected.
[0031] The resistor R16 for the voltage dividing function is a resistor string structure.
[0032] The logic control module is an MCU, and the power supply terminal of the MCU is connected to a working power supply VDD.
[0033] It also includes the following working principles:
[0034] MCU receives the need for heat dissipation when the device is at different temperatures, and can adjust ADJ <n:0>The FCC voltage is changed to adjust the fan speed. In view of the different load conditions of fans, such as high-power fans or large losses in the chip, which lead to chip overheating, the flow expansion tube Q1 is designed to improve the driving capability and reduce the heat loss in the chip.
[0035] The fan current is sampled by the sampling resistor R0' and converted into a voltage V0. The voltage is compared with the reference voltage Vref after the voltage is divided by the resistor R16. The abnormal state corresponding to the fan is judged according to the waveform and level of the status flag FTO, that is: in the initial state, the SEN port is configured to a high level through the internal pull-up mode. If the status flag FTO is a square wave with a fixed period, the fan is judged to be in a normal working state; if the status flag FTO is continuously low, the fan is judged to be in an open circuit state; if the status flag FTO is continuously high, it is preliminarily judged to be in a stalled or short circuit state. At this time, the MCU will immediately pull down the SEN port level. If the status flag FTO becomes low, the fan is judged to be in a short circuit state, otherwise the fan is in a stalled state.
[0036] The above description is only a description of the preferred embodiments of the present invention and does not limit the scope of the present invention. Any changes and modifications made by ordinary technicians in the field of the present invention based on the above disclosure shall fall within the scope of protection of the claims.
Claims
1. A circuit integrating speed-regulating fan and abnormal state detection, characterized in that: include: The current expansion drive module provides the fan with a voltage FCC stabilized by an LDO and expands the output current of the LDO to drive the fan; The logic control module is connected to the current expansion drive module and adjusts the control signal ADJ <n:0> By changing the value of the voltage FCC output by the LDO, the speed of the fan is adjusted; A sampling detection module is connected to the logic control module and the fan, samples the current of the fan through a sampling resistor and converts it into a voltage V0, compares the voltage V0 with a reference voltage Vref, and outputs a voltage signal to a level shift circuit. The voltage signal is level-shifted by the level shift circuit to output a status flag FTO, and the abnormal state corresponding to the fan is determined according to the waveform and level of the status flag FTO.
2. The circuit for integrating a speed-regulating fan and abnormal state detection according to claim 1, characterized in that: The current expansion drive module includes: a transistor Q1, a resistor R0 and an LDO; the emitter of the transistor Q1 and one end of the resistor R0 are connected to the working power supply VCC, the base of the transistor Q1 is connected to the other end of the resistor R0 and the VIN port of the LDO, and the collector of the transistor Q1 is connected to the output end of the LDO and the fan.
3. The circuit for integrating a speed-regulating fan and abnormal state detection according to claim 2, wherein: The system further includes a resistor R1 , which is connected between the base of the transistor Q1 and the other end of the resistor R0 .
4. The circuit for integrating a speed-regulating fan and abnormal state detection as claimed in claim 2, wherein: It also includes an EN port and an ADJ port, and the LDO is connected to the logic control module through the EN port and the ADJ port respectively.
5. The circuit for integrating a speed-regulating fan and abnormal state detection according to claim 1, wherein: The sampling and detection module includes: a resistor R0', resistors R12-R13, resistors R15-R16, a comparator CMP, a transistor N1, and a level shift circuit; one end of the resistor R0' is connected to the fan and the non-inverting input of the comparator CMP, and the other end is grounded; the inverting input of the comparator CMP is connected to one end of the resistor R15 and a resistor R16 with a voltage divider function; one end of the resistor R16 with a voltage divider function is connected to an operating power supply VDD, and the other end is grounded; the other end of the resistor R15 is connected to the collector of the transistor N1, the emitter of the transistor N1 is grounded, and the base of the transistor N1 is connected to one end of the resistor R12; the other end of the resistor R12 is connected to one end of the resistor R13 and connected to the logic control module as a SEN port; the other end of the resistor R13 is connected to the operating power supply VDD; the output end of the comparator CMP is connected to the input end of the level shift circuit, and the output end of the level shift circuit outputs a status flag FTO to the logic control module.
6. The circuit for integrating a speed-regulating fan and abnormal state detection according to claim 5, characterized in that: The resistor R16 for the voltage dividing function is a resistor string structure.
7. The circuit for integrating a speed-regulating fan and abnormal state detection according to claim 1, wherein: The logic control module is an MCU, and the power supply terminal of the MCU is connected to a working power supply VDD.
8. The circuit for integrating a speed-regulating fan and abnormal state detection according to any one of claims 1 to 7, characterized in that: The determining of the abnormal state of the fan according to the waveform and level of the status flag FTO includes: In the initial state, the SEN port is configured to a high level through the internal pull-up mode. If the status flag FTO is a square wave with a fixed period, it is determined that the fan is in a normal working state; If the status flag FTO is continuously at a low level, it is determined that the fan is in an open circuit state; If the status flag FTO is continuously high, it is preliminarily judged to be a stalled or short-circuit state. At this time, the MCU will immediately pull down the SEN port level. If the status flag FTO becomes low, it is judged that the fan is in a short-circuit state, otherwise the fan is in a stalled state.
Citation Information
Patent Citations
Fan testing circuit
CN101113992A
Short-circuit protection circuit for driving tubes and inductor in switch-type charge management chip
CN103401541A
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CN120592898A
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CN120759784A
Low-cost multifunctional driving protection circuit based on low-voltage fan
CN211981488U
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