Photoelectric logic gate based on bidirectional photovoltaic effect and multi-mode communication system

Abstract

The invention discloses a photoelectric logic gate and a multi-mode communication system based on a bidirectional photovoltaic effect, a WSe2 / alpha-MoO3 heterojunction structure is adopted, the photoelectric logic gate comprises a Si / SiO2 substrate, an alpha-MoO3 charge trapping layer and a WSe2 bipolar channel layer, the transfer direction of charges on a heterogeneous interface is controlled through the polarity of gate voltage (Vg), a built-in electric field with a reversible direction is formed in a WSe2 channel, and the bidirectional photovoltaic effect is achieved. And positive / negative polarity photovoltaic response switching of the same light source is realized. Various reconfigurable logic gates such as AND / NAND / XNOR / NOT can be realized by configuring different input / control signals (laser, bias voltage and grid voltage); the grid voltage input, the bias voltage input and the illumination input are cooperatively regulated and controlled, the output current is in four distinguishable states, and multi-mode photoelectric communication is achieved. The single device integrates multiple logic functions, breaks through the limitation of singleness of traditional photoelectric response, and is suitable for a high-density optical calculation and communication system.

Description

Technical Field

[0001] The present invention belongs to the technical field of photoelectric signal processing, and in particular relates to a photoelectric logic gate and a multimodal communication system based on a bidirectional photovoltaic effect. Background Art

[0002] Optoelectronic logic gates are the core basic devices for optical computing and optoelectronic hybrid signal processing. Traditional electronic logic gates (such as CMOS) are limited by the energy efficiency bottleneck of the von Neumann architecture, while optoelectronic logic gates can significantly improve computational parallelism and energy efficiency through optical-electrical collaborative processing, making them an indispensable part of building optoelectronic networks. Current optoelectronic logic gates are mostly based on memristors or single photovoltaic devices, which have significant defects: (1) they can only realize static logic functions (such as fixed AND or OR) and lack dynamic reconfigurability; (2) it is difficult to integrate multiple logics into a single device, resulting in high system complexity and low integration; (3) existing optoelectronic communication systems rely on the collaboration of multiple devices, resulting in low information processing efficiency and weak anti-interference ability. Therefore, developing a single-device solution that can dynamically reconfigure logic functions and support multimodal communication is crucial to promoting the development of optical computing and high-dimensional communication. Summary of the Invention

[0003] The technical problem to be solved by the present invention is to provide a photoelectric logic gate and a multimodal communication system based on the bidirectional photovoltaic effect, so as to solve the problems in the prior art of non-reconfigurable logic functions and single communication dimension.

[0004] To achieve the above object, the present invention adopts the following technical solutions:

[0005] A photoelectric logic gate based on the bidirectional photovoltaic effect comprises: a gate-controllable photoelectric device, the photoelectric device comprising: a Si / SiO2 substrate, an α-MoO3 charge capture layer located on the Si / SiO2 substrate, a WSe2 bipolar semiconductor channel layer located on the α-MoO3 charge capture layer, wherein the channel layer and the charge capture layer partially overlap; a source electrode and a drain electrode disposed at both ends of the WSe2 channel layer; a gate electrode disposed on the Si substrate for applying a gate voltage to the device; wherein, by applying gate voltages V of different polarities, g , regulating the charge transfer direction between the WSe2 channel layer and the α-MoO3 charge trapping layer, thereby forming a reversible built-in electric field in the WSe2 channel; this built-in electric field enables the device to produce a polarity-adjustable photovoltaic response to the incident laser of the same fixed wavelength, V g Forward effect when ≤0V, V g =Negative effect at +60V.

[0006] Preferably, the logic gate implements a variety of Boolean logic functions by configuring input signals and control signals:

[0007] (a) When the laser switch state (on = 1 / off = 0) and bias voltage (V b ) as two input signals, the gate voltage (V g ) as the control signal: When Vg=0V, the output current (I ds ) realizes AND logic function; when Vg=60V, the output current (I ds ) Implement NAND logic functions;

[0008] (b) When the bias voltage (V b ) and gate voltage (V g ) as two input signals, and the laser switch state as the control signal: under continuous laser irradiation (on state), the output current (I ds ) Implement XNOR logic function;

[0009] (c) When only bias voltage (V b ) as the input signal, the output current (I ds ) implements the NOT logic function.

[0010] Preferably, the substrate is a heavily doped Si / SiO2 substrate, the SiO2 dielectric layer has a thickness of 300nm; the α-MoO3 charge capture layer has a thickness of 200nm; and the WSe2 ambipolar semiconductor channel layer has a thickness of 70nm.

[0011] Preferably, the source electrode and the drain electrode are metal gold (Au) electrodes, and form an ohmic contact with the WSe2 channel layer.

[0012] As a preference, when applying V g =-60V or 0V gate voltage, holes are injected from WSe2 into α-MoO3, forming a lateral pn homojunction in the WSe2 channel, resulting in a forward photovoltaic effect under laser irradiation; when V is applied g When the gate voltage is +60V, holes are extracted from α-MoO3 and injected into WSe2, forming a lateral np homojunction in the WSe2 channel, resulting in a negative photovoltaic effect under laser irradiation.

[0013] Preferably, the physical mapping of the logic state is defined as: laser switch state: ON = logic "1", OFF = logic "0"; bias voltage (V b ): +0.26V = logic "1", -0.35V = logic "0"; Gate voltage (V g ): 0V = logic "0", +60V = logic "1"; Output source leakage current (I ds ):|I ds |>1nA=Logic "1", |I ds |<1nA=Logical "0".

[0014] The present invention also provides a multi-mode optoelectronic communication system, comprising: a gate-controllable optoelectronic device, which controls the gate voltage (V g ), bias voltage (V b ), light state (L) as three independent input channels, output source leakage current (I ds ) as a communication signal; by regulating V g 、V b The logic state combination of L and L makes the output I ds It presents at least four distinct current amplitude states, each state corresponding to a preset binary code (00, 01, 10, 11), realizing the optoelectronic modulation and transmission of multi-bit information.

[0015] Preferably, the bias voltage (V b )’s typical operating points include 0V, +0.26V, and -0.35V, which are used to encode different logic states.

[0016] The technical effects of the present invention are as follows:

[0017] 1. Breakthrough mechanism: For the first time, gate voltage is used to regulate the bidirectional photovoltaic effect, enabling a single device to switch between positive and negative responses to the same light source.

[0018] 2. Functional integration: Dynamically reconstruct four logic functions of AND / NAND / XNOR / NOT on a single device to improve hardware efficiency;

[0019] 3. Communication upgrade: Through the fusion of optical, electrical, and grating modes, the single-channel communication dimension is expanded from 2 states (0 / 1) to 4 states, doubling the spectrum efficiency; BRIEF DESCRIPTION OF THE DRAWINGS

[0020] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are merely embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without paying any creative work.

[0021] Figure 1 Schematic diagram of the structure of a gate-controllable optoelectronic device according to an embodiment of the present invention;

[0022] Figure 2 The IV curves of the gate-controlled optoelectronic device according to the present invention at 0V and 60V gate voltages as the intensity of 405nm light changes;

[0023] Figure 3It curves of the gate-controlled optoelectronic device provided in the example of the present invention at 0V and 60V gate voltages as a function of 405nm light intensity;

[0024] Figure 4 Truth tables for several different photoelectric logic gates that can be implemented;

[0025] Figure 5 is the signal output of the AND gate;

[0026] Figure 6 It is the signal output of the NAND gate;

[0027] Figure 7 It is the signal output of the XOR gate;

[0028] Figure 8 is the signal output of the NOT gate;

[0029] Figure 9 Schematic diagram of a multi-modal optoelectronic communication system;

[0030] Figure 10 It is the actual output state of current under three-channel control;

[0031] Figure 11 Demonstrated operation of transmitting the text "HSTAR" for multi-modal electro-optical communications. DETAILED DESCRIPTION

[0032] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.

[0033] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, the present invention is further described in detail below with reference to the accompanying drawings and specific embodiments.

[0034] Example 1:

[0035] like Figure 1As shown, an embodiment of the present invention provides a photoelectric logic gate based on the bidirectional photovoltaic effect, comprising: a gate-controllable photoelectric device; a gate-controllable photoelectric device comprising: a substrate, an α-MoO3 charge capture layer, and a WSe2 bipolar semiconductor channel layer stacked in sequence; wherein the charge capture layer is partially aligned with the bipolar semiconductor channel layer, and the source and drain electrodes are located at both ends above the bipolar semiconductor channel layer; the charge transfer between the bipolar semiconductor channel layer and the charge capture layer is controlled by gate voltages of different polarities, and built-in electric fields of different directions are formed inside the channel material, which are applied to the same The light source generates positive and negative photovoltaic responses; the laser switch and bias voltage are used as two input terminals, the gate voltage is used as the control terminal, and the output source-drain current is used as the output terminal. When the gate voltage of the control terminal is converted from 0V to 60V, the optoelectronic device realizes the transformation of the logic function from AND to NAND; the bias voltage and gate voltage are used as two input terminals, the laser switch is used as the control terminal, and the source-drain current is used as the output terminal. When the laser at the control terminal is continuously irradiated, the optoelectronic device realizes the XNOR logic gate function; when only the bias voltage is used as the input, the optoelectronic device realizes the NOT logic function.

[0036] As an implementation method of an embodiment of the present invention, the substrate is a Si / SiO2 substrate with a thickness of 300nm; the α-MoO3 charge capture layer is a multi-layer with a thickness of 201nm; and the thickness of the WSe2 ambipolar semiconductor channel layer is 70nm.

[0037] As an implementation manner of an embodiment of the present invention, the material of the source-drain electrode layer is metal; the metal is gold; and an ohmic contact is formed between the source-drain electrode and the bipolar semiconductor channel layer.

[0038] As an implementation method of an embodiment of the present invention, input light is irradiated on the overlapping area of ​​α-MoO3 and WSe2; wherein; when a gate voltage of -60 or 0V is applied to the gate, holes are injected from WSe2 into MoO3, a lateral homogeneous pn junction is formed in the channel, and a positive photovoltaic effect is formed under laser irradiation; when a gate voltage of +60V is applied to the gate, holes are extracted from MoO3 and injected into WSe2, a lateral homogeneous np junction is formed in the channel, and a negative photovoltaic effect is formed under laser irradiation.

[0039] Furthermore, the method for preparing the optoelectronic device comprises the following steps:

[0040] (1) Dip the fired α-MoO3 nanosheets into the silicon wafer with PDMS and transfer them to the selected substrate using dry transfer.

[0041] (2) The WSe2 is prepared by mechanical stripping. Specifically, a sheet of WSe2 is placed on a piece of tape, and another piece of clean PDMS is pressed on it. The peeling operation is repeated 9 to 10 times to obtain a relatively thin WSe2 on the PDMS. Then, dry transfer is used to half-cover it on the transferred α-MoO3.

[0042] (3) Preparing the source-drain electrode:

[0043] (a) Spin coating of photoresist. A spin coater is used to spin-coat the transferred silicon wafer with photoresist. The spin coater is set to spin at a low speed of 800 revolutions per minute (rpm) for 10 seconds, then at 3000 rpm for 20 seconds, and finally at a high speed of 6000 rpm for 20 seconds to evenly distribute the photoresist (model: AZ-5214) on the substrate.

[0044] (b) Glue baking: Place the above substrate in a drying machine at 100°C for one minute to remove the organic solvent.

[0045] (c) Exposure: Exposure is performed using a maskless photolithography machine, and the exposed area is the drawn electrode area.

[0046] (d) Development: The exposed substrate was immersed in a developer (type 2.38% AZ300MIF) for about 30 seconds, then rinsed with deionized water, and then dried with high-purity nitrogen gas to obtain a substrate with a specific pattern.

[0047] (e) Metal evaporation: The substrate with a specific pattern is placed in a high vacuum coating machine to thermally evaporate a metal film with a thickness of 40 nm.

[0048] (f) Stripping: Place the silicon wafer with the metal film evaporated in an acetone solution and gently shake the substrate to remove the excess photoresist and the metal attached to the photoresist, thereby obtaining source and drain electrodes with specific shapes.

[0049] In an embodiment of the present invention, a semiconductor parameter analyzer is used to perform performance testing on a photoelectric device. The metal electrode in contact with the WSe2 above the MoO3 serves as the source electrode. A test electrode is prepared to contact a test probe, and the gate is in contact with the exposed Si phase, thereby enabling performance testing of the photoelectric device.

[0050] Figure 2 This is the IV curve of the gate-controllable positive and negative photovoltaic device provided by the present invention under 405nm aurora with different light powers. The horizontal axis represents the source-drain voltage V ds (V), the vertical axis represents the source-drain current I ds(nA). It is obvious that at 0V gate voltage, the open circuit voltage is positive and the short circuit current is negative, while at 60V gate voltage, the open circuit voltage is negative and the short circuit current is positive.

[0051] Figure 3 The following are the I curves for the gate-controllable positive and negative photovoltaic devices provided by the present invention at different light powers under 405nm auroral light. The horizontal axis represents time, and the vertical axis represents the source-drain current. In the absence of a bias voltage, the device's photocurrent at both 0V and 60V gate voltages continues to increase with increasing light intensity.

[0052] As an implementation method of an embodiment of the present invention, the logic states 1 and 0 of the laser correspond to the laser on state and the laser off state respectively, and the selected laser light source is a 405 laser light source, including but not limited to a 405 laser light source, as long as the light source can generate a positive and negative photovoltaic response when irradiated on the device. The logic states 1 and 0 of the bias voltage correspond to 0.26V and -0.35V respectively, but are not limited to the bias voltage, as long as they are two positive and negative open-circuit voltages obtained by the device under the same light source and different polarity gate voltage conditions. The logic states 1 and 0 of the gate voltage correspond to 0V and 60V respectively, but are not limited to the bias voltage, as long as they are two gate voltages that can enable the device to generate photocurrents in different directions under the same light source. The output source-drain current logic states 1 and 0 correspond to current absolute values ​​greater than 1nA and less than 1nA respectively, including but not limited to the definition of other logic states for current size, as long as they meet the basic logic functions of the optoelectronic device.

[0053] The photoelectric logic gate device uses a photoelectric device, uses the current state of the source and drain electrodes as the output result, and uses the gate voltage and 405nm light as the control terminals. The logic operation is affected by light, gate voltage, and bias voltage, showing an adaptive photoelectric logic. The truth table is as follows Figure 4 shown.

[0054] 1. Implement AND gate

[0055] The AND gate operation is realized by taking advantage of the fact that when the photoelectric device is illuminated, a negative open circuit voltage and a positive short circuit current will be generated under a gate voltage of 60V. Specifically, the gate voltage is set to 60V, the laser switch is used as the first input, and the bias voltage (the value is equal to the two open circuit voltages of the positive and negative photovoltaics) is used as the second input, where the laser is on as 1 and off as 0, the positive bias voltage is recorded as 1, and the negative bias voltage is recorded as 0. The output source-drain current absolute value threshold is 1nA, that is, the output current absolute value greater than 1nA is recorded as 1, and less than 1nA is recorded as 0. The signal output of the AND gate is as follows Figure 5 As shown, it is consistent with the truth table, indicating the successful construction of the AND gate.

[0056] 2. Implement NAND gate

[0057] Adjust the gate voltage from 60V to -60V and reconstruct the logic gate to realize the NAND gate. Specifically, the gate voltage is set to -60V and the two inputs are the same as the above AND gate. The signal output of the AND / OR gate is as follows Figure 6 As shown, it is consistent with the truth table, indicating that the NAND gate is successfully constructed.

[0058] In the embodiment of the present invention, the conversion of the logic function from an AND gate to a NAND gate is achieved by simply adjusting the gate voltage, showing good reconfigurability.

[0059] 3. Implement XOR gate

[0060] By utilizing the unique property of reconfigurable photovoltaic gate of photoelectric device, XOR gate operation can be realized. Specifically, 405nm laser continuous irradiation is used as the control terminal, gate voltage is used as the first input, and bias voltage (value equal to the two open circuit voltages of positive and negative photovoltaic) is used as the second input, where 60V gate voltage is recorded as 1, 0V gate voltage is recorded as 0, positive bias voltage is recorded as 1, and negative bias voltage is recorded as 0. The output source-drain current absolute value threshold is 1nA, that is, the output current absolute value greater than 1nA is recorded as 1, and less than 1nA is recorded as 0. The signal output of the XOR gate is as follows Figure 7 As shown, it is consistent with the truth table, which illustrates the successful construction of the XOR gate.

[0061] 4. Implement NOT gate

[0062] The forward photovoltaic effect of the photoelectric device under zero volt gate voltage can be used to realize the NOT gate operation. Specifically, the 405nm laser continuous irradiation is used as the control terminal, the bias voltage (the value is equal to the two open circuit voltages of the positive and negative photovoltaics) is used as the input, and V b =0.26V is recorded as logic state 1, V b =-0.35V is recorded as logic state 0. The output source-drain current absolute value threshold is 1nA, that is, the output current absolute value greater than 1nA is recorded as 1, and less than 1nA is recorded as 0. The signal output of the NOT gate is as follows Figure 8 As shown, it is consistent with the truth table, indicating the successful construction of the NOT gate.

[0063] Example 2:

[0064] The embodiment of the present invention further provides a multi-modal communication system, comprising: a gate-controllable optoelectronic device, such as Figure 9As shown, gate voltage, source-drain voltage, and light serve as three-channel inputs, and the source-drain current information is used as the information transmission. The gate-controllable optoelectronic device comprises: a stacked substrate, an α-MoO3 charge trapping layer, and a WSe2 bipolar semiconductor channel layer; the charge trapping layer and the bipolar semiconductor channel layer are partially aligned, with the source and drain electrodes located at both ends of the bipolar semiconductor channel layer. By controlling charge transfer between the bipolar semiconductor channel layer and the charge trapping layer using gate voltages of different polarities, built-in electric fields of different directions are formed within the channel material, generating positive and negative photovoltaic responses to the same light source.

[0065] like Figure 10 As shown in the figure, the communication system presents four different current states under the control of three channels, and the output current shows four clear states; 430nA (11), 170nA (10), -360nA (01), -900nA (00). These states are precisely defined by quantitative parameters. By mapping the source and drain currents with specific binary combinations, the output of real-time signals can be achieved.

[0066] Specifically, by simultaneously adjusting the gate voltage, source-drain voltage and light, in this example, the bias voltage has three input states, namely two open-circuit voltages and 0V bias, the gate voltage has two input states, namely 0V and 60V, and the laser switch also has two states.

[0067] like Figure 11 As shown in the figure, the multimodal optoelectronic communication system successfully outputs the text message "HSTAR". Taking the binary code of "H" as an example, the binary code of "H" is 01001000. The multimodal communication system can transmit this message using only four current states: -360nA, -900nA, 170nA, and -900nA. This is in contrast to the eight current states required by traditional optoelectronic communication systems.

[0068] By flexibly adjusting gate voltage, bias voltage, and illumination, this invention can implement multiple logic functions—AND, NAND, XOR, and NOT—on a single device. This device holds great promise for applications in the upcoming era of the Internet of Things (IoT), where information is exploding. Because the device's open-circuit voltage and short-circuit current can be reversed by the gate voltage, it possesses unique current states controlled by the three channels, making it suitable for a new type of optoelectronic communication. This significantly simplifies the complexity of information processing in communications and demonstrates its potential for further development in the optoelectronic communication field.

[0069] The embodiments described above are merely descriptions of preferred embodiments of the present invention and are not intended to limit the scope of the present invention. Without departing from the spirit of the present invention, various modifications and improvements made to the technical solutions of the present invention by persons skilled in the art should fall within the scope of protection defined by the claims of the present invention.

Claims

1. A photoelectric logic gate based on bidirectional photovoltaic effect, characterized in that: include: A gate-controllable optoelectronic device, comprising: a Si / SiO2 substrate, an α-MoO3 charge capture layer located on the Si / SiO2 substrate, a WSe2 bipolar semiconductor channel layer located on the α-MoO3 charge capture layer, wherein the channel layer partially overlaps with the charge capture layer; a source electrode and a drain electrode disposed at both ends of the WSe2 channel layer; and a gate electrode disposed on the Si substrate for applying a gate voltage to the device; wherein, by applying a gate voltage V of different polarities, g , regulating the charge transfer direction between the WSe2 channel layer and the α-MoO3 charge trapping layer, thereby forming a reversible built-in electric field in the WSe2 channel; this built-in electric field enables the device to produce a polarity-adjustable photovoltaic response to the incident laser of the same fixed wavelength, V g Forward effect when ≤0V, V g =Negative effect at +60V.

2. The photoelectric logic gate based on the bidirectional photovoltaic effect according to claim 1, characterized in that: The logic gates implement various Boolean logic functions by configuring input signals and control signals: (a) When the laser switch state (on = 1 / off = 0) and bias voltage (V b ) as two input signals, the gate voltage (V g ) as the control signal: When V g =0V, the output current (I ds ) to realize AND logic function; g =60V, the output current (I ds ) Implement NAND logic functions; (b) When the bias voltage (V b ) and gate voltage (V g ) as two input signals, and the laser switch state as the control signal: under continuous laser irradiation (on state), the output current (I ds ) Implement XNOR logic function; (c) When only bias voltage (V b ) as the input signal, the output current (I ds ) implements the NOT logic function.

3. The photoelectric logic gate based on the bidirectional photovoltaic effect according to claim 1 or 2, characterized in that: The substrate is a heavily doped Si / SiO2 substrate, the SiO2 dielectric layer has a thickness of 300nm; the α-MoO3 charge capture layer has a thickness of 200nm; and the WSe2 bipolar semiconductor channel layer has a thickness of 70nm.

4. The optoelectronic logic gate according to claim 3, wherein: The source electrode and the drain electrode are metal gold (Au) electrodes, and form an ohmic contact with the WSe2 channel layer.

5. The optoelectronic logic gate according to claim 4, wherein: When applying V g =-60V or 0V gate voltage, holes are injected from WSe2 into α-MoO3, forming a lateral pn homojunction in the WSe2 channel, resulting in a forward photovoltaic effect under laser irradiation; when V is applied g When the gate voltage is +60V, holes are extracted from α-MoO3 and injected into WSe2, forming a lateral np homojunction in the WSe2 channel, resulting in a negative photovoltaic effect under laser irradiation.

6. The optoelectronic logic gate according to claim 2, wherein: The physical mapping of the logic state is defined as: laser switch state: ON = logic "1", OFF = logic "0"; bias voltage (V b ): +0.26V = logic "1", -0.35V = logic "0"; Gate voltage (V g ): 0V = logic "0", +60V = logic "1"; Output source leakage current (I ds ):|I ds |>1nA=Logic "1", |I ds |<1nA=Logical "0".

7. A multi-modal optoelectronic communication system, characterized in that: include: Gate-controllable optoelectronic devices, the gate voltage (V g ), bias voltage (V b ), light state (L) as three independent input channels, output source leakage current (I ds ) as a communication signal; by regulating V g 、V b The logic state combination of L and L makes the output I ds It presents at least four distinct current amplitude states, each state corresponding to a preset binary code (00, 01, 10, 11), realizing the optoelectronic modulation and transmission of multi-bit information.

8. The multimodal communication system according to claim 7, wherein: The bias voltage (V b )’s typical operating points include 0V, +0.26V, and -0.35V, which are used to encode different logic states.

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