Reliability test structure, stress migration test method and dielectric reliability test method

Abstract

The invention discloses a reliability test structure, a stress migration test method and a dielectric reliability test method, and belongs to the technical field of reliability, the reliability test structure comprises a plurality of first type metal strips and second type metal strips which are arranged along a first direction; the third type of metal strips and the fourth type of metal strips are arranged in the second direction, and the two ends of any third type of metal strips are partially overlapped with the corresponding first type of metal strips and the corresponding second type of metal strips in the direction perpendicular to the metal layer; the two ends of any fourth type of metal strip are partially overlapped with the corresponding first type of metal strip and the corresponding second type of metal strip in the direction perpendicular to the metal layer, and through hole metal is arranged on the partially overlapped parts for connection and conduction, so that a rotary and reciprocating chain type structure is formed. By providing the structure which can not only realize stress migration test, but also realize reliability test of the dielectric medium between the metal and the metal, the structure can not only meet process requirements, but also improve the utilization rate of the area of the wafer.

Description

Technical Field

[0001] The present invention relates to the field of reliability technology, and in particular to a reliability testing structure, a stress migration testing method, and a dielectric reliability testing method. Background Art

[0002] Stress migration (SM) is a degradation mechanism used to describe the impact of thermal stress effects caused by a mismatch in effective thermal expansion coefficients. Copper has a higher thermal expansion coefficient than the silicon substrate or surrounding dielectric. Stress migration testing is one of the most important tests for evaluating the reliability of metal interconnects. Stress migration is a physical phenomenon in which, at a certain temperature, due to the different thermal expansion coefficients of various materials, stress is generated between different materials, causing small gaps between grains in metal interconnects or vias to aggregate toward stress concentrations, forming voids. When the voids formed by stress migration reach a certain level, the metal interconnects in the integrated circuit will open, causing device failure.

[0003] As semiconductor geometries continue to shrink, process technology is placing increasing emphasis on the reliability of back-end-of-line (BEOL) metal interconnects. Failures caused by stress migration and stress transfer in metal interconnects are due to stress accumulation. When the critical tensile stress for delamination is reached, a void nucleates and grows until the void causes metal interconnect failure.

[0004] Back-end metal interconnect processes generate parasitic capacitance and resistance (RC). To reduce RC delay, low-k materials are often used. Inter-Metal Dielectric Time-Dependent Dielectric Breakdown (IMDTDDB) is commonly used to evaluate low-k materials' performance at different operating voltages.

[0005] Stress migration testing and IMD TDDB often use layouts with different morphologies to test reliability. Therefore, by designing corresponding structures to evaluate back-end process reliability, a structure is provided that can perform both stress migration testing and easily implement metal-to-metal dielectric reliability testing.

[0006] It should be noted that the information disclosed in the background technology section of the invention is only intended to deepen the understanding of the general background technology of the invention, and should not be regarded as an admission or any form of implication that the information constitutes prior art already known to those skilled in the art. Summary of the Invention

[0007] The purpose of the present invention is to provide a reliability test structure and a stress migration test method, as well as a dielectric reliability test method, so as to solve the problem that stress migration test and IMD TDDB often use layout structures with different morphologies to test reliability.

[0008] In order to solve the above technical problems, the present invention provides a reliability test structure, comprising a first test structure and a second test structure located on different layers;

[0009] The first test structure includes a plurality of first-type metal strips and second-type metal strips arranged along a first direction, wherein a predetermined distance exists between the first-type metal strips and corresponding second-type metal strips;

[0010] The second test structure includes a plurality of third-type metal strips and fourth-type metal strips arranged along a second direction, and the third-type metal strips and the fourth-type metal strips are respectively arranged at both ends of the first-type metal strips, and both ends of any third-type metal strip partially overlap with the corresponding first-type metal strips and second-type metal strips in a direction perpendicular to the metal layer, and both ends of any fourth-type metal strip partially overlap with the corresponding first-type metal strips and second-type metal strips in a direction perpendicular to the metal layer, and through-hole metal connections are provided on the overlapping portions to form a reciprocating chain structure;

[0011] A first auxiliary metal strip is provided between two adjacent first-category metal strips and between two adjacent second-category metal strips; a second auxiliary metal strip is provided between two adjacent third-category metal strips and between two adjacent fourth-category metal strips.

[0012] Preferably, the angle between the first direction and the second direction is 90 degrees.

[0013] Preferably, the first type metal strips and the second type metal strips are arranged in parallel and at equal intervals along the first direction.

[0014] Preferably, the third type metal strips and the fourth type metal strips are arranged in parallel and at equal intervals in the second direction.

[0015] A stress migration testing method adopts the reliability testing structure as described above.

[0016] Preferably, the steps include:

[0017] S1, setting the first test structure on the first layer and the second test structure on the second layer;

[0018] S2, bake at a predetermined temperature, and provide a test current or voltage at both ends of the chain structure before and after baking, and use the four-terminal method to obtain the stress change at the bottom of the through-hole metal.

[0019] Preferably, after executing S2, the first test structure is set on the second layer, the second test structure is set on the first layer, and the process in S2 is repeatedly executed to monitor the impact of process changes on reliability.

[0020] A dielectric reliability testing method adopts the reliability testing structure as described above.

[0021] Preferably, the steps include:

[0022] S1, setting the first test structure on the first layer and the second test structure on the second layer;

[0023] S2: Apply the same potential to both ends of the chain structure, and apply a test potential to the first auxiliary metal strip and the second auxiliary metal strip. By recording the breakdown time between the metals, the life of the intermetallic dielectric is calculated.

[0024] Preferably, after executing S2, the first test structure is set on the second layer, and the second test structure is set on the first layer, and the process in S2 is repeatedly executed to monitor the impact of process changes on reliability.

[0025] The reliability test structure provided by the present invention provides a structure that can realize both stress migration testing and metal-to-metal dielectric reliability testing. Through-hole metal is used to connect the third type of metal and the fourth type of metal with their corresponding first type of metal strips and second type of metal strips to form a loop-like chain structure. The corresponding first auxiliary metal strips and second auxiliary metal strips are used to provide potential to evaluate the reliability of the dielectric between the metals in the same layer. This structure can not only meet the process requirements, but also improve the wafer area utilization rate.

[0026] The stress migration testing method provided by the present invention and the reliability testing structure provided by the present invention belong to the same inventive concept. Therefore, the stress migration testing method provided by the present invention has at least all the advantages of the reliability testing structure provided by the present invention, which will not be repeated here.

[0027] The dielectric reliability testing method provided by the present invention and the reliability testing structure provided by the present invention belong to the same inventive concept. Therefore, the dielectric reliability testing method provided by the present invention has at least all the advantages of the reliability testing structure provided by the present invention, which will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Those skilled in the art will appreciate that the accompanying drawings are provided for a better understanding of the present invention and do not constitute any limitation on the scope of the present invention.

[0029] Figure 1 This is a top view of an SM reliability test structure provided in the technology;

[0030] Figure 2 is a top view of an SM reliability test structure according to an embodiment of the present invention;

[0031] Figure 3 FIG. 4 is a top view of an SM&IMD reliability test structure according to another embodiment of the present invention.

[0032] In the attached figure:

[0033] 100, first test structure; 101, first type metal strip; 102, second type metal strip; 200, second test structure; 201, third type metal strip; 202, fourth type metal strip. DETAILED DESCRIPTION

[0034] To make the objects, advantages, and features of the present invention more clearly apparent, the present invention is further described below in conjunction with the accompanying drawings and specific embodiments. It should be noted that the drawings are all in a very simplified form and are not drawn to scale. They are only used to conveniently and clearly assist in illustrating the purposes of the embodiments of the present invention. In addition, the structures shown in the drawings are often part of the actual structure. In particular, different drawings may need to illustrate different aspects and may sometimes use different scales.

[0035] As used in the present invention, the singular forms "a", "an", and "the" include plural objects, the term "or" is generally used to include the meaning of "and / or", the term "several" is generally used to include the meaning of "at least one", and the term "at least two" is generally used to include the meaning of "two or more". In addition, the terms "first", "second", and "third" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the technical features indicated. Therefore, the features specified as "first", "second", and "third" may explicitly or implicitly include one or at least two of the features, "one end" and "the other end" generally refer to two corresponding parts, which not only include endpoints, and the terms "mounted", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal communication between two elements or the interaction relationship between two elements. In addition, as used in the present invention, "one element is disposed on another element" generally only indicates that there is a connection, coupling, cooperation, or transmission relationship between the two elements, and the connection, coupling, cooperation, or transmission between the two elements may be direct or indirect through an intermediate element. It should not be understood as indicating or implying a spatial positional relationship between the two elements. That is, one element can be in any orientation, such as inside, outside, above, below, or to one side of another element, unless the content clearly indicates otherwise. For those skilled in the art, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0036] The inventors have found that the stress migration test usually adopts the four-terminal method. Figure 1 As shown, Force High (pad B) and Force Low (pad D) represent current supply ports, Sense High (pad A) and Sense Low (pad C) represent voltage measurement ports. Stress migration testing and IMD TDDB often use layout structures with different morphologies to test reliability.

[0037] Based on this, the core idea of ​​the present invention is to provide a structure that can realize both stress migration testing and metal-to-metal dielectric reliability testing, and use through-hole metal to connect the third type of metal, the fourth type of metal and their corresponding first type of metal strips and the second type of metal strips to form a loop-like chain structure. The corresponding first auxiliary metal strips and the second auxiliary metal strips are used to provide potential to evaluate the reliability of the dielectric between the same layer of metals. This structure can not only meet the process requirements, but also improve the wafer area utilization rate.

[0038] For details, please refer to Figure 2-Figure 3, which is a schematic diagram of an embodiment of the present invention. Figure 3 As shown, a reliability test structure includes a first test structure 100 and a second test structure 200 located on different layers;

[0039] The first test structure 100 includes a plurality of first-type metal strips 101 and second-type metal strips 102 arranged along a first direction, and a predetermined distance is provided between the first-type metal strips 101 and the corresponding second-type metal strips 102;

[0040] The second test structure 200 includes a plurality of third-type metal strips 201 and fourth-type metal strips 202 arranged along the second direction, and the third-type metal strips 201 and the fourth-type metal strips 202 are respectively arranged at the two ends of the first-type metal strip 101, and the two ends of any third-type metal strip 201 partially overlap with the corresponding first-type metal strip 101 and second-type metal strip 102 in the direction perpendicular to the metal layer, and the two ends of any fourth-type metal strip 202 partially overlap with the corresponding first-type metal strip 101 and second-type metal strip 102 in the direction perpendicular to the metal layer, and through-hole metal Vx is set on the partial overlap to connect and conduct, forming a reciprocating chain structure.

[0041] A first auxiliary metal strip is provided between two adjacent first type metal strips 101 and between two adjacent second type metal strips 102 ; a second auxiliary metal strip is provided between two adjacent third type metal strips 201 and between two adjacent fourth type metal strips 202 .

[0042] The structure of stress migration test is as follows Figure 2 As shown, a top view of the new SM via chain (stress migration test via chain) test structure is shown. A quadrilateral structure is formed by the first metal strip 101, the second metal strip 102, the third metal strip 201 and the fourth metal strip 202, which are connected by through-hole metal Vx to form a reciprocating chain structure. Furthermore, by setting up a number of auxiliary metal strips, dielectric reliability testing can be achieved, which can not only meet the requirements of evaluating the stress migration effect of via (via) but also meet the requirements of evaluating the dielectric reliability between metals in the same layer. This design structure can not only meet the requirements of SM&IMD reliability testing, but also improve the wafer area utilization rate. Compared with the traditional design layout, when the technology node becomes smaller and smaller, the new design layout structure can meet both the design rules and the process requirements. At the same time, the new design layout structure can also meet the requirements of large line width process.

[0043] in Figure 2 and Figure 3The meanings of the characters are as follows: S: Space, En: Enclosure, Mx: bottom metal, Mx+1: upper metal, Vx: bottom via. Force High (pad B) and Force Low (pad D) represent the current supply ports, Sense High (pad A) and Sense Low (pad C) represent the voltage measurement ports, and Force (pad E) and Force (pad F) represent the first auxiliary metal strip and the second auxiliary metal strip, respectively. Figure 2 and 3 Among them, S1~S5, En1, En2, Mx, Mx+1, and Vx (number) are designed according to design rules and design purposes.

[0044] like Figure 2 , a predetermined distance is spaced apart between the first-type metal strips 101 and the corresponding second-type metal strips 102. It is understood that multiple first-type metal strips 101 are arranged sequentially from left to right, and similarly, the second-type metal strips 102 are also arranged sequentially from left to right. The corresponding second-type metal strips 102 and the first-type metal strips 101 are first-type metal strips 101 and second-type metal strips 102 arranged in the same order. The first-type metal strips 101 and second-type metal strips 102 arranged in the same order have a predetermined spacing S3 between them. The spacing between the first-type metal strips 101 is S2, and the spacing between the second-type metal strips 102 can be the same as the spacing between the first-type metal strips 101. Similarly, there is also a spacing between the third-type metal strips 201 and the corresponding fourth-type metal strips 202, and this spacing can be the same as the predetermined spacing S3.

[0045] Both ends of any third type metal strip 201 partially overlap with the corresponding first type metal strip 101 and second type metal strip 102 in the direction perpendicular to the metal layer. Both ends of any fourth type metal strip 202 partially overlap with the corresponding first type metal strip 101 and second type metal strip 102 in the direction perpendicular to the metal layer. That is, the metal strips partially overlap in the direction perpendicular to the paper, and through-hole metal interconnection is set at the partially overlapping part. Figure 2For example, the first type of metal strip 101, the second type of metal strip 102, the third type of metal strip 201 and the fourth type of metal strip 202 form a quadrilateral structure. The top of the leftmost first type of metal strip 101 is connected to the top of the corresponding second type of metal strip 102 through the bottom third type of metal strip 201, the bottom end of the second type of metal strip 102 is connected to the right end of the bottom fourth type of metal strip 202, and the left end of the bottom fourth type of metal strip 202 is connected to the bottom end of another first type of metal strip 101. The other first type of metal strip 101 is located on the right side of the leftmost first type of metal strip 101. A similar structure is adopted for the other first type of metal strip 101, and the metal strips are connected by through-hole metal. The metal strips are looped back and forth to form a chain structure similar to a U-shaped structure.

[0046] During stress migration testing, current is input through Force High (pad B) and Force Low (pad D), voltage is measured through Sense High (pad A) and Sense Low (pad C), and Force (pad E) and Force (pad F) are left floating. The relationship between the current and voltage terminals before and after high-temperature baking can be used to determine stress changes at the bottom of the through-hole metal Vx. Similarly, by swapping the layout styles of the upper and lower metal layers, the impact of process changes on reliability can be monitored.

[0047] Furthermore, by inserting auxiliary metal strips at S1 and S3, we can obtain Figure 3 , input current through Force High (pad B) and Force Low (pad D), measure voltage through Sense High (pad A) and Sense Low (pad C), leave Force (pad E) and Force (pad F) terminals floating, and use the four-terminal method to implement stress migration testing. Changing the test method can realize dielectric reliability testing between the same layer of metal (Mx or Mx+1): pad A / B / C / D are given the same potential, and the potential size of pad E / pad F depends on the test requirements. By recording the breakdown time between metal and metal, the life of the dielectric between metals can be calculated; similarly, by exchanging the layout styles of the upper and lower metal layers, the impact of process changes on reliability can be monitored. For technology nodes where the direction of metal wiring is restricted by process, the schematic diagram Figure 2 and 3 It can meet the process requirements, design rule requirements, and design target requirements at the same time.

[0048] In one embodiment, the angle between the first direction and the second direction is 90 degrees. Figure 2 and Figure 3 The X direction in the second direction is Figure 2 and Figure 3In the Y direction, various metal strips form a rectangular shape.

[0049] More preferably, the first type of metal strips 101 and the second type of metal strips 102 are respectively arranged in parallel and at equal intervals along the first direction. The third type of metal strips 201 and the fourth type of metal strips 202 are respectively arranged in parallel and at equal intervals along the second direction. The first type of metal strips 101 are arranged in parallel and at equal intervals along the X direction. There is no specific restriction on the length of each first type of metal strip 101, and the ends may not be aligned. Similarly, the arrangement of the second type of metal strips 102, the third type of metal strips 201 and the fourth type of metal strips 202 is similar to the arrangement of the first type of metal strips 101 and will not be repeated here. It should be noted that a certain distance is always maintained between the metal strips on the same layer to avoid overlapping.

[0050] Based on the same technical concept, the present invention also provides a stress migration test method, which uses the reliability test structure as described above. The method includes the following steps:

[0051] S1, setting the first test structure 100 on the first layer and the second test structure 200 on the second layer;

[0052] S2, bake at a predetermined temperature, and provide a test current or voltage at both ends of the chain structure before and after baking, and use the four-terminal method to obtain the stress change at the bottom of the through-hole metal Vx.

[0053] Through the reliability test structure, both the stress migration effect and the reliability of the dielectric between the metal layers in the same layer can be evaluated, thereby improving the wafer area utilization. Compared with the traditional design layout, when the technology nodes are getting smaller and smaller, this new layout design structure can meet both the design rules and the process requirements; at the same time, the new layout design structure can also meet the requirements of large line width processes. Figure 2 and 3 S1~S5, En1, En2, Mx, Mx+1, Vx (number) can be modified according to the design purpose, design requirements, and design rules; the test method changes with the test structure, and the test method is adjusted in time for different test structures. When performing stress migration testing, the structure used is as follows: Figure 2 As shown, the first test structure 100 is set on the first layer and the second test structure 200 is set on the second layer. The first test structure 100 is on the top metal layer Mx+1, and the second test structure 200 is on the bottom metal layer Mx. Current is input through Force High (pad B) and Force Low (pad D), and voltage is measured through Sense High (pad A) and Sense Low (pad C). Before and after high-temperature baking, the stress change at the bottom of the through-hole metal Vx can be obtained through the relationship between the current end and the voltage end.

[0054] Similarly, by swapping the layouts of the upper and lower metal layers, the impact of process changes on reliability can be monitored. Specifically, after executing S2, the first test structure 100 is set on the second layer Mx, and the second test structure 200 is set on the first layer Mx+1. The process in S2 is repeated to monitor the impact of process changes on reliability.

[0055] Based on the same technical concept, the present invention also provides a dielectric reliability testing method, which uses the reliability testing structure described above. The method includes the following steps:

[0056] S1, setting the first test structure 100 on the first layer and the second test structure 200 on the second layer;

[0057] S2: Apply the same potential to both ends of the chain structure, and apply a test potential to the first auxiliary metal strip and the second auxiliary metal strip. By recording the breakdown time between the metals, the life of the intermetallic dielectric is calculated.

[0058] To indicate Figure 3 For example, the first test structure 100 is set on the first layer and the second test structure 200 is set on the second layer. The first test structure 100 is on the top metal layer Mx+1, and the second test structure 200 is on the bottom metal layer Mx. Pads A / B / C / D are given the same potential, and the potential of pad E / pad F depends on the test requirements. By recording the breakdown time between metals, the life of the metal-to-metal dielectric can be calculated; similarly, by swapping the layout of the upper and lower metal layers, the impact of process changes on reliability can be monitored. It can be understood that after executing S2, the first test structure 100 is set on the second layer and the second test structure 200 is set on the first layer, and the process in S2 is repeated to monitor the impact of process changes on reliability. The first test structure 100 is then set on the second layer Mx and the second test structure 200 is set on the first layer Mx+1, and the process in S2 is repeated.

[0059] The present invention provides a reliability test structure, stress migration test method, and dielectric reliability test method. This design structure can not only meet the requirements of SM & IMD reliability testing, but also improve wafer area utilization. By exchanging the layout structures of the upper and lower layers, the impact of process changes on reliability can be monitored. For stress migration (SM) testing, the circuit is a viachain design structure. By supplying current to the chain structure and testing the voltage at both ends, the stress change at the bottom of the through-hole can be monitored. By adjusting the test method to achieve testing of intermetallic dielectrics, dielectric reliability testing can be achieved by providing a plurality of auxiliary metal strips. The auxiliary metal strips are provided with the required potential, and the pads A / B / C / D at both ends of the chain structure are given the same potential. The length, width, spacing and other parameters of the design structure are adjusted according to the design purpose. Compared with the traditional layout design structure, as the technology node becomes smaller and smaller, the new layout design structure can meet both design rules and process requirements. At the same time, the new design layout can also meet the requirements of large line width processes.

[0060] The above description is only a description of the preferred embodiment of the present invention and does not limit the scope of the present invention. Any changes and modifications made by ordinary technicians in the field of the present invention based on the above disclosure are within the scope of protection of the technical solution of the present invention.

Claims

1. A reliability test structure, characterized in that: including a first test structure and a second test structure located on different layers; The first test structure includes a plurality of first-type metal strips and second-type metal strips arranged along a first direction, wherein a predetermined distance exists between the first-type metal strips and corresponding second-type metal strips; The second test structure includes a plurality of third-type metal strips and fourth-type metal strips arranged along a second direction, and the third-type metal strips and the fourth-type metal strips are respectively arranged at both ends of the first-type metal strips, and both ends of any third-type metal strip partially overlap with the corresponding first-type metal strips and second-type metal strips in a direction perpendicular to the metal layer, and both ends of any fourth-type metal strip partially overlap with the corresponding first-type metal strips and second-type metal strips in a direction perpendicular to the metal layer, and through-hole metal connections are provided on the overlapping portions to form a reciprocating chain structure; A first auxiliary metal strip is provided between two adjacent first-category metal strips and between two adjacent second-category metal strips; a second auxiliary metal strip is provided between two adjacent third-category metal strips and between two adjacent fourth-category metal strips.

2. The reliability test structure according to claim 1, characterized in that: The angle between the first direction and the second direction is 90 degrees.

3. The reliability test structure according to claim 1, characterized in that: The first type of metal strips and the second type of metal strips are respectively arranged in parallel and at equal intervals along a first direction.

4. The reliability test structure according to claim 1, wherein: The third type of metal strips and the fourth type of metal strips are respectively arranged in parallel and at equal intervals along the second direction.

5. A stress migration testing method, characterized in that: A reliability test structure as described in any one of claims 1 to 4 is adopted.

6. The stress migration testing method according to claim 5, characterized in that: The following steps are involved: S1, setting the first test structure on the first layer and the second test structure on the second layer; S2, bake at a predetermined temperature, and provide a test current or voltage at both ends of the chain structure before and after baking, and use the four-terminal method to obtain the stress change at the bottom of the through-hole metal.

7. The stress migration testing method according to claim 6, characterized in that: After executing S2, the first test structure is set on the second layer, the second test structure is set on the first layer, and the process in S2 is repeated to monitor the impact of process changes on reliability.

8. A dielectric reliability testing method, characterized in that: A reliability test structure as described in any one of claims 1 to 4 is adopted.

9. The dielectric reliability testing method according to claim 8, characterized in that: The following steps are involved: S1, setting the first test structure on the first layer and the second test structure on the second layer; S2: Apply the same potential to both ends of the chain structure, and apply a test potential to the first auxiliary metal strip and the second auxiliary metal strip. By recording the breakdown time between the metals, the life of the intermetallic dielectric is calculated.

10. The dielectric reliability testing method according to claim 9, characterized in that: After executing S2, the first test structure is set on the second layer, and the second test structure is set on the first layer, and the process in S2 is repeated to monitor the impact of process changes on reliability.

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