Detection circuit and image generation device

Abstract

Provided are a detection circuit and an image generation device capable of generating a detection signal in accordance with a change in scanning speed with high accuracy. A mirror detection circuit (45) (detection circuit) inputs, to a gate of a field effect transistor (301) constituting a source follower circuit, a voltage generated in a monitoring piezoelectric element for monitoring the operating state of a second scanning unit (light deflection element), and generates a detection signal according to the expansion and contraction of the piezoelectric element on the basis of the source voltage of the field effect transistor (301).

Description

Technical Field

[0001] The present disclosure relates to a detection circuit for detecting a driving state of a light deflection element and an image generating device including the detection circuit. Background Art

[0002] Conventionally, an image generation device is known that generates an image by scanning light modulated according to an image signal. In this device, for example, light is scanned horizontally in a first cycle, while light is scanned vertically in a second cycle that is longer than the first cycle, to generate an image corresponding to one frame. The first cycle corresponds to the cycle of one line of the image signal, and the second cycle corresponds to the frame period of the image signal.

[0003] This type of image generation device is described, for example, in Patent Document 1. In this device, light is scanned horizontally and vertically using optical deflection elements driven by piezoelectric actuators. By detecting the driving status of each optical deflection element, a given image can be appropriately displayed. For example, a monitoring piezoelectric element is provided within the optical deflection element to detect the driving status.

[0004] A detection circuit using a piezoelectric element is known, for example, as described in Patent Document 2 below. It is generally known that the magnitude of the current generated by a piezoelectric element is proportional to the speed at which the piezoelectric element expands and contracts. In other words, the current generated by the piezoelectric element is the current obtained by differentiating the expansion and contraction state of the piezoelectric element. Therefore, in this detection circuit, an I / V converter (current / voltage converter) converts the generated current of the piezoelectric element into a voltage, and an integrator integrates the converted voltage to generate a detection signal representing the expansion and contraction state of the piezoelectric element.

[0005] Prior art literature

[0006] Patent Literature

[0007] Patent Document 1: Japanese Patent Application Publication No. 2018-155989

[0008] Patent Document 2: Japanese Patent Application Laid-Open No. 2008-033567 Summary of the Invention

[0009] However, the detection circuit described in Patent Document 2, because it uses an integrator, has difficulty generating high-quality detection signals when the scanning speed of the polarizer changes dramatically. Specifically, the integrator cannot track the change in scanning speed, and the detection signal waveform at the change point is unlikely to have a sharp edge corresponding to the speed change.

[0010] In view of this problem, an object of the present disclosure is to provide a detection circuit and an image generating device capable of generating a detection signal corresponding to a change in scanning speed with high accuracy.

[0011] A first embodiment of the present disclosure relates to a detection circuit for detecting the operating state of a light deflection element. The detection circuit inputs a voltage generated in a monitoring piezoelectric element, which is used to monitor the operating state, to the gate of a field-effect transistor constituting a source-follower circuit. Based on the source voltage of the field-effect transistor, the detection circuit generates a detection signal corresponding to the expansion and contraction of the piezoelectric element.

[0012] In the detection circuit of this embodiment, the voltage of the monitoring piezoelectric element is input to the gate of the field-effect transistor that constitutes the source-follower circuit. This source-follower circuit has a wide input range (bandwidth) and high tracking capability for the input voltage. Therefore, even when the scanning speed of the polarizer changes rapidly, a detection signal can be generated that accurately tracks the change in scanning speed. Therefore, a detection signal corresponding to the change in scanning speed can be generated with high precision.

[0013] A second aspect of the present disclosure relates to an image generating device. The image generating device includes: the detection circuit according to the first aspect; the light deflection element provided with the monitoring piezoelectric element; and a control unit configured to control the operation of the light deflection element based on the detection signal from the detection circuit.

[0014] The image generation device according to this embodiment includes the detection circuit according to the first embodiment, and thus can accurately detect the operating state of the light deflection element, that is, the light scanning position. This allows the light scanning position to be smoothly and accurately controlled using the detection signal from the detection circuit.

[0015] As described above, according to the detection circuit and the image generation device of the present disclosure, it is possible to provide a detection circuit and an image generation device capable of generating a detection signal corresponding to a change in scanning speed with high accuracy.

[0016] The effects and significance of the present disclosure will become more apparent through the description of the following embodiments. However, the following embodiments are merely examples of how the present disclosure can be implemented, and the present disclosure is not limited to the contents described in the following embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 It is a perspective view schematically showing the structure of AR glasses (Augmented Reality glasses) according to the embodiment.

[0018] Figure 2 It is a diagram schematically showing the configuration of a projection unit according to an embodiment.

[0019] Figure 3 This is a block diagram showing the configuration of a circuit unit of an image generating device according to an embodiment.

[0020] Figure 4 It is a plan view showing the structure of the second scanning unit according to the embodiment.

[0021] Figure 5 : is a circuit diagram showing the configuration of a mirror position detection circuit according to a comparative example.

[0022] Figure 6 Graphs showing simulation results of a detection signal (integrated output) output from an integrator according to a comparative example.

[0023] Figure 7 This is a circuit diagram showing the configuration of a reflective mirror detection circuit according to the first embodiment.

[0024] Figure 8 This is a diagram showing the embodiment 1 involved in Figure 7 Graph showing simulation results of the signals (voltages) generated at positions (A) to (D).

[0025] Figure 9A The basis involved in Example 1 Figure 8 The simulation results show the monitor voltage and SF output (source follower output) graphs extracted within a given time range.

[0026] Figure 9B The basis involved in Example 1 Figure 8 The monitor voltage and clamp output graphs are extracted within a given time range based on the simulation results.

[0027] Figure 10 The basis involved in Example 1 Figure 8 The graphs of the monitoring voltage and detection signal are extracted within a given time range based on the simulation results.

[0028] Figure 11 : is a circuit diagram showing the configuration of the reflective mirror detection circuit 45 according to the second embodiment.

[0029] Figure 12 This is a diagram showing simulation results related to the output of the high-pass filter according to the second embodiment.

[0030] Figure 13A Graphs showing simulation results of the monitor voltage and SF output according to the second embodiment.

[0031] Figure 13BGraphs showing simulation results of the monitor voltage and clamp output according to the second embodiment.

[0032] Figure 14 Graphs showing simulation results of the monitor voltage and the detection signal according to the second embodiment.

[0033] Figure 15 This is a diagram showing simulation results of voltages output from a field effect transistor (source follower circuit) when two types of monitor voltages having different DC components are input to the gate of the field effect transistor in the configuration of Example 1.

[0034] Figure 16 This is a diagram showing the second embodiment of the present invention. Figure 15 When two types of monitoring voltages are output from the piezoelectric element as shown, Figure 11 A graph showing simulation results of the voltages generated at various positions.

[0035] Figure 17A This is a diagram showing a gain characteristic graph (Bode plot) of the mirror detection circuit according to Example 2.

[0036] Figure 17B This is a diagram showing a graph (Bode plot) indicating the phase characteristics of the mirror detection circuit according to the second embodiment. DETAILED DESCRIPTION

[0037] Hereinafter, embodiments of the present disclosure will be described with reference to the accompanying drawings.

[0038] The following embodiments illustrate an example of applying the technology of this disclosure to an image generation device for AR glasses (Augmented Reality glasses). However, the following embodiment is merely one embodiment of the present disclosure, and the technology of this disclosure is not limited to the following embodiments. For example, the present invention is not limited to image generation devices for AR glasses and can also be applied to image generation devices for AR (Augmented Reality) goggles, VR (Augmented Reality) glasses, VR (Virtual Reality) goggles, and in-vehicle head-up displays.

[0039] Figure 1 It is a perspective view schematically showing the structure of the AR glasses 1 .

[0040] exist Figure 1 In FIG, the X-axis, Y-axis, and Z-axis, which are perpendicular to each other, are indicated along with the front, back, left, right, and top and bottom directions of the AR glasses 1. The positive directions of the X-axis, Y-axis, and Z-axis correspond to the right, back, and top directions of the AR glasses 1, respectively.

[0041] AR glasses 1 include a frame 2 and a pair of image generation devices 3. The pair of image generation devices 3 are symmetrical with respect to a YZ plane passing through the center of the AR glasses 1. The image generation devices 3 include a projection unit 4, a half mirror 5, and a detection unit 6. Like conventional glasses, the AR glasses 1 are worn on the user's head.

[0042] The frame 2 consists of a front portion 2a and a pair of support portions 2b. The support portions 2b extend rearward from the right and left ends of the front portion 2a, respectively. When the frame 2 is worn by a user, the front portion 2a is positioned in front of the user's eyes E. The front portion 2a is made of a transparent material (e.g., resin).

[0043] The projection unit 4 is provided on the inner surface of the support unit 2 b and projects light modulated by an image signal onto the corresponding half mirror 5 .

[0044] The half mirror 5 is provided on the inner side of the front portion 2a. The half mirror 5 reflects the light projected from the corresponding projection unit 4 toward the user's eye E and transmits the light traveling in the front-back direction. The light from the projection unit 4 reflected by the half mirror 5 is irradiated onto the fovea located at the center of the retina in the eye E. Thus, the user can visually grasp the frame image 20 (see FIG. 1 ) generated by the image generating device 3. Figure 2 In addition, since the user can observe the front of the AR glasses 1 through the half mirror 5 , the user can visually grasp the state of the front of the AR glasses 1 by overlapping the frame image 20 generated by the image generating device 3 .

[0045] A pair of detection units 6 are provided on the inner side of the front portion 2a and are positioned between the pair of half mirrors 5. The detection units 6 are used to detect the user's line of sight. Figure 3 Provide explanation.

[0046] Figure 2 It is a diagram schematically showing the structure of the projection unit 4.

[0047] The projection unit 4 includes light sources 11 a , 11 b , and 11 c , collimating lenses 12 a , 12 b , and 12 c , apertures 13 a , 13 b , and 13 c , a reflecting mirror 14 a , dichroic mirrors 14 b and 14 c , a first scanning unit 15 , a relay optical system 16 , and a second scanning unit 17 .

[0048] Light sources 11a, 11b, and 11c are, for example, semiconductor lasers. Light source 11a emits red laser light having a wavelength within the range of 635 nm to 645 nm, light source 11b emits green laser light having a wavelength within the range of 510 nm to 530 nm, and light source 11c emits blue laser light having a wavelength within the range of 440 nm to 460 nm.

[0049] In this embodiment, since a color image is generated as a frame image 20 (described later), the projection unit 4 includes light sources 11a, 11b, and 11c capable of emitting red, green, and blue laser light, respectively. To display a monochrome image as the frame image 20, the projection unit 4 may include only a single light source corresponding to the image color. Alternatively, the projection unit 4 may include two light sources emitting light of different wavelengths.

[0050] The light emitted from the light sources 11a, 11b, and 11c is converted into parallel light by the collimating lenses 12a, 12b, and 12c, respectively. The light transmitted through the collimating lenses 12a, 12b, and 12c is shaped into substantially circular beams by the apertures 13a, 13b, and 13c, respectively.

[0051] The reflector 14a substantially totally reflects the red light that has passed through the aperture 13a. The dichroic mirror 14b reflects the green light that has passed through the aperture 13b and transmits the red light reflected by the reflector 14a. The dichroic mirror 14c reflects the blue light that has passed through the aperture 13c and transmits the red and green light that have passed through the dichroic mirror 14b. The reflector 14a and the two dichroic mirrors 14b and 14c are arranged so that the optical axes of the light of each color emitted from the light sources 11a, 11b, and 11c are aligned.

[0052] The first scanning unit 15 reflects the light that has passed through the dichroic mirror 14c. The first scanning unit 15 is, for example, a MEMS (Micro Electro Mechanical System) mirror. The first scanning unit 15 has a structure that causes the first reflector M1, on which the light that has passed through the dichroic mirror 14c is incident, to rotate about a rotation axis R1 parallel to the Z-axis in response to a drive signal. The rotation of the first reflector M1 changes the direction of light reflection. Consequently, the light reflected by the first reflector M1 scans the retina of the eye E along the X-axis (horizontal direction).

[0053] The relay optical system 16 directs the light reflected by the first scanning unit 15 toward the center of the second reflector M2 of the second scanning unit 17. That is, the light incident on the first scanning unit 15 is swung at a predetermined swing angle by the first reflector M1. The relay optical system 16 directs the light at each swing angle toward the center of the second reflector M2. The relay optical system 16 includes a plurality of reflectors, and the light reflected by the first scanning unit 15 is reflected by the plurality of reflectors and directed toward the second scanning unit 17. This allows for a longer optical path length within the relay optical system 16, and suppresses the swing angle of the light when viewed from the second reflector M2.

[0054] The second scanning unit 17 reflects the light that has passed through the relay optical system 16. The second scanning unit 17 is a MEMS mirror. The second scanning unit 17 rotates the second mirror M2, on which the light that has passed through the relay optical system 16 is incident, about a rotation axis R2 parallel to the XY plane, in response to a drive signal. The rotation of the second mirror M2 changes the direction of light reflection. As a result, the light scanned along the X-axis (horizontal direction) by the first scanning unit 15 also scans the retina of the eye E along the Z-axis (vertical direction).

[0055] The structure of the second scanning unit 17 will be described later. Figure 4 Provide explanation.

[0056] The light reflected by the second scanning unit 17, that is, the light emitted from the projection unit 4, is reflected by the half mirror 5, forming a frame image 20 on the retina of the eye E. Specifically, the light modulated according to the image signal (the light emitted from the light sources 11a to 11c) is scanned in the horizontal direction (X-axis direction) and the vertical direction (Z-axis direction) by the first scanning unit 15 and the second scanning unit 17, thereby forming a frame image 20 corresponding to one frame on the retina of the eye E.

[0057] Figure 3 It is a block diagram showing the configuration of the circuit unit of the image generating device 3 .

[0058] The detection unit 6 includes a light source 61 and an imaging element 62, and is connected to the control unit 41 of the projection unit 4. The light source 61 is, for example, an LED (Light Emitting Diode) that emits infrared wavelength light. The imaging element 62 is, for example, a CMOS (Complementary Metal Oxide Semiconductor) image sensor or a CCD (Charge Coupled Device) image sensor. The light source 61 irradiates light toward the user's eye E in response to instructions from the control unit 41. The imaging element 62 captures the user's eye E in response to instructions from the control unit 41 and outputs the captured image to the control unit 41.

[0059] The projection unit 4 includes a control unit 41 , a first mirror driving circuit 42 , a second mirror driving circuit 43 , a laser driving circuit 44 , and a mirror detection circuit 45 .

[0060] The control unit 41 includes a processing unit such as a CPU (Central Processing Unit) or an FPGA (Field Programmable Gate Array), as well as memory. The control unit 41 processes image signals from external devices and controls various components of the projection unit 4. Furthermore, the control unit 41 detects the user's line of sight based on captured images from the detection unit 6 using, for example, the dark pupil method, the bright pupil method, or the corneal reflection method. Based on the detected line of sight, the control unit 41 obtains the viewpoint position in the frame image 20 formed on the user's retina.

[0061] The first mirror driving circuit 42 drives the first mirror M1 of the first scanning unit 15 based on a driving signal from the control unit 41 . The second mirror driving circuit 43 drives the second mirror M2 of the second scanning unit 17 based on a driving signal from the control unit 41 .

[0062] The mirror detection circuit 45 outputs a detection signal corresponding to the driving state of the second mirror M2 in the second scanning unit 17, that is, the scanning position of the light in the vertical direction (Z-axis direction) to the control unit 41. Figure 7 as well as Figure 11 Provide explanation.

[0063] Based on the detection signal from the reflector detection circuit 45, the control unit 41 outputs a drive signal to the second reflector drive circuit 43, causing the second reflector M2 to rotate in the vertical direction (Z-axis direction) using a desired drive waveform. Furthermore, based on the user's line of sight detected by the detection unit 6 and the detection signal from the reflector detection circuit 45, the control unit 41 controls the second reflector drive circuit 43 so that the frame image 20 is drawn at the position of the line of sight.

[0064] The image generating device 3 may also include a detection circuit for detecting the driving state of the first reflector M1 in the first scanning unit 15, that is, the scanning position of light in the horizontal direction (X-axis direction). In this case, the control unit 41 controls the first reflector driving circuit 42 based on the detection signal from the detection circuit so that the first reflector M1 rotates in the horizontal direction (X-axis direction) according to a desired driving waveform.

[0065] Figure 4 It is a plan view showing the structure of the second scanning unit 17 .

[0066] like Figure 4 As shown, in this embodiment, the second scanning unit 17 is composed of a zigzag MEMS mirror (light deflection element). However, the second scanning unit 17 is not limited to a zigzag MEMS mirror and may be a light deflection element of another structure.

[0067] The second scanning unit 17 includes a support unit 101, a pair of driving units 102, and a movable unit 103. The support unit 101 is a frame-shaped member of a predetermined thickness, and is formed of, for example, a silicon substrate. The support unit 101 has a rectangular outline in a plan view.

[0068] The drive unit 102 includes a substrate 110 connected to the support unit 101 at one end and to the movable unit 103 at the other end, and four piezoelectric actuators 111 formed on the upper surface of the substrate 110. The substrate 110 has a zigzag shape that meanders in a direction perpendicular to the rotation axis R2. The thickness of the substrate 110 is constant. The substrate 110 is integrally formed with the support unit 101 using the same material.

[0069] The four piezoelectric actuators 111 are respectively arranged on the upper surface of four regions 110a of the substrate 110 extending in a direction perpendicular to the rotation axis R2. The piezoelectric actuators 111 have a structure in which a piezoelectric body of a constant thickness is sandwiched between an upper electrode and a lower electrode.

[0070] The piezoelectric element is formed, for example, from PZT (lead zirconate titanate). The upper and lower electrodes are formed, for example, from platinum. Applying a voltage (driving signal) between the upper and lower electrodes causes the piezoelectric actuator 111 (piezoelectric element) to expand and contract. This causes the substrate 110 to bend, generating a driving force for driving the movable portion 103.

[0071] The movable portion 103 is supported by a pair of driving portions 102. The movable portion 103 is formed integrally with the substrate 110 and the supporting portion 101 using the same material as the substrate 110 of the driving portion 102. When viewed from above, the movable portion 103 is circular. The shape of the movable portion 103 may also be other shapes such as a square. The thickness of the movable portion 103 is the same as that of the substrate 110. Ribs for suppressing warping of the movable portion 103 may also be formed on the back surface of the movable portion 103. The above-mentioned second reflector M2 is formed on the upper surface of the movable portion 103. In the case where the reflectivity of the upper surface of the movable portion 103 is high, the upper surface of the movable portion 103 may also serve as the second reflector M2.

[0072] When driving voltages of the same phase are applied to the odd-numbered piezoelectric actuators 111 from the movable portion 103, the piezoelectric elements of these piezoelectric actuators 111 deform, causing the odd-numbered substrates 110 (regions 110a) to flex and vibrate. At this time, driving voltages of opposite phase to the driving voltage applied to the odd-numbered piezoelectric actuators 111 are applied to the even-numbered piezoelectric actuators 111 from the movable portion 103. This causes the piezoelectric elements within the piezoelectric actuators 111 to deform, causing the even-numbered substrates 110 (regions 110a) to flex and deform. This deformation of each substrate 110 causes the movable portion 103 to rotate about the rotation axis R2.

[0073] Furthermore, a monitoring piezoelectric element 112 is disposed on the upper surface of the portion of the substrate 110 of each driving unit 102 connected to the support unit 101. Like the piezoelectric actuator 111, the piezoelectric element 112 has a structure in which a piezoelectric body is sandwiched between upper and lower electrodes.

[0074] Figure 3 The mirror detection circuit 45 shown outputs detection signals corresponding to the deformation of the two piezoelectric elements 112 .

[0075] Here, when the piezoelectric actuator 111 is driven to rotate the movable portion 103 and the second reflector M2, and the piezoelectric element 112 is deformed accordingly, a charge corresponding to this deformation is generated in the piezoelectric element 112 due to the piezoelectric effect. As described above, since the piezoelectric element 112 is a structure in which a piezoelectric body of fixed thickness is sandwiched between an upper electrode and a lower electrode, it is equivalent to a capacitor having the piezoelectric body as a capacitance component. Therefore, if the electrostatic capacitance of this capacitor is represented by Cd and the amount of charge generated by the deformation is represented by Q, then the following voltage V is generated in the piezoelectric element 112 due to the deformation corresponding to the rotation of the second reflector M2.

[0076] V=Q / Cd …(1)

[0077] That is, the voltage V becomes a value corresponding to the deformation of the piezoelectric element 112, that is, a value corresponding to the rotation of the second reflector M2. In this embodiment, based on the voltage V of formula (1), a detection signal corresponding to the driving state of the second scanning unit 17 (light deflection element) is directly generated in the reflector detection circuit 45. Regarding this situation, refer to Figure 7 as well as Figure 11 Provide explanation.

[0078] Furthermore, when the piezoelectric element 112 deforms, it generates a current corresponding to the deformation. Generally, it is known that the magnitude of the current generated by the piezoelectric element 112 is proportional to the speed at which the piezoelectric element 112 expands and contracts. In other words, the current generated by the piezoelectric element 112 is the current obtained by differentiating the expansion and contraction state of the piezoelectric element 112. Therefore, by integrating this generated current, it is also possible to obtain a detection signal indicating the rotational position of the second reflector M2, that is, the scanning position of the light in the vertical direction. In the comparative example shown below, a detection signal is generated using this method.

[0079] Figure 5 : is a circuit diagram showing the configuration of a mirror detection circuit 45 a according to a comparative example.

[0080] The mirror detection circuit 45 a according to the comparative example includes an I / V converter (current / voltage converter) 210 and an integrator 220 .

[0081] I / V converter 210 includes an operational amplifier 211, a capacitor 212, and a resistor 213. The monitoring current of piezoelectric element 112 is input to the negative input terminal of operational amplifier 211. Capacitor 212 and resistor 213 are connected in parallel between this input terminal and the output terminal of operational amplifier 211. The output of operational amplifier 211 is fed back to the input. Consequently, operational amplifier 211 outputs a voltage corresponding to the magnitude of the input monitoring current.

[0082] Integrator 220 includes an operational amplifier 221, a capacitor 222, and resistors 223 and 224. The output voltage of I / V converter 210 is input to the negative input terminal of operational amplifier 221 via resistor 224. Capacitor 222 and resistor 223 are connected in parallel between this input terminal and the output terminal of operational amplifier 221, and the output of operational amplifier 221 is fed back to the input. Charge is accumulated in capacitor 222 for integration. The gain of integrator 220 is determined by resistors 223 and 224. Thus, the voltage obtained by integrating the output voltage from I / V converter 210 is output from operational amplifier 221 as a detection signal.

[0083] exist Figure 5 In the configuration of the comparative example shown, a certain amount of time is required for the integrated value of integrator 220 to settle. Therefore, as described above, when the drawing position changes due to a change in the user's line of sight, a certain amount of time is required from the change in the drawing position to the settling of the integrated value of integrator 220, making it difficult to obtain an appropriate detection signal during this period.

[0084] Furthermore, the use of integrator 220 in the comparative example makes it difficult to generate a high-quality detection signal when the scanning speed of the second scanning unit 17 (polarizer) changes dramatically. Specifically, integrator 220 cannot track the change in scanning speed, and the detection signal waveform at the change point is unlikely to have a sharp edge corresponding to the speed change.

[0085] Figure 6 : is a graph showing simulation results of the detection signal (integrated output) output from the integrator 220 in the configuration of the comparative example.

[0086] exist Figure 6 , the detection signal (integrated output) output from the integrator 220 when the piezoelectric actuator 111 is driven by the driving signal indicated by the dotted line is shown. Figure 6 In the case of a driving signal of Figure 6 Inverted driving signal. Figure 6 The graph shows the detection signal (integrated output) obtained based on the current from one piezoelectric element 112. The horizontal axis represents time, and the vertical axis represents voltage. Both the vertical and horizontal axes are normalized. The peak near the center of the detection signal (integrated output) is shown as an enlarged image at the top of the graph.

[0087] like Figure 6 As shown, the detection signal (integrated output) output from integrator 220 bends at a timing slightly offset from the drive signal. Furthermore, the detection signal at the location enclosed by the dotted circle does not have the sharp edges of the drive signal near this timing, but instead exhibits a rounded, smooth bend. Thus, in the comparative example configuration, the use of integrator 220 makes it difficult for the detection signal waveform at the point of change in scanning speed to accurately reproduce the actual operating state of the second scanning unit 17 (light deflection element). Consequently, a high-quality detection signal cannot be obtained, resulting in reduced image rendering accuracy.

[0088] Therefore, in this embodiment, as described above, a detection signal is generated by directly using the voltage generated by the deformation of the piezoelectric element 112. This configuration will be described below.

[0089] <Example 1>

[0090] Figure 7 : is a circuit diagram showing the configuration of the reflective mirror detection circuit 45 according to the first embodiment.

[0091] exist Figure 7 In the figure, V+ represents the positive power supply voltage, and V- represents the negative power supply voltage. The absolute value of V+ is equal to the absolute value of V-. Figure 7 (A) to (D) indicate positions on the circuit.

[0092] The mirror detection circuit 45 includes a field effect transistor 301 (hereinafter referred to as “FET 301 ”), a resistor 302 , a high-pass filter 303 , a clamp circuit 304 , an amplifier circuit 305 , a low-pass filter 306 , and a high-pass filter 307 .

[0093] The voltage generated by the piezoelectric element 112 is input to the gate of the high-impedance FET 301. The FET 301 and the resistor 302 together form a source follower circuit. Figure 7 The voltage at position (B) (source voltage) changes according to the change in the voltage at position (A), that is, the voltage (monitor voltage) generated in the piezoelectric element 112 .

[0094] High-pass filter 303 includes capacitor 303a and resistor 304b. High-pass filter 303 removes the DC component from the source voltage at position (B). High-pass filter 303 is configured to maintain sensitivity to voltages in the low-frequency band, in addition to the DC component. For example, high-pass filter 303 can have relatively high sensitivity to voltages of around several Hz.

[0095] The clamp circuit 304 includes two resistors 304 a and 304 b . Here, one resistor 304 b is used as a common resistor for constituting the high-pass filter 303 .

[0096] The clamp circuit 304 sets a reference level (clamp level) for the source voltage whose DC component has been removed by the high-pass filter 303. The reference level is determined by the resistance ratio of the two resistors 304a and 304b. Figure 7 In the configuration, when the resistance ratio is 1:1, the reference level is 0 V. When the reference level is Vm other than 0 V, the clamp circuit 304 offsets the source voltage, from which the DC component has been removed by the high-pass filter 303, by Vm. The reference level is set based on the processing range of the subsequent circuitry that processes the detection signal (e.g., the analog-to-digital converter of the control unit 41).

[0097] The amplifier circuit 305 amplifies the voltage at the position (C) adjusted by the clamp circuit 304 and outputs a detection signal. The amplifier circuit 305, together with the resistors 306a and 307a, constitutes a non-inverting amplifier circuit.

[0098] Resistor 306a and capacitor 306b are connected in parallel to form low-pass filter 306. As described above, resistor 306a is used as a common resistor on the amplifier circuit 305 side. Resistor 307a and capacitor 307b are connected in series to form high-pass filter 307. As described above, resistor 307a is used as a common resistor on the amplifier circuit 305 side. Low-pass filter 306 and high-pass filter 307 form band-pass filter 310, which removes components in an unnecessary frequency band from the source voltage at position (C). Low-pass filter 306 sets the high-frequency side boundary of band-pass filter 310, and high-pass filter 307 sets the low-frequency side boundary of band-pass filter 310.

[0099] exist Figure 7 In this configuration, a source voltage corresponding to the voltage of piezoelectric element 112 is generated at position (B). At this point, a level shift occurs in the source voltage corresponding to the temperature characteristics of FET 301. High-pass filter 303 removes the DC component corresponding to this level shift from the source voltage, suppressing the level shift. This results in a source voltage with the level shift eliminated. This level-shifted source voltage is then level-adjusted by clamp circuit 304. This results in a source voltage at position (C).

[0100] After that, the source voltage is amplified and bandwidth-limited by the amplifier circuit 305 and the bandpass filter 310. In this way, a detection signal of the position (D) is obtained. The detection signal is output to the control unit 41 on the subsequent stage (refer to Figure 3 ) for processing.

[0101] Figure 8 It is shown in Figure 7 Graph showing simulation results of the signals (voltages) generated at positions (A) to (D).

[0102] In this simulation, it is assumed that Figure 6 In the case of the same driving signal and the driving signal inverse to the driving signal are applied to the corresponding piezoelectric actuator 111 to drive the second scanning unit 17 (light deflection element). In addition, it is assumed that the voltage from one of the two piezoelectric elements 112 for monitoring is input to Figure 7 The reflector detection circuit 45. Figure 8 In the figure, the horizontal axis is time and the vertical axis is voltage. The vertical and horizontal axes are standardized.

[0103] Figure 8 The monitoring voltage, SF output (source follower output), clamp output and detection signal are Figure 7 Here, the reference level (clamp level) of the clamp circuit 304 is set to 0V.

[0104] from Figure 8 It can be seen that there is essentially no phase shift between the voltages at positions (A) through (D). Furthermore, the voltage at position (B) (SF output) is shifted toward the negative side relative to the voltage at position (A) (monitor voltage). However, the voltage at position (C) (clamp output) cancels this shift and fluctuates around 0V. This is due to the effects of high-pass filter 303 and clamp circuit 304, as described above. The voltage at position (D) (detection signal) is the voltage at position (C) (clamp) amplified by a given factor.

[0105] Figure 9A is based on Figure 8 Based on the simulation results, graphs are created showing the voltage (monitor voltage) at position (A) and the voltage (SF output) at position (B) within a given time range. The horizontal and vertical axes of the graph are normalized. The left vertical axis represents the voltage (monitor voltage) at position (A), while the right vertical axis represents the voltage (SF output) at position (B). The horizontal axis is normalized for the time range.

[0106] Reference Figure 9A , the voltage (SF output) at position (B) enclosed by the dotted circle has a waveform with a defined edge, similar to the voltage (monitor voltage) at position (A) at the same timing. This demonstrates that FET 301, which constitutes the source follower circuit, accurately follows the monitor voltage input to the gate and outputs an SF output (source voltage) that corresponds to the monitor voltage.

[0107] Figure 9B is based on Figure 8 The voltage at position (A) (monitoring voltage) and the voltage at position (C) (clamp output) are extracted from the simulation results within a given time range. The time range of the extracted object is the same as Figure 9A The horizontal and vertical axes of the graph are normalized. Figure 9A The same is true for . The vertical axis on the right is the axis of voltage (clamp output) for position (C).

[0108] Reference Figure 9B , the voltage at the position (C) surrounded by the dotted circle (clamped output) is Figure 9A Similarly, the SF output has a waveform with a defined edge. Furthermore, the voltage at position (C) (clamp output) varies with respect to the base clamp level of 0V set by clamp circuit 304. This shows that the high-pass filter 303 and clamp circuit 304, located just after FET 301, maintain the tracking of the source voltage of FET 301 while simultaneously suppressing the DC level of the source voltage and setting the clamp level.

[0109] Figure 10 is based on Figure 8 The simulation results show that the voltage (monitoring voltage) at position (A) and the voltage (detection signal) at position (D) are extracted within a given time range. The time range of the extracted object is the same as Figure 9A The horizontal and vertical axes of the graph are normalized. Figure 9A The same is true for . The vertical axis on the right is the axis of voltage (detection signal) for position (D).

[0110] Reference Figure 10 , the voltage (detection signal) at the position (D) surrounded by the dotted circle is Figure 9A The SF output is similar to the waveform with a shaped edge. In addition, the voltage (detection signal) at position (D) is Figure 9B This shows that the amplifier circuit 305 and the bandpass filter 310 located after the clamp circuit 304 maintain the tracking performance of the source voltage of the FET 301 while amplifying the source voltage.

[0111] As above, according to Figure 7 The mirror detection circuit 45 of the first embodiment shown can generate a detection signal that accurately follows the voltage generated in the monitoring piezoelectric element 112. Therefore, even in situations where the scanning speed of the second scanning unit 17 (polarizer) changes dramatically, a detection signal can be generated that accurately follows the change in scanning speed.

[0112] <Example 2>

[0113] Figure 11 This is a diagram showing the configuration of the mirror detection circuit 45 according to the second embodiment.

[0114] In the second embodiment, a high-pass filter 308 is provided before the FET 301. Figure 7 The structure of the embodiment 1 shown is the same.

[0115] High-pass filter 308 is formed by arranging resistor 308a in parallel with piezoelectric element 112. Here, the capacitance component of the piezoelectric body of piezoelectric element 112 constitutes the capacitance of high-pass filter 308. If a DC component is superimposed on the monitoring voltage from piezoelectric element 112, high-pass filter 308 removes the DC component from the monitoring voltage.

[0116] Due to the characteristics of piezoelectric materials, the monitoring voltage from piezoelectric element 112 may contain a DC component. Therefore, in addition to the voltage corresponding to the expansion and contraction of the piezoelectric material, this DC component may also be superimposed on the monitoring voltage. This DC component is, for example, due to the pyroelectric effect of the piezoelectric material. Specifically, depending on the ambient temperature of piezoelectric element 112, the DC component may be superimposed on the monitoring voltage.

[0117] High-pass filter 308 is used to remove the DC component from the monitored voltage. High-pass filter 308 is configured to remove the DC component while maintaining sensitivity to voltages in the low-frequency band other than the DC component. For example, high-pass filter 308 can have relatively high sensitivity to voltages of around a few Hz.

[0118] Figure 12 3 is a diagram showing simulation results related to the output of the high-pass filter 308 .

[0119] exist Figure 12 In the figure, the horizontal axis is time and the vertical axis is voltage. The vertical and horizontal axes are standardized. Figure 12 In the example, the monitoring voltage from the piezoelectric element 112, i.e. Figure 11 The voltage at position (A) is shown by a dotted line. Here, a DC component of about -2V is added to the monitoring voltage. This DC component is removed by the high-pass filter 308, resulting in a voltage shown by a solid line (HPF output). This voltage is Figure 11 The voltage corresponds to the position (E).

[0120] Figures 13A to 14 It shows the Figure 11 A diagram showing simulation results of the structure of Example 2. Figure 13A Graphs showing simulation results of the monitor voltage and SF output according to the second embodiment. Figure 13B Graphs showing simulation results of the monitor voltage and clamp output according to the second embodiment. Figure 14 Graphs showing simulation results of the monitor voltage and the detection signal according to the second embodiment.

[0121] Figures 13A to 14 The simulation results are as follows Figure 12 The HPF output is input to the gate of FET301 and Figures 9A to 10 The simulation results are the same. Figure 13A Simulation and Figure 9A The simulation corresponds to Figure 13B Simulation and Figure 9B The simulation corresponds to Figure 14 Simulation and Figure 10 The simulation corresponds to .

[0122] According to these simulation results, there is no substantial phase difference between the monitoring voltage and the voltages at each location (SF output, clamp output, detection signal). In addition, the voltages in the areas enclosed by the dotted circles (SF output, clamp output, detection signal) have waveforms with shaped edges, similar to those in Example 1. Therefore, according to Figure 11 The mirror detection circuit 45 of the second embodiment shown can also generate a detection signal that accurately follows the voltage generated in the monitoring piezoelectric element 112. Therefore, even in situations where the scanning speed of the second scanning unit 17 (polarizer) changes rapidly, a detection signal can be generated that accurately follows the change in scanning speed.

[0123] In addition, according to the structure of Example 2, since the DC component of the monitoring voltage is removed by the high-pass filter 308 arranged in the front stage of FET301, even if a DC component is superimposed on the monitoring voltage due to the inherent characteristics of the piezoelectric body built into the piezoelectric element 112, that is, the above-mentioned thermoelectric effect, a high-quality detection signal can be generated.

[0124] Figure 15 This figure shows simulation results of the voltage (source voltage) output from the FET 301 (source follower circuit) when two types of monitor voltages (1) and (2) having different DC components are input to the gate of the FET 301 in the configuration of the first embodiment in which the high-pass filter 308 is not configured.

[0125] exist Figure 15 In the example, SF output (1) is the output voltage (source voltage) of FET 301 when monitor voltage (1) is input to the gate of FET 301. SF output (2) is the output voltage (source voltage) of FET 301 when monitor voltage (2) is input to the gate of FET 301. The waveforms of monitor voltages (1) and (2) are the same. The only difference between monitor voltages (1) and (2) is the DC component superimposed. That is, monitor voltage (2) has a DC component that is larger in the negative direction than monitor voltage (1).

[0126] Reference Figure 15 , SF output (2) is smaller than SF output (1). This is because the monitoring voltage (2) is out of the input range of FET301, that is, the voltage range of the input that can maintain linearity between input and output. When the monitoring voltage is completely out of the input range of FET301, FET301 cannot function as a source follower circuit. In this case, the voltage that changes according to the monitoring voltage will not be output from FET301.

[0127] Thus, in the configuration of Example 1, if a large DC component is superimposed on the monitoring voltage from the piezoelectric element 112, the source voltage may not be properly output from the FET 301. In contrast, in the configuration of Example 2, since the DC component is removed from the monitoring voltage by the high-pass filter 308, even if a large DC component is superimposed on the monitoring voltage from the piezoelectric element 112, the monitoring voltage input to the gate of the FET 301 remains within the input range of the FET 301. Therefore, even in such a situation, a high-quality detection signal can be generated.

[0128] Figure 16 The output from the piezoelectric element 112 is Figure 15 In the case of two types of monitoring voltages (1) and (2) as shown, Figure 11 Graph of simulation results of voltages generated at positions (A) to (C) and (E).

[0129] In this simulation result, the waveforms of the HPF outputs (1) and (2) overlap, the waveforms of the SF outputs (1) and (2) overlap, and the waveforms of the clamp outputs (1) and (2) overlap. Therefore, the overlapping waveforms are represented by the same type of line.

[0130] The monitoring voltages (1) and (2) are the voltages at position (A). The HPF outputs (1) and (2) are the voltages at position (E). The SF outputs (1) and (2) are the voltages at position (B). The clamp outputs (1) and (2) are the voltages at position (C). Figure 8 In the same case, it is the voltage obtained by amplifying the clamp outputs (1) and (2), so it is omitted from the simulation results.

[0131] Both the monitoring voltages (1) and (2) are shifted toward the HPF outputs (1) and (2) based on 0V. This is because the DC components of the monitoring voltages (1) and (2) are removed by the high-pass filter 308. Therefore, the waveforms of the HPF outputs (1) and (2) overlap with each other as waveforms based on 0V. The SF outputs (1) and (2), which are source follower outputs of these HPF outputs (1) and (2), are slightly shifted from zero level to the positive direction. This is because the DC component is superimposed on the SF outputs (1) and (2) due to the temperature characteristics of the FET 301.

[0132] Furthermore, the amplitudes of the SF outputs (1) and (2) are slightly smaller than those of the HPF outputs (1) and (2). This is because the high-pass filter 308 is placed before the FET 301 that constitutes the source follower circuit, which slightly reduces the gain of the source follower circuit.

[0133] The clamp outputs (1) and (2) at position (C) have waveforms that change with respect to 0 V. This is because the DC components of the SF outputs (1) and (2) are removed by the high-pass filter 303 after the FET 301, and the voltage after the DC component removal is clamped with respect to 0 V by the clamp circuit 304.

[0134] Afterwards, the clamp outputs (1) and (2) are amplified and bandwidth-limited by the amplifier circuit 305 and the bandpass filter 310. This generates a detection signal that is within the target bandwidth.

[0135] As above, according to Figure 11 The structure of the embodiment 2 shown in FIG. Figure 16 In the case where the voltage level of the monitoring voltage (2) shown in the figure is outside the input range of FET 301, or in the case where the voltage level of the monitoring voltage is completely outside the input range of FET 301, the DC component is removed by the high-pass filter 308 in the preceding stage of FET 301, so that the monitoring voltage can be more easily converged to the input range of FET 301. Therefore, even if a large DC component is superimposed on the monitoring voltage due to the inherent characteristics of the piezoelectric element 112, a high-quality detection signal can be generated.

[0136] Furthermore, regardless of any DC component superimposed on the monitoring voltage, high-pass filter 308 uniformly corrects the voltage to a monitoring voltage with 0 V as the reference. Therefore, the circuitry (including control unit 41) downstream of high-pass filter 308 can be designed without taking into account the DC component superimposed due to the inherent characteristics of piezoelectric element 112. Consequently, the circuitry and processing of image generation device 3 can be simplified.

[0137] Further, in Figure 11 In the illustrated configuration, the piezoelectric element 112 is regarded as a capacitor, and only the resistor 308a is added to form the high-pass filter 308. Therefore, the configuration of the mirror detection circuit 45 can be simplified.

[0138] Finally, the gain characteristics and phase characteristics in the configuration of Example 2 are described.

[0139] Figure 17A This is a diagram showing a graph (Bode plot) indicating the gain characteristics of the mirror detection circuit 45 according to the second embodiment. Figure 17B This is a diagram showing a graph (Bode diagram) indicating the phase characteristics of the mirror detection circuit 45 according to the second embodiment.

[0140] exist Figure 17A In the graph, the horizontal axis is the frequency, and the vertical axis is the gain (dB) of the detection signal relative to the monitoring voltage. Figure 17AThe horizontal axis is a logarithmic axis and is standardized. Figure 17B In the figure, the horizontal axis is the frequency, and the vertical axis is the phase deviation (angle) of the detection signal relative to the monitoring voltage. Figure 17B , the horizontal axis is a logarithmic axis, and the vertical and horizontal axes are standardized.

[0141] like Figure 17A as well as Figure 17B As shown in FIG. 1 , within the frequency range H1 to H2, the gain and phase of the mirror detection circuit 45 are substantially constant. The frequency H1 can be determined by Figure 11 The high-pass filter 307 provides that the frequency H2 can be Figure 11 The low-pass filter 306 is defined. Thus, a detection signal can be stably generated within the frequency range of H1 to H2.

[0142] In addition, Figure 17A as well as Figure 17B , the gain characteristics and phase characteristics of the mirror detection circuit 45 according to the second embodiment are shown. However, the mirror detection circuit 45 according to the first embodiment can also achieve similar gain characteristics and phase characteristics through the functions of the low-pass filter 306 and the high-pass filter 308. Therefore, even in the configuration of the first embodiment, a detection signal can be stably generated in a desired frequency band.

[0143] <Effects of Implementation>

[0144] According to the above-described embodiment, the following effects are achieved.

[0145] like Figure 7 as well as Figure 11 As shown in FIG. 1 , the voltage (monitor voltage) of the monitoring piezoelectric element 112 is input to the gate of the high-impedance FET 301 constituting a source follower circuit. The input range (bandwidth) of the source follower circuit is wide, and the tracking performance for the input voltage is high. Therefore, as shown in FIG. Figure 10 as well as Figure 14 As shown, even when the scanning speed of the second scanning unit 17 (polarizer) changes suddenly, a detection signal that accurately follows the change in scanning speed can be generated. Therefore, a detection signal corresponding to the change in scanning speed can be generated with high accuracy.

[0146] exist Figure 11 In the structure of the second embodiment shown, a resistor 308a is provided connected to the gate of the FET 301, and the resistor 308a and the capacitance component of the piezoelectric element 112 form a high-pass filter 308. The voltage generated in the piezoelectric element 112 is input to the gate of the FET 301 after the DC component is suppressed by the high-pass filter 308. Figure 15 as well as Figure 16As described above, even if a DC component is superimposed on the monitoring voltage due to the inherent characteristics of piezoelectric element 112, this DC component is suppressed by high-pass filter 308. Therefore, the monitoring voltage corresponding to the expansion and contraction of piezoelectric element 112 can be kept within the input range of FET 301 (source follower circuit) with ample room. Consequently, a high-quality detection signal can be generated.

[0147] like Figure 7 as well as Figure 11 As shown, the mirror detection circuit 45 (detection circuit) includes a high-pass filter 303 for suppressing the DC component of the source voltage output from the FET 301. Consequently, even if a DC component is superimposed on the source voltage due to the temperature characteristics of the FET 301, this DC component is suppressed by the high-pass filter 303. Consequently, a high-quality detection signal can be generated.

[0148] like Figure 7 as well as Figure 11 As shown, the mirror detection circuit 45 (detection circuit) includes a clamp circuit 304 that shifts the source voltage, after the DC component has been suppressed by the high-pass filter 303, to a predetermined clamp level. This allows the voltage level of the detection signal to be adjusted to a level suitable for processing by subsequent circuitry.

[0149] like Figure 7 as well as Figure 11 As shown, the clamp circuit 304 includes two resistors 304a and 304b, and one resistor 304b is used as a common resistor for the high-pass filter 303. This simplifies the structure of the high-pass filter 303 and, as a result, simplifies the structure of the mirror detection circuit 45 (detection circuit).

[0150] like Figure 7 as well as Figure 11 As shown, the mirror detection circuit 45 (detection circuit) includes an amplifier circuit 305 for amplifying the source voltage and a bandpass filter 310 for removing unnecessary frequency band components from the source voltage. This allows for stable generation of high-quality detection signals in the target frequency band.

[0151] like Figure 7 as well as Figure 11 As shown, bandpass filter 310 is arranged on the feedback line of amplifier circuit 305. This allows bandpass filter 310 (low-pass filter 306 and high-pass filter 307) to be configured by sharing resistors 306a and 307a on the amplifier circuit 305 side. This simplifies the structure of mirror detection circuit 45 (detection circuit).

[0152] like Figures 2 to 4 As shown, the image generating device 3 has Figure 7 or Figure 11 The mirror detection circuit 45 (detection circuit) of the structure, the second scanning unit 17 (light deflection element) equipped with the piezoelectric element 112 for monitoring, and the control unit 41 for controlling the operation of the second scanning unit 17 (light deflection element) based on the detection signal from the mirror detection circuit 45 (detection circuit). According to this structure, since it has Figure 7 or Figure 11 The mirror detection circuit 45 (detection circuit) can accurately detect the operating state of the second scanning unit 17 (light deflection element), that is, the scanning position of the light. Therefore, the detection signal from the mirror detection circuit 45 (detection circuit) can smoothly and accurately control the scanning position of the light.

[0153] <Change Example>

[0154] In the above embodiment, the configuration example of the detection circuit is shown. Figure 7 as well as Figure 11 The structure of the detection circuit is not limited to this. For example, the clamp circuit 304 may be omitted, or the high-pass filter 303 and the band-pass filter 310 may be omitted. The structure of each circuit part can also be changed appropriately. For example, the high-pass filter 303 may not share the resistor 304b of the clamp circuit 304, and a separate resistor may be configured for the high-pass filter 303. Figure 7 as well as Figure 11 The structure may also be provided with circuit parts for other purposes.

[0155] Note that the waveforms of the monitor voltage and the voltage at each position shown in each simulation are examples used for simulation, and the waveforms during actual operation may have other shapes.

[0156] In addition, in the above embodiment, if Figure 4 As shown, a piezoelectric element 112 is disposed at the connection portion of the drive unit 102 connected to the support unit 101. However, the location of the piezoelectric element 112 is not limited thereto. The piezoelectric element 112 can be disposed at a location that can appropriately sense the rotational position of the second reflector M2 (the scanning position of the light).

[0157] Furthermore, in the above embodiment, one of the two piezoelectric elements 112 has been described, but the same mirror detection circuit 45 can also be applied to the other piezoelectric element 112 .

[0158] In the above embodiment, the first and second reflectors M1, M2 are provided separately. However, a single reflector that rotates about two axes may be provided instead of the first and second reflectors M1, M2. In this case, a piezoelectric element 112 for detecting the position of the reflector may be provided in the drive unit that rotates the reflector in the vertical direction.

[0159] In the above embodiment, the detection circuit of the present invention is used to detect the vertical scanning position of light. However, the detection circuit of the present invention can also be used to detect the horizontal scanning position of light. In this case, the piezoelectric element 112 is provided in the first scanning unit 15, and the horizontal scanning position of light is detected using the detection signal from the reflector detection circuit 45.

[0160] In addition, the above embodiment illustrates an example of applying the technology of the present disclosure to the image generation device 3 mounted on the AR glasses 1. However, the image generation device to which the technology of the present disclosure is applied is not limited thereto. The detection circuit of the present disclosure can be used in various devices as long as it uses the voltage output from the piezoelectric element due to the piezoelectric effect.

[0161] The embodiments of the present disclosure can be modified in various ways as appropriate within the scope of the technical concept shown in the claims.

[0162] (Note)

[0163] The following techniques are disclosed through the description of the above embodiments.

[0164] (Technique 1)

[0165] A detection circuit for detecting the operating state of a light deflection element.

[0166] The detection circuit performs the following processing:

[0167] The voltage generated in the monitoring piezoelectric element for monitoring the operating state is input to the gate of the field effect transistor constituting the source follower circuit.

[0168] A detection signal corresponding to the expansion and contraction of the piezoelectric element is generated based on the source voltage of the field effect transistor.

[0169] This technology, due to the wide input range (bandwidth) of the source follower circuit and its high tracking capability to the input voltage, can generate a detection signal that accurately tracks the changes in the scanning speed of the polarizer, even when the scanning speed of the polarizer changes dramatically. This allows for the generation of a detection signal that accurately reflects the changes in scanning speed.

[0170] (Technique 2)

[0171] In the detection circuit described in Technology 1,

[0172] The detection circuit further comprises: a resistor connected to the gate of the field effect transistor;

[0173] A high-pass filter is formed by the resistor and the capacitance component of the piezoelectric element.

[0174] The voltage generated in the piezoelectric element is input to the gate of the field effect transistor after the DC component is suppressed by the high-pass filter.

[0175] This technology allows the high-pass filter to suppress a DC component in the voltage from the piezoelectric element due to its inherent characteristics. This allows the voltage corresponding to the expansion and contraction of the piezoelectric element to fall comfortably within the input range of the field-effect transistor (source-follower circuit), resulting in the generation of a high-quality detection signal.

[0176] (Technique 3)

[0177] In the detection circuit described in technology 1 or 2,

[0178] The detection circuit further includes a high-pass filter for suppressing a DC component of the source voltage.

[0179] According to this technology, even if a DC component is superimposed on the source voltage due to the temperature characteristics of the field-effect transistor, this DC component is suppressed by the high-pass filter, thereby generating a high-quality detection signal.

[0180] (Technique 4)

[0181] In the detection circuit described in Technique 3,

[0182] The detection circuit further includes a clamp circuit that shifts the source voltage, from which a direct current component has been suppressed by the high-pass filter, to a predetermined clamp level.

[0183] According to this technology, the voltage level of the detection signal can be adjusted to a voltage level suitable for processing by the subsequent-stage circuit unit.

[0184] (Technique 5)

[0185] In the detection circuit described in Technology 4,

[0186] The clamping circuit has two resistors.

[0187] One of the two resistors is commonly used as a resistor of the high-pass filter.

[0188] According to this technique, since the resistors of the clamp circuit are commonly used for the high-pass filter, the structure of the high-pass filter 303 can be simplified, and as a result, the structure of the detection circuit can be simplified.

[0189] (Technique 6)

[0190] In the detection circuit described in any one of techniques 1 to 5,

[0191] The detection circuit further comprises:

[0192] an amplifier circuit, configured to amplify the source voltage; and

[0193] The bandpass filter removes components of an unnecessary frequency band from the source voltage.

[0194] According to this technology, a high-quality detection signal can be stably generated in a target frequency band.

[0195] (Technique 7)

[0196] In the detection circuit described in Technology 6,

[0197] The bandpass filter is arranged on a feedback line of the amplifier circuit.

[0198] According to this technology, a bandpass filter can be configured by sharing the resistors on the amplifier circuit side, thereby further simplifying the structure of the detection circuit.

[0199] (Technique 8)

[0200] An image generating device comprising:

[0201] The detection circuit according to any one of techniques 1 to 7;

[0202] The light deflection element is provided with the monitoring piezoelectric element; and

[0203] The control unit controls the operation of the light deflection element based on the detection signal from the detection circuit.

[0204] According to this technology, since the image generation device includes the aforementioned detection circuit, it is possible to accurately detect the operating state of the light deflection element, that is, the light scanning position. Therefore, the light scanning position can be smoothly and accurately controlled using the detection signal from the detection circuit.

[0205] Industrial applicability

[0206] The detection circuit and image generation device disclosed herein can generate a detection signal corresponding to a change in scanning speed with high accuracy. Therefore, the detection circuit and image generation device disclosed herein are useful in industry, particularly in the field of image generation.

[0207] -Explanation of symbols-

[0208] 3 Image Generation Device

[0209] 11a~11c Light Source

[0210] 17 Second scanning unit (light deflection element)

[0211] 45, 45a Reflector detection circuit

[0212] 112 piezoelectric element

[0213] 213, 223, 224 resistors

[0214] 301 FET

[0215] 302 resistor

[0216] 303 High-pass filter

[0217] 304 Clamp Circuit

[0218] 304a, 304b resistors

[0219] 305 amplifier circuit

[0220] 306 Low-pass filter

[0221] 306a resistor

[0222] 307 High-pass filter

[0223] 307a resistor

[0224] 308 High-pass filter

[0225] 308a resistor.

Claims

1. A detection circuit for detecting the operating state of a light deflection element, The detection circuit performs the following processing: The voltage generated in the monitoring piezoelectric element for monitoring the operating state is input to the gate of the field effect transistor constituting the source follower circuit. A detection signal corresponding to the expansion and contraction of the piezoelectric element is generated based on the source voltage of the field effect transistor.

2. The detection circuit according to claim 1, wherein: The detection circuit further comprises: a resistor connected to the gate of the field effect transistor; A high-pass filter is formed by the resistor and the capacitance component of the piezoelectric element. The voltage generated in the piezoelectric element is input to the gate of the field effect transistor after the DC component is suppressed by the high-pass filter.

3. The detection circuit according to claim 1, wherein: The detection circuit further includes a high-pass filter for suppressing a DC component of the source voltage.

4. The detection circuit according to claim 3, wherein: The detection circuit further includes a clamp circuit that shifts the source voltage, from which a direct current component has been suppressed by the high-pass filter, to a predetermined clamp level.

5. The detection circuit according to claim 4, wherein: The clamping circuit has two resistors. One of the two resistors is commonly used as a resistor of the high-pass filter. The detection circuit according to claim 1 , wherein: The detection circuit further comprises: an amplifier circuit, configured to amplify the source voltage; and The bandpass filter removes components of an unnecessary frequency band from the source voltage.

7. The detection circuit according to claim 6, wherein: The bandpass filter is arranged on a feedback line of the amplifier circuit.

8. An image generating device comprising: The detection circuit according to any one of claims 1 to 7; The light deflection element is provided with the monitoring piezoelectric element; and The control unit controls the operation of the light deflection element based on the detection signal from the detection circuit.

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