High-precision dynamic memristor model and application method thereof

Abstract

A high-precision dynamic memristor model and an application method thereof are characterized in that the memristor model is established based on a Ta2O5 memristor, and the Ta2O5 memristor comprises a bottom electrode, a functional layer and a top electrode which are sequentially attached from bottom to top; the bottom electrode is platinum, the functional layer is tantalum pentoxide, and the top electrode comprises lower tantalum and upper platinum. The memristor model has the effects that the memristor model can fit experimental data of a Ta2O5-based multi-layer device, and 2.9% of relative root-mean-square error is realized in resistance state conversion. In a voice classification task, the training accuracy rate of the method reaches 99.4%, the test accuracy rate reaches 91.6%, and the potential of neural morphology calculation of the method is proved. According to the work, the accuracy of memristor modeling is improved, and application in intelligent computing and memory systems is supported.

Description

TECHNICAL FIELD

[0001] The application relates to the technical field of memristor, in particular to a high-precision dynamic memristor model and an application method thereof. BACKGROUND

[0002] The rapid development of artificial intelligence and the Internet of Things (IoT) has greatly increased the demand for computing systems and data storage technologies, requiring high-density, low-power and cost-effective solutions. As the expansion of complementary metal-oxide-semiconductor (CMOS) approaches physical limits, the traditional von Neumann architecture, introduced in 1946, faces limitations. In addition, the performance gap between storage and processing units is widening, coupled with frequent data transfer, increasing latency and energy consumption. To overcome these challenges, new computing architectures beyond von Neumann must be developed.

[0003] In-memory computing integrates data processing and storage in the same device, eliminating frequent data transfer and addressing a key limitation of traditional computing. This approach greatly reduces data movement, reducing energy consumption and latency while improving system performance and response speed.

[0004] In recent years, memristors based on unique principles have attracted attention for their potential in in-memory computing. Memristors, proposed by Professor Leon Chua in 1971, have a resistance that changes with the flow of electric charge, making them a unique two-terminal element. It was not until 2008 that Hewlett-Packard Laboratories demonstrated a physical realization of a memristor. Since then, memristors have been applied to digital circuits and neuromorphic computing. Memristors of different materials and structures exhibit different electrical behavior, offering potential for many applications. Accurate conductance programming is crucial for using memristors in neural networks. High-fidelity modeling helps understand the characteristics of memristors, improves system reliability, quantifies noise and other limiting factors, and aids in simulation and optimization.

[0005] Since the first physical realization of the memristor, many researchers have proposed various models to describe its basic physical mechanism and electrical characteristics. For example, upon the first demonstration of the memristor, the Hewlett-Packard Laboratory proposed a doped drift model. Subsequent researchers used a window function to define the limits of the state variable and utilized a hyperbolic sine function to describe the curvature of the device response. In addition, models based on ion concentration distribution and tunnel barrier models have also been proposed. Some models are closely related to the specific characteristics of the hardware device. In 2015, the voltage threshold adaptive memristor model (VTEAM) was introduced, which includes threshold voltage characteristics to meet the special needs of memory and logic applications. However, these models face certain challenges. The construction of such models often requires a large number of parameters, and the extraction of parameters is often challenging and lacks standardized methods. In addition, for some devices that are currently most commonly used, such as TaOx memristors, the performance of existing models is not ideal. Therefore, there is an urgent need for an accurate model to describe the response behavior of these non-volatile memristors.

[0006] In 2019, Yakopcic.C proposed a model that can effectively generate data for a specific characterization data set. This model captures the pinch hysteresis phenomenon of the memristor in a single voltage scan and exhibits strong qualitative fitting capability. However, it also has limitations, including inaccuracy in resistance state transitions and weak performance in capturing long-term potentiation (LTP) and long-term depression (LTD) after consecutive pulses. These defects affect the weight storage accuracy and dynamic adjustment of the memristor, resulting in serious simulation errors. SUMMARY

[0007] The high-precision dynamic memristor model and its application method provided by the present application can improve the fitting accuracy of the nonlinear characteristics of the memristor model in dynamic programming and reduce simulation errors.

[0008] To achieve the above-mentioned purpose, the high-precision dynamic memristor model provided by the present application is based on a Ta2O5 memristor to establish a memristor model, wherein the Ta2O5 memristor includes a bottom electrode, a functional layer, and a top electrode sequentially attached from bottom to top; the bottom electrode is platinum, the functional layer is tantalum pentoxide, and the top electrode includes a lower layer of tantalum and an upper layer of platinum.

[0009] The current-voltage curve characteristics of the memristor model follow the equation:

[0010] i(t)=h1(V(t))x(t)+h2(V(t))(1-x(t)) (1)

[0011] Wherein, i(t) is current; V(t) is voltage; x(t) is state variable, x(t)∈[0, 1]; t is time; h1 is the electron transport equation of the memristor in the high conductance state; h2 is the electron transport equation of the memristor in the low conductance state;

[0012] The electron transport equation of the memristor in the high conductance state is:

[0013] h1=g max V(t)+g max,flu V(t) 2 (2)

[0014] The electron transport equation of the memristor in the low conductance state is:

[0015] h2=g min V(t)+g min,flu1 V(t) 2 +g min,flu2 V(t) 3 (3)

[0016] Wherein, g max is the conductance value of the memristor in the stable high conductance state; g min is the conductance value of the memristor in the stable low conductance state; g max,flu is the high conductance fluctuation parameter, which can be obtained by fitting the curve of the high conductance state; g min,flu1 , g min,flu2 is the low conductance fluctuation parameter, which can be obtained by fitting the curve of the low conductance state;

[0017] The state variable of the memristor is determined by the following formula:

[0018]

[0019] Wherein, η represents the influence of the polarity of the applied voltage on the memristor, when a positive voltage is applied, the memristor performs a set operation, η=1; when a negative voltage is applied, the memristor performs a reset operation, η=-1; g(V(t)) represents the threshold voltage function; f(x(t)) represents the state variable function;

[0020] The expression of g(V(t)) is:

[0021]

[0022] Wherein, V p represents the positive threshold voltage of the memristor; V n represents the negative threshold voltage of the memristor; A p and A n are fitting parameters; g pk,p represents the maximum value of the conductivity change; g pk,nThe minimum value representing the change in conductivity;

[0023] The expression of f(x(t)) is:

[0024]

[0025] Where, alpha p And alpha n Are adjustment parameters, their introduction helps to smooth the conductivity change curve, expand the application range of the model; x p And x n Are boundary values of state variables, when x(t) is less than x p Or greater than 1-x n , The function f(x(t)) remains unchanged, only when it exceeds the boundary value will change occur;

[0026]

[0027]

[0028] Where, g slow,p Indicates the conductivity value close to the maximum conductivity value; g slow,n Indicates the conductivity value close to the minimum conductivity value;

[0029] w p (x, x p ) and w n (x, x n ) are window functions:

[0030]

[0031] Where, beta p And beta n Are the slow change factors, which effectively slow down the sharp change of the resistance transition stage I-V curve, making it more smooth and continuous. This adjustment helps to reduce the sudden fluctuation and instability of the current during the resistance state transition.

[0032] The structure of a multi-layer stacked Ta2O5 memristor device designed by the application is Ti / Pt / Ta2O5 / Ta / Pt, which shows typical memristive characteristics. On this basis, by modifying the electron transport equation and introducing gradient factors and other parameters, an improved memristor model is established, which can better capture the electrodynamic characteristics of the memristor, significantly improve the fitting accuracy of the nonlinear characteristics of the memristor model in dynamic programming, and reduce the simulation error.

[0033] As preferred: the bottom electrode thickness is 28-32nm, the functional layer thickness is 28-32nm, the top layer electrode lower layer thickness is 8-12nm, and the top layer electrode upper layer thickness is 28-32nm.

[0034] As preferred: when the conductance value of the memristor is ≥1.20×10 -3 , it is a high conductance state, and when the conductance value of the memristor is ≤1.65×10 -5 , it is a low conductance state.

[0035] A preparation method of a Ta2O5 memristor array, the key of which comprises the following steps:

[0036] S1: A bottom electrode pattern is processed on a bottom electrode substrate by photolithography technology, and an adhesion layer and platinum are sequentially deposited on the bottom electrode pattern by magnetron sputtering, and then the photoresist is stripped, to prepare a bottom electrode array;

[0037] S2: A functional layer pattern is processed on a functional layer substrate by photolithography technology, and tantalum pentoxide is deposited on the functional layer pattern by magnetron sputtering, and then the photoresist is stripped, to prepare a functional layer array, and then the functional layer array is transferred to the bottom electrode array;

[0038] S3: A top layer electrode pattern is processed on a top layer electrode substrate by photolithography technology, and tantalum and platinum are sequentially deposited on the top layer electrode pattern by magnetron sputtering, and then the photoresist is stripped, to prepare a top layer electrode array, and then the top layer electrode array is transferred to the functional layer array, to obtain a memristor array.

[0039] The memristor device with a multi-layer stacked Ti / Pt / Ta2O5 / Ta / Pt cross array structure can realize stable voltage-current cycling without forming process.

[0040] As preferred: the substrate is one of silicon and silicon dioxide; the adhesion layer is titanium, and the thickness of the adhesion layer is [8, 12].

[0041] An application method of a high-precision dynamic memristor model, the key of which comprises the following steps:

[0042] Step 1: A speech classification system based on a memristor model is constructed, which is provided with a speech acquisition module, a preprocessing module and a memristor neural network connected in sequence; each network layer in the memristor neural network is distributed by a memristor model array;

[0043] Step 2: The speech acquisition module acquires a speech data set and delivers it to the preprocessing module for preprocessing operation, and then divides the preprocessed data set into a training set and a test set;

[0044] Step 3: Train the memristor neural network using the training set and update the weight values in the memristor neural network using the conductance weight update formula during backpropagation;

[0045] When the set number of iterations of training is reached, stop training and obtain the trained memristor neural network;

[0046] Step 4: Test the trained memristor neural network using the test set and evaluate the performance of the memristor neural network using the root mean square error;

[0047] Step 5: The voice acquisition module acquires a voice signal a and passes it to the preprocessing module;

[0048] Step 6: The preprocessing module performs preprocessing operations on the voice signal a to obtain standard voice data b and passes it to the trained memristor neural network;

[0049] Step 7: The trained memristor neural network classifies and recognizes the standard voice data b and outputs a voice classification result c.

[0050] Through the above design, a memristor neural network is constructed based on a memristor model and applied to a voice recognition task, with the memristor model used as a simulated synapse. Experimental results show that the model is very effective in learning and recognition patterns, achieving an impressive accuracy of 99.4% in the training phase and 91.6% in the testing phase. These findings suggest that the proposed memristor model has the potential to become a basic component of neuromorphic computing systems, paving the way for its application in tasks that require efficient, hardware-based neural network implementations.

[0051] As a preferred embodiment: During training, the initial weights of the memristor neural network are quantized using a uniform quantization method, expressed as:

[0052]

[0053] where w represents the original weight; W q is the quantized weight; W n and W n+1 are the boundary values of the small cell (W n , W n+1 ); if the weight value is close to W n , it is quantized to W n ; otherwise, if the weight value is close to W n+1 , it is quantized to W n+1 . Using this quantization method, the distribution of the quantized training weights is roughly the same as that of the unquantized training weights.

[0054] In the back propagation process, the weight values in the memristor neural network are updated using the conductance weight update formula, expressed as:

[0055]

[0056] wherein, alpha is the learning rate; is a regularization parameter, beta is a regularization coefficient, which regulates the influence of the regularization term in the total gradient (to prevent overfitting); sigma is the standard deviation or volatility of the weights or outputs used for regularization; M is the calculation parameter of the weight update process; W update is the updated weight value; n is the nth layer; i is the ith row; j is the jth column; E n is the error function of the nth layer;

[0057] The calculation expression of the calculation parameter M of the weight update process is:

[0058]

[0059] wherein, W threshold is the weight threshold value, which avoids frequent and small adjustments of the weights in the memristor neural network; if the weight update variable of the last time is less than the threshold value, it is used as the momentum of the weight update in the next iteration; if the threshold value is reached, the momentum of the next update is equal to the cumulative part of the weight gradient and the regularization parameter.

[0060] As preferred: the memristor neural network is provided with a first convolutional layer, a first batch normalization layer, a first max pooling layer, a second convolutional layer, a second batch normalization layer, a second max pooling layer, a flattening layer, a dropout layer and a fully connected layer connected in sequence.

[0061] The beneficial effects of the present application are: the present application makes a multi-layer stacked memristor device, which has a structure of Ti / Pt / Ta2O5 / Ta / Pt and exhibits typical memristive characteristics. On this basis, by modifying the electron transport equation and introducing parameters such as gradient factor, an improved memristor device model is established to better capture its electrodynamic characteristics. The improved model is highly consistent with the experimental results, with a root mean square error of 0.029265 during the resistance state transition. In order to explore its practical application, the model is applied to the speech recognition task, and the memristor model is used as a simulated synapse. The experimental results show that the model is very effective in learning and recognition mode, reaching an impressive accuracy of 99.4% in the training phase and 91.6% in the test phase. These findings suggest that the proposed memristor model has the potential to become a basic component of neuromorphic computing systems, paving the way for its application in tasks that require efficient, hardware-based neural network implementations. BRIEF DESCRIPTION OF DRAWINGS

[0062] Figure 1 (a) is a schematic diagram of a memristor array structure; (b) is a schematic diagram of a single-layer memristor structure; (c) is a scanning electron microscope image; (d) is an I-V curve diagram of a memristor; (e) is a diagram of an applied voltage curve during testing; (f) is a diagram of a corresponding response current curve of a memristor;

[0063] Figure 2 (a) is a diagram of the conductivity change process from a low resistance state to a high resistance state; (b) is a diagram of the conductivity change process from a high resistance state to a low resistance state; (c) is a diagram of the conductivity change rate during the transition from a low resistance state to a high resistance state; (d) is a diagram of the conductivity change rate when transitioning from a high resistance state to a low resistance state;

[0064] Figure 3 (a) is a result diagram of fitting test data using a high-precision dynamic memristor model; (b) is a result diagram of fitting test data using a memristor model based on device characterization data parameter extraction; (c) is a result diagram of fitting test data using a model based on ion concentration distribution; (d) is a result diagram of fitting test data using a general model of voltage-controlled memristor; (e) is a comparison diagram of the root mean square error of I-V curves of each model; (f) is a comparison diagram of the root mean square error of resistance state transition processes;

[0065] Figure 4 (a) is a schematic diagram of a SPICE function model; (b) is a comparison diagram of LTspice simulation results and test data;

[0066] Figure 5 (a) is a schematic diagram of a memristor neural network structure in the embodiment; (b) is a diagram of the memristor neural network structure in the embodiment;

[0067] Figure 6 (a) is a diagram of LTP and LTD curves generated after continuous positive and negative pulses in the embodiment; (b) is a loss curve diagram; (c) is a confusion matrix; (d) is a training accuracy curve diagram; (e) is a classification result of each digit from 0 to 9 as shown in the figure; (f) is a test accuracy curve diagram. DETAILED DESCRIPTION

[0068] The application will be further described in detail below in conjunction with the drawings and specific examples. The following examples or drawings are used to illustrate the application, but are not used to limit the scope of the application.

[0069] The structure of the memristor provided by the application is a multi-layer stacked Ti / Pt / Ta2O5 / Ta / Pt cross array, as shown in Figure 1 (a). An enlarged view of a single device is shown in Figure 1 (b). Figure 1(c) is a SEM image of the device. The process of building a Ta2O5 device on a silicon / silicon dioxide substrate is as follows. First, the adhesion layer and bottom electrode are patterned by photolithography and deposited by magnetron sputtering of Ti (10 nm) and Pt (30 nm), followed by lift-off. Next, the functional layer is patterned using photolithography and deposited by magnetron sputtering and lift-off of Ta2O5 (30 nm). Finally, the top electrode is again patterned by photolithography and deposited by magnetron sputtering of Ta (10 nm) and Pt (30 nm), followed by lift-off.

[0070] The device with this structure is able to achieve stable voltage-current cycling without a forming process. Figure 1 (e) and (f) show the voltage-time and current-time curves during the test, with a threshold voltage of 0.47 V and a reset threshold voltage of -0.40 V, and the resistance can transition from a low resistance state of 820 Ω to a high resistance state of 49 kΩ. This transition results in a switching ratio exceeding 50. The I-V relationship of the memristor tested in this example is shown in (d). Figure 1

[0071] The I-V curve characteristics of the memristor model proposed by the present application follow the equation:

[0072] i(t) = h1(V(t))x(t) + h2(V(t))(1 - x(t)) (1)

[0073] where i(t) is the current; V(t) is the voltage; x(t) is the state variable, x(t) ∈ [0, 1]; t is the time; h1 is the electron transport equation of the memristor in the high conductance state; and h2 is the electron transport equation of the memristor in the low conductance state. When the conductance value of the memristor is ≥ 1.20 x 10 -3 , it is in the high conductance state, and when the conductance value of the memristor is ≤ 1.65 x 10 -5 , it is in the low conductance state.

[0074] In equation (1), h1 and h2 describe the electron transport equations of the memristor in the high and low conductance states, respectively. The high conductance state can involve Ohmic transport, while the low conductance state can involve metal-insulator-metal transport. In actual devices, the high conductance state can follow a linear conduction h1 = σV(t), but in general, some fluctuations will occur, making it not completely linear. Therefore, in order to explain its general behavior, the expression for h1 is:

[0075] h1 = g max V(t) + g max,flu V(t) 2 (2)

[0076] where g max ​is the conductance value of the memristor device in the stable high conductance state, g max,flu is a fluctuation parameter, which can be obtained by fitting the curve of the high conductance state. The low conductance state can follow a hyperbolic sine mode of metal-insulator-metal (MIM), which can be described by γsinh(δV(t)). However, in actual tests, due to the large fluctuation of test data, it becomes very difficult to use the hyperbolic sine function to describe the trend in the fitting process. Therefore, this paper uses a cubic polynomial to decompose this trend, thereby simplifying the fitting process, and the expression of h2 is:

[0077] h2=g min V(t)+g min,flu1 V(t) 2 +g min,flu2 V(t) 3 (3)

[0078] In equation (3), g min represents the conductance of the memristor device in the stable low conductance state, g min,flu1 and g min,flu2 can be easily obtained by fitting the curve of the low conductance state. The I-V relationship also depends on the state variable x(t), which is determined by the following formula:

[0079]

[0080] where η represents the influence of the polarity of the applied voltage on the memristor, when a positive voltage is applied, the memristor performs a set operation, η=1; when a negative voltage is applied, the memristor performs a reset operation, η=-1; g(V(t)) represents the threshold voltage function; f(x(t)) represents the state variable function;

[0081] In the memristor model provided by the present application, the state variable in equation (4) directly affects the conductivity, which ranges from 0 to 1. It is jointly determined by two different functions g(V(t)) and f(x(t)). The expression of g(V(t)) is:

[0082]

[0083] where V p represents the positive threshold voltage of the memristor, V n represents the negative threshold voltage of the memristor, which can be determined by calculating the point where the current and voltage change the most. A p and A n are fitting parameters; g pk,p represents the maximum value of the change in conductivity, g pk,n represents the minimum value of the change in conductivity, g pk,p and g pk,n According to Figure 2(c) and (d) are determined.

[0084] In equation (5), the state variable of the model changes only when the voltage is higher than the positive threshold V p or lower than the negative threshold V n ; when the voltage is between the positive threshold V p and the negative threshold V n , the state variable remains unchanged.

[0085] At the same time, the state variable also changes, which is determined by the polarity of the input voltage through a piecewise function. The function f(x(t)) is used to simulate the ion movement of the memristor, which is expressed by the following formula:

[0086]

[0087] When ηV(t)≥0, f(x(t)) is defined by equation (8), and vice versa, f(x(t)) is defined by equation (9).

[0088] α p and α n are adjustment parameters, which help to smooth the conductance change curve and expand the application range of the model; x p and x n are boundary values of the state variable, when x(t) is less than x p or greater than 1-x n , the function f(x(t)) remains unchanged, only when it exceeds the boundary value will it change;

[0089]

[0090] where g slow,p represents the conductance value close to the maximum conductance value, g slow,n represents the conductance value close to the minimum conductance value; g slow,p and g slow,n are determined by Figure 2 (a) and Figure 2 (b); if not easy to obtain, g slow,p and g slow,n can be obtained according to Figure 2 (c) and Figure 2 (d) The time when the conductance change rate is maximum can also be obtained in the conductance-time image.

[0091] w p (x,x p ) and w n (x,x n ) are window functions:

[0092]

[0093] Among them, β p and β n These factors effectively slow down the sharp changes in the IV curve during the resistance transition phase, making it smoother and more continuous. This adjustment helps reduce sudden current fluctuations and instabilities during resistance state transitions.

[0094] To demonstrate the advantages of a high-precision dynamic memristor model, we use Figure 1 (d) The experimental test IV curve is shown, which is compared with the memristor model based on parameter extraction from device characterization data, the model based on ion concentration distribution, and the universal model VTEAM model of voltage-controlled memristor. Figure 3 (a) shows the fitting results of the high-precision dynamic memristor model, which is in good agreement with the experimental data. The parameters are set as follows: g max =1.21×10 -3 ,g max,flu =-3.22×10 -5 ,g min =1.65×10 -5 ,g min,flu1 =-2.95×10 -5 ,g min,flu2 =8.34×10 -5 , V p =0.47,V n =-0.40, A p =16601.87, A n =-11409.76, x p =0.0139,x n =0.8659,α p =1,α n =0.5,β p =0.5,β n =1. Figure 3 (b) shows the fitting results of the memristor model extracted by Y based on the device characterization data parameters. The model reasonably fits the high resistance and low resistance states, but there are errors in the state transition process. The parameters are set to g max =1.21×10 -3 , g min =-3.3×10 -3 , b=-6.57×10 -3 , V p =0.47, V n =-0.40, A p =48256.15, A n =-358.68, x p =0.0139,x n =0.8659.Figure 3 (c) shows a model based on the ion concentration distribution, which agrees well with the steady state but has low accuracy for the voltage threshold and resistance transition. The parameter is set to γ ​​= 8 × 10 -6 ,δ=1,α=1.15×10 -2 , β=0.1, μ1=30, μ2=30, k=5×10 -4 . Figure 3 (d) shows the VTEAM model, which also exhibits a non-ideal fit with large errors during setup and reset. The parameters are set to R on =820, R off =4.7×10 4 ,ω on =0,ω off =25×10 -9 , k on =-0.018, k off =10 -5 ,α on =18,

[0095] α off =2, V on =-0.47, V off =0.4.

[0096] To quantify the error of the fit, we evaluate it using the RMS error:

[0097]

[0098] Where N is the number of samples, representing the actual test current-voltage data and the data generated by the model. Since the actual test data points are small, in order to ensure the matching amount of error calculation, a linear uniform downsampling strategy is used for the model data. This method uniformly selects points from the original data to maintain the distribution. In formula (14), V MODEL and I MODEL are the voltage and current generated by the model, and V ref and I ref It is a reference voltage and current based on actual test data. and is the Euclidean criterion for reference voltage and current. Figure 3 (e) shows the root mean square error results, where the error is the smallest after downsampling. In addition, Figure 3 (f)) also shows the root mean square error of the four models during the resistance conversion process, indicating that the high-precision dynamic memristor model achieves an error of less than 3%, which is a significant improvement and verifies its effectiveness.

[0099] In order to extend the application of the high-precision dynamic memristor model to more scenarios, the embodiment is implemented in LTspice, and the specific implementation code is shown in Table 1. The principle is as shown in Figure 4 (a). The left half of the circuit represents the memristor model, and the right half shows the acquisition of the state variable.

[0100] Table 1 LTspice subcircuit code of the memristor model

[0101]

[0102]

[0103]

[0104] After constructing the LTspice circuit, the I-V characteristics thereof are compared with the experimental data, as shown in Figure 4 (b). The current response after applying the voltage has only a slight deviation from the test data. In addition, the root mean square error is calculated, and the result is 0.061544, which indicates that the SPICE circuit successfully implements the memristor model.

[0105] An application method of a high-precision dynamic memristor model, comprising the following steps:

[0106] Step 1: Construct a speech classification system based on the memristor model, wherein the speech classification system is provided with a speech acquisition module, a preprocessing module and a memristor neural network connected in sequence; each network layer in the memristor neural network is distributed by a memristor model array;

[0107] Step 2: The speech acquisition module acquires a speech data set and delivers it to the preprocessing module for preprocessing operation, and then divides the preprocessed data set into a training set and a test set;

[0108] Step 3: The training set is used to train the memristor neural network, and the conductance weight update formula is used to update the weight values in the memristor neural network during the backpropagation process;

[0109] When the set number of iteration training times is reached, the training is stopped, and a trained memristor neural network is obtained;

[0110] Step 4: The test set is used to test the trained memristor neural network, and the root mean square error is used to evaluate the performance of the memristor neural network;

[0111] Step 5: The speech acquisition module acquires a speech signal a and delivers it to the preprocessing module;

[0112] Step 6: The preprocessing module pre-processes the speech signal a to obtain standard speech data b and delivers it to the trained memristor neural network;

[0113] Step 7: The trained memristor neural network classifies and recognizes the standard speech data b and outputs speech classification results c.

[0114] Next, the application potential of the memristor neural network based on the memristor model in practical tasks was verified in the public data set of Chinese human voice 0-9.

[0115] The data set is divided into two different parts: training set and test set. The training set includes 500 samples for each number from 0 to 9, totaling 2500 samples; the test set includes 50 samples for each number, totaling 500 samples. In the classification task simulation, the LTP and LTD behaviors based on the memristor model were used, as shown in Figure 6 (a), where the positive pulse amplitude is 0.471 V and the negative pulse amplitude is -0.4004 V. In the memristor model, LTP (long-term potentiation) and LTD (long-term depression) are generated by inputting consecutive positive pulses and consecutive negative pulses. Preprocessing of the data set is required before classification. In this study, the Mel-frequency cepstral coefficient (MFCC) was used as a method for extracting features from speech signals. MFCC is a widely used technique in machine learning. It is a frequency-domain co-spectrum parameter derived from the Melscale, which describes the nonlinear perception of frequency by the human ear.

[0116] In the simulation training process, the weight mapping method proposed by Guo was used to map the training weights to the memristor neural network, and the methods in formulas (16) and (17) were used to update the weight values during backpropagation. In this process, the training weights were initially quantized using the uniform quantization method

[0117]

[0118] where W q is the quantized weight, W n and W n+1 are the boundary values of the inter-cell (W n , W n+1 ). If the weight value is closer to W n , it is quantized to W n ; otherwise, if the weight value is closer to W n+1 , it is quantized to W n+1Using this quantization method, the quantized training weight distribution is approximately the same as the pre-quantization training weight distribution. In this experiment, the method in equation (15) is used to map 64-bit precision weights to 200 analog weights. Each weight value is represented by a pair of memristors, which store the positive and negative parts of the weight, respectively.

[0119] During the mapping process, the weight value is encoded as the number of pulses emitted, and the final conductance value of the memristor is determined by the cumulative effect of these pulses. The final conductance value of the memristor depends on the number of pulses applied to it. The process of applying pulses to the memristor is as follows: First, define the range of weight values and divide it equally into n intervals, where n represents the total number of analog weight levels.

[0120] In this study, the weight value range is set to [-1, 1], and weight values outside this range are replaced by the nearest boundary value. Starting from weight 0, a label is assigned to each interval, extending in both positive and negative directions. For example, the analog weight at 0 is labeled 0, and the first interval in the positive direction is labeled +1, representing the corresponding analog weight. The labels of all other intervals, both in the positive and negative directions, follow the same principle. During the conductance update process, a positive pulse is applied to the memristor, labeled +1. The number of pulses sent to each memristor and its polarity (positive or negative) depend on the size of the label and the sign of the corresponding analog weight.

[0121] Backpropagation is used to update the weight of the conductance

[0122]

[0123] where α is the learning rate, β / 2*σ is the regularization parameter, and M is the calculation parameter of the weight update process. In this experiment, M is calculated using equation (17):

[0124]

[0125] where a weight threshold W threshold is introduced to avoid frequent small adjustments of weights in the memristor neural network. If the last weight update variable is less than the threshold, it is used as the momentum of the next iteration of weight update. If the threshold is reached, the momentum of the next update is equal to the cumulative part of the weight gradient and the regularization parameter.

[0126] The structure of the memristor neural network is shown in Figure 5 . The specific hyperparameters are given in Table 2.

[0127] Table 2 Hyperparameters of each layer of the network

[0128]

[0129]

[0130] As Figure 6 (b), 6(d) and 6(f) show that the simulation results show that the training accuracy reaches 99.4%, indicating that the network has effectively learned the characteristics of the training data set. The test accuracy is as high as 91.6%, highlighting the strong generalization ability of the network to unseen data. The confusion matrix is shown in Figure 6 (c).

[0131] To further evaluate the performance of the model on individual digits, Figure 6 (e) shows the recognition accuracy of each digit in the test set. The recognition accuracy of different digits varies, with the lowest being 82% and the highest reaching 98%. This difference can be attributed to factors such as the inherent difficulty of distinguishing certain digits and the sensitivity of the model to subtle changes in input data. Despite this, the overall recognition performance shows significant consistency, highlighting the robustness and reliability of the proposed model in the digit recognition task.

[0132] The proposed memristor model can more accurately describe the electrical characteristics of the memristor. First, a multi-layer stacked memristor device structure of Ti / Pt / Ta2O5 / Ta / Pt exhibits typical memristive characteristics. On this basis, by modifying the electron transport equation and introducing parameters such as the gradient factor, an improved memristor device model is established to better capture its electrodynamic characteristics. The improved model is highly consistent with experimental results, with a root mean square error of 0.029265 during resistance state transition. In addition, the model realizes circuit-level simulation in LTspice, further verifying its accuracy and practicality. To explore its practical applications, the model is applied to the speech recognition task, using the memristor model as a simulated synapse. Experimental results show that the model is very effective in learning and recognition mode, achieving an impressive accuracy of 99.4% in the training phase and 91.6% in the test phase. These findings suggest that the proposed memristor model has the potential to become a basic component of neuromorphic computing systems, paving the way for its application in tasks that require efficient, hardware-based neural network implementation.

[0133] The above only describes the preferred embodiments of the present application and is not intended to limit the present application. For those skilled in the art, the present application can have various modifications and changes. Any modification, equivalent replacement, improvement, etc. made within the spirit and principles of the present application shall be included in the protection scope of the present application.

Claims

1. A high-precision dynamic memristor model, characterized by: A memristor model is established based on a Ta2O5 memristor, wherein the Ta2O5 memristor includes a bottom electrode, a functional layer, and a top electrode laminated in sequence from bottom to top; the bottom electrode is platinum, the functional layer is tantalum pentoxide, and the top electrode includes a lower layer of tantalum and an upper layer of platinum; The current-voltage curve characteristics of the memristor model follow the equation: i(t)=h1(V(t))x(t)+h2(V(t))(1-x(t)) (1) Where i(t) is the current; V(t) is the voltage; x(t) is the state variable; t is the time; h1 is the electron transfer equation of the memristor in the high conductance state; h2 is the electron transfer equation of the memristor in the low conductance state; The electron transfer equation of the memristor in the high conductance state is: h1=g max V(t)+g max,flu V(t) 2 (2) The electron transfer equation of the memristor in the low conductance state is: h2=g min V(t)+g min,flu1 V(t) 2 +g min,flu2 V(t) 3 (3) Among them, g max is the conductance value of the memristor in a stable high-conductance state; g min is the conductance value of the memristor in a stable low-conductance state; g max,flu is the high conductance fluctuation parameter; g min,flu 1, g min,flu 2 is the low conductance fluctuation parameter; The state variable of the memristor is determined by the following formula: Where η represents the effect of the applied voltage polarity on the memristor. When a positive voltage is applied, the memristor performs a set operation, η = 1; when a negative voltage is applied, the memristor performs a reset operation, η = -1; g(V(t)) represents the threshold voltage function; f(x(t)) represents the state variable function; The expression of g(V(t)) is: Among them, V p Represents the positive threshold voltage of the memristor; V n represents the negative threshold voltage of the memristor; A p and A n is the fitting parameter; g pk,p Indicates the maximum value of conductivity change; g pk,n Indicates the minimum value of conductivity change; The expression of f(x(t)) is: Among them, α p and α n is the adjustment parameter; x p and x n is the boundary value of the state variable, when x(t) is less than x p or greater than 1-x n When , the function f(x(t)) remains unchanged; Among them, g slow,p Indicates the conductance value close to the maximum conductance value; g slow,n Indicates the conductance value close to the minimum conductance value; w p (x,x p ) and w n (x,x n ) are window functions respectively: Among them, β p and β n is the slow-changing factor.

2. A high-precision dynamic memristor model according to claim 1, characterized in that: The thickness of the bottom electrode is 28-32 nm, the thickness of the functional layer is 28-32 nm, the thickness of the lower layer of the top electrode is 8-12 nm, and the thickness of the upper layer of the top electrode is 28-32 nm.

3. A high-precision dynamic memristor model according to claim 1, characterized in that: When the conductance of the memristor is ≥1.20×10 -3 When the conductance value of the memristor is ≤1.65×10 -5 It is in low conductivity state.

4. A method for preparing a Ta2O5 memristor array, characterized in that: The following steps are involved: S1: A bottom electrode pattern is formed on a bottom electrode substrate by photolithography, and an adhesion layer and platinum are sequentially deposited on the bottom electrode pattern by magnetron sputtering. The photoresist is then stripped off to prepare a bottom electrode array. S2: Processing a functional layer pattern on a functional layer substrate using photolithography technology, and depositing tantalum pentoxide on the functional layer pattern by magnetron sputtering. Subsequently, stripping the photoresist to prepare a functional layer array, which is then transferred to the bottom electrode array; S3: A top electrode pattern is processed on a top electrode substrate by photolithography technology, and tantalum and platinum are sequentially deposited on the top electrode pattern by magnetron sputtering. The photoresist is then stripped off to prepare a top electrode array, which is then transferred to a functional layer array to obtain a memristor array.

5. The method for preparing a Ta2O5 memristor array according to claim 4, wherein: The substrate is one of silicon and silicon dioxide; the adhesion layer is titanium.

6. An application method of a high-precision dynamic memristor model, characterized in that: The following steps are involved: Step 1: Constructing a speech classification system based on a memristor model, wherein the speech classification system is provided with a speech acquisition module, a preprocessing module, and a memristor neural network connected in sequence; each network layer in the memristor neural network is composed of a distributed array of memristor models; Step 2: The speech acquisition module obtains the speech data set and passes it to the preprocessing module for preprocessing, and then divides the preprocessed data set into a training set and a test set; Step 3: Use the training set to train the memristor neural network, and use the conductance weight update formula to update the weight values ​​in the memristor neural network during the back-propagation process; When the set number of iterative training times is reached, the training is stopped and a trained memristor neural network is obtained; Step 4: Use the test set to test the trained memristor neural network and use the root mean square error to evaluate the performance of the memristor neural network; Step 5: The voice acquisition module collects the voice signal a and transmits it to the preprocessing module; Step 6: The preprocessing module performs a preprocessing operation on the voice signal a to obtain standard voice data b, and transmits it to the trained memristor neural network; Step 7: The trained memristor neural network classifies and recognizes the standard voice data b and outputs a voice classification result c.

7. The application method of a high-precision dynamic memristor model according to claim 6, characterized in that: During the training process, the initial weights of the memristor neural network are quantized using the uniform quantization method, which is expressed as: Among them, w represents the original weight; W q is the quantization weight; W n and W n+1 They are small intervals (W n , W n+1 ) boundary value; During the back propagation process, the conductance weight update formula is used to update the weight value in the memristor neural network, which is expressed as: Among them, α is the learning rate; is the regularization parameter, β is the regularization coefficient; σ is the standard deviation or volatility of the weight or output used for regularization; M is the calculation parameter of the weight update process; W update is the updated weight value; n is the nth layer; i is the i-th row; j is the j-th column; E n is the error function of the nth layer; The calculation expression of the calculation parameter M in the weight update process is: Among them, W threshold is the weight threshold.

8. The application method of a high-precision dynamic memristor model according to claim 6, characterized in that: The memristor neural network is provided with a first convolutional layer, a first batch normalization layer, a first maximum pooling layer, a second convolutional layer, a second batch normalization layer, a second maximum pooling layer, a flattening layer, a discard layer and a fully connected layer which are connected in sequence.

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