Self-adaptive linearization biasing circuit, radio frequency module, chip and electronic equipment

Abstract

The invention provides a self-adaptive linearization biasing circuit, a radio frequency module, a chip and electronic equipment. The self-adaptive linearization biasing circuit comprises a biasing sub-circuit and a commutator circuit. The output end of the bias sub-circuit, the control end of the commutator circuit and the radio frequency input end of the power amplifier are coupled to a first node, the output end of the commutator circuit is coupled to a voltage division node of the bias sub-circuit, and the commutator circuit is configured to generate a feedback signal according to the compensation current of the bias sub-circuit to the power amplifier, therefore, the bias sub-circuit reduces the compensation current while not influencing the linearity compensation function. According to the invention, AM-AM distortion is not deteriorated while the current of the power amplifier is reduced, so that the efficiency is optimized while the linearity compensation function is not influenced.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of power amplifiers, and in particular to an adaptive linearization bias circuit, a radio frequency module, a chip and an electronic device. BACKGROUND

[0002] With the rapid development and continuous evolution of wireless communication technology, the requirements for front-end communication systems are also becoming higher and higher, such as requiring higher throughput and linearity while also requiring lower power consumption. As an important component of a wireless transmitter system, the performance of a power amplifier has a decisive influence on the performance of the entire communication system.

[0003] With the continuous updating and iteration of cellular and WLAN (Wireless Local Area Network) standards, signal transmission schemes have become increasingly complex. This is mainly reflected in the requirement for higher PAPR (Peak to Average Power Ratio), large channel bandwidth and higher-order quadrature amplitude modulation. In terms of the requirements for power amplifiers, in order to meet high PAPR signal transmission, it is necessary to ensure that the power amplifier operates at a back-off power, which ensures linearity but sacrifices efficiency. Therefore, how to provide a circuit structure that can effectively improve the back-off efficiency without affecting the saturation power and linearity is one of the main research topics for those skilled in the art.

[0004] From the perspective of power amplifier design types, there are three traditional methods for improving efficiency: (1) reducing the current conduction angle, from class A to class C; (2) using switch-type power amplifiers and harmonic control-type power amplifiers; and (3) using Doherty-type power amplifiers. These three methods are common PA (Power Amplifier) types and are the underlying logic of the design. From the perspective of bias adjustment technology, there are mainly two solutions in the prior art: one is APT (Average Power Tracking), which controls the power supply voltage by tracking the average power of the signal; and the other is ET (Envelope Tracking), which controls the power amplifier operating voltage by detecting the envelope signal amplitude.

[0005] However, the above-mentioned schemes usually need other control chips to assist in addition to power amplifiers (power amplifiers) to realize, there are defects such as complex structure and high cost. Therefore, the skilled in the art tends to adopt a simple bias circuit directly applied to the bias network of the power amplifier to realize the trade-off between linearity and efficiency. Specifically, the bias network of the current general power amplifier is called adaptive linearization bias network, which is usually composed of two diodes and a triode. Its function is to prevent the power amplifier from working at high power due to the self-heating effect of the transistor itself and the rectification effect of PN, causing AM-AM (Amplitude Modulation, amplitude modulation-amplitude modulation) distortion. The basic principle is that the emitter stage follower composed of a triode provides a compensation current and voltage to suppress the gain compression and phase distortion of the power amplifier tube under large signal conditions by using the rectification effect of its base-emitter junction. This part of the compensation current plus the current of the power amplifier tube itself directly determines the efficiency of the power amplifier through the current amplification of the transistor. Therefore, under the premise of not affecting the linearity of the power amplifier, how to reduce the size of the compensation current required by the power amplifier tube is the key technology to optimize the efficiency of the power amplifier. The current bias circuit structure cannot provide linear compensation and efficiency optimization at the same time.

[0006] It should be noted that the information disclosed in the background section of the present application is only intended to deepen the understanding of the general background of the present application, and should not be regarded as acknowledging or implying in any form that the information constitutes prior art known to those skilled in the art. SUMMARY

[0007] The present application aims at the problem that the bias circuit in the prior art cannot simultaneously optimize efficiency and provide linear compensation. The present application provides an adaptive linearization bias circuit, a radio frequency module, a chip and an electronic device. The present application can reduce the current of the power amplifier without worsening the AM-AM distortion, thereby optimizing the efficiency without affecting the linear compensation function.

[0008] In order to achieve the above-mentioned purpose, the present application realizes the following technical scheme: an adaptive linearization bias circuit for a power amplifier, the adaptive linearization bias circuit comprising a bias sub-circuit and a rectification sub-circuit; the output end of the bias sub-circuit, the control end of the rectification sub-circuit and the radio frequency input end of the power amplifier are coupled to a first node, the output end of the rectification sub-circuit is coupled to the voltage division node of the bias sub-circuit, and the rectification sub-circuit is configured to generate a feedback signal according to the compensation current of the bias sub-circuit to the power amplifier, so that the bias sub-circuit reduces the compensation current without affecting the linear compensation function.

[0009] Optionally, the rectifier circuit comprises a first bipolar junction transistor and at least one first resistor, a base of the first bipolar junction transistor is coupled to the first node, a collector of the first bipolar junction transistor is coupled to the voltage dividing node, and an emitter of the first bipolar junction transistor is coupled to ground; the at least one first resistor is in series with the base, the collector or the emitter of the first bipolar junction transistor.

[0010] Optionally, the biasing sub-circuit comprises a second resistor, a first diode, a second diode and a second bipolar junction transistor, a first end of the second resistor receives a first voltage, a second end of the second resistor, a base of the second bipolar junction transistor and a positive electrode of the first diode are coupled to a second node, a common connection point of a negative electrode of the first diode and a positive electrode of the second diode forms the voltage dividing node, a negative electrode of the second diode is coupled to ground, a collector of the second bipolar junction transistor receives a second voltage, and an emitter of the second bipolar junction transistor is coupled to the first node.

[0011] Optionally, the first diode and / or the second diode comprises a base and a collector shorted triode.

[0012] Optionally, the biasing sub-circuit further comprises a capacitor, a first end of the capacitor is coupled to the second node, and a second end of the capacitor is coupled to ground.

[0013] To achieve the above object, the present application further provides a radio frequency module, which comprises a power amplification circuit and any one of the adaptive linearization biasing circuits, the power amplification circuit comprises a power amplifier, and a radio frequency input end of the power amplifier is coupled to an output end of the adaptive linearization biasing circuit.

[0014] Optionally, the power amplification circuit further comprises a third resistor, a first end of the third resistor is coupled to the first node, and a second end of the third resistor is coupled to the radio frequency input end of the power amplifier.

[0015] Optionally, the power amplifier comprises a third bipolar junction transistor.

[0016] To achieve the above object, the present application further provides a chip, which is integrated with any one of the adaptive linearization biasing circuits or any one of the radio frequency modules.

[0017] To achieve the above object, the present application further provides an electronic device, which comprises any one of the adaptive linearization biasing circuits, any one of the radio frequency modules or the chip.

[0018] Compared with the prior art, the adaptive linearization bias circuit, the radio frequency module, the chip and the electronic device provided by the application have the following advantages: the adaptive linearization bias circuit provided by the application comprises a biasing subcircuit and a rectifying subcircuit, the biasing subcircuit can provide a stable static working point for a power amplifier, ensure that the power amplifier works in a linear region when amplifying a signal, and avoid signal distortion or entering a nonlinear region; further, the rectifying subcircuit can provide a feedback signal for the biasing subcircuit in real time, so that the biasing subcircuit reduces a compensation current while not affecting a linearity compensation function. As can be seen, the application can reduce the current of the power amplifier while not deteriorating AM-AM distortion, so as to optimize the efficiency while not affecting the linearity compensation function.

[0019] Further, since the radio frequency module, the chip and the electronic device provided by the application belong to the same inventive concept as the adaptive linearization bias circuit provided by the application, the radio frequency module, the chip and the electronic device provided by the application at least have all the advantages of the adaptive linearization bias circuit provided by the application, and the detailed content of the beneficial effects of the radio frequency module, the chip and the electronic device provided by the application is described above in relation to the beneficial effects of the adaptive linearization bias circuit provided by the application, which will not be described one by one here. BRIEF DESCRIPTION OF DRAWINGS

[0020] Figure 1 The structural block diagram of the adaptive linearization bias circuit provided by the application is shown in the figure.

[0021] Figure 2 The structural block diagram of the radio frequency module provided by one of the embodiments of the application is shown in the figure.

[0022] Figure 3 The topological structure schematic diagram of the adaptive linearization bias circuit provided by one of the embodiments of the application is shown in the figure.

[0023] Figure 4 The specific example diagram of the first diode and the second diode is shown in the figure. Figure 3

[0024] The AM-AM curve schematic diagram of the power variation before and after the static working point of the power amplifier is reduced is shown in the figure. Figure 5a

[0025] The efficiency curve schematic diagram of the power variation before and after the static working point of the power amplifier is reduced is shown in the figure. Figure 5b

[0026] In the figure, the reference signs are as follows:

[0027] Adaptive linearization bias circuit - 100;

[0028] ​Rectifier circuit - 110, first HBT - HBT1, first resistor - R1;

[0029] Biasing sub-circuit - 120, second resistor - R2, first diode - D1, second diode - D2, second HBT - HBT2, capacitor - C1;

[0030] First node - N1, second node - N2, voltage division node - N3;

[0031] First voltage - V1, second voltage - V2;

[0032] Power amplifier circuit - 200, power amplifier - HBT3, third resistor - R3. DETAILED DESCRIPTION

[0033] The application will be further described below in conjunction with the accompanying drawings. The advantages and features of the application will be more apparent from the following description. It should be noted that the drawings are very simplified and all use non-precise proportions, only to facilitate, clear to assist the purpose of explaining the embodiments of the application. In order to make the purpose, features and advantages of the application more apparent and easy to understand, please refer to the accompanying drawings. It should be noted that the structure, proportion, size and the like shown in the drawings of the present application are only used to cooperate with the content disclosed in the specification, so that those skilled in the art can understand and read, and are not used to limit the implementation of the application. Any modification of structure, change of proportion relationship or adjustment of size, as long as it is the same or similar to the effect and purpose that can be achieved by the application, should still fall within the scope of the technology disclosed by the application. The specific design features of the application disclosed herein include, for example, specific dimensions, directions, positions and shapes, which will be determined in part by the specific application and use environment. In the embodiments described below, the same reference signs are sometimes used in different drawings to represent the same parts or parts with the same function, and the repeated description is omitted. In this specification, similar signs and letters are used to represent similar items, so once an item is defined in one drawing, it does not need to be further discussed in subsequent drawings.

[0034] It should be noted that the relative terms such as first and second and the like are used herein only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between such entities or operations. Moreover, the terms "comprising", "including", or any other variant thereof are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements recited, but can also include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by an indefinite article "a" or "an" does not exclude the existence of additional identical elements in the process, method, article, or apparatus that includes the element. The singular forms "a", "an" and "the" include plural referents unless the context clearly dictates otherwise. The term "or" is generally employed in its sense including "and / or" unless the context clearly dictates otherwise. The term "several" is generally employed in its sense including "at least one" unless the context clearly dictates otherwise. The term "at least two" is generally employed in its sense including "two or more" unless the context clearly dictates otherwise. In addition, the terms "first", "second", "third", etc. are used only for descriptive purposes and cannot be understood as indicating or implying relative importance or implying a number of the technical features indicated.

[0035] It should be understood that when an element is referred to as being "connected", "connected to", "coupled" to" another element, it can be directly connected to the other element or intervening elements can be present. In contrast, when an element is referred to as being "directly connected" or "directly connected to" another element, there are no intervening elements present.

[0036] The core idea of the present application is to provide a self-adaptive linearization bias circuit, a radio frequency module, a chip and an electronic device. The present application can reduce the current of the power amplifier without deteriorating the AM-AM distortion, thereby optimizing the efficiency without affecting the linearity compensation function.

[0037] It should be noted that the self-adaptive linearization bias circuit provided by the present application can be used in the radio frequency module and the electronic device provided by the present application. The self-adaptive linearization bias circuit, the radio frequency module and the chip provided by the present application can be used in the electronic device provided by the present application. It should be noted that those skilled in the art should understand that the present application does not make any limitation on the electronic device. Exemplarily, the electronic device includes but is not limited to video products such as televisions, video recorders and digital cameras, communication products such as mobile phones, communication switching devices and communication transmission devices, learning auxiliary products such as translators, learning machines and electronic dictionaries, medical instruments such as medical imaging devices and medical detection devices, and the like, without listing one by one.

[0038] To achieve the above object, the present invention provides an adaptive linearization bias circuit for a power amplifier. For example, see Figure 1 , Figure 1 This is a structural block diagram of the adaptive linear bias circuit provided by the present invention. Figure 1 It can be seen that the adaptive linearization bias circuit 100 includes a bias sub-circuit 120 and a rectifier sub-circuit 110. The output end of the bias sub-circuit 120, the control end of the rectifier sub-circuit 110, and the RF input end of the power amplifier HBT3 are coupled to the first node N1, and the output end of the rectifier sub-circuit 110 is coupled to the voltage divider node ( Figure 1 Not shown, please see Figure 3 N3 in the figure), the rectifier sub-circuit 110 is configured to generate a feedback signal for the compensation current of the power amplifier HBT3 according to the bias sub-circuit 120, so that the bias sub-circuit 120 reduces the compensation current without affecting the linearity compensation function.

[0039] The adaptive linearization bias circuit 100 provided by the present invention includes a bias subcircuit 120 and a rectifier subcircuit 110. The bias subcircuit 120 can provide a stable static operating point for the power amplifier HBT3, ensuring that it operates in the linear region when amplifying signals, avoiding signal distortion or entering the nonlinear region. Furthermore, the rectifier subcircuit 110 can provide a real-time feedback signal to the bias subcircuit 120, thereby enabling the bias subcircuit 120 to reduce the compensation current without affecting the linearity compensation function. Thus, the present invention can reduce the current of the power amplifier HBT3 without worsening AM-AM distortion, thereby achieving optimized efficiency without affecting the linearity compensation function.

[0040] It should be noted that those skilled in the art should be able to understand that the present invention does not impose any limitation on the specific application scenario of the adaptive linearization bias circuit 100. For example, see Figure 2 , Figure 2 This is a structural block diagram of a radio frequency module provided in one embodiment of the present invention, which is one application scenario of the adaptive linear bias circuit 100 provided in the present invention.

[0041] For example, see Figure 3 , Figure 3 Schematic diagram of the topology of the adaptive linear bias circuit provided in one embodiment of the present invention. Figure 3As shown, in some exemplary embodiments, the rectifier circuit 110 comprises a first HBT (Heterojunction Bipolar Transistor) HBT1 and at least one first resistor R1, the base of the first HBT HBT1 is coupled to the first node N1, the collector of the first HBT HBT1 is coupled to the voltage division node N3, and the emitter of the first HBT HBT1 is coupled to the ground after being connected in series with the first resistor R1. In this way, the rectifier circuit 110 is implemented by using a HBT, based on the good high-frequency performance, high carrier mobility and good power carrying capacity of the HBT, not only can ensure that the adaptive linearization bias circuit 100 provided by the present application has better applicability, but also can effectively improve the efficiency and reduce the noise interference; further, by coupling the first resistor R1 to the emitter of the first HBT HBT1, the stability and reliability of the present application can be further improved.

[0042] It should be noted that those skilled in the art should understand that the present application does not make any limitation on the specific type of the first HBT HBT1. For example, in some exemplary embodiments, the first HBT HBT1 can be, but is not limited to, a HBT (Heterojunction Bipolar Transistor) and a BJT (Bipolar Junction Transistor). As a preferred embodiment, the first HBT HBT1 is a HBT.

[0043] It should be further noted that, as those skilled in the art can understand, the present application does not make any limitation on the specific position of the first resistor R1. For example, in some exemplary embodiments, the first resistor R1 can also be connected in series between the first node N1 and the base of the first HBT HBT1; in other embodiments, the first resistor R1 can also be connected in series between the collector of the first HBT HBT1 and the voltage division node N3.

[0044] In addition, it can be understood that the present application does not make any limitation on the size of the first HBT HBT1 and the specific value of the first resistor R1. In the implementation of the present application, the size of the first HBT HBT1 and the resistance value of the first resistor R1 should be reasonably set according to the actual needs to achieve the reduction of the compensation current while not affecting the linearity compensation function of the bias sub-circuit 120 to the power amplifier HBT3, so as to optimize the efficiency.

[0045] For example, please continue to refer to Figure 3 As Figure 3As shown, in some of the exemplary embodiments, the biasing sub-circuit 120 comprises a second resistor R2, a first diode D1, a second diode D2, and a second HBT HBT2, a first end of the second resistor R2 receives a first voltage V1, a second end of the second resistor R2, a base of the second HBT HBT2, and a positive pole of the first diode D1 are coupled to a second node N2, a common connection of a negative pole of the first diode D1 and a positive pole of the second diode D2 forms the voltage division node N3, a negative pole of the second diode D2 is coupled to ground, a collector of the second HBT HBT2 receives a second voltage V2, and an emitter of the second HBT HBT2 is coupled to the first node N1. Thus, the biasing sub-circuit 120 of the adaptive linearization biasing circuit 100 provided by the present application adopts the design mode of the second resistor R2, the first diode D1, the second diode D2, and the second HBT HBT2, on the one hand, the static working point of the power amplifier HBT3 can be effectively reduced, i.e., the current conduction angle of the power amplifier HBT3 can be reduced, thereby improving the overall efficiency of the power amplifier HBT3 by increasing the resistance value of the second resistor R2; on the other hand, the voltage division node N3 can be formed by the common connection of the negative pole of the first diode D1 and the positive pole of the second diode D2, thereby receiving the feedback signal of the rectifier sub-circuit 110, thereby effectively ensuring the stability and sensitivity of the biasing sub-circuit 120, which lays a good foundation for the present application to reduce the current of the power amplifier HBT3 without deteriorating the AM-AM distortion, and to optimize the efficiency without affecting the linear compensation function.

[0046] It should be understood by those skilled in the art that the specific implementation of the first diode D1 and the second diode D2 is not limited too much by the present application. For example, please refer to Figure 4 , Figure 4 For Figure 3 a specific example of the first diode D1 and the second diode D2. As Figure 4As shown, in some exemplary embodiments, the first diode D1 and / or the second diode D2 include a transistor with a base and a collector short-circuited. Specifically, in some exemplary embodiments, the first diode D1 is implemented using a transistor with a base and a collector short-circuited. In this case, the emitter of the transistor used to implement the first diode D1 is coupled to the voltage dividing node N3, and the base and the collector are coupled to the second end of the second resistor R2. In some further exemplary embodiments, the second diode D2 is implemented using a transistor with a base and a collector short-circuited. In this case, the base and the collector of the transistor used to implement the second diode D2 are coupled to the voltage dividing node N3, and the emitter is coupled to ground. In some other exemplary embodiments, the first diode D1 and the second diode are both transistors with bases and collectors short-circuited. In this case, the base and collector of the transistor for implementing the first diode D1 are coupled to the second end of the second resistor R2, the emitter of the transistor for implementing the first diode D1 and the base and collector of the transistor for implementing the second diode D2 are coupled to the voltage dividing node N3, and the emitter of the transistor for implementing the second diode D2 is coupled to ground.

[0047] Furthermore, it should be noted that those skilled in the art will appreciate that the present invention does not impose any limitations on the specific type of the second bipolar junction transistor HBT2. For example, in some exemplary embodiments, the second bipolar junction transistor HBT2 may be, but is not limited to, a heterojunction bipolar transistor (HBT) and a bipolar junction transistor (BJT). In one preferred embodiment, the second bipolar junction transistor HBT2 is a heterojunction bipolar transistor.

[0048] For example, please see Figure 3 ,like Figure 3 As shown, in some exemplary embodiments, the bias sub-circuit 120 further includes a capacitor C1, a first terminal of the capacitor C1 being coupled to the second node N2, and a second terminal of the capacitor C1 being coupled to ground. Thus, the capacitor C1 can improve the stability of the base voltage of the second bipolar junction transistor HBT2, thereby further improving the stability and reliability of the adaptive linearization bias circuit 100 provided by the present invention.

[0049] In order to understand the present invention more conveniently, Figure 2 and Figure 3 The working principle of the adaptive linearization bias circuit 100 provided by the present invention is described as follows:

[0050] In practical applications, the core of the power amplifier circuit 200 of the RF module is the power amplifier HBT3. In the prior art, the static operating point of the power amplifier HBT3 is often lowered by increasing the second resistor R2, that is, reducing its current conduction angle (for example, changing it from the original Class A to Class AB) to improve the overall efficiency of the power amplifier HBT3, but this will sacrifice linearity. For example, see Figure 5a and Figure 5b , Figure 5a The diagram below shows the curve of AM-AM changing with power before and after lowering the static operating point of the power amplifier HBT3. Figure 5b Schematic diagram of the curve showing the efficiency versus power before and after lowering the static operating point of the power amplifier HBT3. Specifically, Figure 5a The solid line in the middle is a schematic diagram of the curve of AM-AM changing with power before lowering the static operating point. Figure 5a The middle dotted line is a schematic diagram of the curve of AM-AM changing with power after lowering the static operating point in the prior art. Figure 5b The solid line in the middle is a schematic diagram of the curve of efficiency changing with power before lowering the static operating point. Figure 5b The middle dashed line is a schematic diagram of the curve of efficiency changing with power after the static operating point is lowered. Figure 5a and Figure 5b It can be seen that before lowering the static operating point, Figure 5a The solid line in the figure shows that the AM-AM distortion is small. After reducing the current and the static operating point using the existing technology, as shown in FIG. Figure 5a As the dotted line in the figure shows, the AM-AM distortion increases and the linearity of the power amplifier HBT3 deteriorates. Figure 5b As shown by the dotted line in FIG, the efficiency of the power amplifier HBT3 will increase due to the reduction of the quiescent current.

[0051] Specifically, combined Figure 3The working principle of the adaptive linearization bias circuit is as follows: the base-emitter junction of the first HBT1 participates in rectification when a high-power signal is input, and the base-emitter junction of the second HBT2 participates in rectification when a high-power signal is input in the original traditional bias circuit, so as to compensate the current of the power amplifier HBT3, and the third resistor R3 compensates the Vbe (base-emitter voltage) reduction of the power amplifier HBT3 when the power is high, at this time, if the second resistor R2 is increased to reduce the static working point, but the compensation current capacity of the second HBT2 does not change, which will cause AM-AM to rise and distortion when a high-power signal is input. The first HBT1 is introduced to rectify in the adaptive linearization bias circuit, so that the excess compensation current is absorbed by the first HBT1, and the collector of the first HBT1 is connected between the first diode D1 and the second diode D2 to form a feedback, so that the positive electrode voltage of the second diode D2 is reduced, and the base voltage of the second HBT2 is further reduced, so that the compensation effect of the second HBT2 is further weakened. Through the adaptive linearization bias circuit 100, the AM-AM shown by the solid line and the PAE (Power Added Efficiency, power added efficiency) shown by the dashed line can be finally realized. Figure 5a Figure 5b The PAE is improved, and the linearity and efficiency of the power amplifier HBT3 are both improved.

[0052] In conclusion, the first HBT1 and the first resistor R1 of the rectifier sub-circuit 110 are connected to the common connection point (i.e., the voltage division node N3) of the negative electrode of the first diode D1 and the positive electrode of the second diode D2 of the bias sub-circuit 120 to feedback the rectification current, the same technical effect as increasing the second resistor R2 to reduce the current can be achieved, the AM-AM distortion is not deteriorated too much, and the linearity compensation and efficiency optimization can be considered.

[0053] Another embodiment of the present application provides a radio frequency module. Figure 1 Figure 3 From Figure 1 ​​It can be seen that the radio frequency module comprises the power amplification circuit 200 and the adaptive linearization bias circuit 100 according to any one of the above embodiments, and the radio frequency input end of the power amplifier HBT3 in the power amplification circuit 200 is coupled to the output end of the adaptive linearization bias circuit 100. Since the radio frequency module according to the present application and the adaptive linearization bias circuit 100 according to the present application belong to the same inventive concept, the radio frequency module according to the present application at least has all the advantages of the adaptive linearization bias circuit 100 according to the present application. For the details of the beneficial effects of the radio frequency module according to the present application, please refer to the relevant description of the beneficial effects of the adaptive linearization bias circuit 100 according to the present application above, which will not be repeated here.

[0054] Exemplarily, please continue to refer to Figure 3 As Figure 3 , the power amplification circuit 200 further comprises a third resistor R3, the first end of the third resistor R3 is coupled to the first node N1, and the second end of the third resistor R3 is coupled to the radio frequency input end of the power amplifier HBT3. In this way, by coupling the third resistor R3 between the first node N1 and the radio frequency input end of the power amplifier HBT3, the stability and reliability of the radio frequency module according to the present application can be further improved.

[0055] Preferably, in some exemplary embodiments, the power amplifier HBT3 comprises a third bipolar junction transistor. It can be understood that the present application does not make any limitation on the specific type of the third bipolar junction transistor. For example, in some exemplary embodiments, the third bipolar junction transistor can be, but is not limited to, a heterojunction bipolar transistor (HBT) and a bipolar junction transistor (BJT). As a preferred embodiment, the third bipolar junction transistor is a heterojunction bipolar transistor. In this way, based on the advantages of the heterojunction bipolar transistor such as large gain, high efficiency, good linearity, high power density, low leakage, etc., the performance of the radio frequency module according to the present application can be further improved.

[0056] In addition, the radio frequency module comprises not only the power amplifier, but also other devices such as input matching network, output matching network, etc., and various devices cooperate to complete the wireless transmission function. The specific structure will not be repeated here. For more detailed content of the radio frequency module, please refer to the relevant technical adaptive understanding known to those skilled in the art, which will not be described in detail here due to the limited space.

[0057] Another embodiment of the present application provides a chip. In some exemplary embodiments, the chip integrates the adaptive linearization bias circuit of any of the above embodiments; in other exemplary embodiments, the chip integrates the radio frequency module of any of the above embodiments.

[0058] Still another embodiment of the present application provides an electronic device. In some embodiments, the electronic device comprises the adaptive linearization bias circuit of any of the above embodiments, or the radio frequency module of any of the above embodiments, or the chip as described above.

[0059] Since the electronic device of the present application belongs to the same inventive concept as the adaptive linearization bias circuit, the radio frequency module, or the chip of the present application, and the radio frequency module and the chip of the present application belong to the same inventive concept as the adaptive linearization bias circuit of the present application, the electronic device of the present application at least has all the advantages of the adaptive linearization bias circuit of the present application. For the details of the advantages of the electronic device of the present application, please refer to the above description of the advantages of the adaptive linearization bias circuit of the present application, which will not be repeated here.

[0060] More specifically, the electronic device of the present embodiment at least comprises a processor and a memory, and can further comprise a display component, a communication component, a sensor component, a power supply component, a multimedia component, and an input / output interface, according to actual needs. The display component, the memory, the communication component, the sensor component, the power supply component, the multimedia component, and the input / output interface are all connected to the processor. The memory can be a static random access memory (SRAM), an electrically erasable programmable read-only memory (EEPROM), an erasable programmable read-only memory (EPROM), a programmable read-only memory (PROM), a read-only memory (ROM), a magnetic memory, a flash memory, etc. The processor can be a central processing unit (CPU), a graphics processing unit (GPU), a field programmable logic gate array (FPGA), an application specific integrated circuit (ASIC), a digital signal processing (DSP) chip, etc. The other communication component, the sensor component, the power supply component, the multimedia component, etc. can all be realized by general components, which will not be described here in detail due to the limited space, and the more detailed contents can be understood by the skilled in the art according to the related technologies.

[0061] It should be noted that the functional modules in each of the embodiments herein can be integrated together to form an independent part, or each module can exist independently, or two or more modules can be integrated to form an independent part.

[0062] Compared with the prior art, the adaptive linearization bias circuit, the radio frequency module, the chip and the electronic device provided by the application have the following advantages: the adaptive linearization bias circuit provided by the application comprises a biasing sub-circuit and a rectifying sub-circuit, the biasing sub-circuit can provide a stable static working point for a power amplifier, ensure that the power amplifier works in a linear region when amplifying a signal, and avoid signal distortion or entering a nonlinear region; further, the rectifying sub-circuit can provide a feedback signal for the biasing sub-circuit in real time, so that the biasing sub-circuit reduces a compensation current while not affecting a linearity compensation function. As can be seen, the application can reduce the current of the power amplifier while not deteriorating AM-AM distortion, so as to optimize the efficiency while not affecting the linearity compensation function.

[0063] The above description is only a description of the preferred embodiments of the adaptive linearization bias circuit, the radio frequency module, the chip and the electronic device provided by the application, and does not limit the scope of the application. Any modification or change made by a person skilled in the art according to the above disclosure is within the protection scope of the application. Obviously, those skilled in the art can make various modifications and changes to the application without departing from the spirit and scope of the application. Therefore, if these modifications and changes are within the scope of the application and its equivalent technology, the application also intends to include these modifications and changes.

Claims

1. An adaptive linearization bias circuit for a power amplifier, characterized in that: The adaptive linearization bias circuit includes a bias subcircuit and a rectifier subcircuit; the output end of the bias subcircuit, the control end of the rectifier subcircuit, and the RF input end of the power amplifier are coupled to a first node; the output end of the rectifier subcircuit is coupled to a voltage divider node of the bias subcircuit; the rectifier subcircuit is configured to generate a feedback signal based on the compensation current of the power amplifier by the bias subcircuit, so that the bias subcircuit reduces the compensation current without affecting the linearity compensation function.

2. The adaptive linearization bias circuit according to claim 1, wherein: The rectifier circuit includes a first bipolar junction transistor and at least one first resistor, wherein the base of the first bipolar junction transistor is coupled to the first node, the collector thereof is coupled to the voltage dividing node, and the emitter thereof is coupled to the ground; and at least one first resistor is connected in series with the base, collector, or emitter of the first bipolar junction transistor.

3. The adaptive linearization bias circuit according to any one of claims 1 to 2, characterized in that: The bias subcircuit includes a second resistor, a first diode, a second diode, and a second bipolar junction transistor. The first end of the second resistor receives a first voltage. The second end of the second resistor, the base of the second bipolar junction transistor, and the anode of the first diode are coupled to a second node. The common node of the cathode of the first diode and the anode of the second diode forms the voltage dividing node. The cathode of the second diode is coupled to ground. The collector of the second bipolar junction transistor receives a second voltage. The emitter of the second bipolar junction transistor is coupled to the first node.

4. The adaptive linearization bias circuit according to claim 3, wherein: The first diode and / or the second diode comprises a transistor with a base and a collector short-circuited.

5. The adaptive linearization bias circuit according to claim 3, wherein: The bias sub-circuit further includes a capacitor, a first terminal of the capacitor is coupled to the second node, and a second terminal of the capacitor is coupled to the ground.

6. A radio frequency module, characterized in that: The RF module includes a power amplifier circuit and an adaptive linearization bias circuit as described in any one of claims 1 to 5, wherein the power amplifier circuit includes a power amplifier, and the RF input end of the power amplifier is coupled to the output end of the adaptive linearization bias circuit.

7. The radio frequency module according to claim 6, wherein: The power amplifier circuit further includes a third resistor, a first end of the third resistor is coupled to the first node, and a second end of the third resistor is coupled to the radio frequency input end of the power amplifier.

8. The radio frequency module according to claim 6, wherein: The power amplifier includes a third bipolar junction transistor.

9. A chip, characterized in that: An adaptive linear bias circuit as described in any one of claims 1 to 5, or a radio frequency module as described in any one of claims 6 to 8 is integrated thereon.

10. An electronic device, characterized in that: It comprises the adaptive linearization bias circuit according to any one of claims 1 to 5, or the radio frequency module according to any one of claims 6 to 8, or the chip according to claim 9.

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