Method and structure for measuring upper source / drain resistance

Abstract

The invention provides a method and a structure for measuring upper source / drain resistance, which are applied to a vertical field effect transistor, the vertical field effect transistor comprises an upper source / drain region, and the method mainly comprises the following steps: leading out a first end, a second end and a third end from the upper source / drain region through contact holes; the first end, the second end and the third end are connected with an excitation end and / or a measurement end, and the excitation end is used for driving excitation current to flow between any two ends of the first end, the second end and the third end; the measuring end is used for measuring a voltage value between any two ends of the first end, the second end and the third end; obtaining a current value and a voltage value of the excitation current; and obtaining source-drain parasitic resistance of the upper source / drain region according to the current value and the voltage value. Three measuring ends are led out from the upper source / drain region, under the condition that the channel is closed, the resistance value of the source / drain parasitic resistor of the upper source / drain region is obtained by obtaining the current value and the voltage value of the excitation current, the number of the measuring ends and the layout area are saved, and the measuring efficiency is improved.

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular to a method and structure for measuring source / drain resistance. Background Art

[0002] In order to improve the integration of integrated circuits, vertical gate-all-around field effect transistors (VFETs) have been developed, which further reduces the size of the underlying field effect transistors. Figure 1 As shown, the VFET includes a source / drain / gate three-terminal structure, the current flow in its channel is perpendicular to the wafer surface, and source / drain regions (including upper source / drain region and lower source / drain region) are distributed on the upper and lower sides of its channel.

[0003] In related technologies, such as Figure 2 As shown, the upper source / drain region in the VFET leads to three connection terminals (the first terminal, the third terminal, and the second terminal from left to right), the lower source / drain region in the VFET leads to one connection terminal, and the gate region in the VFET leads to one connection terminal. Combined with the Kelvin measurement method, the connection terminal of the lower source / drain region is used as the input terminal of the constant measurement current, and the first terminal and the second terminal led from the upper source / drain are combined as the output terminal of the constant measurement current. When performing resistance measurement, a voltage signal is connected to the connection terminal led from the gate region to turn on the channel of the VFET, and the measurement current flows through the lower source / drain region, the channel, and the upper source / drain region in sequence. The first real-time voltage between the first terminal and the third terminal, and the second real-time voltage between the second terminal and the third terminal are measured, and the contact resistance of the upper source / drain region is calculated according to Ohm's law.

[0004] However, in order to lead out five connection terminals through the upper source / drain region, the lower source / drain region and the gate region, it is necessary to draw test structures corresponding to the five connection terminals based on the VFET layout, which increases the connection terminals and layout area, resulting in lower efficiency in measuring the contact resistance of the upper source / drain region. Summary of the Invention

[0005] The technical problem to be solved by this application is that the existing contact resistance measurement efficiency is low.

[0006] To solve the above technical problems, the present application provides a method for measuring an upper source / drain resistance, which is applied to a vertical field effect transistor, wherein the vertical field effect transistor includes an upper source / drain region, including: leading the upper source / drain region to a first end, a second end, and a third end through a contact hole; connecting the first end, the second end, and the third end to an excitation end and / or a measurement end, wherein the excitation end is used to drive an excitation current to flow between any two ends of the first end, the second end, and the third end; the measurement end is used to measure a voltage value between any two ends of the first end, the second end, and the third end; obtaining the current value and the voltage value of the excitation current; and obtaining the source-drain parasitic resistance of the upper source / drain region based on the current value and the voltage value.

[0007] In some embodiments of the present application, the source-drain parasitic resistance includes contact resistance; connecting the first end, the second end and the third end to the excitation end and / or the measurement end includes: connecting the first end and the second end to the excitation end, respectively, and connecting the second end and the third end to the measurement end, respectively, and the measurement end is used to measure the voltage value between the second end and the third end; obtaining the resistance value of the source-drain parasitic resistance of the upper source / drain region according to the current value and the voltage value includes: obtaining the resistance value of the contact resistance of the upper source / drain region according to the current value and the voltage value.

[0008] In some embodiments of the present application, connecting the first end, the second end and the third end to the excitation end and / or the measurement end includes: connecting the second end and the third end to the excitation end, respectively, and connecting the first end and the second end to the measurement end, respectively, and the measurement end is used to measure the voltage value between the first end and the second end; obtaining the resistance value of the source-drain parasitic resistance of the upper source / drain region based on the current value and the voltage value includes: obtaining the resistance value of the contact resistance of the upper source / drain region based on the current value and the voltage value.

[0009] In some embodiments of the present application, the source-drain parasitic resistance includes a diffusion resistance; connecting the first end, the second end and the third end to the excitation end and / or the measurement end includes: connecting any two of the first end, the second end and the third end to the excitation end and the measurement end respectively; obtaining the resistance value of the source-drain parasitic resistance of the upper source / drain region based on the current value and the voltage value includes: obtaining the resistance value of the diffusion resistance of the upper source / drain region based on the current value, the voltage value, the first length and the second length, wherein the first length is the length between the first end and the second end, and the second length is the length between the second end and the third end.

[0010] In some embodiments of the present application, the step of connecting any two of the first end, the second end, and the third end to the excitation end and the measurement end, respectively, includes: connecting the first end and the second end to the excitation end, respectively, and the first end and the second end to the measurement end, respectively, and the measurement end is used to measure a first voltage value between the first end and the second end; connecting the second end and the third end to the excitation end, respectively, and the second end and the third end to the measurement end, respectively, and the measurement end is used to measure a second voltage value between the second end and the third end; obtaining the resistance value of the diffusion resistor of the upper source / drain region according to the current value, the voltage value, the first length, and the second length, includes: generating a first relationship according to the current value, the first voltage value, and the first length, wherein the first relationship is R 12 =2*R tc +R tdrf *L x1 , where R 12 is the total resistance between the first terminal and the second terminal, the R 12 is the ratio of the first voltage value to the current value, R tc is the contact resistance, R tdrf is the resistance of the upper source / drain region per unit length, L x1 is the first length; according to the current value, the second voltage value and the second length, a second relational expression is generated, and the second relational expression is R 23 =2*R tc +R tdrf *L x2 , where R 23 is the total resistance between the second terminal and the third terminal, the R 23 is the ratio of the second voltage value to the current value, L x2 is the second length; and determining the resistance value of the diffusion resistor according to the first relationship and the second relationship.

[0011] In some embodiments of the present application, obtaining the resistance of the source-drain parasitic resistance of the upper source / drain region based on the current value and the voltage value includes: obtaining the resistance of the diffusion resistance of the upper source / drain region based on the current value, the voltage value, a first length, a second length and a third length, wherein the first length is the length between the first end and the second end, the second length is the length between the second end and the third end, and the third length is the length between the first end and the third end.

[0012] In some embodiments of the present application, the step of connecting any two of the first end, the second end, and the third end to the excitation end and the measurement end, respectively, includes: connecting the first end and the second end to the excitation end, the first end and the second end to the measurement end, and the measurement end for measuring a first voltage value between the first end and the second end; connecting the second end and the third end to the excitation end, the second end and the third end to the measurement end, and the measurement end for measuring a second voltage value between the second end and the third end; connecting the first end and the third end to the excitation end, the first end and the third end to the measurement end, and the measurement end for measuring a third voltage value between the first end and the third end; obtaining the resistance value of the diffusion resistor of the upper source / drain region according to the current value, the voltage value, the first length, the second length, and the third length, includes: generating the first relationship according to the current value, the first voltage value, and the first length, the first relationship being R 12 =2*R tc +R tdrf *L x1 , where R 12 is the total resistance between the first terminal and the second terminal, the R 12 is the ratio of the first voltage value to the current value, R tc is the contact resistance, R tdrf is the resistance of the upper source / drain region per unit length, L x1 is the first length; according to the current value, the second voltage value and the second length, the second relational expression is generated, and the second relational expression is R 23 =2*R tc +R tdrf *L x2 , where R 23 is the total resistance between the second terminal and the third terminal, the R 23 is the ratio of the second voltage value to the current value, L x2 is the second length; according to the current value, the third voltage value and the third length, a third relational expression is generated, and the third relational expression is R 13 =2*R tc +R tdrf *L x3 , where R 13 is the total resistance between the first terminal and the third terminal, the R 13 is the ratio of the third voltage value to the current value, L x3is the third length; and fitting the first relational expression, the second relational expression and the third relational expression to determine the resistance value of the diffusion resistor.

[0013] In some embodiments of the present application, the vertical field effect transistor includes a gate region and a channel; the gate region is connected to a negative power supply terminal, and the negative power supply terminal is used to place the vertical field effect transistor in an accumulation region while ensuring that there is no leakage current in the channel.

[0014] To solve the above technical problems, the present application also provides a measurement structure of an upper source / drain resistance, which is applied to a vertical field effect transistor, wherein the vertical field effect transistor includes an upper source / drain region, including: a first end, a second end and a third end are led out through a contact hole in the upper source / drain region; any two of the first end, the second end and the third end are connected to an excitation end, and the excitation end is used to drive an excitation current to flow between any two of the first end, the second end and the third end; any two of the first end, the second end and the third end are connected to a measurement end, and the measurement end is used to measure the voltage value between any two of the first end, the second end and the third end.

[0015] In some embodiments of the present application, the source-drain parasitic resistance includes contact resistance; the first end and the second end are respectively connected to the excitation end, and the second end and the third end are respectively connected to the measurement end, and the measurement end is used to measure the voltage value between the second end and the third end, so as to obtain the resistance value of the contact resistance of the upper source / drain region.

[0016] In some embodiments of the present application, the second end and the third end are respectively connected to the excitation end, and the first end and the second end are respectively connected to the measuring end, and the measuring end is used to measure the voltage value between the first end and the second end so as to obtain the resistance value of the contact resistance of the upper source / drain region.

[0017] In some embodiments of the present application, the length between the second end and the first end is the first length, the length between the third end and the second end is the second length, and the length between the first end and the third end is the third length; any two ends of the first end, the second end and the third end are respectively connected to the excitation end and the measurement end, so as to obtain the resistance value of the diffusion resistor of the upper source / drain region based on the first length, the second length and the third length.

[0018] In some embodiments of the present application, the vertical field effect transistor includes a gate region and a channel; the gate region is connected to a negative power supply terminal, and the negative power supply terminal is used to place the vertical field effect transistor in an accumulation region while ensuring that there is no leakage current in the channel.

[0019] Compared to the prior art, the technical solution of this application leads the upper source / drain region to a first terminal, a second terminal, and a third terminal through a contact hole. The first terminal, the second terminal, and the third terminal are then connected to the excitation terminal and / or the measurement terminal. When the channel is closed, the current value and voltage value of the excitation current are obtained to measure the source-drain parasitic resistance of the upper source / drain region. In this way, three measurement terminals are drawn from the upper source / drain region, and three measurement terminals need to be drawn on the basis of the VFET layout, which saves the number of measurement terminals and layout area, thereby improving the efficiency of measuring the source-drain parasitic resistance of the upper source / drain region. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] The following figures describe in detail exemplary embodiments disclosed in this application. Like reference numerals denote similar structures throughout the several views of the drawings. Those skilled in the art will appreciate that these embodiments are non-limiting, exemplary embodiments, and that the drawings are provided for illustration and description purposes only and are not intended to limit the scope of this application. Other embodiments may also achieve the inventive intent of this application. It should be understood that the drawings are not drawn to scale.

[0021] Figure 1 It is a schematic diagram of the structure of an existing VFET;

[0022] Figure 2 This is a schematic diagram of the existing structure for measuring contact resistance;

[0023] Figure 3 1 is a flow chart of a method for measuring source / drain resistance according to some embodiments of the present application;

[0024] Figure 4 1 is a schematic diagram of a first source / drain resistance measurement structure according to some embodiments of the present application;

[0025] Figure 5 1 is a schematic diagram of a second source / drain resistance measurement structure according to some embodiments of the present application;

[0026] Figure 6 This is a schematic diagram of a third source / drain resistance measurement structure according to some embodiments of the present application. DETAILED DESCRIPTION

[0027] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following is a brief introduction to the drawings required for the description of the embodiments. Obviously, the drawings described below are only some examples or embodiments of the present application. For those of ordinary skill in the art, the present application can also be applied to other similar scenarios based on these drawings without creative work. Unless it is obvious from the language context or otherwise explained, the same reference numerals in the figures represent the same structure or operation. It should be clearly understood that the drawings are for illustration and description purposes only and are not intended to limit the scope of this specification.

[0028] It should be understood that the "module" and "circuit" used herein are a method for distinguishing different components, elements, parts, portions or assemblies at different levels. However, if other words can achieve the same purpose, the words can be replaced by other expressions.

[0029] The terms used in this application are for the purpose of describing specific example embodiments only and are not restrictive. When used in this specification, the terms "include", "comprise" and / or "contain" mean that the associated integers, steps, operations, elements and / or components exist, but do not exclude the existence of one or more other features, integers, steps, operations, elements, components and / or groups or that other features, integers, steps, operations, elements, components and / or groups may be added to the method for measuring source / drain resistance. When describing the association of different components in this specification, it can be a direct relationship or an indirect relationship. For example, "A and B are connected" can mean that A and B are directly connected, or A and B are indirectly connected through other components.

[0030] The increased integration density of integrated circuits has benefited from the scaling of underlying field-effect transistors. However, in recent years, with the evolution of process nodes, lateral fin field-effect transistors have been unable to meet the requirements of processes below 5nm. To further scale down the size of the underlying field-effect transistors, VFETs have been developed to overcome the limitations of lateral gate spacing and meet sub-5nm process requirements.

[0031] Since the upper source / drain region and the lower source / drain region in the VFET structure are asymmetric structures, the traditional parasitic measurement structure cannot meet the parasitic extraction requirements of the VFET. The Kelvin method can be used to measure the upper source / drain resistance. Among them, the measurement principle of the Kelvin method is to lead four connection terminals from the resistor to be measured (the first connection terminal, the second connection terminal, the third connection terminal and the fourth connection terminal from left to right), a constant current flows between the first connection terminal and the fourth connection terminal, the real-time voltage is measured between the second connection terminal and the third connection terminal, and then the resistance between the second connection terminal and the third connection terminal is calculated according to Ohm's law.

[0032] On this basis, combined with the Kelvin method measurement method, the connection end of the lower source / drain region is used as the input end of the constant measurement current, and the first end and the second end derived from the upper source / drain are combined as the output end of the constant measurement current. When performing resistance measurement, a voltage signal is connected to the connection end derived from the gate region to turn on the channel of the VFET, and the first real-time voltage between the first end and the third end, as well as the second real-time voltage between the second end and the third end, is measured. The contact resistance of the upper source / drain region is calculated according to Ohm's law. However, when performing contact resistance measurement, the measurement current flows through the lower source / drain region, the channel, and the source / drain region in sequence. There may be leakage in the process of flowing through the channel, which may lead to low measurement accuracy of the contact resistance.

[0033] Based on the above analysis, if Figure 3 As shown, the method for measuring the upper source / drain resistance provided in an embodiment of the present application is applied to a vertical field effect transistor, which includes an upper source / drain region and may include: steps S301 to S304.

[0034] Step S301 , leading the upper source / drain region to a first end, a second end, and a third end through contact holes.

[0035] Step S302: Connect the first end, the second end, and the third end to an excitation end and / or a measurement end.

[0036] Step S303: Acquire the current value of the excitation current and the voltage value.

[0037] Step S304 : obtaining the source-drain parasitic resistance of the upper source / drain region according to the current value and the voltage value.

[0038] The excitation end is used to drive an excitation current to flow between any two ends of the first end, the second end and the third end; and the measuring end is used to measure a voltage value between any two ends of the first end, the second end and the third end.

[0039] In an embodiment of the present application, the Kelvin method is used to measure the source-drain parasitic resistance of the source / drain region on a vertical field effect transistor. The source-drain parasitic resistance includes contact resistance and diffusion resistance. It is understood that the contact resistance refers to the cross-regional resistance between the upper source / drain region and the source / drain terminal derived therefrom. Diffusion resistance refers to the resistance generated by the diffusion effect between materials when current passes through a semiconductor device. The diffusion effect refers to the spontaneous movement of atoms, ions or molecules, causing them to diffuse from a high-concentration area to a low-concentration area against the concentration gradient. In semiconductor devices, the diffusion effect can lead to phenomena such as the diffusion of doped materials and the formation of pn junctions, thereby causing the emergence of diffusion resistance.

[0040] In an embodiment of the present application, the VFET includes a source / drain / gate three-terminal structure, the current flow in its channel is perpendicular to the wafer surface, and source / drain regions (including an upper source / drain region and a lower source / drain region) are distributed on the upper and lower sides of the channel. In order to measure the upper source / drain resistance of the VFET, contact holes can be passed through the first, second, and third ends of the upper source / drain region to apply an excitation circuit signal or measure a voltage value to the first, second, and third ends.

[0041] In an embodiment of the present application, two terminals selected from the first, second, and third terminals are connected to the excitation terminal according to the Kelvin four-wire connection method to drive an excitation current to flow between any two terminals of the first, second, and third terminals. Furthermore, two terminals selected from the first, second, and third terminals are connected to the measurement terminal according to the Kelvin four-wire connection method to measure a voltage value between any two terminals of the first, second, and third terminals.

[0042] It should be noted that each connection method between the excitation terminal and the measurement terminal generates a single voltage value. If multiple excitation terminal and measurement terminal connection methods are used, multiple voltage values ​​can be obtained. These multiple voltage values ​​may or may not be the same.

[0043] It is understandable that, assuming that the first end and the second end are selected from the first end, the second end, and the third end and connected to the excitation end, it can be considered that the first end is connected to the first excitation end and the second end is connected to the second excitation end, and the first excitation end and the second excitation end are the input end and the output end of a circuit loop. In the embodiment of the present application, the input end (first excitation end) and the output end (second excitation end) of a circuit loop are omitted as the excitation end.

[0044] It can also be understood that, assuming that the first end and the second end are selected from the first end, the second end, and the third end and connected to the measurement end, it can be considered that the first end is connected to the first measurement end and the second end is connected to the second measurement end, the first measurement end is used to measure the first voltage at the first end, the second measurement end is used to measure the second voltage at the second end, and the voltage value of the section of source-drain parasitic resistance between the first end and the second end is the difference between the first voltage and the second voltage. In the embodiment of the present application, the first measurement end connected to the first end of the section of source-drain parasitic resistance and the second measurement end connected to the second end of the section of source-drain parasitic resistance are omitted as measurement ends.

[0045] In the embodiment of the present application, the current value of the excitation current can be obtained by a current monitoring circuit, the current value can be determined by receiving excitation current parameters input by a user, or the current value can be obtained by monitoring a current image of the excitation current. The method for obtaining the current value in the embodiment of the present application is not limited.

[0046] In the embodiment of the present application, the source-drain parasitic resistance of the upper source / drain region may be measured according to Ohm's law, the current value, and the voltage value.

[0047] In the embodiment of the present application, the source-drain parasitic resistance can be used to analyze device performance, to improve the manufacturing process of the VFET, and to improve the SPICE device model of the VFET.

[0048] In this way, by leading the first, second, and third terminals from the upper source / drain region through contact holes, the first, second, and third terminals are then connected to the excitation terminal and / or measurement terminal. When the channel is closed, the current value and voltage value of the excitation current are obtained to measure the source-drain parasitic resistance of the upper source / drain region. In this way, three measurement terminals are led out from the upper source / drain region, and three measurement terminals need to be drawn on the basis of the VFET layout, which saves the number of measurement terminals and layout area, thereby improving the efficiency of measuring the source-drain parasitic resistance of the upper source / drain region.

[0049] In some embodiments of the present application, the vertical field effect transistor includes a gate region and a channel; the gate region is connected to a negative power supply terminal, and the negative power supply terminal is used to place the vertical field effect transistor in an accumulation region while ensuring that there is no leakage current in the channel.

[0050] In an embodiment of the present application, the gate region of the vertical field effect transistor can be left floating with no voltage applied, and the channel is non-conductive. The gate region of the vertical field effect transistor can also be connected to a negative power supply terminal. The voltage value of the negative power supply terminal is related to the characteristic parameters of the vertical field effect transistor and can be such that the channel of the vertical field effect transistor is in the accumulation region. In the embodiment of the present application, the voltage value of the negative power supply terminal is not limited.

[0051] In this way, the channel of the vertical field effect transistor is in the accumulation region, which can reduce the reverse leakage of the PN junction between the upper source / drain and the channel, thereby increasing the accuracy of the voltage value and the accuracy of the measured source-drain parasitic resistance of the upper source / drain region.

[0052] In some embodiments of the present application, the source-drain parasitic resistance includes a contact resistance. In order to measure the contact resistance, the method for measuring the upper source / drain resistance provided in the present application may include: connecting the first end and the second end to the excitation end, respectively, and connecting the second end and the third end to the measurement end, respectively, and the measurement end is used to measure the voltage value between the second end and the third end. After obtaining the current value and the voltage value, it may also include: obtaining the resistance value of the contact resistance of the upper source / drain region according to the current value and the voltage value.

[0053] In the embodiment of the present application, the gate region of the vertical field effect transistor may not be applied with voltage, and the channel is not conductive. Figure 4As shown, the excitation current between the first and second terminals flows along the upper source / drain region. Assuming the current is ideal, the second and third terminals are at the same potential in the upper source / drain region. That is, the voltage value at the connection between the second terminal and the upper source / drain region is the same as the voltage value at the connection between the third terminal and the upper source / drain region. Since no excitation current flows through the third terminal, the voltage value at the connection between the third terminal and the measurement terminal is the same as the voltage value at the connection between the third terminal and the upper source / drain region. The difference between the voltage value at the connection between the second terminal and the measurement terminal and the voltage value at the connection between the third terminal and the measurement terminal is the voltage value. This voltage value is formed by the excitation current flowing through the contact resistance.

[0054] Similarly, in some embodiments of the present application, in order to measure the contact resistance, the method for measuring the upper source / drain resistance provided by the present application may include: connecting the second end and the third end to the excitation end, respectively, and connecting the first end and the second end to the measurement end, respectively, wherein the measurement end is used to measure the voltage value between the first end and the second end. After obtaining the current value and the voltage value, the method may also include: obtaining the contact resistance value of the upper source / drain region based on the current value and the voltage value.

[0055] In some embodiments of the present application, the source-drain parasitic resistance includes a diffusion resistance. In order to measure the diffusion resistance, the upper source / drain resistance measurement method provided in the present application may include: connecting any two of the first end, the second end, and the third end to the excitation end and the measurement end, respectively; after obtaining the current value and the voltage value, it may also include: obtaining the resistance value of the diffusion resistance of the upper source / drain region based on the current value, the voltage value, the first length, and the second length, wherein the first length is the length between the first end and the second end, and the second length is the length between the second end and the third end.

[0056] In the embodiment of the present application, the resistance of the diffusion resistor is associated with the connection method of the first end, the second end, and the third end to the excitation end and / or the measurement end. The resistance of the diffusion resistor in the upper source / drain region can be determined based on the current value, the voltage value, the length (the first length and the second length) between the first end, the second end, or the third end connected to the measurement end, and the total length of the upper source / drain region of the VFET.

[0057] In this way, whether measuring contact resistance or diffusion resistance, measurement is performed through the first end, second end and third end led out from the upper source / drain region through the through hole, without the need to lead out the measurement end from the lower source / drain region, saving measurement ports and improving the measurement efficiency of the upper source / drain resistance.

[0058] In some embodiments of the present application, Figure 5 As shown, in order to measure the diffusion resistance, the source / drain resistance measurement method provided by the present application can be divided into three steps.

[0059] In the first step, the first end and the second end are connected to the excitation end respectively, and the first end and the second end are connected to the measurement end respectively, and the measurement end is used to measure a first voltage value between the first end and the second end.

[0060] After obtaining the current value and the voltage value, the method may further include: generating a first relational expression according to the current value, the first voltage value and the first length, wherein the first relational expression is R 12 =2*R tc +R tdrf *L x1 , where R 12 is the total resistance between the first terminal and the second terminal, the R 12 is the ratio of the first voltage value to the current value, R tc is the contact resistance, R tdrf is the resistance of the upper source / drain region per unit length, L x1 is the first length.

[0061] In the second step, the second end and the third end are connected to the excitation end respectively, and the second end and the third end are connected to the measurement end respectively, and the measurement end is used to measure a second voltage value between the second end and the third end.

[0062] After obtaining the current value and the voltage value, the method may further include: generating a second relational expression according to the current value, the second voltage value and the second length, wherein the second relational expression is R 23 =2*R tc +R tdrf *L x2 , where R 23 is the total resistance between the second terminal and the third terminal, the R 23 is the ratio of the second voltage value to the current value, L x2 is the second length.

[0063] The third step is to determine the resistance value of the diffusion resistor according to the first relationship and the second relationship.

[0064] In an embodiment of the present application, the first voltage value of the current value obtained in the first step constitutes a first relationship, and the second voltage value of the current value obtained in the second step constitutes a second relationship. Finally, the diffusion resistance is determined based on the first relationship and the second relationship.

[0065] In some embodiments of the present application, obtaining the resistance of the source-drain parasitic resistance of the upper source / drain region based on the current value and the voltage value may also include: obtaining the resistance of the diffusion resistance of the upper source / drain region based on the current value, the voltage value, the first length, the second length and the third length, wherein the first length is the length between the first end and the second end, the second length is the length between the second end and the third end, and the third length is the length between the first end and the third end.

[0066] In some embodiments of the present application, Figure 5 As shown, in order to measure the diffusion resistance, the source / drain resistance measurement method provided by the present application can be divided into four steps.

[0067] In the first step, the first end and the second end are connected to the excitation end respectively, and the first end and the second end are connected to the measurement end respectively, and the measurement end is used to measure a first voltage value between the first end and the second end.

[0068] After obtaining the current value and the voltage value, the method may further include: generating a first relational expression according to the current value, the first voltage value and the first length, wherein the first relational expression is R 12 =2*R tc +R tdrf *L x1 , where R 12 is the total resistance between the first terminal and the second terminal, the R 12 is the ratio of the first voltage value to the current value, R tc is the contact resistance, R tdrf is the resistance of the upper source / drain region per unit length, L x1 is the first length.

[0069] In the second step, the second end and the third end are connected to the excitation end respectively, and the second end and the third end are connected to the measurement end respectively, and the measurement end is used to measure a second voltage value between the second end and the third end.

[0070] After obtaining the current value and the voltage value, the method may further include: generating a second relational expression according to the current value, the second voltage value and the second length, wherein the second relational expression is R 23 =2*R tc +R tdrf *L x2 , where R 23 is the total resistance between the second terminal and the third terminal, the R 23 is the ratio of the second voltage value to the current value, L x2 is the second length.

[0071] In the third step, the first end and the third end are connected to the excitation end respectively, and the first end and the third end are connected to the measurement end respectively, and the measurement end is used to measure a third voltage value between the first end and the third end.

[0072] After obtaining the current value and the voltage value, the method may further include: generating a third relational expression according to the current value, the third voltage value and the third length, wherein the third relational expression is R 13 =2*R tc +R tdrf *L x3 , where R 13 is the total resistance between the first terminal and the third terminal, the R 13 is the ratio of the third voltage value to the current value, L x3 is the third length;

[0073] The fourth step is to fit the first relational expression, the second relational expression and the third relational expression to determine the resistance value of the diffusion resistor.

[0074] In an embodiment of the present application, the first voltage value of the current value obtained according to the first step constitutes a first relationship formula, the second voltage value of the current value obtained according to the second step constitutes a second relationship formula, and the third voltage value of the current value obtained according to the third step constitutes a third relationship formula. Finally, the resistance value of the diffusion resistor is determined according to the first relationship formula and the second relationship formula.

[0075] In this way, a wider range of fitting can be performed through the first, second and third relationship expressions, thereby improving the accuracy of the measured diffusion resistance value.

[0076] The beneficial effects that may be brought about by the embodiments of the present application include, but are not limited to: by leading the first, second, and third terminals from the upper source / drain region through a contact hole, then connecting the first, second, and third terminals to an excitation terminal and / or a measurement terminal, obtaining the current value and voltage value of the excitation current when the channel is closed to measure the source-drain parasitic resistance of the upper source / drain region. In this way, three measurement terminals are led out from the upper source / drain region, and three measurement terminals need to be drawn on the basis of the VFET layout, which saves the number of measurement terminals and layout area, thereby improving the efficiency of measuring the source-drain parasitic resistance of the upper source / drain region.

[0077] It should be noted that different embodiments may produce different beneficial effects. In different embodiments, the beneficial effects that may be produced may be any one or a combination of the above, or any other possible beneficial effects.

[0078] The above mainly introduces the solutions of the embodiments of the present application from the perspective of methods. It is understandable that, in combination with the various examples described in the embodiments of the present application, those skilled in the art should easily realize that the present application can be implemented through hardware, computer software, or a combination of hardware and software (hardware and computer software).

[0079] In order to implement the source / drain resistance measurement method provided by this application, as Figure 4 As shown, an embodiment of the present application further provides a structure for measuring an upper source / drain resistance, which is applied to a vertical field effect transistor. The vertical field effect transistor includes an upper source / drain region and may include:

[0080] Leading out a first end, a second end and a third end from the upper source / drain region through contact holes;

[0081] Any two ends of the first end, the second end, and the third end are connected to an excitation end, and the excitation end is used to drive an excitation current to flow between any two ends of the first end, the second end, and the third end;

[0082] Any two ends of the first end, the second end and the third end and a measuring end, the measuring end is used to measure a voltage value between any two ends of the first end, the second end and the third end.

[0083] In some embodiments of the present application, Figure 4 As shown, the first end and the second end are respectively connected to the excitation end, and the second end and the third end are respectively connected to the measurement end, and the measurement end is used to measure the voltage value between the second end and the third end so as to obtain the resistance value of the contact resistance of the upper source / drain region.

[0084] In some embodiments of the present application, Figure 4 As shown, the second end and the third end are respectively connected to the excitation end, and the first end and the second end are respectively connected to the measuring end, and the measuring end is used to measure the voltage value between the first end and the second end so as to obtain the resistance value of the contact resistance of the upper source / drain region.

[0085] In some embodiments of the present application, Figure 5 As shown, the length between the second end and the first end is the first length, the length between the third end and the second end is the second length, and the length between the first end and the third end is the third length; any two ends of the first end, the second end and the third end are respectively connected to the excitation end and the measurement end, so as to obtain the resistance value of the diffusion resistor of the upper source / drain region according to the first length, the second length and the third length.

[0086] In some embodiments of the present application, Figure 6 As shown, the measurement structure of the source / drain resistance includes: the vertical field effect transistor includes a gate region and a channel; the gate region is connected to a negative power supply terminal, and the negative power supply terminal is used to place the vertical field effect transistor in an accumulation region and at the same time ensure that there is no leakage current in the channel.

[0087] In summary, after reading the contents of this application, those skilled in the art will understand that the foregoing contents are presented by way of example only and are not intended to be limiting. Although not expressly stated herein, those skilled in the art will understand that this application is intended to encompass various reasonable changes, improvements, and modifications to the embodiments. Such changes, improvements, and modifications are within the spirit and scope of the exemplary embodiments of this application.

[0088] It should also be understood that although the terms first, second, third, etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. Therefore, without departing from the teachings of the present application, the first element in some embodiments may be referred to as the second element in other embodiments. The same reference numerals or the same reference designators represent the same elements throughout the specification.

Claims

1. A method for measuring upper source / drain resistance, applied to a vertical field effect transistor, wherein the vertical field effect transistor includes an upper source / drain region, characterized in that: include: Leading out the first end, the second end and the third end of the upper source / drain region through the contact hole; Connecting the first end, the second end, and the third end to an excitation end and / or a measurement end, wherein the excitation end is used to drive an excitation current to flow between any two ends of the first end, the second end, and the third end; and the measurement end is used to measure a voltage value between any two ends of the first end, the second end, and the third end; Obtaining the current value of the excitation current and the voltage value; The resistance value of the source-drain parasitic resistance of the upper source / drain region is obtained according to the current value and the voltage value.

2. The method for measuring source / drain resistance according to claim 1, wherein: The source-drain parasitic resistance includes contact resistance; and connecting the first terminal, the second terminal, and the third terminal to the excitation terminal and / or the measurement terminal includes: The first end and the second end are connected to the excitation end respectively, and the second end and the third end are connected to the measurement end respectively, and the measurement end is used to measure the voltage value between the second end and the third end; Obtaining the resistance value of the source-drain parasitic resistance of the upper source / drain region according to the current value and the voltage value includes: The contact resistance value of the upper source / drain region is obtained according to the current value and the voltage value.

3. The method for measuring source / drain resistance according to claim 1, wherein: The step of connecting the first end, the second end, and the third end to the excitation end and / or the measurement end includes: The second end and the third end are connected to the excitation end respectively, and the first end and the second end are connected to the measurement end respectively, and the measurement end is used to measure the voltage value between the first end and the second end; Obtaining the resistance value of the source-drain parasitic resistance of the upper source / drain region according to the current value and the voltage value includes: The contact resistance value of the upper source / drain region is obtained according to the current value and the voltage value.

4. The method for measuring the source / drain resistance according to claim 2 or 3, wherein: The source-drain parasitic resistance includes a diffusion resistance; and the step of connecting the first terminal, the second terminal, and the third terminal to the excitation terminal and / or the measurement terminal includes: Connecting any two of the first end, the second end, and the third end to the excitation end and the measurement end, respectively; Obtaining the resistance value of the source-drain parasitic resistance of the upper source / drain region according to the current value and the voltage value includes: The resistance of the diffusion resistor of the upper source / drain region is obtained according to the current value, the voltage value, the first length and the second length, wherein the first length is the length between the first end and the second end, and the second length is the length between the second end and the third end.

5. The method for measuring source / drain resistance according to claim 4, wherein: The step of connecting any two of the first end, the second end, and the third end to the excitation end and the measurement end, respectively, comprises: Connecting the first end and the second end to the excitation end respectively, and connecting the first end and the second end to the measurement end respectively, wherein the measurement end is used to measure a first voltage value between the first end and the second end; The second end and the third end are connected to the excitation end respectively, and the second end and the third end are connected to the measurement end respectively, and the measurement end is used to measure a second voltage value between the second end and the third end; Obtaining the resistance value of the diffusion resistor of the upper source / drain region according to the current value, the voltage value, the first length, and the second length includes: A first relational expression is generated based on the current value, the first voltage value and the first length. The first relational expression is R 12 =2*R tc +R tdrf *L x1 , where R 12 is the total resistance between the first terminal and the second terminal, the R 12 is the ratio of the first voltage value to the current value, R tc is the contact resistance, R tdrf is the resistance of the upper source / drain region per unit length, L x1 is the first length; A second relational expression is generated based on the current value, the second voltage value and the second length. The second relational expression is R 23 =2*R tc +R tdrf *L x2 , where R 23 is the total resistance between the second terminal and the third terminal, the R 23 is the ratio of the second voltage value to the current value, L x2 is the second length; The resistance value of the diffusion resistor is determined according to the first relationship and the second relationship.

6. The method for measuring source / drain resistance according to claim 4, wherein: Obtaining the resistance value of the source-drain parasitic resistance of the upper source / drain region according to the current value and the voltage value includes: The resistance value of the diffusion resistor of the upper source / drain region is obtained according to the current value, the voltage value, the first length, the second length and the third length, wherein the first length is the length between the first end and the second end, the second length is the length between the second end and the third end, and the third length is the length between the first end and the third end.

7. The method for measuring source / drain resistance according to claim 6, wherein: The step of connecting any two of the first end, the second end, and the third end to the excitation end and the measurement end, respectively, comprises: Connecting the first end and the second end to the excitation end respectively, and connecting the first end and the second end to the measurement end respectively, wherein the measurement end is used to measure a first voltage value between the first end and the second end; The second end and the third end are connected to the excitation end respectively, and the second end and the third end are connected to the measurement end respectively, and the measurement end is used to measure a second voltage value between the second end and the third end; The first end and the third end are connected to the excitation end respectively, and the first end and the third end are connected to the measurement end respectively, and the measurement end is used to measure a third voltage value between the first end and the third end; Obtaining the resistance value of the diffusion resistor of the upper source / drain region according to the current value, the voltage value, the first length, the second length, and the third length includes: The first relational expression is generated according to the current value, the first voltage value and the first length. The first relational expression is R 12 =2*R tc +R tdrf *L x1 , where R 12 is the total resistance between the first terminal and the second terminal, the R 12 is the ratio of the first voltage value to the current value, R tc is the contact resistance, R tdrf is the resistance of the upper source / drain region per unit length, L x1 is the first length; The second relational expression is generated according to the current value, the second voltage value and the second length. The second relational expression is R 23 =2*R tc +R tdrf *L x2 , where R 23 is the total resistance between the second terminal and the third terminal, the R 23 is the ratio of the second voltage value to the current value, L x2 is the second length; A third relational expression is generated based on the current value, the third voltage value and the third length. The third relational expression is: 13 =2*R tc +R tdrf *L x3 , where R 13 is the total resistance between the first terminal and the third terminal, the R 13 is the ratio of the third voltage value to the current value, L x3 is the third length; The first relational expression, the second relational expression, and the third relational expression are fitted to determine the resistance value of the diffusion resistor.

8. The method for measuring source / drain resistance according to claim 1, wherein: include: The vertical field effect transistor includes a gate region and a channel; the gate region is connected to a negative power supply terminal, and the negative power supply terminal is used to place the vertical field effect transistor in an accumulation region while ensuring that there is no leakage current in the channel.

9. A structure for measuring upper source / drain resistance, applied to a vertical field effect transistor, wherein the vertical field effect transistor includes an upper source / drain region, characterized in that: include: Leading out a first end, a second end and a third end from the upper source / drain region through contact holes; Any two ends of the first end, the second end, and the third end are connected to an excitation end, and the excitation end is used to drive an excitation current to flow between any two ends of the first end, the second end, and the third end; Any two ends of the first end, the second end and the third end and a measuring end, the measuring end is used to measure a voltage value between any two ends of the first end, the second end and the third end.

10. The structure for measuring source / drain resistance according to claim 9, wherein: The first end and the second end are respectively connected to the excitation end, and the second end and the third end are respectively connected to the measurement end, and the measurement end is used to measure the voltage value between the second end and the third end so as to obtain the contact resistance value of the upper source / drain region.

11. The structure for measuring source / drain resistance according to claim 9, wherein: The second end and the third end are respectively connected to the excitation end, and the first end and the second end are respectively connected to the measurement end, and the measurement end is used to measure the voltage value between the first end and the second end so as to obtain the resistance value of the contact resistance of the upper source / drain region.

12. The structure for measuring source / drain resistance according to claim 10 or 11, characterized in that: The length between the second end and the first end is the first length, the length between the third end and the second end is the second length, and the length between the first end and the third end is the third length; any two ends of the first end, the second end and the third end are respectively connected to the excitation end and the measurement end, so as to obtain the resistance value of the diffusion resistor of the upper source / drain region based on the first length, the second length and the third length.

13. The structure for measuring source / drain resistance according to claim 9, wherein: include: The vertical field effect transistor includes a gate region and a channel; the gate region is connected to a negative power supply terminal, and the negative power supply terminal is used to place the vertical field effect transistor in an accumulation region while ensuring that there is no leakage current in the channel.

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