Source code compiling method, compiler and computing equipment

Abstract

The embodiment of the invention provides a source code compiling method, a compiler and computing equipment. The method comprises the steps of obtaining an initial intermediate representation of a source code; generating a target intermediate representation based on the initial intermediate representation; wherein the target intermediate representation indicates a storage address of the target structure body in a shared storage space of the computing device based on the target offset; the target structural body is a structural body written into the shared storage space in a program running stage; the target offset is an offset between a storage address of the target structural body in the shared storage space and a preset address of the shared storage space; the shared storage space is a storage space commonly accessed by a plurality of processes; and compiling the target intermediate representation to obtain a compiled running program. According to the scheme, a plurality of processes can operate the same variable in the shared area.

Description

TECHNICAL FIELD

[0001] Embodiments of the present application relate to the computer field, and in particular, to a source code compiling method, a compiler and a computing device. BACKGROUND

[0002] The shared memory in the computing device is a storage area that can be commonly used by multiple processes, and since each process has a separate virtual address interval, when multiple processes attach the same shared memory, the kernel of the computing device allocates different virtual addresses to each process to map the shared memory, and the start and end addresses of the virtual addresses in the virtual address intervals of different processes that map the shared memory are different.

[0003] However, in the case where process A in the multiple processes points the cached pointer A in the shared memory to the cached structure B in the shared memory (sets the value of the pointer A to the storage address of the structure B), since the storage address of the structure B corresponds to different virtual addresses in different processes, when process B accesses the structure pointed to by the pointer A, since the value of the pointer A is the virtual address corresponding to the storage address of the structure B in process A, process B cannot access the structure B pointed to by the pointer A, and therefore, how to enable multiple processes to operate on the same variable in the shared area is a technical problem that needs to be solved in the field. SUMMARY

[0004] Embodiments of the present application provide a source code compiling method, a compiler and a computing device, which can enable multiple processes to operate on the same variable in the shared area.

[0005] To achieve the above-mentioned purpose, embodiments of the present application adopt the following technical solutions:

[0006] In a first aspect, the embodiments of the present application provide a source code compiling method, which comprises: obtaining an initial intermediate representation of source code; generating a target intermediate representation based on the initial intermediate representation; wherein the target intermediate representation indicates a storage address of a target structure in a shared storage space of a computing device based on a target offset; the target structure is a structure written into the shared storage space in a program running phase; the target offset is an offset between the storage address of the target structure in the shared storage space and a preset address of the shared storage space; the shared storage space is a storage space commonly accessed by multiple processes; and compiling the target intermediate representation to obtain a compiled running program.

[0007] The above embodiment generates a target intermediate representation based on the obtained initial intermediate representation, and the target intermediate representation indicates a storage address of a target structure in the shared memory space based on a target offset; the target structure is a structure that will be written into the shared memory space in a program running stage; the target offset is an offset between the storage address of the target structure in the shared memory space and a preset address of the shared memory space; and then the target intermediate representation is compiled to obtain a compiled running program. Since the target offset is fixed and unchanged, that is, the target offset in different processes is the same, the storage address of the target structure in the shared memory space is indicated based on the target offset, and the operation of the target structure by multiple processes can be implemented, and therefore, the method can solve the problem that multiple processes cannot operate the same variable in the shared region.

[0008] In addition, in the above embodiment, the target intermediate representation is generated based on the initial intermediate representation, so that the target structure indicates the storage address of the target structure in the shared memory space based on the target offset; it can be seen that the method provided in the above embodiment does not require human intervention, and therefore, the efficiency of writing source code is improved on the basis of reducing the complexity of the source code.

[0009] In a possible implementation manner, the above generating the target intermediate representation based on the initial intermediate representation comprises: determining a first code from the initial intermediate representation; the first code is a code for implementing a first target assignment operation in the initial intermediate representation; the first target assignment operation is an operation of setting a pointer value of a first pointer to a storage address of the target structure in the shared memory space; and the first code is updated to a second code based on the target offset; the second code is a code for implementing a second target assignment operation; and the second target assignment operation is an operation of setting the pointer value of the first pointer to the target offset.

[0010] The above embodiment converts the source code into the initial intermediate representation, then updates the first code in the initial intermediate representation to the second code to obtain the target intermediate representation, wherein the first code is a code for implementing an operation of pointing the first pointer to the target structure; and finally, the target intermediate representation is compiled to obtain the compiled running program. Since the second code is used to implement an operation of setting the pointer value of the first pointer to the target offset, and since the target offset and the preset address are fixed and unchanged, when multiple processes need to operate the target structure, the operation of the target structure can be implemented based on the target offset and the preset address, and therefore, the problem that multiple processes cannot operate the same variable in the shared region is solved.

[0011] In a possible implementation manner, the second target assignment operation specifically includes: obtaining a storage address of the target structure in the shared memory space; determining a difference between the storage address and a preset address as the target offset; and setting a pointer value of the first pointer as the target offset.

[0012] In a possible implementation manner, the generating the target intermediate representation based on the initial intermediate representation further includes: determining third code from the initial intermediate representation, where the third code is code for implementing a first target value operation in the initial intermediate representation; the first target value operation is an operation of obtaining the target structure pointed to by the first pointer; and updating the third code as fourth code, where the fourth code is code for implementing a second target value operation; the second target value operation is an operation of determining a storage address of the target structure in the shared memory space based on the target offset and a preset address, and obtaining the target structure based on the storage address.

[0013] The embodiments described above convert the source code into the initial intermediate representation, then update the first code and the third code in the initial intermediate representation to obtain the target intermediate representation, where the first code is code for implementing an operation of pointing the first pointer to the target structure, and the third code is code for implementing an operation of obtaining the target structure pointed to by the first pointer; and finally, the target intermediate representation is compiled to obtain the compiled running program. Since the updated first code (that is, the second code) is used to implement an operation of setting the pointer value of the first pointer as the target offset, and the updated third code (that is, the fourth code) is used to implement an operation of determining a storage address of the target structure in the shared memory space based on the target offset and a preset address in the shared memory space, and obtaining the target structure based on the storage address of the target structure, and since the target offset and the preset address are fixed and unchangeable, when multiple processes need to operate the target structure, the target structure can be obtained based on the target offset and the preset address, and the obtained structure can be operated, and therefore, the problem that multiple processes cannot operate the same variable in the shared region is solved.

[0014] In a possible implementation manner, the second target value operation specifically includes: obtaining a pointer value of the first pointer, where the pointer value is the target offset; determining a sum of the target offset and a preset address as the storage address of the target structure; and obtaining the target structure according to the storage address.

[0015] In a possible implementation manner, after the initial intermediate representation of the source code is obtained, the method further includes: obtaining the target structure from the initial intermediate representation.

[0016] In a possible implementation, the target structure is obtained from the initial intermediate representation, including: determining a structure with a shared identifier in the initial intermediate representation as the target structure; the shared identifier is an identifier for indicating the target structure, which is set by a user in advance.

[0017] In a possible implementation, the target structure is obtained from the initial intermediate representation, including: determining a structure that applies for a storage space from the shared storage space in one or more structures in the initial intermediate representation as the target structure.

[0018] The embodiment determines the structure that applies for a storage space from the shared storage space in one or more structures in the initial intermediate representation as the target structure, and does not require the user to perform special processing on the target structure, thereby improving the coding efficiency of the user.

[0019] In a second aspect, an embodiment of the present application provides a compiling device, including: a transceiving unit and a processing unit; the transceiving unit is configured to obtain an initial intermediate representation of a source code; the processing unit is configured to generate a target intermediate representation based on the initial intermediate representation; the target intermediate representation indicates a storage address of a target structure in a shared storage space of a computing device based on a target offset; the target structure is a structure written into the shared storage space in a program running stage; the target offset is an offset between the storage address of the target structure in the shared storage space and a preset address of the shared storage space; the shared storage space is a storage space commonly accessed by multiple processes; and the processing unit is further configured to compile the target intermediate representation to obtain a compiled running program.

[0020] In a possible implementation, the processing unit is configured to determine a first code from the initial intermediate representation; the first code is a code for implementing a first target assignment operation in the initial intermediate representation; the first target assignment operation is an operation of setting a pointer value of a first pointer to a storage address of the target structure in the shared storage space; and the processing unit is further configured to update the first code to a second code based on the target offset; the second code is a code for implementing a second target assignment operation; and the second target assignment operation is an operation of setting the pointer value of the first pointer to the target offset.

[0021] In a possible implementation, the processing unit is configured to obtain a storage address of the target structure in the shared storage space; and the processing unit is further configured to determine a difference between the storage address and the preset address as the target offset, and set the pointer value of the first pointer to the target offset.

[0022] In a possible implementation, the processing unit is configured to determine third code from the initial intermediate representation; the third code is code for implementing a first target value operation in the initial intermediate representation; the first target value operation is an operation of obtaining a target structure pointed by the first pointer; and the processing unit is configured to update the third code to fourth code; the fourth code is code for implementing a second target value operation; the second target value operation is an operation of determining a storage address of the target structure in the shared memory space based on the target offset and the preset address, and obtaining the target structure based on the storage address.

[0023] In a possible implementation, the processing unit is configured to obtain a pointer value of the first pointer; the pointer value is the target offset; and the processing unit is further configured to determine a sum of the target offset and the preset address as the storage address of the target structure, and obtain the target structure based on the storage address.

[0024] In a possible implementation, the processing unit is configured to obtain the target structure from the initial intermediate representation.

[0025] In a possible implementation, the processing unit is configured to determine, as the target structure, a structure with a shared identifier in the initial intermediate representation; the shared identifier is an identifier for indicating the target structure, which is pre-set by a user.

[0026] In a possible implementation, the processing unit is configured to determine, as the target structure, a structure that applies for storage space from the shared memory space among one or more structures in the initial intermediate representation.

[0027] In a third aspect, a compiler is provided, which is run in a computing device to implement the source code compiling method in the first aspect and possible implementation manners thereof.

[0028] In a fourth aspect, a computing device is provided, which includes a memory and a processor, and the memory and the processor are electrically connected; the memory is configured to store program instructions, and the processor is configured to execute the program instructions to implement the source code compiling method in the first aspect and possible implementation manners thereof.

[0029] In a fifth aspect, a computer readable storage medium is provided, which stores computer instructions, and when the computer instructions in the computer readable storage medium are executed by a computing device, the computing device is caused to execute the source code compiling method in the first aspect and possible implementation manners thereof.

[0030] In a sixth aspect, a computer program product is provided, which includes computer instructions, and when the computer instructions are executed by a computing device, the computing device is caused to execute the source code compiling method in the first aspect and possible implementation manners thereof. BRIEF DESCRIPTION OF DRAWINGS

[0031] Figure 1 A hardware structure schematic diagram of a computing device provided by an embodiment of the present application is provided.

[0032] Figure 2 A source code compiling method flow schematic diagram provided by an embodiment of the present application is provided.

[0033] Figure 3 Another source code compiling method flow schematic diagram provided by an embodiment of the present application is provided.

[0034] Figure 4 Still another source code compiling method flow schematic diagram provided by an embodiment of the present application is provided.

[0035] Figure 5 A source code compiling device structure schematic diagram provided by an embodiment of the present application is provided. DETAILED DESCRIPTION

[0036] The term “and / or” in this document merely describes an association relationship of associated objects, and indicates that there can be three relationships, for example, A and / or B can represent the three cases of A existing alone, A and B existing together, and B existing alone.

[0037] The terms “first” and “second” and the like in the description and claims of the present application are used to distinguish different objects, and are not used to describe a specific order of the objects. For example, the first code and the second code are used to distinguish different codes, and are not used to describe a specific order of the codes.

[0038] In the embodiments of the present application, the words “exemplary” or “for example” are used to mean serving as an example, instance, or illustration. Any embodiment or design presented as “exemplary” or “for example” in the embodiments of the present application should not be interpreted as being more preferred or advantageous than other embodiments or design solutions. Rather, the use of “exemplary” or “for example” is merely intended to present related concepts in a specific manner.

[0039] In the description of the embodiments of the present application, unless otherwise specified, the meaning of “a plurality of” is two or more. For example, a plurality of structures refers to two or more structures.

[0040] First, some concepts involved in the source code compiling method, compiler and computing device provided by the embodiments of the present application are explained and described as follows:

[0041] Intermediate representation: the code form between the syntax analysis of the compiler on the source code and the generation of the target code (compiled code); it can also be called intermediate code.

[0042] Process: an instance of a running program, also a program about a certain data set of a certain independent function of a running activity. It is the basic unit of dynamic execution of the operating system. In the traditional operating system, the process is both the basic allocation unit and the basic execution unit.

[0043] Structure: a data type composed of a group of different data called members (or called fields, or called elements), where each member can have a different data type (such as: integer int, string String or array Array). The structure is usually used to represent several data of different types but related.

[0044] Pointer: a pointer variable is a variable used to store a memory address. When a pointer points to a structure, the value of the pointer is the storage address of the structure.

[0045] Based on the technical problems existing in the background art, the embodiments of the present application provide a source code compiling method. From the hardware point of view, the method is applied to a computing device. From the software point of view, the method can be applied to a compiler running on a processor of a computing device. The computing device includes a shared memory space for common access by multiple processes. The method includes: based on the obtained initial intermediate representation of the source code, generating a target intermediate representation, the target intermediate representation indicating the storage address of the target structure in the shared memory space based on a target offset; the target structure is a structure that will be written into the shared memory space during the program running phase; the target offset is the offset between the storage address of the target structure in the shared memory space and the preset address of the shared memory space; then compiling the target intermediate representation to obtain a compiled running program. Since the target offset is fixed and unchanged, that is, the target offset in different processes is the same, based on the target offset indicating the storage address of the target structure in the shared memory space, the operation of the target structure by multiple processes can be realized, and therefore, the method can solve the problem that multiple processes cannot operate the same variable in the shared region.

[0046] In addition, in the above-mentioned embodiments, the compiler generates a target intermediate representation based on the initial intermediate representation, so that the target structure indicates the storage address of the target structure in the shared memory space based on the target offset. It can be seen that the method provided in the above-mentioned embodiments does not require human intervention, and therefore, the efficiency of writing source code is improved on the basis of reducing the complexity of source code.

[0047] It should be understood that the processing process of the source code includes that a compiler in the computing device compiles the source code to obtain a running program executable by the computing device, and the compiling process includes that a front end of the compiler receives the input source code, analyzes syntax and semantics of the source code to obtain an intermediate representation of the source code, and then a back end of the compiler optimizes the intermediate representation generated by the front end processing to finally generate the running program executable on the computing device. Finally, the computing device executes the running program to make the running program in a running state.

[0048] Based on this, the source code compiling method provided by the embodiments of the present application is applied to the scenario in which the compiler in the computing device compiles the source code.

[0049] Exemplarily, Figure 1 is a schematic diagram of a hardware structure of a computing device provided by the embodiments of the present application. Taking the computing device as a server for example, the server can be a high-density server, a rack server or an entire cabinet server in form, and can be a general-purpose server, a graphics processing unit (GPU) server or an artificial intelligence (AI) server in performance.

[0050] The hardware part of the computing device includes a central processing unit (CPU), an out-of-band controller and a memory. The software part includes an out-of-band management module and an operating system (OS).

[0051] The out-of-band management module runs in the out-of-band controller, and the OS runs in the central processing unit (as shown in Figure 1 The out-of-band management module can be a management unit of a non-business module. For example, the out-of-band management module can perform remote maintenance and management on the computing device through a dedicated data channel. The out-of-band management module is completely independent of the operating system of the computing device, and can communicate with the OS through an out-of-band management interface of the computing device. The OS runs a compiler therein, and the compiler is used to compile the source code to obtain a running program executable by the computing device.

[0052] Exemplarily, the out-of-band management module can include a management unit of a running state of the computing device, a management system in a management chip outside the in-band controller, a system management module (SMM) and the like. It should be noted that the embodiments of the present application do not limit the specific form of the out-of-band management module, and the above is only an exemplary description.

[0053] The memory is also referred to as internal memory or main memory. For example, the memory can be installed in a memory slot on a motherboard of the computing device, and the memory communicates with a memory controller through a memory channel.

[0054] It should be noted that the system architecture and application scenarios described in the embodiments of the present application are used to more clearly illustrate the technical solutions of the embodiments of the present application, and do not constitute a limitation on the technical solutions provided by the embodiments of the present application. Those skilled in the art can know that, with the evolution of system architecture and the appearance of new business scenarios, the technical solutions provided by the embodiments of the present application are also applicable to similar technical problems.

[0055] The embodiments of the present application provide a source code compiling method, which is applied to Figure 1 The compiler in the computing device shown in the figure is executed by a processor in the computing device. As shown in the figure, Figure 2 The method includes S110-S130.

[0056] S110, obtaining an initial intermediate representation of a source code.

[0057] The initial intermediate representation described above is an intermediate code between the source code and the compiled executable program (running program). The intermediate code is an intermediate form translated by the compiler based on the syntax analysis of the source code based on the syntax structure.

[0058] It should be noted that the initial intermediate representation described above can be a gimple intermediate representation generated by GNU (gnu's not unix) C compiler (GNU C Compiler, Gcc) compilation, or an intermediate representation generated by C series language frontend compiler (C Language Family Frontend for LLVM, ) based on LLVM (low level virtual machine).

[0059] The specific implementation of S110 includes that the compiler running in the processor obtains the source code input into the compiler, and then the compiler converts the source code into the initial intermediate representation by performing syntax analysis on the source code.

[0060] For example, it is assumed that the source code obtained by the compiler includes the following code block 1, and then the compiler generates the initial intermediate representation by translating the code block 1, and the initial intermediate representation is shown in the following code block 2; wherein the code logic of the code block 1 and the code block 2 is the same, and the forms are different.

[0061] Code block 1:

[0062] mf->next = nf; / / indicates that the pointer next in the structure body mf points to the structure body nf

[0063] Code block 2:

[0064] gimple_assign <var_decl, mf->next, nf, null, null,> / / indicates that the pointer next in the structure body mf points to the structure body nf

[0065] S120, based on the initial intermediate representation, generates a target intermediate representation.

[0066] It should be noted that the logic of obtaining the target structure in the above initial intermediate representation is based on the storage address of the target structure to obtain the target structure; that is, the initial intermediate representation indicates the target structure through the storage address of the target structure; wherein, when a pointer points to a target structure, the value of the pointer is the storage address of the target structure, and the specific implementation is shown in the above code block 2.

[0067] It should be understood that when the source code needs to be run, the source code needs to go through two stages, which include: a compilation stage and a running stage; Specifically, the compilation stage is the stage in which the compiler compiles the source code to obtain a running program executable by the computing device; the running stage is the stage in which the computing device executes the compiled running program so that the running program is in a running state.

[0068] Based on this, the above target structure is a structure written into a shared storage space in the program running stage, wherein the shared storage space is a storage space in the computing device that supports multiple processes to access; Specifically, the shared storage space at least includes: shared memory and / or shared cache.

[0069] The above target intermediate representation indicates the storage address of the target structure in the shared storage space based on the target offset, that is, the target structure is obtained in the target intermediate representation based on the target offset; wherein the target offset is the offset between the storage address of the target structure in the shared storage space and the preset address in the shared storage space (the target offset is the distance between the storage address of the target structure in the shared storage space and the preset address); That is, in the target intermediate representation, when a pointer needs to point to a target structure, the value of the pointer is set to the target offset.

[0070] The specific implementation of the above S120 includes: updating the initial intermediate representation to obtain the target intermediate representation, for details, please refer to S220-S240 or 'S220-S240 and S310-S320', which will not be repeated here.

[0071] S130, compiling the target intermediate representation to obtain a compiled running program.

[0072] The running program is a program executable by the computing device.

[0073] The implementation of S130 is to translate the target intermediate representation into a form recognizable by the computing device (such as machine code), and the specific implementation can refer to the prior art, which will not be described here.

[0074] The embodiment of the application provides a source code compiling method, which comprises the following steps: based on an initial intermediate representation of obtained source code, a target intermediate representation is generated, the target intermediate representation indicates a storage address of a target structure in a shared storage space based on a target offset; the target structure is a structure written into the shared storage space in a program running phase; the target offset is an offset between the storage address of the target structure in the shared storage space and a preset address of the shared storage space; and then the target intermediate representation is compiled to obtain a compiled running program. Since the target offset is fixed and unchanged, that is, the target offset in different processes is the same, the storage address of the target structure in the shared storage space is indicated based on the target offset, the operation of the target structure by multiple processes can be realized, and therefore, the problem that multiple processes cannot operate the same variable in the shared region is solved.

[0075] In addition, in the embodiment, the compiler generates the target intermediate representation based on the initial intermediate representation, so that the target structure indicates the storage address of the target structure in the shared storage space based on the target offset; it can be seen that the method provided in the embodiment does not need human intervention, and therefore, the efficiency of writing source code is improved on the basis of reducing the complexity of the source code.

[0076] Based on Figure 2 The embodiment of the application provides a specific implementation method, as shown in the source code compiling method, which comprises the following steps: Figure 3 S210-S250.

[0077] S210, obtaining an initial intermediate representation of source code.

[0078] It should be noted that the implementation of S210 is consistent with the implementation of S110, and the specific description of S210 can refer to the related description of S110, which will not be described here.

[0079] S220, obtaining an identifier of a target structure from the initial intermediate representation.

[0080] It should be understood that the target structure is a variable, and thus the identifier of the target structure can be the variable name of the target structure or the variable name of the pointer variable pointing to the target structure.

[0081] In an implementation, the implementation of S220 includes determining a structure in the initial intermediate representation having a shared identifier as the target structure.

[0082] The shared identifier is an identifier indicating the target structure and pre-configured by a user, and the structure indicated by the shared identifier is stored in the shared memory space during program execution. The shared identifier is added by the user to the structure to be stored in the shared memory space during code writing.

[0083] For example, the user adds an "@xxxx" annotation to the target structure based on the business requirement during coding, and the annotation is used to indicate that the structure indicated by the annotation is stored in the shared memory space during program execution.

[0084] In another implementation, the implementation of S220 includes determining a structure from one or more structures declared in the initial intermediate representation and applying for storage space from the shared memory space as the target structure.

[0085] It should be noted that in the code, the structure applies for storage space from the shared memory space based on a target keyword (such as shmem_malloc); based on this, the implementation of S220 includes determining a structure from one or more structures declared in the initial intermediate representation and applying for storage space from the shared memory space by the target keyword as the target structure.

[0086] For example, it is assumed that the initial intermediate representation includes the code block 3 as shown in the following, and it is assumed that the target keyword is shmem_malloc; thus, the structure nf is the target structure because the target keyword shmem_malloc exists in the second line of code in the code block 3 and is used to apply for storage space for the structure nf from the shared memory space. The source code corresponding to the code block 3 is struct Foo*nf=(struct Foo*)shmem_malloc(sizeof(struct Foo)).

[0087] Code block 3:

[0088] struct Foo*nf / / declare a structure nf

[0089] gimple_call<shmem_malloc, nf, 16> / / allocate nf from shared memory

[0090] S230, determining the first code from the initial intermediate representation.

[0091] The first code is code for implementing a first target assignment operation in the initial intermediate representation; wherein the first target assignment operation is an operation of pointing a pointer (such as a first pointer) to a target structure; that is, the first target assignment operation is an operation of setting the pointer value of the first pointer to the storage address of the target structure in the shared memory space. That is, the first code is code for implementing an operation of pointing the first pointer to the target structure.

[0092] For example, assuming that the first pointer is the pointer next in the structure mf, and the target structure is nf; at this time, the first code is the code block 2, which is used to implement an operation of pointing the pointer next in the structure mf to the target structure nf, specifically, setting the pointer value of the pointer next to the storage address of the target structure nf in the shared memory space; wherein the source code corresponding to the code block 2 is "mf->next = nf".

[0093] The implementation of S230 is to determine the first code from the initial intermediate representation according to the identifier of the target structure; the specific implementation includes: determining the code for implementing the first target assignment operation in the initial intermediate representation as the first code by scanning the initial intermediate representation.

[0094] S240, updating the first code in the initial intermediate representation to a second code.

[0095] The second code is code for implementing a second target assignment operation, which is an operation of setting the pointer value of the first pointer to a target offset, that is, the second target assignment operation is an operation of pointing the first pointer to the target offset; that is, the second code is code for implementing an operation of pointing the first pointer to the target offset; wherein the target offset is an offset between the storage address of the target structure in the shared memory space and a preset address in the shared memory space.

[0096] The second target assignment operation specifically includes: an operation of obtaining the target offset, and an operation of setting the pointer value of the first pointer to the target offset.

[0097] The specific implementation of the operation of obtaining the target offset includes: obtaining a storage address of the target structure in the shared storage space; and then determining a difference between the storage address of the target structure and a preset address (such as an initial position or an ending position) in the shared storage space as the target offset.

[0098] For example, it is assumed that the first code is the code block 2, and the code block 2 is used to indicate that the pointer value of the pointer next in the structure mf is set to the storage address of the nf. Then, the compiler updates the first code to obtain the updated first code (referred to as second code for short), and the second code is shown in the code block 4 below, and is used to implement that a difference between the storage address l_v of the target structure nf and a preset address base in the shared storage space is determined as the target offset offset, and the value of the pointer next in the structure mf is set to the target offset offset. In order to facilitate understanding, the source code corresponding to the code block 4 is the code block A shown below.

[0099] Code block 4:

[0100] long unsigned int l_v; / / declaration of integer variable l_v

[0101] / / set the storage address of the target structure nf to the value of the l_v variable

[0102] gimple_assign<nop_expr, l_v, nf, null, null>

[0103] / / determine the difference between l_v and the preset address base in the shared storage space as the target offset offset

[0104] gimple_assign<minus_expr, offset, l_v, base, null>

[0105] / / set the value of the pointer next in the structure mf to the target offset offset

[0106] gimple_assign<nop_expr, mf->next, offset, null, null>

[0107] Code block A:

[0108] / / set the storage address of the target structure nf to the value of the l_v variable

[0109] unsigned long l_v=(unsigned long)nf;

[0110] / / The difference between l_v and the preset address base in the shared memory space is determined as the target offset.

[0111] unsigned long offset=l_v-(unsigned long)base;

[0112] / / Set the value of the pointer next in the structure mf to the target offset.

[0113] mf->next=(struct Foo*)(offset);

[0114] S250. Compile the target intermediate representation to obtain the compiled executable program.

[0115] It should be understood that the updated initial intermediate representation (i.e., the target intermediate representation) is obtained by updating the first code in the initial intermediate representation, and the second target assignment operation in the target intermediate representation is implemented based on the second code.

[0116] It should be noted that the implementation of S250 is the same as that of S130. For a detailed description of S250, please refer to the relevant description of S130 above. It will not be repeated here.

[0117] The above embodiment converts the source code into an initial intermediate representation, then updates the first code in the initial intermediate representation with second code to obtain the target intermediate representation. The first code is used to implement the operation of pointing the first pointer to the target structure. Finally, the target intermediate representation is compiled to obtain the compiled executable program. Since the second code is used to set the pointer value of the first pointer to the target offset, and since the target offset and preset address are fixed, multiple processes can operate on the target structure based on the target offset and preset address. Therefore, the problem of multiple processes being unable to operate on the same variable in a shared region is solved.

[0118] based on Figure 3 The source code compilation method shown in this application provides another specific implementation method, such as... Figure 4 As shown, the method further includes S310-S320 after S240.

[0119] S310. Determine the third code from the initial intermediate representation.

[0120] The third code is code for implementing a first target value operation in the initial intermediate representation, the first target value operation being an operation of obtaining a target structure when the first pointer points to the target structure; that is, the first target value operation is an operation of obtaining the target structure pointed to by the first pointer.

[0121] It should be understood that the first target value operation is applied to a scenario of operating (such as an operation or an assignment operation) on a member variable in a target structure when the first pointer points to the target structure; at this time, since the first pointer points to the target structure, when the member variable in the target structure is operated, the target structure needs to be obtained through the first pointer (that is, the first target value operation) first, and then the member variable in the target structure is operated.

[0122] For example, it is assumed that the pointer next in the structure mf points to a target structure nf, and the target structure nf includes a member variable ch of a single character (char) type; at this time, the third code can be code for implementing an operation of obtaining the target structure nf in the intermediate representation corresponding to the code "mf->next->ch='a'" (setting the value of the member variable ch to a), and the intermediate representation includes code (the third code) for implementing an operation of obtaining the target structure nf (that is, the first target value operation) and code for implementing an operation of setting the value of the member variable ch in the target structure nf to the character a corresponding to 97, as shown in the following code block 5.

[0123] Code block 5:

[0124] / / Obtain the target structure nf pointed to by the pointer next in the structure mf

[0125] gimple_assign<component_ref,nf,mf->next,null,null>

[0126] / / Set the value of the member variable ch in the target structure nf to the character a corresponding to 97

[0127] gimple_assign<integer_cst,nf->ch,97,null,null>

[0128] The specific implementation of the S310 includes determining the code for implementing the first target value operation in the initial intermediate representation as the third code by scanning the initial intermediate representation.

[0129] S320, updating the third code in the initial intermediate representation to the fourth code.

[0130] The fourth code is used to implement a second target value operation, which is used to determine the storage address of the target structure in the shared memory space based on the target offset and a preset address in the shared memory space, and to obtain the target structure based on the storage address of the target structure in the shared memory space. That is, the fourth code is used to determine the storage address of the target structure in the shared memory space based on the target offset and the preset address, and to obtain the target structure based on the storage address of the target structure in the shared memory space.

[0131] The operation of determining the storage address of the target structure in the shared memory space based on the target offset and the preset address includes: obtaining the pointer value of the first pointer, which is the target offset; and determining the sum of the target offset and the preset address as the storage address of the target structure in the shared memory space.

[0132] For example, assuming that the third code is the first line of code in the code block 5 (i.e., gimple_assign<component_ref, nf, mf->next, null, null>), which is used to represent that the target structure nf is obtained based on the pointer value of the pointer next in the structure mf, where the pointer value of the pointer next is the storage address of the target structure nf in the shared memory space. Then, the compiler updates the third code to obtain the updated third code (referred to as the fourth code), which is used to determine the pointer value of the pointer next in the structure mf as the target offset offset, and to determine the sum of the target offset offset and the preset address base in the shared memory space as the storage address of the target structure nf2, so as to obtain the target structure based on the storage address. The code block 6 corresponds to the source code shown in the following code block B.

[0133] Code block 6:

[0134] struct Foo *nf2; / / Declare the structure nf2

[0135] / / The value of offset is set to the pointer value of the pointer next in the structure mf, which is the target offset

[0136] gimple_assign<component_ref, offset, mf->next, null, null>

[0137] / / Set the sum of the preset address base and the value of the offset variable (i.e., the storage address of the target structure) to the value of the temporary variable _6

[0138] gimple_assign<plus_expr,_6,offset,base,null>

[0139] / / Set the address of the structure nf2 to the value of the temporary variable _6.

[0140] gimple_assign<nop_expr,nf2,_6,null,null>

[0141] Code block B:

[0142] unsigned long offset=(unsigned long)mf->next;

[0143] struct Foo*nf2=(struct Foo*)(offset+base);

[0144] The above embodiment converts the source code into an initial intermediate representation, then updates the first code and the third code in the initial intermediate representation to obtain a target intermediate representation, wherein the first code is code for implementing an operation of pointing a first pointer to a target structure, and the third code is code for implementing an operation of obtaining the target structure pointed to by the first pointer; and finally, the target intermediate representation is compiled to obtain a compiled running program. Since the updated first code (i.e., the second code) is used to implement an operation of setting the pointer value of the first pointer to a target offset, and the updated third code (i.e., the fourth code) is used to implement an operation of determining the storage address of the target structure in the shared storage space based on the target offset and a preset address in the shared storage space, and an operation of obtaining the target structure based on the storage address of the target structure, and since the target offset and the preset address are fixed and unchanged, when multiple processes need to operate on the target structure, the target structure can be obtained based on the target offset and the preset address, and the obtained structure can be operated, thus solving the problem that multiple processes cannot operate on the same variable in the shared region.

[0145] The above describes the solutions provided by the embodiments of the present application from the method aspect. To implement the above functions, the hardware structure and / or software modules corresponding to the functions are included. Those skilled in the art should easily realize that, in combination with the units and algorithm steps of the examples described in the embodiments disclosed herein, the present application can be implemented in the form of hardware or a combination of hardware and computer software. Whether a certain function is implemented in the form of hardware or computer software driving hardware depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of the present application.

[0146] The embodiments of the present application can divide the function modules of the compiling device according to the above method examples. For example, each function module can be divided according to each function, or two or more functions can be integrated in one processing module. The above integrated module can be implemented in the form of hardware or software function module. It should be noted that the division of the modules in the embodiments of the present application is illustrative, and is only a logical function division. In actual implementation, another division method can be used.

[0147] In the case of dividing each function module according to each function, Figure 5 A possible structure schematic diagram of the source code compiling device involved in the above embodiments is shown. As shown in the figure, Figure 5 The source code compiling device 500 includes a transceiving unit 501 and a processing unit 502.

[0148] The transceiving unit 501 is configured to obtain an initial intermediate representation of a source code; for example, performing steps S110 and S210 in the above method embodiments.

[0149] The processing unit 502 is configured to generate a target intermediate representation based on the initial intermediate representation; for example, performing step S120 in the above method embodiments.

[0150] The processing unit 502 is configured to compile the target intermediate representation to obtain a compiled running program; for example, performing steps S130 and S250 in the above method embodiments.

[0151] Optionally, the processing unit 502 is configured to determine a first code from the initial intermediate code; for example, performing step S230 in the above method embodiments.

[0152] The processing unit 502 is configured to update the first code in the initial intermediate representation to a second code; for example, performing step S240 in the above method embodiments.

[0153] Optionally, the processing unit 502 is specifically configured to acquire a storage address of the target structure in the shared storage space; the processing unit 502 is further specifically configured to determine a target offset as a difference between the storage address and a preset address, and set a pointer value of the first pointer as the target offset.

[0154] Optionally, the processing unit 502 is configured to determine the third code from the initial intermediate representation; for example, the step S310 in the above method embodiment is performed.

[0155] The processing unit 502 is configured to update the third code to the fourth code; for example, the step S320 in the above method embodiment is performed.

[0156] Optionally, the processing unit 502 is specifically configured to acquire a pointer value of the first pointer; wherein the pointer value of the first pointer is the target offset; the processing unit 502 is further specifically configured to determine a storage address of the target structure as a sum of the target offset and a preset address, and acquire the target structure according to the storage address.

[0157] Optionally, the processing unit 502 is configured to acquire the target structure from the initial intermediate representation; for example, the step S220 in the above method embodiment is performed.

[0158] Optionally, the processing unit 502 is configured to determine the target structure as a structure with a shared identifier in the initial intermediate representation.

[0159] Optionally, the processing unit 502 is configured to determine the target structure as a structure that applies for storage space from the shared storage space in one or more structures in the initial intermediate representation.

[0160] The units of the above compilation device can also be configured to perform other actions in the above method embodiments, and all related contents of each step involved in the above method embodiments can be cited to the function description of the corresponding functional module, which will not be repeated here.

[0161] Embodiments of the present application also provide a compiler running in a computing device to implement any one of the above source code compiling methods.

[0162] Embodiments of the present application also provide a computing device including a memory and a processor, the memory being electrically connected with the processor; the memory is configured to store program instructions, and the processor is configured to execute the program instructions to implement any one of the above source code compiling methods.

[0163] Embodiments of the present application also provide a computer readable storage medium having computer instructions stored thereon, when the computer instructions are run on a computing device, to implement any one of the above source code compiling methods.

[0164] The descriptions of the explanations and beneficial effects of the related content in any one of the computer readable storage media provided above can refer to the corresponding embodiments described above, and will not be repeated here.

[0165] The computer program product provided in the embodiments of the present application, when running on a computing device, causes the computing device to perform any one of the source code compiling methods described above.

[0166] It should be noted that the above description of the application program or computer instructions running on the computing device is actually the application program or computer instructions running on the processor of the computing device.

[0167] In the above embodiments, all or part can be implemented by software, hardware, firmware or any combination thereof. When implemented by a software program, all or part can be implemented in the form of a computer program product. The computer program product includes one or more computer instructions. When loaded and executed by a computing device, all or part generates a flow or function according to the embodiments of the present application. The computer instructions can be stored in a computer readable storage medium or transferred from one computer readable storage medium to another, for example, the computer instructions can be transferred from one website, computer, server or data center to another website, computer, server or data center through wired (such as coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (such as infrared, wireless, microwave, etc.) mode. The computer readable storage medium can be any available medium that can be accessed by a computer or a data storage device such as a server, data center, etc. integrated with one or more available media. The available media can be magnetic media (such as floppy disk, magnetic disk, magnetic tape), optical media (such as digital video disc (DVD)), or semiconductor media (such as solid state drive (SSD)) and the like.

[0168] Through the description of the above embodiments, those skilled in the art can clearly understand that, for the convenience and brevity of description, only the division of the above functional modules is taken as an example for illustration, and in actual application, the above functions can be completed by different functional modules according to needs, that is, the internal structure of the device is divided into different functional modules to complete all or part of the functions described above. The specific working process of the system, device and unit described above can refer to the corresponding process in the foregoing method embodiments, which will not be repeated here.

[0169] In several embodiments provided in the present application, it should be understood that the disclosed system, device and method can be implemented in other manners. For example, the described device embodiment is merely illustrative. For example, the division of the modules or units is merely logical function division, and there can be another division manner in actual implementation. For example, a plurality of units or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the displayed or discussed mutual couplings or direct couplings or communication connections between different units, can be indirect couplings or communication connections through some interfaces, devices or units, and can be electrical, mechanical or in other forms.

[0170] The units described as separate components can or can not be physically separate, and the components shown as units can or can not be physical units, i.e., can be located in one place, or can be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the embodiment.

[0171] In addition, each functional unit in the various embodiments of the present application can be integrated in one processing unit, or each unit can be physically present separately, or two or more units can be integrated in one unit. The integrated unit can be realized in the form of hardware or in the form of a software functional unit.

[0172] The integrated unit, if realized in the form of a software functional unit and sold or used as an independent product, can be stored in a computer readable storage medium. Based on this understanding, the technical solutions of the present application essentially or the part that contributes to the prior art, or all or part of the technical solutions can be embodied in the form of a software product. The computer software product is stored in a storage medium, and includes a number of instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) or a processor to execute all or part of the steps of the methods described in the various embodiments of the present application. The aforementioned storage medium includes: a flash memory, a mobile hard disk, a read-only memory, a random access memory, a magnetic disk or an optical disk, and various media that can store program codes.

[0173] The above is merely a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any change or replacement within the technical scope disclosed in the present application should be covered in the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.

Claims

1. A source code compiling method, characterized by, The method comprises: obtaining an initial intermediate representation of source code; generating a target intermediate representation based on the initial intermediate representation; wherein, the target intermediate representation indicates a storage address of a target structure in a shared storage space of a computing device based on a target offset; the target structure is a structure written into the shared storage space in a program running stage; the target offset is an offset between the storage address of the target structure in the shared storage space and a preset address of the shared storage space; the shared storage space is a storage space commonly accessed by multiple processes; compiling the target intermediate representation to obtain a compiled running program.

2. The method of claim 1, wherein, The generating of the target intermediate representation based on the initial intermediate representation comprises: determining first code from the initial intermediate representation; wherein the first code is code in the initial intermediate representation for implementing a first target assignment operation; the first target assignment operation is an operation of setting a pointer value of a first pointer to a storage address of the target structure in the shared storage space; updating the first code to second code; wherein the second code is code for implementing a second target assignment operation; the second target assignment operation is an operation of setting the pointer value of the first pointer to the target offset.

3. The method of claim 2, wherein, The second target assignment operation specifically comprises: obtaining the storage address of the target structure in the shared storage space; determining the target offset as a difference between the storage address and the preset address; setting the pointer value of the first pointer to the target offset.

4. The method according to claim 2 or 3, characterized in that, The generating of the target intermediate representation based on the initial intermediate representation further comprises: determining third code from the initial intermediate representation; wherein the third code is code in the initial intermediate representation for implementing a first target value obtaining operation; the first target value obtaining operation is an operation of obtaining the target structure pointed to by the first pointer; updating the third code to fourth code; wherein the fourth code is code for implementing a second target value obtaining operation; the second target value obtaining operation is an operation of determining the storage address of the target structure in the shared storage space based on the target offset and the preset address, and obtaining the target structure based on the storage address.

5. The method of claim 4, wherein, The second target value obtaining operation specifically comprises: obtaining a pointer value of the first pointer; wherein the pointer value is the target offset; determining a sum of the target offset and the preset address as the storage address of the target structure; obtaining the target structure according to the storage address.

6. The method according to any one of claims 1 to 5, characterized in that, After the obtaining of the initial intermediate representation of the source code, the method further comprises: obtaining the target structure from the initial intermediate representation.

7. The method of claim 6, wherein, The obtaining of the target structure from the initial intermediate representation comprises: determining a structure with a shared identifier in the initial intermediate representation as the target structure; the shared identifier is an identifier pre-set by a user to indicate a target structure.

8. The method of claim 6, wherein, The obtaining of the target structure from the initial intermediate representation comprises: One or more of the structures in the initial intermediate representation are determined to be the target structures, from which the structures are to apply for storage space in the shared storage space.

9. A compiler, characterized in that, The compiler is run in a computing device to implement the method of any one of claims 1-8.

10. A computing device, comprising: The computing device comprises a memory and a processor; The memory and the processor are electrically connected; The memory is configured to store program instructions; The processor is configured to execute the program instructions to enable the computing device to implement the method of any one of claims 1-8.

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