Wafer scribing and splitting method and device
By processing laser grooving on the back of the wafer and using a cleaver to cut the joints, the chipping problem caused by diamond blade cutting was solved, improving the quality of wafer dicing and chip performance.
Patent Information
- Application Number
- CN202511139553.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-08-14
- Publication Date
- 2025-11-21
AI Technical Summary
In existing technologies, diamond blades are prone to edge chipping when cutting wafers, and the kerf width is large, which affects chip quality and performance.
Laser is used to process the first and second grooves on the back of the wafer. Combined with the cleaving process, the cutting sequence is rationally planned. The width and depth of the cutting track are controlled by the grooves formed by laser ablation. The connecting part is cut off by the cleaving tool to form an independent chip.
It improves the edge chipping phenomenon during the wafer dicing process, increases the quantity and quality of finished chips, reduces the width of the dicing track, and improves the dicing quality.
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Figure CN120998878A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of wafer dicing equipment technology, and more particularly to a wafer dicing method and equipment. Background Technology
[0002] Integrated circuits have been widely used in all aspects of life. Various smart devices use integrated circuits or devices. Before being used, integrated circuits go through three major steps: wafer manufacturing, wafer dicing, and chip packaging.
[0003] Dicing is a crucial process before integrated circuit packaging. Dicing a prepared wafer is a critical step in separating the wafer, which contains printed integrated circuits, into individual chips. The quality of dicing directly affects the quantity and performance of the finished chips. The dicing process typically involves attaching a polishing film to the front side of the wafer, with the back side facing up. The back side of the wafer is polished to a specified thickness. The polishing film is then removed, and an adhesive film is attached to the back side. Dicing lines are then cut along the front side of the wafer, splitting it into individual chips. The chips are then peeled off from the adhesive film. To ensure dicing quality, the width of the dicing marks must not exceed the width of the dicing lines. A common method for dicing wafers is using diamond blades. However, this method requires diamond blades, resulting in a large kerf width and generating stress, which can easily lead to chipping and even damage to the chips.
[0004] Therefore, it is essential to provide a wafer dicing and dicing method and equipment that improves edge chipping during the wafer dicing and dicing process and enhances chip quality through reasonable process steps and dicing area planning. Summary of the Invention
[0005] In view of this, the present invention proposes a wafer dicing method and equipment that can rationally plan the dicing sequence and improve the edge chipping phenomenon during the wafer dicing process.
[0006] On one hand, the present invention provides a wafer dicing method, comprising the following steps: S1: Provide a wafer body, the wafer body including a plurality of chips arranged in an array and a plurality of dicing channels, the plurality of dicing channels being located between adjacent chips; S2: A polishing patch is attached to the front side of the wafer body, and several first grooves are formed on the back side of the wafer body. The first grooves extend toward the front side of the wafer body. S3: Several second grooves are further processed in the end face of several first grooves near the front side of the wafer body, and the second grooves extend along the front side of the wafer body; several cutting channels between adjacent chips form several thinned connection portions. S4: Remove the polishing pad on the front side of the wafer body, attach the adhesive film layer on the back side of the wafer body, so that the front side of the wafer body is facing up, and use a cleaver to cut off several connecting parts between the second grooves. S5: Peel the chip obtained after dicing the wafer body from the adhesive film layer.
[0007] Based on the above technical solutions, preferably, the process of forming a plurality of first grooves on the back side of the wafer body in step S2 is to use laser to ablate the wafer body material on the back side of the wafer body and located in the region of a plurality of dicing channels. The first grooves are arranged along the extension direction of the plurality of dicing channels, and the width of the plurality of first grooves does not exceed the width of the plurality of dicing channels.
[0008] Preferably, in step S3, the further processing of the plurality of second grooves in the bottom surface near the front side of the wafer body by the plurality of first grooves is to use laser ablation of the material on the back side of the wafer body, forming two second grooves in the plurality of first grooves respectively, wherein the spacing between the plurality of second grooves located in the same first groove does not exceed the width of the plurality of first grooves, and the depth of the plurality of second grooves is not less than the depth of the plurality of first grooves.
[0009] More preferably, when using laser ablation of the material on the back side of the wafer body, the width of the plurality of first grooves is 40-90μm and the depth of the plurality of first grooves is 20-30μm; the width of the plurality of second grooves is 15-30μm and the depth of the plurality of second grooves is 30-40μm, and the center distance between adjacent second grooves located in the same first groove does not exceed half the width of the first groove.
[0010] More preferably, when forming several first or second grooves on the back side of the wafer body using a laser, the laser pulse width is less than 2 ns, and the laser wavelength range is 355 nm-632 nm; the laser power... Determined by the following formula: , For heat conversion efficiency; The depth of the first or second groove; The thermal conductivity of the wafer body material; The cross-sectional area of the first or second groove; This is the temperature difference between the temperature during wafer body material processing and the initial temperature.
[0011] More preferably, when forming several first or second grooves on the back side of the wafer body using a laser, cooling gas is also sprayed onto the surface of the wafer body, and the volumetric flow rate of the cooling gas is... Calculate according to the following formula: , This is to remove the heat carried away by the cooling gas as it passes over the surface of the wafer. , This is the proportionality coefficient; The density of the gas; is the specific heat capacity of the gas; It is the absolute value of the difference between the exit temperature of the cooling gas from the nozzle at the laser exit port and the temperature at which it leaves the surface of the wafer body; The attenuation coefficient; The duration of blowing cooling gas.
[0012] Based on the above technical solution, preferably, step S2 also includes a grinding process; before forming several first grooves on the back side of the wafer body, the back side of the wafer body is ground with a grinding blade to reduce the thickness of the wafer body.
[0013] Preferably, in step S4, cutting off the connecting portions between the second cut grooves with a chopping cutter involves using a number of chopping cutters, aligning them with the corresponding positions of the center faces of the second cut grooves in the cutting path, and simultaneously cutting off different parts of the connecting portions. The cutting depth of the chopping cutters is greater than the thickness of the connecting portions.
[0014] More preferably, the thickness of the connecting portion does not exceed half the thickness of the wafer body after grinding.
[0015] On the other hand, the present invention provides a wafer dicing and cleaving apparatus for implementing the above-described wafer dicing and cleaving method, comprising: Carrier tray, used to hold the wafer body to be diced; The film application unit is used to apply a polishing patch to the front side of the wafer body or to apply an adhesive film layer to the back side of the wafer body. The grinding unit is used to grind the back side of the wafer body to reduce the thickness of the wafer body; A laser cutting unit is used to ablate the wafer body material on the back side of the wafer body and located in a plurality of cutting channel areas to form a plurality of first cutting grooves, and further form a plurality of second cutting grooves in each of the first cutting grooves, wherein the first cutting grooves and the second cutting grooves are both located within the plurality of cutting channels. The cleaving unit is used to cut the connecting parts of the wafer body after laser cutting to obtain individual chips.
[0016] The wafer dicing and dicing method and equipment provided by this invention have the following advantages compared with the prior art: This invention improves the quality of the wafer dicing and dicing process by rationally configuring the cutting sequence and sequentially processing the first and second grooves on the back side of the wafer body, combined with the cleaving process on the front side of the wafer body. Attached Figure Description
[0017] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0018] Figure 1 This is a top view of the wafer body of the wafer dicing and dicing method and equipment of the present invention; Figure 2 This is a partial cross-sectional view of the front side of the wafer body after the grinding pad has been attached to the wafer body of the wafer dicing and cleaving method and equipment of the present invention. Figure 3 This is a partial cross-sectional view of the formation of a first groove on the back side of the wafer body in the wafer dicing method and apparatus of the present invention. Figure 4 This is a partial cross-sectional view of the second dicing groove formed on the back side of the wafer body in the wafer dicing method and apparatus of the present invention. Figure 5 This is a partial cross-sectional view of the wafer body front side being cut off by a cleaver on the side surface of the wafer body using a wafer dicing tool, according to the wafer dicing method and equipment of the present invention.
[0019] Reference numerals: 1. Wafer body; 100. Chip; 200. Cutting groove; 2. Polishing patch; 300. First cut groove; 400. Second cut groove; 500. Connector; 3. Adhesive layer. Detailed Implementation
[0020] The technical solutions of the present invention will be clearly and completely described below with reference to the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of the present invention.
[0021] The common method for dicing wafers is using diamond blades. This method, however, requires diamond blades, resulting in a large kerf width, which can easily lead to chipping and potentially damage the internal structure of the chip. Therefore, if... Figures 1-5 As shown, in one aspect, the present invention provides a wafer dicing method, comprising the following steps: S1: A wafer body 1 is provided, the wafer body 1 including a plurality of chips 100 arranged in an array and a plurality of dicing channels 200, the plurality of dicing channels 200 being located between adjacent chips 100; as Figure 1As shown, the chips are arranged in a rectangular array and spaced apart. Between adjacent chips, several horizontal and vertical dicing channels are formed, which define the extreme boundary positions of the wafer dicing.
[0022] The cut lines on the front and back sides of the wafer body 1 can be formed by etching or diamond scribing.
[0023] S2: A polishing patch 2 is attached to the front side of the wafer body 1, and a plurality of first grooves 300 are formed on the back side of the wafer body 1. The first grooves 300 extend toward the front side of the wafer body 1.
[0024] like Figure 2 and Figure 3 As shown, a first groove 300 is formed on the back side of the wafer body 1 by laser ablation of the wafer body 1 material on the back side of the wafer body 1 and located in the area of a plurality of dicing channels 20. The first groove 300 is arranged along the extension direction of the plurality of dicing channels 200, and the width of the plurality of first grooves 300 does not exceed the width of the plurality of dicing channels 200.
[0025] In actual operation, the first groove 300 in the longitudinal cutting channel 20 area can be formed one by one, and then the first groove 300 in the transverse cutting channel 20 area can be formed one by one, so that the first groove 300 that are intersecting and penetrating are formed on the back side of the wafer body 1.
[0026] To reduce the workload of laser forming, step S2 also includes a grinding process; before forming a plurality of first grooves 300 on the back side of the wafer body 1, the back side of the wafer body 1 is ground using a grinding blade to reduce the thickness of the wafer body 1. This grinding step can reduce the overall thickness of the back side of the wafer body 1, shorten the processing time of the first grooves 300, and improve processing efficiency.
[0027] S3: In the end face of the first grooves 300 near the front side of the wafer body 1, a plurality of second grooves 400 are further processed to form the second grooves 400 extending along the front side of the wafer body 1; a plurality of cutting channels 200 between adjacent chips 100 form a plurality of thinned connecting portions 500. like Figure 4 As shown, several second grooves 400 are further processed in the bottom surface of several first grooves 300 near the front side of the wafer body 1. Specifically, the material on the back side of the wafer body 1 is ablated by laser, and two second grooves 400 are formed in each of the several first grooves 300. The spacing between the several second grooves 400 located in the same first groove 300 does not exceed the width of the several first grooves 300, and the depth of the several second grooves 400 is not less than the depth of the several first grooves 300.
[0028] This forms two spaced second grooves 400, for illustrative purposes only. If the cutting path is narrow, only one second groove 400 can be provided. A single second groove 400 can be positioned at the center of the first groove 300. Figure 4 The two or more second grooves 400 shown are evenly spaced within the first groove 300 and extend laterally or longitudinally through the wafer body 1 along the axial extension direction of the first groove 300. In actual processing, each of the second grooves 400 within the longitudinal first groove 300 can be processed first, followed by each of the second grooves 400 within the transversely processed first groove 300. The second grooves 400 can further reduce the volume of the remaining portion of the dicing 200, i.e., the connecting portion 500, and facilitate subsequent processing, providing a positioning reference. The two second grooves 400 shown are merely an example and are not considered a limitation on the number of second grooves 400 in this solution.
[0029] The thickness of the connecting part 500 does not exceed half the thickness of the wafer body 1 after grinding.
[0030] In steps S2 and S3, when the material on the back side of the wafer body 1 is ablated by a laser, the width of a plurality of first grooves 300 is 40-90 μm and the depth of a plurality of first grooves 300 is 20-30 μm; the width of a plurality of second grooves 400 is 15-30 μm and the depth of a plurality of second grooves 400 is 30-40 μm, and the center distance between adjacent second grooves 400 located in the same first groove 300 does not exceed half the width of the first groove 300.
[0031] As a further preferred embodiment of this solution, when forming several first grooves 300 or second grooves 400 on the back side of the wafer body 1 using a laser, the laser pulse width is less than 2ns, and the laser wavelength range is 355nm-632nm; the laser power... Determined by the following formula: , For heat conversion efficiency; The depth is 300 for the first groove or 400 for the second groove; The thermal conductivity of the wafer body material 1; The cross-sectional area of the first groove 300 or the second groove 400; This represents the temperature difference between the processing temperature of the wafer body 1 material and its initial temperature. It is evident that the laser power is directly related to the shape of the first groove 300 or the second groove 400, the thermal conductivity of the material, the ablation temperature, and so on.
[0032] To prevent localized heat accumulation from damaging the chip's internal structure, when forming several first grooves 300 or second grooves 400 on the back side of the wafer body 1 using a laser, cooling gas is also sprayed onto the ablated surface of the wafer body 1. The volumetric flow rate of the cooling gas is... Calculate according to the following formula: , The cooling gas carries away the heat from the surface of wafer body 1. , This is the proportionality coefficient; The density of the gas; is the specific heat capacity of the gas; This is the absolute value of the temperature difference between the exit temperature of the cooling gas from the laser exit nozzle and the temperature at which it leaves the surface of the wafer body 1. The cooling gas may have performed initial heat dissipation on the laser nozzle as it passes through the laser exit nozzle. At this point, the cooling gas experiences a certain temperature rise; therefore, slightly increasing the flow rate of the cooling gas can better achieve the heat exchange and cooling effect. The attenuation coefficient; The duration of blowing cooling gas.
[0033] S4: Remove the polishing patch 2 on the front side of the wafer body 1, attach the adhesive film layer 3 on the back side of the wafer body 1, so that the front side of the wafer body 1 faces upward, and use a cleaver to cut off several connecting portions 500 between the second grooves 400. like Figure 5 As shown, cutting off several connecting portions 500 between the second cut grooves 400 using a chopping cutter involves using several chopping cutters, aligning them with the corresponding positions of the center faces of the second cut grooves 400 in the cutting path 200, and simultaneously cutting different parts of the connecting portions 500. The cutting depth of the chopping cutters is greater than the thickness of the connecting portions 500. The number of chopping cutters is equivalent to the number of second cut grooves 400, and the specifications of the chopping cutters are exactly the same.
[0034] S5: The chip 100 obtained after dicing the wafer body 1 is peeled off from the adhesive film layer 3, thus completing the wafer dicing process.
[0035] This invention improves the edge chipping phenomenon caused by back chipping or poor cutting by sequentially processing the first and second grooves on the back side of the wafer body 1 and combining them with the cleaving process on the front side of the wafer body 1.
[0036] On the other hand, the present invention provides a wafer dicing and cleaving apparatus for implementing the above-described wafer dicing and cleaving method, comprising: A carrier tray is used to place the wafer body 1 to be diced; in this invention, the end face of the wafer body 1 with a grinding patch 2 or an adhesive film layer 3 is fixed on the carrier tray.
[0037] The film application unit is used to apply a polishing patch 2 to the front side of the wafer body 1, or to apply an adhesive film layer 3 to the back side of the wafer body 1. The grinding unit is used to grind the back side of the wafer body 1 to reduce the thickness of the wafer body 1. The laser cutting unit is used to ablate the wafer body 1 material on the back side of the wafer body 1 and located in the area of a plurality of cutting channels 200 to form a plurality of first cutting grooves 300, and further form a plurality of second cutting grooves 400 in each of the first cutting grooves 300, wherein the first cutting grooves 300 and the second cutting grooves 400 are both located within the range of the plurality of cutting channels 200. The cleaving unit is used to cut the connecting part 500 of the wafer body 1 after it has been processed by the laser cutting unit to obtain an independent chip 100.
[0038] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.
Claims
1. A method for dicing and splitting a wafer, characterized in that, Includes the following steps: S1: Provide a wafer body (1), the wafer body (1) includes a plurality of chips (100) arranged in an array and a plurality of dicing channels (200), the plurality of dicing channels (200) being located between adjacent chips (100); S2: A polishing patch (2) is attached to the front side of the wafer body (1), and a plurality of first grooves (300) are formed on the back side of the wafer body (1). The first grooves (300) extend toward the front side of the wafer body (1). S3: Several second grooves (400) are further processed in the end face of several first grooves (300) near the front side of the wafer body (1), and the second grooves (400) extend along the front side direction of the wafer body (1); several cutting channels (200) between adjacent chips (100) form several thinned connection portions (500). S4: Remove the polishing patch (2) on the front side of the wafer body (1), attach the adhesive film layer (3) on the back side of the wafer body (1), so that the front side of the wafer body (1) faces upward, and use a cleaver to cut off several connecting parts (500) between the second grooves (400). S5: Peel the chip (100) obtained after cutting the wafer body (1) from the adhesive film layer (3).
2. The wafer dicing method according to claim 1, characterized in that, The process of forming a plurality of first grooves (300) on the back side of the wafer body (1) in step S2 is to use a laser to ablate the wafer body (1) material on the back side of the wafer body (1) and located in the area of a plurality of dicing channels (200). The first grooves (300) are arranged along the extension direction of the plurality of dicing channels (200), and the width of the plurality of first grooves (300) does not exceed the width of the plurality of dicing channels (200).
3. The wafer dicing method according to claim 2, characterized in that, The step S3 describes further processing to form several second grooves (400) in the bottom surface of several first grooves (300) near the front side of the wafer body (1). This is done by using laser ablation of the material on the back side of the wafer body (1) to form two second grooves (400) in each of the several first grooves (300). The spacing between the several second grooves (400) located in the same first groove (300) does not exceed the width of the several first grooves (300), and the depth of the several second grooves (400) is not less than the depth of the several first grooves (300).
4. The wafer dicing method according to claim 3, characterized in that, When using laser ablation of the material on the back side of the wafer body (1), the width of a plurality of first grooves (300) is 40-90μm and the depth of a plurality of first grooves (300) is 20-30μm; the width of a plurality of second grooves (400) is 15-30μm and the depth of a plurality of second grooves (400) is 30-40μm, and the center distance between adjacent second grooves (400) located in the same first groove (300) does not exceed half the width of the first groove (300).
5. The wafer dicing method according to claim 4, characterized in that, When forming several first grooves (300) or second grooves (400) on the back side of the wafer body (1) using a laser, the laser pulse width is less than 2ns, and the laser wavelength range is 355nm-632nm; the laser power Determined by the following formula: , For heat conversion efficiency; The depth of the first groove (300) or the second groove (400); The thermal conductivity of the wafer body material (1); The cross-sectional area of the first groove (300) or the second groove (400); The temperature difference between the temperature during wafer body (1) material processing and the initial temperature.
6. The wafer dicing method according to claim 5, characterized in that, When forming several first grooves (300) or second grooves (400) on the back side of the wafer body (1) using a laser, cooling gas is also sprayed onto the surface of the wafer body (1), and the volumetric flow rate of the cooling gas is... Calculate according to the following formula: , To cool the heat carried away by the cooling gas as it passes over the surface of the wafer body (1), , This is the proportionality coefficient; The density of the gas; is the specific heat capacity of the gas; The absolute value of the difference between the temperature at which the cooling gas exits the nozzle at the laser exit port and the temperature at which it leaves the surface of the wafer body (1); The attenuation coefficient; The duration of blowing cooling gas.
7. The wafer dicing method according to claim 1, characterized in that, Step S2 also includes a grinding process; before forming a plurality of first grooves (300) on the back side of the wafer body (1), the back side of the wafer body (1) is ground with a grinding blade to reduce the thickness of the wafer body (1).
8. A wafer dicing method according to claim 7, characterized in that, The step S4 described above, which involves cutting off several connecting portions (500) between the second cut grooves (400), involves using several cutting blades to cut off different parts of the connecting portions (500) at the positions corresponding to the center faces of the several second cut grooves (400) in the cutting channel (200). The cutting depth of the several cutting blades is greater than the thickness of the connecting portions (500).
9. A wafer dicing method according to claim 8, characterized in that, The thickness of the connecting portion (500) does not exceed half the thickness of the wafer body (1) after grinding.
10. A wafer dicing and dicing apparatus for implementing the wafer dicing and dicing method according to any one of claims 1-9, characterized in that, include: Carrier disk, used to place the wafer body to be diced (1). The film application unit is used to apply a polishing patch (2) to the front side of the wafer body (1) or to apply an adhesive film layer (3) to the back side of the wafer body (1). The grinding unit is used to grind the back side of the wafer body (1) to reduce the thickness of the wafer body (1); The laser cutting unit is used to ablate the wafer body (1) material on the back side of the wafer body (1) and located in the area of a plurality of cutting channels (200) to form a plurality of first cutting grooves (300), and further form a plurality of second cutting grooves (400) in each of the first cutting grooves (300), wherein the first cutting grooves (300) and the second cutting grooves (400) are both located within the range of a plurality of cutting channels (200); The cleaving unit is used to cut the connecting part (500) of the wafer body (1) after laser cutting unit processing to obtain an independent chip (100).
Citation Information
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