Light emitting diode capable of improving current expansion capability and antistatic capability and preparation method thereof

Abstract

The invention discloses a light-emitting diode capable of improving current expansion capability and antistatic capability and a preparation method of the light-emitting diode. A chip structure comprises a sapphire patterned substrate and an epitaxial layer on the sapphire patterned substrate from bottom to top, a current blocking dielectric layer; a transparent conductive layer; an electrode layer; a protective layer; the current blocking dielectric layer is located in an area right below the metal electrode and is in direct contact with the metal electrode layer; and current in the metal electrode region is prevented from being directly injected downwards into the epitaxial layer. According to the invention, the current blocking dielectric layer with a laminated structure is adopted, so that the current can be uniformly and transversely expanded after passing through the metal electrode, the current crowding effect and the local heat effect of the metal electrode area are further relieved, the light emitting uniformity of the whole core particle is improved, the light emitting efficiency of the diode is improved, and the droop effect is relieved. The current blocking dielectric layer has an excellent insulation characteristic, plays a role in enhancing current expansion, well improves the antistatic capability of the diode, particularly reduces the probability that the diode is broken down in a metal electrode area, and improves the production yield of a chip.

Description

Technical Field

[0001] This invention relates to the field of LED chips, and in particular to a light-emitting diode with improved current spreading capability and anti-static capability, and a method for its fabrication. Background Technology

[0002] Compared to traditional lighting technologies, gallium nitride (GaN) LEDs are rapidly changing our lives and work with their advantages of high efficiency, energy saving, and long lifespan. In the lighting field, GaN LEDs are widely used in indoor lighting in homes, offices, and shopping malls, as well as outdoor lighting such as streetlights and landscape lighting. While saving energy, they can highlight the colors and details of objects and scenery, creating a comfortable shopping and living environment. Especially in smart lighting, combined with intelligent control systems, LEDs can flexibly adjust light intensity and color temperature to meet the lighting needs of different scenarios, improving comfort and energy efficiency. In the field of special lighting, such as in the medical field, GaN LEDs are used in surgical lights and examination lights, providing high color rendering and shadowless effects, improving surgical precision. GaN-based ultraviolet LEDs also have important applications in sterilization, disinfection, and water treatment. Furthermore, LEDs have demonstrated their extraordinary application value in automotive lighting, plant lighting, and other fields. Currently, GaN LED technology is developing rapidly, and its photoelectric performance has been greatly improved.

[0003] However, in traditional LED chips, when current is directly injected into the epitaxial layer in the metal electrode region, a current congestion effect is easily generated, leading to uneven current distribution. This can cause excessively high current density in local areas, triggering localized thermal effects (such as hot spot formation), thereby reducing luminous efficiency and accelerating efficiency decay. Because the metal electrode region of the LED chip is in direct contact with the epitaxial layer, it is prone to becoming a weak point in electrostatic discharge events, leading to device failure and reducing production yield and reliability. Summary of the Invention

[0004] Purpose of the invention: To address the problems existing in the prior art, this invention provides a light-emitting diode (LED) with improved current spreading capability and anti-static capability, and its fabrication method. By uniformly spreading the current in the P-type and N-type regions, the current in the entire light-emitting area of ​​the diode becomes relatively uniform, further alleviating the current congestion effect and localized heat effect in the metal electrode region. As a result, the entire chip can emit light more uniformly, thereby improving the luminous efficiency of the diode and alleviating the droop effect. It also significantly improves the anti-static capability of the diode, especially reducing the probability of the diode being broken down in the metal electrode region.

[0005] Technical Solution: This invention discloses a light-emitting diode (LED) with improved current diffusion capability and anti-static capability, comprising the following structure from bottom to top: a sapphire patterned substrate and an epitaxial layer thereon; a current-blocking dielectric layer; a transparent conductive layer; an electrode layer; and a protective layer; the epitaxial layer includes: a gallium nitride buffer layer, an N-type gallium nitride layer, a quantum well light-emitting layer, a P-type electron blocking layer, and a P-type gallium nitride layer; the current-blocking dielectric layer is located directly below the metal electrode, with an area smaller than that of the metal electrode, and is in contact with the P-type gallium nitride layer on the bottom and the metal electrode layer on the top; when current is injected into the chip, it prevents the current from directly injecting downwards from the metal electrode region into the epitaxial layer, but instead diffuses the injection in all directions.

[0006] Furthermore, the current blocking dielectric layer material is silicon nitride / silicon dioxide (SiO2 / SiO2). Single-layer and superlattice stacked structures.

[0007] Furthermore, the silicon nitride / silicon dioxide ( The growth methods for single-layer and superlattice stacked structures are as follows: single-layer structures are grown at low temperature and at a slow speed. Controlling the growth rate to 1–1.5 Å / s can increase The adhesion between the material and the P-type gallium nitride epitaxial layer of the diode; low-temperature, low-speed growth of 200-500 Å followed by raising the cavity temperature by 100°C, and then further growth. Superlattice structure, maintaining a growth rate of 1~1.5 Å / s, single Thickness is 30~50 Å. and With a thickness ratio of 1:1, the superlattice structure is grown to 300–500 Å, and then the growth rate is increased to 2–2.5 Å / s. This growth mode is beneficial for improving the adhesion between the dielectric layer and the epitaxial layer, enhancing the crystal quality of the film, and reducing the probability of electrostatic breakdown in the electrode region.

[0008] Furthermore, the quantum well light-emitting layer is an InGaN / GaN multi-quantum-well light-emitting layer; the P-type electron blocking layer is an electron blocking layer made of P-type AlGaN material.

[0009] Furthermore, the transparent conductive layer material is an indium tin oxide (ITO) film with a thickness of 200 Å to 2000 Å.

[0010] Furthermore, the electrode layer structure is a combination of one or more alloys of Cr / Al / Ti / Pt / Au.

[0011] Furthermore, the protective layer is a silicon dioxide film with a thickness of 500~5000 Å.

[0012] This invention also discloses a method for preparing the above-mentioned light-emitting diode with improved current spreading capability and antistatic capability, comprising the following steps: (1) Perform MESA lithography on the epitaxial wafer, select an appropriate etching depth according to the difference in epitaxial layer thickness, and etch out the N electrode platform; (2) Deposit on the epitaxial wafer using PECVD evaporation equipment A current-blocking dielectric layer with a single-layer and superlattice stacked structure was prepared, and the required film pattern was fabricated by photolithography, retaining only the current-blocking dielectric layer below the electrode region. (3) Deposit a transparent conductive layer and remove the transparent conductive layer in the N electrode platform and P electrode region by photolithography; (4) Deposit metal electrode layers using E-beam evaporation equipment and optimize electrode pattern design; (5) A protective layer is deposited by PECVD equipment and the protective layer of the P / N electrode area is removed by photolithography to expose the P / N electrode ring and obtain the light-emitting diode chip.

[0013] Furthermore, in step (2), the single layer The growth temperature is 250~300℃ and the growth rate is 1~1.5 Å / s; the growth temperature of the superlattice structure is 350~400℃ and the growth rate is 1~1.5 Å / s; after the superlattice structure is grown, the growth rate is increased to 2~2.5 Å / s.

[0014] Furthermore, the transparent conductive layer described in step (3) is deposited and grown using one or more of the following methods: E-beam electron beam evaporation, sputter magnetron sputtering, and RPD reactive plasma deposition.

[0015] Furthermore, in step (4), the electrode layer is designed with optimized electrode pattern based on the principle of optimal current expansion effect and minimal light shading effect.

[0016] Beneficial effects: This invention has the following advantages: (1) The present invention grows a current-blocking dielectric layer under the metal electrode, optimizes the growth conditions of the dielectric layer, enhances the uniformity of current spread of the entire LED chip, and further alleviates the current congestion effect and local heat effect in the metal electrode area, so that the entire chip can emit light more uniformly, thereby improving the luminous efficiency of the diode and alleviating the droop effect. In addition, the structure has excellent insulation properties, which greatly improves the antistatic capability of the diode and improves the production yield of the product.

[0017] (2) In this invention, when the diode is energized, in the P-type region, the current spreads out in the transparent conductive layer after passing through the metal electrode. The function of the current blocking dielectric layer is to prevent the current in the metal electrode region from being directly injected into the epitaxial layer below. The purpose is to improve the uniformity of the lateral spread of the current in the transparent conductive layer. Since the transparent conductive layer basically covers the P-type region, the current in the P-type region is injected laterally uniformly through the current spreading effect of the transparent conductive layer. In the N-type region, the current blocking dielectric layer prevents the current from being directly injected into the epitaxial layer below, so that the current spreads uniformly in the electrode line. Through the uniform spread of the current in the P-type and N-type regions, the current in the entire light-emitting area of ​​the diode is relatively uniform, which further alleviates the current crowding effect and local heat effect in the metal electrode region. Thus, the entire chip can emit light more uniformly, thereby improving the luminous efficiency of the diode and alleviating the droop effect. The current blocking dielectric layer material is a silicon nitride / silicon dioxide monolayer and superlattice stacked structure. This structure has excellent insulation properties, which not only enhances the current spread but also greatly improves the diode's anti-static capability, especially reducing the probability of the diode being broken down in the metal electrode area. Attached Figure Description

[0018] Figure 1 This is a schematic diagram of the structure of a light-emitting diode chip in an embodiment of the present invention, which improves current spreading capability and enhances antistatic capability.

[0019] Wherein: 1 is the epitaxial layer, 2-1 and 2-2 are current blocking dielectric layers, 3 is the transparent conductive layer, 4-1 is the metal P electrode, 4-2 is the metal N electrode, and 5 is the protective layer. Detailed Implementation

[0020] Please refer to Figure 1 As shown, this invention provides a light-emitting diode chip with improved current spreading capability and enhanced anti-static capability, the structure of which is as follows. Figure 1 As shown, from bottom to top, it includes: a sapphire patterned substrate and an epitaxial layer 1 thereon, a current blocking dielectric layer, a transparent conductive layer 3, an electrode layer, and a protective layer 5, wherein the electrode layer includes a metal P electrode 4-1 and a metal N electrode 4-2; the first current blocking dielectric layer 2-1 is disposed below the metal P electrode 4-1; and the second current blocking dielectric layer 2-2 is disposed below the metal N electrode 4-2.

[0021] The material of the current blocking dielectric layer is silicon nitride / silicon dioxide (SiO2 / SiO2). Single-layer and superlattice stacked structures. The silicon nitride / silicon dioxide ( The growth methods for single-layer and superlattice stacked structures are as follows: single-layer structures are grown at low temperature and at a slow speed. Controlling the growth rate to 1–1.5 Å / s can increase The adhesion between the material and the P-type gallium nitride epitaxial layer of the diode; low-temperature, low-speed growth of 200-500 Å followed by raising the cavity temperature by 100°C, and then further growth. Superlattice structure, maintaining a growth rate of 1~1.5 Å / s, single Thickness is 30~50 Å. and With a thickness ratio of 1:1, the superlattice structure is grown to 300-500 Å, and then the growth rate is increased to 2-2.5 Å / s. This growth mode is beneficial for improving the adhesion between the dielectric layer and the epitaxial layer, improving the crystal quality of the film, and reducing the probability of electrostatic breakdown in the electrode region. The transparent conductive layer 3 is made of indium tin oxide (ITO) film with a thickness of 200-2000 Å. The electrode layers 4-1 / 4-2 have an alloy combination of Cr / Al / Ti / Pt / Au. The protective layer 5 is a silicon dioxide film with a thickness of 500-5000 Å.

[0022] Specifically, the light-emitting diode (LED) prepared by this invention, which improves current spread capability and enhances antistatic capability, has a current-blocking dielectric layer grown below the metal electrode layer. The lower layer directly contacts the P-type gallium nitride layer of epitaxial layer 1, while the upper layer directly contacts the metal electrode layer. When the diode is energized, in the P-type region, the current-blocking dielectric layer prevents current from being directly injected from the metal electrode region into the lower epitaxial layer, allowing the current to spread through the metal electrode and then into the transparent conductive layer, enabling the current to be injected horizontally and uniformly downwards in the P-type region. In the N-type region, the current-blocking dielectric layer prevents current from being directly injected into the lower epitaxial layer, allowing the current to diffuse uniformly within the electrode lines. This uniform current spread in the P-type and N-type regions further alleviates the current congestion effect and localized heat effect in the LED metal electrode region, improves the overall light emission uniformity of the chip, and thus improves the luminous efficiency of the diode and alleviates the droop effect. The current-blocking dielectric layer has excellent insulating properties, enhancing current spread while also significantly improving the diode's antistatic capability, especially reducing the probability of diode breakdown in the metal electrode region.

[0023] In this embodiment, the fabrication process of a light-emitting diode chip with improved current spreading capability and anti-static capability is as follows: 1) After cleaning the epitaxial wafer, dry etching is performed using ICP to create an N-electrode platform. The etching depth of the N-electrode platform is 1μm~1.5μm, that is, 1μm~1.5μm of gallium nitride epitaxial layer material is etched down from the surface of the epitaxial layer. Specifically, the clean epitaxial wafer is homogenized, exposed, and developed in a yellow light region to copy the mask layer pattern of MESA to the surface of the epitaxial wafer. Then, dry etching is performed using ICP equipment to etch the area not covered by the mask layer down to the N-GaN layer, thereby obtaining the mesa of the N-electrode and the dicing channels between the chips. After etching, the residual photoresist, i.e. the mask layer, is removed by cleaning.

[0024] 2) Next, PECVD evaporation equipment is used to deposit [materials] on the epitaxial wafer. A current-blocking dielectric layer with a single-layer and superlattice stacked structure; wherein the single-layer structure in the dielectric layer is grown at low temperature and slow speed. The PECVD chamber temperature is maintained at 250–300°C, and the growth rate is controlled at 1–1.5 Å / s. After low-temperature, low-speed growth for 200–500 Å, the chamber temperature is then increased to 350–400°C, followed by further growth. A superlattice structure is used, and the growth rate is maintained at 1~1.5 Å / s for 300~500 Å, then the growth rate is increased to 2~2.5 Å / s. The required film pattern is prepared by photolithography, that is, only the current blocking dielectric layer below the electrode area is retained. The specific process is as follows: spin coating, exposure and development are performed in the yellow light area to copy the required mask layer pattern to the surface of the epitaxial wafer. Then, wet etching is performed using BOE solution to etch away the current blocking dielectric layer area not covered by the mask layer, thereby obtaining the first current blocking dielectric layer 2-1 and the second current blocking dielectric layer 2-2 below the metal electrode area. After etching, the surface is cleaned to remove the residual photoresist.

[0025] 3) Next, a transparent conductive layer 3 is deposited. The transparent conductive layer 3 is indium tin oxide (ITO) material with a thickness of 200 Å to 2000 Å. In this embodiment, the indium tin oxide (ITO) material is deposited by sputter magnetron sputtering. The sputter magnetron sputtering method can obtain an ITO film with good density and relatively stable resistance. Then, the photoresist is applied, exposed, and developed in the yellow light area to obtain the required pattern on the transparent conductive layer 3. The ITO layer on the electrode area, N-mesa, and chip dicing channel is removed by wet etching. After that, the residual mask layer on the surface is removed by cleaning.

[0026] 4) Then, the metal P electrode 4-1 and metal N electrode 4-2 are deposited by vapor deposition. The materials of the metal P electrode 4-1 and metal N electrode 4-2 are an alloy combination of Cr / Al / Ti / Pt / Au. The specific method is to perform homogenization, exposure and development in the yellow light area to form the required electrode pattern on the platform of metal P electrode 4-1 and metal N electrode 4-2. Then, the metal film layer of P electrode and N electrode is deposited by electron beam vapor deposition equipment. Then, the metal layer and photoresist mask layer of the remaining area of ​​the chip are removed by gold peeling and photoresist removal, leaving the metal film on the required pattern.

[0027] 5) A protective layer 5 for the chip is deposited on the epitaxial wafer forming the electrode layer. The protective layer material is silicon dioxide, and the deposition is performed using PECVD. The film thickness is 600 Å to 3000 Å. Specifically, the silicon dioxide protective layer 5 is first deposited using PECVD equipment. Then, homogenization, exposure, and development are performed in the yellow light region to form the required protective layer pattern on the wafer surface (the mask layer exposes the P electrode 4-1 and N electrode 4-2 regions). The silicon dioxide protective layer material on the P electrode and N electrode is then removed using wet etching, followed by resist removal and cleaning. Finally, a light-emitting diode chip with improved current spreading capability and antistatic capability is obtained.

[0028] This invention employs a multilayered current-blocking dielectric layer, enabling more uniform lateral current distribution after passing through the metal electrodes. This further alleviates current congestion and localized thermal effects in the metal electrode region, improving the overall uniformity of light emission in the chip, thereby enhancing the diode's luminous efficiency and mitigating the droop effect. The current-blocking dielectric layer possesses excellent insulation properties, enhancing current distribution while also significantly improving the diode's electrostatic discharge (ESD) immunity, particularly reducing the probability of diode breakdown in the metal electrode region and increasing chip production yield.

Claims

1. A light-emitting diode with improved current spreading capability and anti-static capability, characterized in that... From bottom to top, it includes the following structure: a sapphire patterned substrate and an epitaxial layer thereon; Current-blocking dielectric layer; Transparent conductive layer; Electrode layer and protective layer; the epitaxial layer includes: gallium nitride buffer layer, N-type gallium nitride layer, quantum well light-emitting layer, P-type electron blocking layer, and P-type gallium nitride layer; The current-blocking dielectric layer is located directly below the metal electrode, with an area smaller than that of the metal electrode. It is in contact with the P-type gallium nitride layer below and the metal electrode layer above. When current is injected into the chip, it prevents the current from being injected directly downwards from the metal electrode region into the epitaxial layer, but instead diffuses the injection in all directions.

2. The light-emitting diode with improved current spreading capability and anti-static capability according to claim 1, characterized in that: The current blocking dielectric layer material is a silicon nitride / silicon dioxide (Si3N4 / SiO2) monolayer and superlattice stacked structure.

3. The light-emitting diode with improved current spreading capability and anti-static capability according to claim 2, characterized in that: The growth method of the silicon nitride / silicon dioxide (Si3N4 / SiO2) monolayer and superlattice stacked structure is as follows: the monolayer structure is grown at low temperature and slow speed with Si3N4, and the growth rate is controlled at 1~1.5 Å / s. After growing at low temperature and slow speed for 200~500 Å, the cavity temperature is increased by 100℃, and then the Si3N4 / SiO2 superlattice structure is grown, maintaining the growth rate at 1~1.5 Å / s. The thickness of a single Si3N4 / SiO2 is 30~50 Å, and the thickness ratio of Si3N4 to SiO2 is 1:

1. After the superlattice structure is grown for 300~500 Å, the growth rate is increased to 2~2.5 Å / s.

4. The light-emitting diode with improved current spreading capability and anti-static capability according to claim 1, characterized in that: The transparent conductive layer material is an indium tin oxide (ITO) film with a thickness of 200 Å to 2000 Å.

5. The light-emitting diode with improved current spreading capability and anti-static capability according to claim 1, characterized in that: The electrode layer structure is a combination of one or more alloys of Cr / Al / Ti / Pt / Au.

6. The light-emitting diode with improved current spreading capability and antistatic capability according to claim 1, characterized in that: The protective layer is a silicon dioxide film with a thickness of 500~5000 Å.

7. A method for fabricating a light-emitting diode with improved current spreading capability and antistatic capability as described in any one of claims 1-6, characterized in that... Includes the following steps: (1) MESA lithography is performed on the epitaxial wafer to etch out the N-electrode platform; (2) A current blocking dielectric layer of Si3N4 / SiO2 monolayer and superlattice superposition structure is deposited on the epitaxial wafer using PECVD evaporation equipment, and the required film pattern is prepared by photolithography, retaining only the current blocking dielectric layer below the electrode area. (3) Deposit a transparent conductive layer and remove the transparent conductive layer in the N electrode platform and P electrode region by photolithography; (4) Deposit metal electrode layers using E-beam evaporation equipment and optimize electrode pattern design; (5) A protective layer is deposited by PECVD equipment and the protective layer of the P / N electrode area is removed by photolithography to expose the P / N electrode ring and obtain the light-emitting diode chip.

8. The method for preparing a light-emitting diode with improved current spreading capability and antistatic capability according to claim 7, characterized in that: In step (2), the growth temperature of monolayer Si3N4 is 250~300℃ and the growth rate is 1~1.5 Å / s; the growth temperature of superlattice structure is 350~400℃ and the growth rate is 1~1.5 Å / s; after the superlattice structure is grown, the growth rate is increased to 2~2.5 Å / s.

9. The method for preparing a light-emitting diode with improved current spreading capability and antistatic capability according to claim 7, characterized in that: The transparent conductive layer described in step (3) is deposited and grown using one or more of the following methods: E-beam electron beam evaporation, sputter magnetron sputtering, and RPD reactive plasma deposition.

10. The method for preparing a light-emitting diode with improved current spreading capability and antistatic capability according to claim 7, characterized in that: In step (4), the electrode layer is designed with optimized electrode pattern based on the principle of optimal current spread effect and minimal light shading effect.

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