InAs quantum dot laser and InAs quantum dot laser preparation method

Abstract

The invention discloses an InAs quantum dot laser and an InAs quantum dot laser preparation method, and belongs to the technical field of semiconductor lasers. The energy band and the waveguide of the epitaxial structure are jointly designed, the epitaxial structure adopts the multi-layer stacked lower gradient waveguide layer and the multi-layer stacked upper gradient waveguide layer, and the refractive indexes of the gradient waveguide layers are distributed in a gradient manner, so that continuous and convergent deflection can be performed on light rays in the gradient waveguide layers, and the light rays can be continuously deflected in the gradient waveguide layers. Light emitted from the end face of the gradient waveguide layer has a velocity component closer to the normal direction, so that the divergence angle of a light beam is reduced; and meanwhile, the epitaxial structure adopts the multi-layer stacked InAs quantum dot active region, so that the density of the quantum dots is multiplied, and the energy band of the InAs quantum dot active region is optimized, thereby increasing the optical gain volume and reducing the threshold current density. And only the epitaxial structure is designed, and the method can be compatible with the existing process, so that the process complexity and cost are reduced.

Description

Technical Field

[0001] This application relates to the field of semiconductor laser technology, and in particular to an InAs quantum dot laser and a method for fabricating an InAs quantum dot laser. Background Technology

[0002] GaAs-based InAs quantum dot lasers possess advantages such as low threshold current and high temperature stability. However, due to their extremely small active region size, the divergence angle of the laser output beam is excessively large, severely affecting beam quality and fiber coupling efficiency, and increasing the complexity and cost of application systems. Currently, the main methods for reducing the divergence angle include using large optical cavity structures, external lens systems, or surface photonic crystal structures. However, these methods each have drawbacks, such as difficulty in balancing low threshold current and high power, increased size, system complexity, or high manufacturing costs. Therefore, there is an urgent need for a high-performance quantum dot laser solution that can reduce the divergence angle and is compatible with existing processes. Summary of the Invention

[0003] The purpose of this application is to provide an InAs quantum dot laser and an InAs quantum dot laser fabrication method that can fundamentally reduce the divergence angle from the epitaxial structure design, achieve high performance, and be compatible with existing processes.

[0004] To achieve the above objectives, this application provides an InAs quantum dot laser, comprising: a GaAs substrate; an epitaxial structure disposed on the surface of the GaAs substrate; the epitaxial structure comprising, in a direction away from the GaAs substrate, a GaAs buffer layer, a lower confinement layer, at least two lower graded waveguide layers, a lower undoped layer, at least two InAs quantum dot active regions, an upper undoped layer, at least two upper graded waveguide layers, an upper confinement layer, and a capping layer, disposed sequentially therefrom. The material of each of the lower gradient waveguide layers is Al. x Ga (1-x) As; the Al composition of each of the lower graded waveguide layers decreases sequentially in the direction away from the lower confinement layer, and the Al composition of the lower graded waveguide layer closer to the lower confinement layer in two adjacent lower graded waveguide layers is equal to the Al composition of the lower graded waveguide layer closer to the lower undoped layer. Each InAs quantum dot active region includes an InAs quantum dot layer; The material of each of the aforementioned upper gradient waveguide layers is Al. x Ga (1-x) As; the Al composition of each upper graded waveguide layer increases sequentially in the direction away from the upper undoped layer, and the Al composition of the upper graded waveguide layer closer to the upper undoped layer in two adjacent upper graded waveguide layers is equal to the Al composition of the upper graded waveguide layer closer to the upper confinement layer.

[0005] Optionally, the number of layers in the active region of the InAs quantum dot is 10-15; The quantum dot density of each InAs quantum dot layer is greater than or equal to 1 × 10⁻⁶. 10 cm -2 ; The diameter of the quantum dots in each InAs quantum dot layer is 10nm-20nm; the height of the quantum dots in each InAs quantum dot layer is 5nm-10nm.

[0006] Optionally, each InAs quantum dot active region includes a first GaAs layer, the InAs quantum dot layer, an InGaAs layer, a second GaAs layer, and a third GaAs layer arranged sequentially along a direction away from the lower undoped layer. The thickness of the first GaAs layer is 20nm-50nm; The thickness of the InGaAs layer is 3nm-6nm; The thickness of the second GaAs layer is 7nm-14nm; The thickness of the third GaAs layer is 20nm-40nm.

[0007] Optionally, the thickness of the GaAs buffer layer is 200nm-300nm; the N-type doping concentration of the GaAs buffer layer is 2×10⁻⁶. 18 cm -3 -4×10 18 cm -3 ; And / or, the material of the lower confining layer is Al. x Ga (1-x) As, the x-coefficient increases from 0.1 to 0.6 along the direction away from the GaAs buffer layer; the thickness of the lower confinement layer is 300nm-600nm; the N-type doping concentration of the lower confinement layer is 2×10⁻⁶. 18 cm -3 -4×10 18 cm -3 ; And / or, the material of the lower undoped layer is Al. x Ga (1-x) As, along the direction away from the lower graded waveguide layer, x decreases from 0.1 to 0.05; the thickness of the lower undoped layer is 100nm-300nm; And / or, the material of the upper undoped layer is Al. x Ga (1-x) As, the x-axis increases sequentially from 0.0008 to 0.0009 along the direction away from the InAs quantum dot active region; the thickness of the upper undoped layer is 100nm-300nm; And / or, the material of the upper confining layer is Al. x Ga (1-x) As, x is 0.25-0.3; the thickness of the upper confinement layer is 300nm-500nm; the P-type doping concentration of the upper confinement layer is 2×10⁻⁶. 18 cm -3 -4×10 18 cm -3 ; And / or, the capping layer is made of GaAs; the thickness of the capping layer is 100nm-150nm; and the p-type doping concentration of the capping layer is greater than 2×10⁻⁶. 19 cm -3 .

[0008] Optionally, the InAs quantum dot laser includes: four layers of the lower graded waveguide layer; the total thickness of the four layers of the lower graded waveguide layer is 2000nm-3000nm; The material of the first layer, the lower graded waveguide layer, is Al. x Ga (1-x) As, along the direction x away from the lower confinement layer, the value decreases gradually from 0.3 to 0.2. The material of the second layer, the lower graded waveguide layer, is Al. x Ga (1-x) As, along the direction x away from the lower confinement layer, the value decreases gradually from 0.2 to 0.15. The material of the third layer, the lower graded waveguide layer, is Al. x Ga (1-x) As, along the direction x away from the lower confinement layer, the value gradually decreases from 0.15 to 0.1. The material of the fourth layer, the lower graded waveguide layer, is Al. x Ga (1-x) As, along the direction x away from the lower limiting layer, the value decreases sequentially from 0.1 to 0.05.

[0009] Optionally, each of the lower graded waveguide layers has the same thickness; the thickness of each lower graded waveguide layer is 500nm-750nm.

[0010] Optionally, the InAs quantum dot laser includes: two layers of the upper graded waveguide layer; the total thickness of the two upper graded waveguide layers is 800nm-1300nm; The material of the first layer, the upper gradient waveguide layer, is Al. x Ga (1-x) As, along the direction x away from the upper undoped layer, the value gradually increases from 0.08 to 0.12. The material of the second layer, the upper gradient waveguide layer, is Al.x Ga (1-x) As, along the direction x away from the upper undoped layer, the value gradually decreases from 0.12 to 0.25.

[0011] Optionally, the thickness of the first layer of the upper gradient waveguide is 300nm-500nm; The thickness of the second layer, the upper gradient waveguide layer, is 500nm-800nm.

[0012] To achieve the above objectives, this application also provides a method for fabricating an InAs quantum dot laser, comprising: A GaAs substrate is placed in an epitaxial device, and a GaAs buffer layer, a lower confinement layer, at least two lower graded waveguide layers, a lower undoped layer, at least two InAs quantum dot active regions, an upper undoped layer, at least two upper graded waveguide layers, an upper confinement layer, and a capping layer are epitaxially grown sequentially in a direction away from the GaAs substrate. The material of each of the lower gradient waveguide layers is Al. x Ga (1-x) As; the Al composition of each of the lower graded waveguide layers decreases sequentially in the direction away from the lower confinement layer, and the Al composition of the lower graded waveguide layer closer to the lower confinement layer in two adjacent lower graded waveguide layers is equal to the Al composition of the lower graded waveguide layer closer to the lower undoped layer. Each InAs quantum dot active region includes an InAs quantum dot layer; The material of each of the aforementioned upper gradient waveguide layers is Al. x Ga (1-x) As; the Al composition of each upper graded waveguide layer increases sequentially in the direction away from the upper undoped layer, and the Al composition of the upper graded waveguide layer closer to the upper undoped layer in two adjacent upper graded waveguide layers is equal to the Al composition of the upper graded waveguide layer closer to the upper confinement layer.

[0013] Optionally, the active region of each layer of the InAs quantum dot is epitaxially grown, including: A first GaAs layer with a thickness of 20nm-50nm was grown under process conditions with a growth temperature of 570℃-670℃. Under the following process conditions: growth temperature 450℃-530℃, group V / group III ratio 10-50, growth rate 0.02nm / s~0.04nm / s, and interruption time 5s~30s, an initial InAs quantum dot layer was grown on the surface of the first GaAs layer. Growth was interrupted after a preset time to obtain the final InAs quantum dot layer. The quantum dot density of the InAs quantum dot layer is greater than or equal to 1×10⁻⁶. 10 cm -2The diameter of the quantum dots in the InAs quantum dot layer is 10nm-20nm; the height of the quantum dots in the InAs quantum dot layer is 5nm-10nm. An InGaAs layer of 3 nm to 6 nm is grown on the surface of the InAs quantum dot layer under process conditions with a growth temperature of 450℃ to 530℃. A second GaAs layer with a thickness of 7nm-14nm is grown on the surface of the InGaAs layer under process conditions with a growth temperature of 450℃-530℃. A third GaAs layer with a thickness of 20nm-40nm is grown on the surface of the second GaAs layer under process conditions of growth temperature of 570℃-670℃.

[0014] Optionally, at least two layers of the lower graded waveguide are epitaxially grown, including: A first lower graded waveguide layer with a thickness of 500nm-750nm is grown on the surface of the lower confinement layer under process conditions of a growth temperature of 600℃-700℃; the material of the first lower graded waveguide layer is Al. x Ga (1-x) As, along the direction x away from the lower confinement layer, the value decreases gradually from 0.3 to 0.2. A second lower graded waveguide layer with a thickness of 500nm-750nm is grown on the surface of the first lower graded waveguide layer under process conditions of growth temperature of 600℃-700℃; the material of the second lower graded waveguide layer is Al. x Ga (1-x) As, along the direction x away from the lower confinement layer, the value decreases gradually from 0.2 to 0.15. A third lower graded waveguide layer with a thickness of 500nm-750nm is grown on the surface of the second lower graded waveguide layer under process conditions of growth temperature of 600℃-700℃; the material of the third lower graded waveguide layer is Al. x Ga (1-x) As, along the direction x away from the lower confinement layer, the value gradually decreases from 0.15 to 0.1. A fourth lower graded waveguide layer with a thickness of 500nm-750nm is grown on the surface of the third lower graded waveguide layer under process conditions of growth temperature of 600℃-700℃; the material of the fourth lower graded waveguide layer is Al. x Ga (1-x) As, along the direction x away from the lower limiting layer, the value decreases sequentially from 0.1 to 0.05.

[0015] Obviously, the InAs quantum dot laser provided in this application involves a joint design of the band structure and waveguide of the epitaxial structure. The epitaxial structure employs a multi-layered lower graded waveguide layer and a multi-layered upper graded waveguide layer. Because the refractive index of the graded waveguide layer is gradually distributed, continuous and converging deflection of light can be achieved within the graded waveguide layer, resulting in light rays emanating from the end face of the graded waveguide layer having a velocity component closer to the normal direction, thereby reducing the beam divergence angle. Simultaneously, the epitaxial structure employs a multi-layered stacked InAs quantum dot active region, doubling the quantum dot density and optimizing the band structure of the InAs quantum dot active region, thereby increasing the optical gain volume and reducing the threshold current density. Moreover, since only the epitaxial structure is designed, it is compatible with existing processes, thus reducing process complexity and cost. This application also provides a method for fabricating an InAs quantum dot laser, which has the aforementioned beneficial effects. Attached Figure Description

[0016] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of this application. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0017] Figure 1 A schematic diagram of the structure of an InAs quantum dot laser provided in an embodiment of this application; Figure 2 This is a schematic diagram of a multilayer lower gradient waveguide layer provided in an embodiment of this application; Figure 3 A schematic diagram of an atomic force microscope for an InAs quantum dot laser provided in an embodiment of this application; Figure 4 A schematic diagram of the photoluminescence spectrum of an InAs quantum dot laser provided in an embodiment of this application; Figure 5 A schematic diagram of the structure of a multilayer InAs quantum dot active region provided in an embodiment of this application; Figure 6 This is a schematic diagram of a multilayer upper gradient waveguide layer provided in an embodiment of this application.

[0018] The annotations in the attached figures are explained as follows: 1-GaAs buffer layer; 2-lower confinement layer; 3-lower graded waveguide layer; 31-first lower graded waveguide layer; 32-second lower graded waveguide layer; 33-third lower graded waveguide layer; 34-fourth lower graded waveguide layer; 4-lower undoped layer; 5-InAs quantum dot active region; 51-first GaAs layer; 52-InAs quantum dot layer; 53-InGaAs layer; 54-second GaAs layer; 55-third GaAs layer; 6-upper undoped layer; 7-upper graded waveguide layer; 71-first upper graded waveguide layer; 72-second upper graded waveguide layer; 8-upper confinement layer; 9-cap layer. Detailed Implementation

[0019] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0020] Currently, optical communication systems primarily utilize InGaAs / GaAs quantum well structures in the active region of short-wavelength (850nm) lasers, while long-wavelength lasers mainly employ InGaAsP / InP quantum well structures. However, both structures have limitations. First, InP materials have a relatively small conduction band level, resulting in poor carrier confinement and significant carrier escape. Therefore, in practical applications, additional carriers must be injected to compensate for the escaped carriers. However, this additional method increases internal cavity losses, significantly reducing external quantum efficiency. Second, temperature greatly affects the output of these lasers, requiring cooling devices or compensation circuits to stabilize the temperature. This significantly increases device cost and power consumption, and introduces numerous inconveniences in device integration. Although the InGaAs strained multi-quantum-well structure on a GaAs base does not suffer from conduction band order issues, its emission wavelength is limited to 800 nm to 1000 nm without the introduction of other elements, making it difficult to extend and thus unable to meet the requirements of long-wavelength communication. The main method to extend the wavelength is to increase the In content of the InGaAs material. However, this method has a drawback: increasing the In content leads to the generation of dislocations in the quantum wells. Therefore, the In content cannot be increased indefinitely, which creates a bottleneck for wavelength extension.

[0021] Among various material systems, InAs quantum dots on GaAs substrates have been the subject of considerable research. Firstly, the high lattice mismatch (up to 7%) between InAs and GaAs causes InAs to initially grow in a three-dimensional island-like pattern on GaAs substrates, enabling the growth of self-organized quantum dots on GaAs. Secondly, InAs quantum dots on GaAs substrates can emit light in long-wavelength optical communication applications. Thirdly, InAs quantum dot lasers exhibit high saturation gain, low threshold current density, and good temperature stability, making InAs / GaAs quantum dots a mainstream research direction in device development.

[0022] InAs / GaAs quantum dot structures offer a good solution to the aforementioned challenges. Since InAs / GaAs quantum dot structures belong to the InGaAs / GaAs material system, they possess a large conduction band order. Furthermore, the transition from a layered to an island-like structure in InAs significantly increases the carrier localization energy, enabling long-wavelength emission without introducing other elements. Therefore, InAs / GaAs quantum dot lasers are widely considered one of the most promising and practically valuable light sources in fiber optic communication. In addition, from a cost perspective, using GaAs as a substrate material is much cheaper than using InP. Moreover, GaAs-based materials are harder than InP-based materials, making integration with other materials easier.

[0023] While GaAs-based InAs quantum dot lasers possess advantages such as low threshold current, high temperature stability, unparalleled defect tolerance, and potentially high differential gain, their extremely small active region severely restricts the emitting area, resulting in a large divergence angle (especially in the vertical direction), typically reaching 30°–60°. This large divergence angle significantly degrades beam quality and coupling efficiency with optical fibers, increasing the complexity and cost of application systems.

[0024] Currently, the main methods for reducing the divergence angle include using large optical cavity structures, external lens systems, or surface photonic crystal structures. Large optical cavity structures can expand the near-field beam and compress the far-field divergence angle to some extent (down to 20°-23°), but it is difficult to simultaneously achieve low threshold and high power output. External lens systems increase size and complexity. While photonic crystal structures can significantly reduce the divergence angle (fast-axis divergence angle can be reduced to below 5°, even 0.3°), their fabrication process is complex and costly. Therefore, there is an urgent need for a high-performance quantum dot laser solution that can reduce the divergence angle and is compatible with existing processes.

[0025] Therefore, this application provides an InAs quantum dot laser and an InAs quantum dot laser fabrication method. By jointly designing the band and waveguide of the epitaxial structure, the divergence angle can be reduced from the epitaxial structure design, and high performance can be achieved, while being compatible with existing processes.

[0026] Please refer to the following: Figures 1 to 6 ,in Figure 1 Only the specific locations of the lower graded waveguide layer 3, the InAs quantum dot active region 5, and the upper graded waveguide layer 7 are shown; the specific number of these layers is not specified. Please refer to [reference needed] for the specific number of layers of the lower graded waveguide layer 3, the InAs quantum dot active region 5, and the upper graded waveguide layer 7. Figure 2 , Figure 5 and Figure 6 .

[0027] An InAs quantum dot laser provided in this application embodiment may include: a GaAs substrate; an epitaxial structure disposed on the surface of the GaAs substrate; the epitaxial structure includes a GaAs buffer layer 1, a lower confinement layer 2, at least two lower graded waveguide layers 3, a lower undoped layer 4, at least two InAs quantum dot active regions 5, an upper undoped layer 6, at least two upper graded waveguide layers 7, an upper confinement layer 8, and a capping layer 9 disposed sequentially along a direction away from the GaAs substrate; The material of each gradient waveguide layer 3 is Al. x Ga (1-x) As; the Al composition of each lower graded waveguide layer 3 decreases sequentially along the direction away from the lower confinement layer 2, and the Al composition of the lower graded waveguide layer 3 closest to the lower confinement layer 2 in two adjacent lower graded waveguide layers 3 is equal to the Al composition of the lower graded waveguide layer 3 closest to the lower undoped layer 4. Each InAs quantum dot active region 5 includes an InAs quantum dot layer 52; The material of each gradient waveguide layer 7 is Al. x Ga (1-x) As; the Al composition of each upper graded waveguide layer 7 increases sequentially in the direction away from the upper undoped layer 6, and the Al composition of the upper graded waveguide layer 7 closest to the upper undoped layer 6 in two adjacent upper graded waveguide layers 7 is equal to the Al composition of the upper graded waveguide layer 7 closest to the upper confinement layer 8.

[0028] It should be noted that the GaAs buffer layer 1 in this embodiment can reduce lattice mismatch and release lattice stress, thereby improving the quality of the subsequently epitaxially grown film. This embodiment does not limit the specific thickness of the GaAs buffer layer 1; for example, the thickness of the GaAs buffer layer 1 can be 200nm-300nm. It should be noted that the thickness of the GaAs buffer layer 1 affects the release of lattice stress, and this embodiment uses a GaAs buffer layer 1 within the above-mentioned thickness range, which provides the best effect in releasing lattice stress. This embodiment does not limit the specific doping concentration of the GaAs buffer layer 1; for example, the N-type doping concentration of the GaAs buffer layer 1 can be 2×10⁻⁶. 18 cm -3 -4×10 18 cm -3 It should be noted that N-type doping refers to the presence of N-type impurities in the GaAs buffer layer 1. When the GaAs buffer layer 1 is used as an ohmic contact layer, the N-type doping concentration of the GaAs buffer layer 1 will affect the ohmic contact resistance. In this embodiment, the GaAs buffer layer 1 with the above-mentioned N-type doping concentration range can achieve the best ohmic contact effect.

[0029] It should be noted that the lower confinement layer 2 in this embodiment can prevent charge carriers from diffusing towards the GaAs substrate, thus better confining the charge carriers within the InAs quantum dot active region 5. This embodiment does not limit the specific type of the lower confinement layer 2, as long as it can prevent charge carriers from diffusing towards the GaAs substrate. For example, the material of the lower confinement layer 2 can be Al. x Ga (1-x) As, along the direction away from GaAs buffer layer 1, x increases sequentially from 0.1 to 0.6. This embodiment does not limit the specific thickness of the lower confinement layer 2; for example, the thickness of the lower confinement layer 2 can be 300nm-600nm. It should be noted that the thickness of the lower confinement layer 2 affects the confinement ability of charge carriers. In this embodiment, the lower confinement layer 2 with the thickness range described above achieves the best confinement effect for charge carriers. This embodiment does not limit the specific doping concentration of the lower confinement layer 2; for example, the N-type doping concentration of the lower confinement layer 2 can be 2×10⁻⁶. 18 cm -3 -4×10 18 cm -3 It should be noted that the lower confinement layer 2 in this embodiment is doped with N-type impurities. The N-type doping concentration of the lower confinement layer 2 affects its ability to confine charge carriers. In this embodiment, the lower confinement layer 2 with the above-mentioned N-type doping concentration range provides the best confinement effect for charge carriers.

[0030] The function of a graded waveguide layer is to allow light to automatically bend towards the region with higher refractive index (the waveguide center), forming a smooth, periodically oscillating curved path. This means that for the vast majority of light rays, the angle between its propagation direction and the waveguide axis remains very small during propagation.

[0031] It should be noted that in this embodiment, the Al composition of the lower graded waveguide layer 3 exhibits a gradient change, and the corresponding refractive index also exhibits a gradient change. In the lower graded waveguide layer 3 with a gradient change in refractive index, light rays will automatically bend towards the region with higher refractive index (the center of the lower graded waveguide layer 3), forming a smooth, periodically oscillating curved path. This means that for the vast majority of light rays, the angle between their propagation direction and the axis of the lower graded waveguide layer 3 is always very small, i.e., a small divergence angle can be achieved.

[0032] It should be noted that the number of layers, thickness, initial and final values ​​of Al composition, and the variation difference of Al composition in the lower graded waveguide layer 3 all affect the refractive index distribution in the lower graded waveguide layer 3, thereby affecting the path of light bending in the lower graded waveguide layer 3. This embodiment uses a multi-layer stacked lower graded waveguide layer 3, and each lower graded waveguide layer 3 can be designed independently. The thickness and Al composition variation difference of each lower graded waveguide layer 3 can be the same or different.

[0033] To achieve optimal reduction of divergence angle and high power output, preferably, such as Figure 2 As shown, this embodiment may include four lower gradient waveguide layers 3; the total thickness of the four lower gradient waveguide layers 3 may be 2000nm-3000nm; The material of the first layer of gradient waveguide 31 can be Al. x Ga (1-x) As, along the direction x away from the lower confinement layer 2, the gradient decreases from 0.3 to 0.2. The material of the second gradient waveguide layer 32 can be Al. x Ga (1-x) As, along the direction x away from the lower confinement layer 2, the gradient decreases from 0.2 to 0.15. The material of the third lower gradient waveguide layer 33 can be Al. x Ga (1-x) As, along the direction x away from the lower confinement layer 2, the gradient decreases from 0.15 to 0.1. The material of the fourth graded waveguide layer 34 can be Al. x Ga (1-x) As, along the direction x away from the lower confinement layer 2, the gradient decreases from 0.1 to 0.05.

[0034] It should be noted that, in this embodiment, the use of a thicker lower gradient waveguide layer 3 is beneficial in two ways: firstly, it helps to reduce the divergence angle and achieve high power output; secondly, it can enhance electron confinement and slow down electron migration speed.

[0035] It should be noted that in this embodiment, the use of a lower gradient waveguide layer 3 with an Al composition that gradually changes from 0.3 to 0.05 is beneficial in reducing the divergence angle and achieving high power output, while also reducing optical loss and resistance.

[0036] Furthermore, in this embodiment, the thickness of each lower gradient waveguide layer 3 can be the same; the thickness of each lower gradient waveguide layer 3 can be 500nm-750nm. It should be noted that using the same thickness for each lower gradient waveguide layer 3 in this embodiment can reduce process complexity, reduce the risk of excessive thickness fluctuation deviation, and avoid the need for real-time flow calibration required for non-uniform thickness design.

[0037] It should be noted that the lower undoped layer 4 in this embodiment can prevent impurities in other film layers from diffusing into the InAs quantum dot active region 5, thus avoiding the impact of impurities on the performance of the InAs quantum dot. This embodiment does not limit the specific type of the lower undoped layer 4, as long as it can prevent impurities in other film layers from diffusing into the InAs quantum dot active region 5. For example, the material of the lower undoped layer 4 can be Al. x Ga (1-x) As, along the direction away from the lower graded waveguide layer 3, x decreases sequentially from 0.1 to 0.05. This embodiment does not limit the specific thickness of the lower undoped layer 4; for example, the thickness of the lower undoped layer 4 can be 100nm-300nm. It should be noted that the thickness of the lower undoped layer 4 affects the ability to confine impurities. In this embodiment, using the lower undoped layer 4 within the above-mentioned thickness range provides the best impurity confinement effect.

[0038] It should be noted that, as Figure 3 As shown, in this embodiment, the InAs quantum dot layer 52 includes InAs quantum dots arranged in an array. Using the InAs quantum dot layer 52 as the active region, electrons can be effectively confined within the InAs quantum dots through the quantum confinement effect. This embodiment does not limit the specific number of InAs quantum dot active region 5 layers; for example, the number of InAs quantum dot active region 5 layers can be 10-15. This embodiment does not limit the specific quantum dot density of the InAs quantum dot active region 5; for example, the quantum dot density of each InAs quantum dot layer 52 can be greater than or equal to 1 × 10⁻⁶. 10 cm -2It should be noted that the number of InAs quantum dot layers 52 and the quantum dot density affect the optical gain volume and threshold current density. In this embodiment, the InAs quantum dot active region 5 with the above-mentioned number of layers and quantum dot density range can achieve a larger optical gain volume and a lower threshold current density.

[0039] This embodiment does not limit the specific size of the InAs quantum dots. For example, the diameter of each InAs quantum dot layer 52 can be 10nm-20nm; the height of each InAs quantum dot layer 52 can be 5nm-10nm. It should be noted that the size of the InAs quantum dots affects the wavelength of the emitted light. Figure 4 As shown in the schematic diagram of the photoluminescence spectrum, this embodiment can achieve near-infrared emission using InAs quantum dots of the above-mentioned size range.

[0040] Furthermore, such as Figure 5 As shown, each InAs quantum dot active region 5 in this embodiment may include a first GaAs layer 51, an InAs quantum dot layer 52, an InGaAs layer 53, a second GaAs layer 54, and a third GaAs layer 55 sequentially disposed along a direction away from the lower undoped layer 4. It should be noted that the GaAs layer in this embodiment can serve as a spacer layer. In this embodiment, the InGaAs layer 53 is inserted between the layers as a strain buffer layer, which can release lattice stress.

[0041] This embodiment does not limit the specific thickness of the first GaAs layer 51; for example, the thickness of the first GaAs layer 51 can be 20nm-50nm. This embodiment does not limit the specific thickness of the InGaAs layer 53; for example, the thickness of the InGaAs layer 53 can be 3nm-6nm. This embodiment does not limit the specific thickness of the second GaAs layer 54; for example, the thickness of the second GaAs layer 54 can be 7nm-14nm. This embodiment does not limit the specific thickness of the third GaAs layer 55; for example, the thickness of the third GaAs layer 55 can be 20nm-40nm.

[0042] It should be noted that the undoped upper layer 6 in this embodiment can prevent impurities in other film layers from diffusing into the InAs quantum dot active region 5, thus avoiding the impact of impurities on the performance of the InAs quantum dot. This embodiment does not limit the specific type of the undoped upper layer 6, as long as it can prevent impurities in other film layers from diffusing into the InAs quantum dot active region 5. For example, the material of the undoped upper layer 6 can be Al. x Ga (1-x)As, the x-axis increases sequentially from 0.0008 to 0.0009 along the direction away from the InAs quantum dot active region 5. This embodiment does not limit the specific thickness of the upper undoped layer 6; for example, the thickness of the upper undoped layer 6 can be 100nm-300nm. It should be noted that the thickness of the upper undoped layer 6 affects the impurity confinement capability. This embodiment uses an upper undoped layer 6 within the aforementioned thickness range, resulting in the best impurity confinement effect.

[0043] It should be noted that the number of layers, thickness, initial and final values ​​of Al composition, and the difference in Al composition variation of the upper graded waveguide layer 7 all affect the refractive index distribution in the upper graded waveguide layer 7, thereby affecting the path of light bending in the upper graded waveguide layer 7. This embodiment uses a multi-layer stacked upper graded waveguide layer 7, and each upper graded waveguide layer 7 can be designed independently. The thickness and the difference in Al composition variation of each upper graded waveguide layer 7 can be the same or different.

[0044] To achieve optimal reduction of divergence angle and high power output, preferably, such as Figure 6 As shown, this embodiment may include two upper graded waveguide layers 7; the total thickness of the two upper graded waveguide layers 7 may be 800nm-1300nm. The material of the first gradient waveguide layer 71 can be Al. x Ga (1-x) As, along the direction x away from the upper undoped layer 6, the value gradually increases from 0.08 to 0.12. The material of the second gradient waveguide layer 72 can be Al. x Ga (1-x) As, along the direction x away from the upper undoped layer 6, the value gradually decreases from 0.12 to 0.25.

[0045] Furthermore, in this embodiment, the thickness of each upper gradient waveguide layer 7 can be different; the thickness of the first upper gradient waveguide layer 71 can be 300nm-500nm; and the thickness of the second upper gradient waveguide layer 72 can be 500nm-800nm.

[0046] It should be noted that the thinner upper gradient waveguide layer 7 used in this embodiment can reduce the hole migration barrier and improve the hole injection efficiency.

[0047] It should be noted that in this embodiment, the upper confinement layer 8 can prevent charge carriers from diffusing towards the capping layer 9, thus better confining the charge carriers within the InAs quantum dot active region 5. This embodiment does not limit the specific type of the upper confinement layer 8, as long as it can prevent charge carriers from diffusing towards the capping layer 9. For example, the material of the upper confinement layer 8 can be Al. x Ga (1-x)As, x is 0.25-0.3. This embodiment does not limit the specific thickness of the upper confinement layer 8; for example, the thickness of the upper confinement layer 8 can be 300nm-500nm. It should be noted that the thickness of the upper confinement layer 8 affects the confinement ability of carriers. In this embodiment, the upper confinement layer 8 with the above-mentioned thickness range provides the best confinement effect for carriers. This embodiment does not limit the specific doping concentration of the upper confinement layer 8; for example, the P-type doping concentration of the upper confinement layer 8 is 2×10⁻⁶. 18 cm -3 -4×10 18 cm -3 It should be noted that the upper confinement layer 8 in this embodiment is doped with P-type impurities. The P-type doping concentration of the upper confinement layer 8 affects its ability to confine charge carriers. In this embodiment, the upper confinement layer 8 with the above-mentioned P-type doping concentration range provides the best confinement effect for charge carriers.

[0048] It should be noted that in this embodiment, the capping layer 9 is located at the top layer and can protect the internal structure of the laser. This embodiment does not limit the specific type of capping layer 9, as long as it can serve as a protective layer; for example, the material of capping layer 9 can be GaAs. This embodiment does not limit the specific thickness of capping layer 9; for example, the thickness of capping layer 9 can be 100nm-150nm. It should be noted that the thickness of capping layer 9 affects the protective effect on the underlying film layer. In this embodiment, the capping layer 9 with the thickness range described above provides the best protection effect on the underlying film layer. This embodiment does not limit the specific doping concentration of capping layer 9; for example, the p-type doping concentration of capping layer 9 can be greater than 2×10⁻⁶. 19 cm -3 It should be noted that the capping layer 9 in this embodiment is doped with P-type impurities. When the capping layer 9 is used as an ohmic contact layer, the P-type doping concentration of the capping layer 9 will affect the ohmic contact resistance. In this embodiment, the capping layer 9 with the above-mentioned P-type doping concentration range can achieve the best ohmic contact effect.

[0049] Based on the above embodiments, this application jointly designs the band structure and waveguide of the epitaxial structure. The epitaxial structure employs a multi-layered lower graded waveguide layer 3 and a multi-layered upper graded waveguide layer 7. Since the refractive index of the graded waveguide layer is gradually distributed, light can be continuously and convergently deflected within the layer, resulting in light rays emanating from the end face of the graded waveguide layer having a velocity component closer to the normal direction, thereby reducing the beam divergence angle. Simultaneously, the epitaxial structure employs a multi-layered InAs quantum dot active region 5, doubling the quantum dot density and optimizing the band structure of the InAs quantum dot active region 5, thereby increasing the optical gain volume and reducing the threshold current density. Furthermore, by designing only the epitaxial structure, it is compatible with existing processes, thus reducing process complexity and cost.

[0050] This application also provides a method for fabricating an InAs quantum dot laser, which may include: A GaAs substrate is placed in an epitaxial device, and GaAs buffer layer 1, lower confinement layer 2, at least two lower graded waveguide layers 3, lower undoped layer 4, at least two InAs quantum dot active regions 5, upper undoped layer 6, at least two upper graded waveguide layers 7, upper confinement layer 8 and capping layer 9 are epitaxially grown sequentially in the direction away from the GaAs substrate. The material of each gradient waveguide layer 3 is Al. x Ga (1-x) As; the Al composition of each lower graded waveguide layer 3 decreases sequentially along the direction away from the lower confinement layer 2, and the Al composition of the lower graded waveguide layer 3 closest to the lower confinement layer 2 in two adjacent lower graded waveguide layers 3 is equal to the Al composition of the lower graded waveguide layer 3 closest to the lower undoped layer 4. Each InAs quantum dot active region 5 includes an InAs quantum dot layer 52; The material of each gradient waveguide layer 7 is Al. x Ga (1-x) As; the Al composition of each upper graded waveguide layer 7 increases sequentially in the direction away from the upper undoped layer 6, and the Al composition of the upper graded waveguide layer 7 closest to the upper undoped layer 6 in two adjacent upper graded waveguide layers 7 is equal to the Al composition of the upper graded waveguide layer 7 closest to the upper confinement layer 8.

[0051] The specific process for preparing the epitaxial structure in this embodiment includes: A GaAs buffer layer 1 is epitaxially grown on the surface of a GaAs substrate; A confinement layer 2 is epitaxially grown on the surface of GaAs buffer layer 1; At least two lower graded waveguide layers 3 are epitaxially grown on the surface of the lower confinement layer 2; An undoped layer 4 is epitaxially grown on the surface of the last layer, the gradient waveguide layer 3. At least two InAs quantum dot active regions 5 are epitaxially grown on the surface of the lower undoped layer 4; An undoped layer 6 is epitaxially grown on the surface of the last InAs quantum dot active region 5; At least two upper graded waveguide layers 7 are epitaxially grown on the surface of the upper undoped layer 6; A confinement layer 8 is epitaxially grown on the surface of the last layer, the graded waveguide layer 7. A capping layer 9 is epitaxially grown on the surface of the upper confinement layer 8.

[0052] Furthermore, in this embodiment, before epitaxially growing the GaAs buffer layer 1 on the GaAs substrate surface, the oxide layer on the GaAs substrate surface may be removed according to process conditions of 680℃-720℃. It should be noted that pre-treating the GaAs substrate before growing the epitaxial structure in this embodiment ensures a clean GaAs substrate surface, thereby improving the quality of the subsequently epitaxially grown film.

[0053] This embodiment does not limit the specific method of epitaxially growing the GaAs buffer layer 1. The specific method can be determined according to the specific structure of the GaAs buffer layer 1. For example, the GaAs buffer layer 1 with a thickness of 200nm-300nm can be grown on the surface of the GaAs substrate according to the process conditions of growth temperature of 600℃-700℃; the N-type doping concentration of the GaAs buffer layer 1 is 2×10⁻⁶. 18 cm -3 -4×10 18 cm -3 .

[0054] This embodiment does not limit the specific method of epitaxial growth of the lower confinement layer 2. The specific method can be determined according to the specific structure of the lower confinement layer 2. For example, a lower confinement layer 2 with a thickness of 300nm-600nm can be grown on the surface of the GaAs buffer layer 1 according to the process conditions of growth temperature of 600℃-700℃; the N-type doping concentration of the lower confinement layer 2 is 2×10 18 cm -3 -4×10 18 cm -3 .

[0055] This embodiment does not limit the specific method of epitaxially growing at least two lower graded waveguide layers 3. The specific method can be determined according to the specific structure of the lower graded waveguide layer 3, for example, it may include: A first lower graded waveguide layer 31 with a thickness of 500nm-750nm is grown on the surface of the lower confinement layer 2 under process conditions of growth temperature of 600℃-700℃; the material of the first lower graded waveguide layer 31 is Al. x Ga (1-x) As, along the direction x away from the lower confinement layer 2, the gradient decreases from 0.3 to 0.2. Following a growth temperature of 600℃-700℃, a second lower graded waveguide layer 32 with a thickness of 500nm-750nm is grown on the surface of the first lower graded waveguide layer 31; the material of the second lower graded waveguide layer 32 is Al. x Ga (1-x) As, along the direction x away from the lower confinement layer 2, the gradient decreases from 0.2 to 0.15. A third lower graded waveguide layer 33 with a thickness of 500nm-750nm is grown on the surface of the second lower graded waveguide layer 32 under process conditions of growth temperature of 600℃-700℃; the material of the third lower graded waveguide layer 33 is Al. x Ga (1-x) As, along the direction x away from the lower confinement layer 2, the gradient decreases from 0.15 to 0.1. A fourth lower graded waveguide layer 34 with a thickness of 500nm-750nm is grown on the surface of the third lower graded waveguide layer 33 under process conditions of growth temperature of 600℃-700℃; the material of the fourth lower graded waveguide layer 34 is Al. x Ga (1-x) As, along the direction x away from the lower confinement layer 2, the gradient decreases from 0.1 to 0.05.

[0056] This embodiment does not limit the specific method of epitaxially growing the lower undoped layer 4. The specific method can be determined according to the specific structure of the lower undoped layer 4. For example, the lower undoped layer 4 with a thickness of 100nm-300nm can be grown on the surface of the last lower gradient waveguide layer 3 under process conditions of 600℃-700℃. The material of the lower undoped layer 4 is Al. x Ga (1-x) As, along the direction x away from the lower graded waveguide layer 3, it decreases from 0.1 to 0.05.

[0057] In this embodiment, at least two layers of InAs quantum dot active regions 5 are epitaxially grown, including the sequential epitaxial growth of each InAs quantum dot active region 5. This embodiment does not limit the specific method of epitaxially growing each InAs quantum dot active region 5; the specific method can be determined according to the specific structure of each InAs quantum dot active region 5, for example, it may include: A first GaAs layer with a thickness of 20nm-50nm was grown under process conditions with a growth temperature of 570℃-670℃. Under the following process conditions: growth temperature 450℃-530℃, group V / group III ratio 10-50, growth rate 0.02nm / s~0.04nm / s, and interruption time 5s~30s, an initial InAs quantum dot layer 52 was grown on the surface of the first GaAs layer 51. After a preset time, the growth was interrupted to obtain the final InAs quantum dot layer 52. The quantum dot density of the InAs quantum dot layer 52 is greater than or equal to 1×10⁻⁶. 10 cm -2 The quantum dot diameter of InAs quantum dot layer 52 is 10nm-20nm; the quantum dot height of InAs quantum dot layer 52 is 5nm-10nm. An InGaAs layer 53 of 3 nm to 6 nm was grown on the surface of the InAs quantum dot layer 52 under process conditions with a growth temperature of 450℃ to 530℃. A second GaAs layer 54 with a thickness of 7nm-14nm was grown on the surface of the InGaAs layer 53 under process conditions with a growth temperature of 450℃-530℃. A third GaAs layer 55 with a thickness of 20nm-40nm is grown on the surface of the second GaAs layer 54 under process conditions of growth temperature of 570℃-670℃.

[0058] It should be noted that the group 5 / group 3 ratio (group 5 elements include As, and group 3 elements include In and Ga; the group 5 / group 3 ratio refers to the ratio of the molar amounts of group 5 elements to those of group 3 elements), growth temperature, growth rate, and growth interruption techniques all affect the quantum dot density and size, which directly affect the photoelectric performance of the laser. To achieve optimal photoelectric performance, in this embodiment, during the growth of the InAs quantum dot active region 5, each InAs quantum dot layer 52 is alternately grown with a GaAs spacer layer, and an InGaAs strain buffer layer is inserted between the layers. Simultaneously, a growth interruption method is employed, and the density and size of the quantum dots are controlled by adjusting the group 5 / group 3 ratio of the InAs quantum dot layer 52, the growth temperature, the growth rate, and the growth interruption time, ultimately completing the growth of the InAs quantum dot active region 5. Wherein: The effects of the group 5 / group 3 ratio on quantum dot density and size include: reducing the group 5 / group 3 ratio can decrease the quantum dot density and increase the quantum dot size due to the occurrence of clustering phenomena; The effects of growth temperature on quantum dot density and size include: lowering the growth temperature can increase quantum dot density and reduce quantum dot size, because a relatively low growth temperature reduces the migration length and activation energy of In atoms and suppresses the occurrence of In-Ga mixing effects; The effects of growth rate on quantum dot density and size include: when reducing the deposition amount of InAs quantum dots by increasing the growth rate, an excessively slow growth rate increases the surface migration length of In atoms, making In atoms more likely to form large dots to reduce surface energy and strain energy, thus making the clustering phenomenon more pronounced. The effects of growth interruption techniques on quantum dot density and size include the fact that the interruption time can affect the aggregation degree, density and uniformity of quantum dots. During the interruption process after the growth of InAs quantum dots is completed, In atoms will desorb and affect the reformation of quantum dots. Reasonable selection of the interruption time after growth can eliminate the aggregation of quantum dots and improve the density and uniformity of quantum dots.

[0059] It should be noted that in this embodiment, the second GaAs layer 54 is formed by low-temperature growth and the third GaAs layer 55 is formed by high-temperature growth. The main purpose is to prevent the sudden change in temperature from low to high temperature from affecting the quantum dot interface.

[0060] This embodiment does not limit the specific method of epitaxially growing the undoped layer 6. The specific method can be determined according to the specific structure of the undoped layer 6. For example, the undoped layer 6 with a thickness of 100nm-300nm can be grown on the surface of the last InAs quantum dot active region 5 under process conditions of 600℃-700℃. The material of the undoped layer 6 is Al. x Ga (1-x) As, along the direction away from the InAs quantum dot active region 5, x increases sequentially from 0.0008 to 0.0009.

[0061] This embodiment does not limit the specific method of epitaxially growing at least two upper graded waveguide layers 7. The specific method can be determined according to the specific structure of the upper graded waveguide layer 7, for example, it may include: A first upper graded waveguide layer 71 with a thickness of 300 nm to 500 nm is grown on the surface of the undoped layer 6 under process conditions of a growth temperature of 600℃-700℃; the material of the first upper graded waveguide layer 71 is Al. x Ga (1-x) As, along the direction x away from the upper undoped layer 6, the value gradually increases from 0.08 to 0.12. A second upper graded waveguide layer 72 with a thickness of 500nm-800nm ​​was grown under process conditions of 600℃-700℃; the material of the second upper graded waveguide layer 72 was Al. x Ga (1-x) As, along the direction x away from the upper undoped layer 6, the value gradually decreases from 0.12 to 0.25.

[0062] This embodiment does not limit the specific method of epitaxially growing the upper confinement layer 8. The specific method can be determined according to the specific structure of the upper confinement layer 8. For example, the upper confinement layer 8 with a thickness of 300nm-500nm can be grown on the surface of the last upper gradient waveguide layer 7 under process conditions of 600℃-700℃. The material of the upper confinement layer 8 is Al. x Ga (1-x) As, x is 0.25-0.3; the p-type doping concentration of the upper confinement layer 8 is 2×10⁻⁶. 18 cm -3 -4×10 18 cm -3 .

[0063] This embodiment does not limit the specific method of epitaxial growth of the capping layer 9. The specific method can be determined according to the specific structure of the capping layer 9. For example, the capping layer 9 with a thickness of 100nm-150nm can be grown on the surface of the upper confinement layer 8 under process conditions of 600℃-700℃; the p-type doping concentration of the capping layer 9 is greater than 2×10 19 cm -3 .

[0064] Based on the above embodiments, the InAs quantum dot laser provided in this application can be prepared using the InAs quantum dot laser preparation method, and thus has the same beneficial effects as described above.

[0065] The following example illustrates the fabrication process of the InAs quantum dot laser.

[0066] 1. Place the GaAs substrate in the epitaxial equipment; the temperature is 680℃-720℃ to remove the oxide layer on the surface of the GaAs substrate.

[0067] 2. A GaAs buffer layer 1 with a growth temperature of 600℃-700℃ and a thickness of 200nm-300nm is grown, with an N-type doping concentration of 2×10⁻⁶. 18 cm -3 -4×10 18 cm -3 .

[0068] 3. Control the growth temperature to 600℃-700℃ and grow a lower confinement layer 2 with a thickness of 300nm-600nm, and its N-type doping concentration is 2×10⁻⁶. 18 cm -3 -4×10 18 cm -3 .

[0069] 4. Control the growth temperature to 600℃-700℃, in the following order: A first lower graded waveguide layer 31 with a thickness of 500nm-750nm is grown; the material of the first lower graded waveguide layer 31 is Al. x Ga (1-x) As, along the direction x away from the lower confinement layer 2, the gradient decreases from 0.3 to 0.2. A second lower graded waveguide layer 32 with a thickness of 500nm-750nm is grown; the material of the second lower graded waveguide layer 32 is Al. x Ga (1-x) As, along the direction x away from the lower confinement layer 2, the gradient decreases from 0.2 to 0.15. A third lower graded waveguide layer 33 with a thickness of 500nm-750nm is grown; the material of the third lower graded waveguide layer 33 is Al. xGa (1-x) As, along the direction x away from the lower confinement layer 2, the gradient decreases from 0.15 to 0.1. A fourth lower graded waveguide layer 34 with a thickness of 500nm-750nm is grown; the material of the fourth lower graded waveguide layer 34 is Al. x Ga (1-x) As, along the direction x away from the lower confinement layer 2, the gradient decreases from 0.1 to 0.05.

[0070] 5. Control the growth temperature to 600℃-700℃ and grow a lower undoped layer 4 with a thickness of 100nm-300nm; the material of the lower undoped layer 4 is Al. x Ga (1-x) As, along the direction x away from the lower graded waveguide layer 3, it decreases from 0.1 to 0.05.

[0071] 6. Control the growth temperature to 570℃-670℃ and grow a first GaAs layer with a thickness of 20nm-50nm 51; The growth temperature was controlled at 450℃-530℃, the group V / group III ratio was 10-50, the growth rate was 0.02nm / s~0.04nm / s, and the interruption time was 5s~30s to grow an initial InAs quantum dot layer 52. After the preset time, the growth was interrupted to obtain the final InAs quantum dot layer 52 with a quantum dot density greater than or equal to 1×10⁻⁶. 10 cm -2 The quantum dot diameter is 10nm-20nm, and the quantum dot height is 5nm-10nm; The growth temperature was controlled at 450℃-530℃ to grow 3nm-6nm InGaAs layers 53; The growth temperature was controlled at 450℃-530℃, and the thickness of the second GaAs layer was 7nm-14nm. The growth temperature was controlled at 570℃-670℃, and the thickness of the third GaAs layer was 20nm-40nm. Repeat the above steps to complete the growth of all InAs quantum dot active regions.

[0072] 7. Control the growth temperature to 600℃-700℃ and grow an undoped upper layer 6 with a thickness of 100nm-300nm; the material of the undoped upper layer 6 is Al. x Ga (1-x) As, along the direction away from the InAs quantum dot active region 5, x increases sequentially from 0.0008 to 0.0009.

[0073] 8. Control the growth temperature to 600℃-700℃, in the following order: A first layer of graded waveguide 71 with a thickness of 300nm-500nm is grown; the material of the first layer of graded waveguide 71 is Al. x Ga (1-x) As, along the direction x away from the upper undoped layer 6, the value gradually increases from 0.08 to 0.12. A second, graded waveguide layer 72 with a thickness of 500nm-800nm ​​is grown; the material of the second, graded waveguide layer 72 is Al. x Ga (1-x) As, along the direction x away from the upper undoped layer 6, the value gradually decreases from 0.12 to 0.25.

[0074] 9. Control the growth temperature to 600℃-700℃ and grow an upper confinement layer 8 with a thickness of 300nm-500nm; the material of the upper confinement layer 8 is Al. x Ga (1-x) As, x is 0.25-0.3.

[0075] 10. Control the growth temperature to 600℃-700℃ and grow a cap layer 9 with a thickness of 100nm-150nm, the p-type doping concentration of which is greater than 2×10⁻⁶. 19 cm -3 .

[0076] This document uses specific examples to illustrate the principles and implementation methods of this application. The various embodiments are progressive, with each embodiment focusing on its differences from others. Similar or identical parts between embodiments can be referred to interchangeably. The descriptions of the above embodiments are merely for the purpose of helping to understand the method and core ideas of this application. For those skilled in the art, various improvements and modifications can be made to this application without departing from its principles, and these improvements and modifications also fall within the protection scope of this application.

[0077] It should also be noted that, in this specification, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes the element.

Claims

1. An InAs quantum dot laser, characterized in that, include: GaAs substrate; an epitaxial structure is disposed on the surface of the GaAs substrate; the epitaxial structure includes a GaAs buffer layer, a lower confinement layer, at least two lower graded waveguide layers, a lower undoped layer, at least two InAs quantum dot active regions, an upper undoped layer, at least two upper graded waveguide layers, an upper confinement layer and a capping layer disposed sequentially along a direction away from the GaAs substrate. The material of each of the lower gradient waveguide layers is Al. x Ga (1-x) As; the Al composition of each of the lower graded waveguide layers decreases sequentially in the direction away from the lower confinement layer, and the Al composition of the lower graded waveguide layer closer to the lower confinement layer in two adjacent lower graded waveguide layers is equal to the Al composition of the lower graded waveguide layer closer to the lower undoped layer. Each InAs quantum dot active region includes an InAs quantum dot layer; The material of each of the aforementioned upper gradient waveguide layers is Al. x Ga (1-x) As; the Al composition of each upper graded waveguide layer increases sequentially in the direction away from the upper undoped layer, and the Al composition of the upper graded waveguide layer closer to the upper undoped layer in two adjacent upper graded waveguide layers is equal to the Al composition of the upper graded waveguide layer closer to the upper confinement layer.

2. The InAs quantum dot laser according to claim 1, characterized in that, The number of layers in the active region of the InAs quantum dot is 10-15; The quantum dot density of each InAs quantum dot layer is greater than or equal to 1 × 10⁻⁶. 10 cm -2 ; The diameter of the quantum dots in each InAs quantum dot layer is 10nm-20nm; the height of the quantum dots in each InAs quantum dot layer is 5nm-10nm.

3. The InAs quantum dot laser according to claim 2, characterized in that, Each InAs quantum dot active region includes a first GaAs layer, the InAs quantum dot layer, the InGaAs layer, the second GaAs layer, and the third GaAs layer arranged sequentially in a direction away from the lower undoped layer; The thickness of the first GaAs layer is 20nm-50nm; The thickness of the InGaAs layer is 3nm-6nm; The thickness of the second GaAs layer is 7nm-14nm; The thickness of the third GaAs layer is 20nm-40nm.

4. The InAs quantum dot laser according to claim 1, characterized in that, The thickness of the GaAs buffer layer is 200nm-300nm; the N-type doping concentration of the GaAs buffer layer is 2×10⁻⁶. 18 cm -3 -4×10 18 cm -3 ; And / or, the material of the lower confining layer is Al. x Ga (1-x) As, the x-coefficient increases from 0.1 to 0.6 along the direction away from the GaAs buffer layer; the thickness of the lower confinement layer is 300nm-600nm; the N-type doping concentration of the lower confinement layer is 2×10⁻⁶. 18 cm -3 -4×10 18 cm -3 ; And / or, the material of the lower undoped layer is Al. x Ga (1-x) As, along the direction away from the lower graded waveguide layer, x decreases from 0.1 to 0.05; the thickness of the lower undoped layer is 100nm-300nm; And / or, the material of the upper undoped layer is Al. x Ga (1-x) As, the x-axis increases sequentially from 0.0008 to 0.0009 along the direction away from the InAs quantum dot active region; the thickness of the upper undoped layer is 100nm-300nm; And / or, the material of the upper confining layer is Al. x Ga (1-x) As, x is 0.25-0.3; the thickness of the upper confinement layer is 300nm-500nm; the P-type doping concentration of the upper confinement layer is 2×10⁻⁶. 18 cm -3 -4×10 18 cm -3 ; And / or, the capping layer is made of GaAs; the thickness of the capping layer is 100nm-150nm; and the p-type doping concentration of the capping layer is greater than 2×10⁻⁶. 19 cm -3 .

5. The InAs quantum dot laser according to any one of claims 1 to 4, characterized in that, include: The four-layer lower graded waveguide layer has a total thickness of 2000nm-3000nm. The material of the first layer, the lower graded waveguide layer, is Al. x Ga (1-x) As, along the direction x away from the lower confinement layer, the value decreases gradually from 0.3 to 0.

2. The material of the second layer, the lower graded waveguide layer, is Al. x Ga (1-x) As, along the direction x away from the lower confinement layer, the value decreases gradually from 0.2 to 0.

15. The material of the third layer, the lower graded waveguide layer, is Al. x Ga (1-x) As, along the direction x away from the lower confinement layer, the value gradually decreases from 0.15 to 0.

1. The material of the fourth layer, the lower graded waveguide layer, is Al. x Ga (1-x) As, along the direction x away from the lower limiting layer, the value decreases sequentially from 0.1 to 0.

05.

6. The InAs quantum dot laser according to claim 5, characterized in that, The thickness of each of the lower graded waveguide layers is the same; the thickness of each of the lower graded waveguide layers is 500nm-750nm.

7. The InAs quantum dot laser according to claim 5, characterized in that, include: The two upper graded waveguide layers have a total thickness of 800nm-1300nm. The material of the first layer, the upper gradient waveguide layer, is Al. x Ga (1-x) As, along the direction x away from the upper undoped layer, the value gradually increases from 0.08 to 0.

12. The material of the second layer, the upper gradient waveguide layer, is Al. x Ga (1-x) As, along the direction x away from the upper undoped layer, the value gradually decreases from 0.12 to 0.

25.

8. The InAs quantum dot laser according to claim 7, characterized in that, The thickness of the first layer of the upper gradient waveguide is 300nm-500nm; The thickness of the second layer, the upper gradient waveguide layer, is 500nm-800nm.

9. A method for fabricating an InAs quantum dot laser, characterized in that, include: A GaAs substrate is placed in an epitaxial device, and a GaAs buffer layer, a lower confinement layer, at least two lower graded waveguide layers, a lower undoped layer, at least two InAs quantum dot active regions, an upper undoped layer, at least two upper graded waveguide layers, an upper confinement layer, and a capping layer are epitaxially grown sequentially in a direction away from the GaAs substrate. The material of each of the lower gradient waveguide layers is Al. x Ga (1-x) As; the Al composition of each of the lower graded waveguide layers decreases sequentially in the direction away from the lower confinement layer, and the Al composition of the lower graded waveguide layer closer to the lower confinement layer in two adjacent lower graded waveguide layers is equal to the Al composition of the lower graded waveguide layer closer to the lower undoped layer. Each InAs quantum dot active region includes an InAs quantum dot layer; The material of each of the aforementioned upper gradient waveguide layers is Al. x Ga (1-x) As; the Al composition of each upper graded waveguide layer increases sequentially in the direction away from the upper undoped layer, and the Al composition of the upper graded waveguide layer closer to the upper undoped layer in two adjacent upper graded waveguide layers is equal to the Al composition of the upper graded waveguide layer closer to the upper confinement layer.

10. The method for fabricating an InAs quantum dot laser according to claim 9, characterized in that, The active region of each layer of InAs quantum dots is epitaxially grown, including: A first GaAs layer with a thickness of 20nm-50nm was grown under process conditions with a growth temperature of 570℃-670℃. Under the following process conditions: growth temperature 450℃-530℃, group V / group III ratio 10-50, growth rate 0.02nm / s~0.04nm / s, and interruption time 5s~30s, an initial InAs quantum dot layer was grown on the surface of the first GaAs layer. Growth was interrupted after a preset time to obtain the final InAs quantum dot layer. The quantum dot density of the InAs quantum dot layer is greater than or equal to 1×10⁻⁶. 10 cm -2 The diameter of the quantum dots in the InAs quantum dot layer is 10nm-20nm; the height of the quantum dots in the InAs quantum dot layer is 5nm-10nm. An InGaAs layer of 3 nm to 6 nm is grown on the surface of the InAs quantum dot layer under process conditions with a growth temperature of 450℃ to 530℃. A second GaAs layer with a thickness of 7nm-14nm is grown on the surface of the InGaAs layer under process conditions with a growth temperature of 450℃-530℃. A third GaAs layer with a thickness of 20nm-40nm is grown on the surface of the second GaAs layer under process conditions of growth temperature of 570℃-670℃.

11. The method for fabricating an InAs quantum dot laser according to claim 9 or 10, characterized in that, Epitaxial growth of at least two layers of the lower graded waveguide, including: A first lower graded waveguide layer with a thickness of 500nm-750nm is grown on the surface of the lower confinement layer under process conditions of a growth temperature of 600℃-700℃; the material of the first lower graded waveguide layer is Al. x Ga (1-x) As, along the direction x away from the lower confinement layer, the value decreases gradually from 0.3 to 0.

2. A second lower graded waveguide layer with a thickness of 500nm-750nm is grown on the surface of the first lower graded waveguide layer under process conditions of growth temperature of 600℃-700℃; the material of the second lower graded waveguide layer is Al. x Ga (1-x) As, along the direction x away from the lower confinement layer, the value decreases gradually from 0.2 to 0.

15. A third lower graded waveguide layer with a thickness of 500nm-750nm is grown on the surface of the second lower graded waveguide layer under process conditions of growth temperature of 600℃-700℃; the material of the third lower graded waveguide layer is Al. x Ga (1-x) As, along the direction x away from the lower confinement layer, the value gradually decreases from 0.15 to 0.

1. A fourth lower graded waveguide layer with a thickness of 500nm-750nm is grown on the surface of the third lower graded waveguide layer under process conditions of growth temperature of 600℃-700℃; the material of the fourth lower graded waveguide layer is Al. x Ga (1-x) As, along the direction x away from the lower limiting layer, the value decreases sequentially from 0.1 to 0.05.

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