Multi-nuclear inductance-capacitance type voltage-controlled oscillator

By designing a multi-core inductor-capacitor voltage-controlled oscillator, and utilizing symmetrically distributed oscillation units and a digital control unit, the accuracy of the switched capacitor array is improved, solving the problem of insufficient frequency accuracy in existing technologies and achieving higher frequency regulation accuracy.

CN121193208APending Publication Date: 2025-12-23SHANGHAI SHENGLIANKE SEMICONDUCTOR CO LTD

Patent Information

Application Number
CN202511726353.4
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-11-24
Publication Date
2025-12-23

AI Technical Summary

Technical Problem

The frequency accuracy of existing inductor-capacitor type voltage-controlled oscillators is limited by the accuracy of switching capacitor changes, which cannot meet the application requirements for higher accuracy.

Method used

A multi-core inductor-capacitor voltage-controlled oscillator is adopted. At least two symmetrically distributed oscillation units and a digital control unit are connected in a ring synchronous connection using a synchronization resistor. The digital control unit generates control signals to control each oscillation unit, thereby controlling the switching of the switched capacitor array and improving the accuracy of the switched capacitor array.

Benefits of technology

While keeping the switched capacitor array circuit unchanged, the frequency regulation accuracy of the oscillator is significantly improved by increasing the number of oscillator cores, thus meeting the application requirements for higher precision.

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Abstract

The invention relates to the technical field of integrated circuits, and provides a multi-nuclear inductance-capacitance type voltage-controlled oscillator, which comprises at least two oscillation units which are symmetrically distributed and a digital control unit, wherein each oscillation unit comprises a switched capacitor array, and the oscillation units are in annular synchronous connection through a synchronous resistor; and the digital control unit is used for generating control signals for respectively controlling the oscillation units so as to control the switches of the switched capacitor arrays in the corresponding oscillation units through the control signals. According to the oscillator, the effect of improving the precision of the oscillator can be achieved by improving the precision of the switched capacitor array.
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Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of integrated circuits, and in particular to a multi-core inductor-capacitor voltage-controlled oscillator. BACKGROUND

[0002] The voltage-controlled oscillator mainly refers to an oscillation circuit (VCO, voltage-controlled oscillator) whose output frequency has a corresponding relationship with an input control voltage. The working state of the oscillator or the element parameters of the oscillation loop are controlled by the input control voltage, that is, a voltage-controlled oscillator can be formed.

[0003] The inductor-capacitor voltage-controlled oscillator usually includes an inductor and a switched capacitor. The switched capacitor can be controlled by a digital control signal to control the on-off of the switch, so as to change the capacitance value connected to the inductor-capacitor resonant loop to realize coarse adjustment of the frequency of the oscillator. For example, when the change precision of the switched capacitor in the oscillator is ΔC, the frequency change precision can be obtained as where L is the inductance value and f is the resonant frequency. It can be seen that the frequency change precision of the oscillator is directly determined by the precision of the switched capacitor.

[0004] However, the frequency precision of the existing inductor-capacitor voltage-controlled oscillator is limited by the change precision of the switched capacitor, and cannot meet the application scenarios with higher requirements for precision. SUMMARY

[0005] The embodiment of the present application provides a multi-core inductor-capacitor voltage-controlled oscillator to solve the precision problem of the existing oscillator.

[0006] To achieve the above-mentioned purpose, the present application provides a multi-core inductor-capacitor voltage-controlled oscillator, comprising at least two oscillation units symmetrically distributed and a digital control unit; wherein, The oscillation unit includes a switched capacitor array, and each oscillation unit is connected in a ring through a synchronous resistor; The digital control unit is used to generate control signals for controlling each oscillation unit respectively, so as to control the switches of the switched capacitor array in the corresponding oscillation unit through the control signals.

[0007] In addition, the optional technical solution comprises a first oscillation unit, a second oscillation unit, a third oscillation unit and a fourth oscillation unit; wherein, The first oscillation unit comprises a first load amplifier, a first variable capacitor, a first switched capacitor array, an inductor L1 and an inductor L8; the second oscillation unit comprises a second load amplifier, a second variable capacitor, a second switched capacitor array, an inductor L2 and an inductor L3; the third oscillation unit comprises a third load amplifier, a third variable capacitor, a third switched capacitor array, an inductor L4 and an inductor L5; and the fourth oscillation unit comprises a fourth load amplifier, a fourth variable capacitor, a fourth switched capacitor array, an inductor L6 and an inductor L7. Furthermore, the inductor L1 and the inductor L2 are connected, the inductor L3 and the inductor L4 are connected, the inductor L5 and the inductor L6 are connected, and the inductor L7 and the inductor L8 are connected.

[0008] Furthermore, the negative output node of the first oscillation unit and the positive output node of the second oscillation unit are connected through the inductor L1 and the inductor L2; the negative output node of the second oscillation unit and the positive output node of the third oscillation unit are connected through the inductor L3 and the inductor L4; the negative output node of the third oscillation unit and the positive output node of the fourth oscillation unit are connected through the inductor L5 and the inductor L6; and the negative output node of the fourth oscillation unit and the positive output node of the first oscillation unit are connected through the inductor L7 and the inductor L8.

[0009] Furthermore, the first load amplifier comprises two NMOS transistors and / or two PMOS transistors.

[0010] Furthermore, the second load amplifier, the third load amplifier, the fourth load amplifier and the first load amplifier have the same structure.

[0011] Furthermore, the synchronous resistance comprises a first resistance arranged between the inductor L1 and the inductor L2, a second resistance arranged between the inductor L3 and the inductor L4, a third resistance arranged between the inductor L5 and the inductor L6, and a fourth resistance arranged between the inductor L7 and the inductor L8.

[0012] Furthermore, the control signal is processed by the mapping unit to form a sub-control signal corresponding to each oscillation unit respectively. The control signal is processed by the mapping unit to form a sub-control signal corresponding to each oscillation unit respectively. The sub-control signal is used to control the switch of the corresponding switched capacitor array.

[0013] Furthermore, the sub-control signal comprises SCA_Code1<2:0>, SCA_Code2<2:0>, SCA_Code3<2:0> and SCA_Code4<2:0>; wherein, SCA_Code1<2:0> = SCA_Code2<2:0> = SCA_Code3<2:0> = SCA_Code4<2:0>; or, SCA_Code1<2:0> = SCA_Code2<2:0> = SCA_Code3<2:0>, and SCA_Code4<2:0> = SCA_Code1<2:0> + 1; or, SCA_Code1<2:0> = SCA_Code2<2:0>, and SCA_Code3<2:0> = SCA_Code4<2:0> = SCA_Code1<2:0> + 1; or, SCA_Code2<2:0> = SCA_Code3<2:0> = SCA_Code4<2:0> = SCA_Code1<2:0> + 1.

[0014] In addition, an optional technical solution is that the switch capacitor array includes a first switch capacitor, a second switch capacitor, and a third switch capacitor distributed in an array; wherein, the first switch capacitor includes a switch tube, a capacitor C01 and a capacitor C02 connected to both ends of the switch tube, a bias resistor R01, a bias resistor R02, and an inverter; the capacitor C01 and the capacitor C02 are respectively connected to a positive output node and a negative output node of a corresponding oscillation unit.

[0015] In addition, an optional technical solution is that the circuit structure of the second switch capacitor and the third switch capacitor is the same as that of the first switch capacitor; the first switch capacitor, the second switch capacitor, and the third switch capacitor are respectively controlled by different control word signals in corresponding sub-control signals.

[0016] The multi-core inductance-capacitance voltage-controlled oscillator provided by the application sets a digital control unit and a plurality of oscillation units, and then generates control signals for controlling each oscillation unit through the digital control unit, so as to control the switches of the switch capacitor array in the corresponding oscillation unit through the control signals. The circuit structure is simple, flexible, and can improve the precision of the switch capacitor array, so that the oscillator meets the needs of higher application scenarios.

[0017] To achieve the above and related objects, one or more aspects of the application include the details as follows and particularly pointed out in the claims. The following description and the accompanying drawings provide both illustrative and exemplary aspects of the application. However, the aspects are indicative rather than limiting of the principles of the application. In addition, this application is intended to cover all adaptations, modifications, and equivalents of the aspects of the application. BRIEF DESCRIPTION OF DRAWINGS

[0018] Figure 1 is a structural schematic diagram of a multi-core inductance-capacitance type voltage-controlled oscillator of an embodiment of the application; Figure 2 is a detailed structural schematic diagram of a multi-core inductance-capacitance type voltage-controlled oscillator of an embodiment of the application; Figure 3 is a structural schematic diagram of a 3-bit switched capacitor array of an embodiment of the application; Figure 4 is a mapping relationship diagram of a multi-core inductance-capacitance type voltage-controlled oscillator of an embodiment of the application; Figure 5 is a frequency precision effect diagram of an embodiment of the application; Figure 6 is a structural schematic diagram of a multi-core inductance-capacitance type voltage-controlled oscillator of another embodiment of the application.

[0019] The implementation, functional features and advantages of the application will be further described with reference to the embodiments and the accompanying drawings. DETAILED DESCRIPTION

[0020] The technical solutions in the embodiments of the application will be described below with reference to the drawings in the embodiments of the application. In the description of the embodiments of the application, unless otherwise specified, “ / ” represents the meaning of or, for example, A / B can represent A or B; “and / or” in this document only represents a description of the association relationship of the associated objects, which means that there can be three relationships, for example, A and / or B, which means that there are three cases of A alone, A and B together, and B alone.

[0021] In the embodiments of the application, unless otherwise specified, “multiple” means two or more than two. “At least one of the following” or similar expressions means any combination of the items, including any combination of single item or multiple items. In addition, in order to clearly describe the technical solutions of the embodiments of the application, the same items or similar items with basically the same functions and effects are distinguished by using “first”, “second”, etc. in the embodiments of the application. Those skilled in the art can understand that “first”, “second”, etc. do not limit the number and execution order, and “first”, “second”, etc. also do not necessarily mean different.

[0022] Meanwhile, in the embodiments of the present application, the words "exemplary" and "for example" are used on the basis and premise that there is no limitation to the related technical scheme in order to more clearly describe some embodiments.

[0023] In view of the defects that the prior art is limited by the switching capacitor variation precision and cannot meet the application scenarios with higher precision requirements, the present application provides a multi-core inductance-capacitance voltage-controlled oscillator, at least two oscillation units in symmetrical distribution and a digital control unit are arranged, each oscillation unit is connected in ring synchronization through a synchronous resistor, and control signals respectively controlling each oscillation unit are generated based on the digital control unit to control the switches of the switching capacitor array in the corresponding oscillation unit through the control signals, so that the precision of the switching capacitor array can be improved by increasing the core number of the oscillator while keeping the switching capacitor array circuit unchanged, thereby improving the frequency regulation precision of the oscillator.

[0024] The technical solutions of the present application will be described clearly and completely below. Obviously, the described embodiments are some of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by a person of ordinary skill in the art without creative labor fall within the protection scope of the present application.

[0025] Specifically, Figure 1 The overall schematic circuit structure of the multi-core inductance-capacitance voltage-controlled oscillator according to the embodiments of the present application is shown, Figure 2 The detailed circuit schematic structure of the multi-core inductance-capacitance voltage-controlled oscillator according to the embodiments of the present application is shown.

[0026] As Figure 1 and Figure 2 As shown in the drawings, the multi-core inductance-capacitance voltage-controlled oscillator according to the embodiments of the present application includes at least two oscillation units in symmetrical distribution, such as Core1 to Core4, a mapping unit Mapping Engine and a digital control unit Digital Control Engine; wherein a switching capacitor array is arranged in each oscillation unit, each oscillation unit is connected in ring synchronization through a synchronous resistor, and in the application process, control signals SCA_Code1 to SCA_Code4 respectively controlling each oscillation unit are generated through the digital control unit and the mapping unit, and then the switches of the switching capacitor array in the corresponding oscillation unit can be controlled through the control signals. This structure can adopt a multi-core structure and control the switching capacitor array in each oscillation unit, which can effectively improve the regulation precision of the oscillator.

[0027] As a specific example, the multi-core inductor-capacitor voltage-controlled oscillator includes a first oscillation unit Core1, a second oscillation unit Core2, a third oscillation unit Core3, and a fourth oscillation unit Core4; wherein, the first oscillation unit includes a first load amplifier, a first variable capacitor, a first switched capacitor array, inductors L1 and L8; the second oscillation unit includes a second load amplifier, a second variable capacitor, a second switched capacitor array, inductors L2 and L3; the third oscillation unit includes a third load amplifier, a third variable capacitor, a third switched capacitor array, inductors L4 and L5; and the fourth oscillation unit includes a fourth load amplifier, a fourth variable capacitor, a fourth switched capacitor array, inductors L6 and L7.

[0028] The first, second, third, and fourth oscillation units can adopt the same structure, and inductors L1 and L2 are connected, inductors L3 and L4 are connected, inductors L5 and L6 are connected, and inductors L7 and L8 are connected, thereby forming a structure as follows: Figure 1 The ring synchronous connection is shown.

[0029] Furthermore, the negative output node of the first oscillation unit is connected to the positive output node of the second oscillation unit through inductors L1 and L2; the negative output node of the second oscillation unit is connected to the positive output node of the third oscillation unit through inductors L3 and L4; the negative output node of the third oscillation unit is connected to the positive output node of the fourth oscillation unit through inductors L5 and L6; and the negative output node of the fourth oscillation unit is connected to the positive output node of the first oscillation unit through inductors L7 and L8.

[0030] In the multi-core inductor-capacitor voltage-controlled oscillator of this invention, the synchronization resistor includes a first resistor R1 disposed between inductors L1 and L2, a second resistor R2 disposed between inductors L3 and L4, a third resistor R3 disposed between inductors L5 and L6, and a fourth resistor R4 disposed between inductors L7 and L8. The first resistor R1, the second resistor R2, the third resistor R3 and the fourth resistor R4 are interconnected.

[0031] Furthermore, taking the first load amplifier as an example, the first load amplifier includes two NMOS transistors and / or two PMOS transistors, such as... Figure 2As shown, the first load amplifier includes two NMOS transistors, M11 and M12, and two PMOS transistors, M13 and M14. The gate of NMOS transistor M11 is connected to the drain of NMOS transistor M12, and the gate of NMOS transistor M12 is connected to the drain of NMOS transistor M11. The sources of both are connected to VSS. In addition, the drain of NMOS transistor M11 is also connected to the source of PMOS transistor M13, and the drain of NMOS transistor M12 is also connected to the source of PMOS transistor M14. The drains of PMOS transistors M13 and M14 are connected to VDD.

[0032] Specifically, the negative resistance amplifier of the first oscillator unit includes two NMOS transistors, M11 and M12, two PMOS transistors, M13 and M14, as well as a variable capacitor, a switched capacitor array, and inductors L1 and L8. The negative resistance amplifier of the second oscillator unit includes two NMOS transistors, M21 and M22, two PMOS transistors, M23 and M24, as well as a variable capacitor, a switched capacitor array, and inductors L2 and L3. The negative resistance amplifier of the third oscillator unit includes two NMOS transistors, M31 and M32, two PMOS transistors, M33 and M34, as well as a variable capacitor, a switched capacitor array, and inductors L4 and L5. The negative resistance amplifier of the fourth oscillator unit includes two NMOS transistors, M41 and M42, two PMOS transistors, M43 and M44, as well as a variable capacitor, a switched capacitor array, and inductors L6 and L7.

[0033] In this configuration, the negative output node Voutn1 of the first oscillator unit is connected to the positive output node Voutp2 of the second oscillator unit via an inductor; the negative output node Voutn2 of the second oscillator unit is connected to the positive output node Voutp3 of the third oscillator unit via an inductor; the negative output node Voutn3 of the third oscillator unit is connected to the positive output node Voutp4 of the fourth oscillator unit via an inductor; and the negative output node Voutn4 of the fourth oscillator unit is connected to the positive output node Voutp1 of the first oscillator unit via an inductor. The four oscillator units are synchronized through a ring connection and synchronization resistors R1~R4.

[0034] The load amplifiers located in each oscillation unit can adopt the same circuit structure, that is, the second load amplifier, the third load amplifier, and the fourth load amplifier can adopt the same circuit structure as the first load amplifier, which will not be described in detail here.

[0035] The multi-core inductor-capacitor voltage-controlled oscillator of this invention further includes a mapping unit; wherein, after the control signal is processed by the mapping unit, it can form a sub-control signal corresponding to each oscillation unit, and control the switching of the corresponding switched capacitor array through each sub-control signal.

[0036] Specifically, Figure 3 A schematic structure of a switched capacitor array according to an embodiment of the present invention is shown.

[0037] like Figure 3 As shown, in this specific embodiment, the switched capacitor array adopts a 3-bit switched array form. Taking the switched capacitor array in the first oscillation unit as an example, it includes a first switched capacitor SCA with the same structure. <0> (Can be referred to as the 0th switched capacitor), the second switched capacitor SCA <1> (Can be referred to as the first switched capacitor), the third switched capacitor SCA <2> (This can be referred to as the second switched capacitor). The 0th switched capacitor further includes a switching transistor M0, capacitors C01 and C02 connected across the switching transistor, bias resistors R01 and R02, and an inverter INV0. Capacitors C01 and C02 are respectively connected to the positive output node Voutp1 and negative output node Voutn1 of the corresponding oscillation unit (here corresponding to the first oscillation unit). The 0th switched capacitor is controlled by the control word SCA_Code1 in the sub-control signal SCA_Code1<2:0>. <0> Control, SCA <1> and SCA <2> Each is controlled by the control word SCA_Code1 <1> and SCA_Code1 <2> control.

[0038] It can be seen that the circuit structure of the switched capacitor array in other oscillation units can be the same as that of the switched capacitor array described above. Each switched capacitor in each switched capacitor array can be controlled by a different control word signal in the corresponding sub-control signal.

[0039] Furthermore, it should be noted that the structure of the oscillation unit, load amplifier, and switched capacitor array described above in this invention is not limited to the specific devices shown in the accompanying drawings. Based on this, the circuit devices or types can be set and adjusted according to application requirements, such as inductors, adjustable resistors, and transistors. That is, the multi-core inductor-capacitor voltage-controlled oscillator of this invention can also be improved in various ways without departing from the scope of this invention.

[0040] As a specific example, the Digital Control Engine of this embodiment generates a 5-bit control signal SCA_Code<4:0>. This control signal is processed by the Mapping Engine to form four sub-control signals. The four-core mapper (mapping relationship) is as follows: Figure 4 As shown, the resulting sub-control signals are SCA_Code1<2:0>, SCA_Code2<2:0>, SCA_Code3<2:0>, and SCACode4<2:0>, and these four sub-control signals have the following four relationships: The first method: SCA_Code1<2:0>=SCA_Code2<2:0>=SCA_Code3<2:0>=SCA_Code4<2:0>; The second method: SCA_Code1<2:0>=SCA_Code2<2:0>=SCA_Code3<2:0>, And SCA_Code4<2:0>=SCA_Code1<2:0>+1; The third option: SCA_Code1<2:0>=SCA_Code2<2:0> And SCA_Code3<2:0>=SCA_Code4<2:0>=SCA_Code1<2:0>+1; The fourth type: SCA_Code2<2:0>=SCA_Code3<2:0>=SCA_Code4<2:0>=SCA_Code1<2:0>+1.

[0041] It can be seen that the relationship between the four sub-control signals is not limited to the four mentioned above, but only sub-control signals that satisfy the above four relationships can improve the accuracy of the switched capacitor array without affecting the noise performance of the oscillator.

[0042] Among them, the sub-control signal SCA_Code1<2:0> can be represented in binary with a value of 000~111, corresponding to a decimal value of 0~7. The same applies to SCA_Code2<2:0>, SCA_Code3<2:0>, and SCA_Code4<2:0>. Therefore, the relationship between the four sub-control signals is 8. 4 There are 4096 possible combinations. However, as long as the average value of the four sub-control signals (SCA_Code1<2:0>+SCA_Code2<2:0>+SCA_Code3<2:0>+SCA_Code4<2:0>) / 4 is the same, the resulting oscillator frequency will be the same. For example, in decimal representation, when the four sub-control signals are 1, 1, 1, 1, or 0, 0, 2, 2, or 0, 0, 0, 4, the average value is 1, and therefore the resulting frequencies are the same. However, when the magnitude of the sub-control signals differs significantly from the average value, it will affect the noise performance of the oscillator. The average value of the four sub-control signals being 1, 1, 1, 1 is 1, which can be considered the optimal combination. In this case, the relationship between the four sub-control signals is the first relationship mentioned above.

[0043] Among them, SCA_Code1<2:0>, SCA_Code2<2:0>, SCA_Code3<2:0>, and SCA_Code4<2:0> can respectively control the switched capacitor arrays in the first to fourth oscillation units. For specific signal matching details, please refer to the appendix.Figure 2 As shown in the red line, this specific example using four oscillation units can improve the accuracy of the switched capacitor array by four times, and the accuracy of frequency change is also improved by four times accordingly.

[0044] Specifically, such as Figure 5 As shown, the black curve represents the coarse frequency adjustment curve generated by the existing oscillator device, and the red curve represents the coarse frequency adjustment curve of the multi-core inductor-capacitor voltage-controlled oscillator of the present invention. It can be seen that the frequency accuracy of the red curve is four times that of the black curve.

[0045] It should be noted that the switched capacitor array in this embodiment of the invention adopts a 3-bit structure, which can be expanded to N bits, where N is any positive integer. In addition, the oscillation unit in this embodiment of the invention is provided with 4 units, which can also be expanded to n cores, where n is any positive integer. The accuracy of the switched capacitor array can be improved by n times, and the frequency accuracy is Δf / n.

[0046] like Figure 6 As shown, in this embodiment of the multi-core inductor-capacitor voltage-controlled oscillator, n oscillation units (Cores) are provided. n The control signal SCA_total generated by the digital control unit is processed by the mapping unit to form n sub-control signals SCA. n To control the switched capacitor arrays in the corresponding oscillation units respectively.

[0047] Specifically, a multi-core inductor-capacitor voltage-controlled oscillator may include oscillation units Core1, Core2…Core n The control signal SCA_total generated by the digital control unit is processed by the mapping unit to form sub-control signals SCA1, SCA2…SCA. n Each sub-control signal controls its corresponding oscillation unit, and the control word in each sub-control signal controls each of the switched capacitors (SCA) in the corresponding switched capacitor array, thereby improving the accuracy of the oscillator by n times.

[0048] The multi-core inductor-capacitor voltage-controlled oscillator provided by the present invention can realize a multi-core oscillation unit and a multi-position switched capacitor array. By improving the accuracy of the switched capacitor array, the accuracy of the oscillator can be improved. The circuit structure is simple and highly flexible, and it can be applied to application scenarios with higher requirements for oscillators.

[0049] The multi-core inductively coupled voltage-controlled oscillator according to the present invention has been described above by way of example with reference to the accompanying drawings. However, those skilled in the art should understand that various modifications can be made to the fabrication method of the multi-core inductively coupled voltage-controlled oscillator proposed in the present invention without departing from the scope of the invention. Therefore, the scope of protection of the present invention should be determined by the contents of the appended claims.

Claims

1. A multi-core inductor-capacitor type voltage-controlled oscillator, characterized in that, It includes at least two symmetrically distributed oscillation units and a digital control unit; wherein, The oscillation unit includes a switched capacitor array, and each oscillation unit is connected in a ring synchronous connection through a synchronous resistor. The digital control unit is used to generate control signals to control each oscillation unit, so as to control the switching of the switched capacitor array in the corresponding oscillation unit through the control signals.

2. The multi-core inductor-capacitor voltage-controlled oscillator as described in claim 1, characterized in that, It includes a first oscillation unit, a second oscillation unit, a third oscillation unit, and a fourth oscillation unit; among which, The first oscillation unit includes a first load amplifier, a first variable capacitor, a first switched capacitor array, inductors L1 and L8; the second oscillation unit includes a second load amplifier, a second variable capacitor, a second switched capacitor array, inductors L2 and L3; the third oscillation unit includes a third load amplifier, a third variable capacitor, a third switched capacitor array, inductors L4 and L5; and the fourth oscillation unit includes a fourth load amplifier, a fourth variable capacitor, a fourth switched capacitor array, inductors L6 and L7. Furthermore, inductors L1 and L2 are connected, inductors L3 and L4 are connected, inductors L5 and L6 are connected, and inductors L7 and L8 are connected.

3. The multi-core inductor-capacitor type voltage-controlled oscillator as described in claim 2, characterized in that, The negative output node of the first oscillation unit is connected to the positive output node of the second oscillation unit through inductors L1 and L2; the negative output node of the second oscillation unit is connected to the positive output node of the third oscillation unit through inductors L3 and L4; the negative output node of the third oscillation unit is connected to the positive output node of the fourth oscillation unit through inductors L5 and L6; and the negative output node of the fourth oscillation unit is connected to the positive output node of the first oscillation unit through inductors L7 and L8.

4. The multi-core inductor-capacitor voltage-controlled oscillator as described in claim 2, characterized in that, The first load amplifier includes two NMOS transistors and / or two PMOS transistors.

5. The multi-core inductor-capacitor voltage-controlled oscillator as described in claim 4, characterized in that, The second load amplifier, the third load amplifier, and the fourth load amplifier have the same structure as the first load amplifier.

6. The multi-core inductor-capacitor voltage-controlled oscillator as described in claim 2, characterized in that, The synchronization resistors include a first resistor between inductors L1 and L2, a second resistor between inductors L3 and L4, a third resistor between inductors L5 and L6, and a fourth resistor between inductors L7 and L8.

7. The multi-core inductor-capacitor voltage-controlled oscillator as described in claim 2, characterized in that, It also includes mapping units; among which, The control signal is processed by the mapping unit to form a sub-control signal corresponding to each oscillation unit; The sub-control signal is used to control the switching of the corresponding switched capacitor array.

8. The multi-core inductor-capacitor voltage-controlled oscillator as described in claim 7, characterized in that, The sub-control signals include SCA_Code1<2:0>, SCA_Code2<2:0>, SCA_Code3<2:0>, and SCA_Code4<2:0>; wherein, SCA_Code1<2:0>=SCA_Code2<2:0>=SCA_Code3<2:0>=SCA_Code4<2:0>; or, SCA_Code1<2:0>=SCA_Code2<2:0>=SCA_Code3<2:0>, And SCA_Code4<2:0>=SCA_Code1<2:0>+1; or, SCA_Code1<2:0>=SCA_Code2<2:0>, And SCA_Code3<2:0>=SCA_Code4<2:0>=SCA_Code1<2:0>+1; or, SCA_Code2<2:0>=SCA_Code3<2:0>=SCA_Code4<2:0>=SCA_Code1<2:0>+1.

9. The multi-core inductor-capacitor voltage-controlled oscillator as described in claim 8, characterized in that, The switched capacitor array includes a first switched capacitor, a second switched capacitor, and a third switched capacitor arranged in an array; wherein... The first switched capacitor includes a switching transistor, capacitors C01 and C02 connected across the two ends of the switching transistor, a bias resistor R01, a bias resistor R02, and an inverter; The capacitors C01 and C02 are respectively connected to the positive output node and negative output node of the corresponding oscillation unit.

10. The multi-core inductor-capacitor voltage-controlled oscillator as described in claim 9, characterized in that, The circuit structure of the second switched capacitor and the third switched capacitor is the same as that of the first switched capacitor. The first switched capacitor, the second switched capacitor, and the third switched capacitor are controlled by different control word signals in the corresponding sub-control signals.

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