Light beam scanning device of integrated photonics chip and testing method

Abstract

The invention provides a light beam scanning device of an integrated photonics chip and a test method. The light beam scanning device of the integrated photonics chip comprises a chip sample table, a chip sample table base, a light beam receiver connected with a lens cone and a horizontally arranged turntable base, the lens barrel is arranged above the turntable base, and a diaphragm adjusting structure and at least four lens groups are arranged in the lens barrel; the central point of the chip sample table base is overlapped with the central point of the turntable base, the chip sample table base is positioned above the turntable base, and the chip sample table is vertically arranged at the central point of the chip sample table base. Through switching of different lens groups in the lens cone, measurement of far and near fields of the to-be-tested chip is realized by using the same lens cone, the lens cone is arranged on the turntable base, and the test angle range can be adjusted according to specific test requirements so that various chip test requirements can be met.

Description

Technical Field

[0001] This invention relates to the field of optical testing, and more specifically to a beam scanning device and testing method integrating a photonics chip. Background Technology

[0002] Integrated photonics is a technology that integrates optical components such as waveguides, modulators, detectors, and light sources into photonic chips. Its core components include waveguide systems made of materials such as silicon, silicon nitride, and indium phosphide. Integrated photonic chips have revolutionized various fields, including high-speed data communication, optical sensing, and biophotonics. However, ensuring the functionality and performance of these chips requires robust testing and packaging strategies.

[0003] Near-field and far-field testing of integrated photonic chips is a core step in ensuring their performance, reliability, and mass production feasibility. Near-field testing (wafer level) before chip dicing and packaging can detect parameters such as insertion loss (IL), polarization dependent loss (PDL), and waveguide response, filtering out chips with manufacturing defects and preventing defective products from entering the high-cost packaging and assembly stages, significantly reducing material waste and rework costs. Far-field testing is performed at the module level, simulating real-world application environments (such as data center optical interconnects) to verify indicators such as bit error rate (BER), TDECQ, and transmit power, ensuring chip stability under high-speed (hundreds of Gb / s to Tb / s) and multi-wavelength conditions.

[0004] However, existing integrated testing systems often consist of individual devices with different optical path configurations. A single testing device cannot meet various testing needs, or while the optical path of the testing system may be adjustable, it requires testers to constantly adjust the optical path position and specific lens parameters, making the testing process for integrated photonic chips cumbersome. Furthermore, existing testing systems have limited optical path testing angles, which cannot meet the testing requirements of integrated photonic chips of varying sizes or at different angles. Summary of the Invention

[0005] Based on this, the present invention provides a beam scanning device and testing method for an integrated photonic chip. A fixed lens position is set inside the lens barrel, and a lens with different magnification is set for each fixed lens position, which facilitates switching the optical path according to different testing requirements. In addition, by setting the lens barrel on the turntable base, the testing angle range can be adjusted according to specific testing requirements, which is more conducive to a comprehensive understanding of the chip's near and far field imaging and light output.

[0006] In a first aspect, the present invention provides a beam scanning device with an integrated photonic chip, the integrated photonic chip beam scanning device comprising a chip sample stage, a chip sample stage base, a beam receiver connected to a lens tube, and a horizontally arranged turntable base.

[0007] The lens barrel is positioned above the turntable base, and the lens barrel contains an aperture adjustment structure and at least four lens groups.

[0008] The center point of the chip sample stage base overlaps with that of the turntable base, the chip sample stage base is located above the turntable base, and the chip sample stage is vertically set at the center point of the chip sample stage base.

[0009] Furthermore, the lens barrel is internally equipped with an aperture adjustment structure and at least four lens groups, specifically:

[0010] Along the direction from the beam receiver to the chip sample stage, the inside of the lens barrel is sequentially provided with a first lens position, a second lens position, an adjustable aperture position, a third lens position, a fourth lens position, and a microscope objective.

[0011] A first lens group is provided at the first lens position. The first lens group includes a first focal length lens component and a through hole component. The first lens group is disposed on a first movable base. The components of the first lens group are switched by the horizontal movement of the first movable base.

[0012] The second lens position is provided with a second lens group, the second lens group includes a second focal length lens component and a through hole component, the second lens group is disposed on a second movable base, and the components of the second lens group are switched by the horizontal movement of the second movable base;

[0013] A third lens group is provided at the third lens position. The third lens group includes a third focal length lens component and a through hole component. The third lens group is set on a third movable base. The components of the third lens group are switched by the horizontal movement of the third movable base.

[0014] The fourth lens group is provided at the position of the fourth lens group. The fourth lens group includes a fourth focal length lens component and a through hole component. The fourth lens group is set on the fourth movable base. The component of the fourth lens group is switched horizontally by the fourth movable base.

[0015] The adjustable aperture position is provided with an aperture adjustment structure.

[0016] Furthermore, the beam scanning device integrating the photonics chip also includes an optical fiber and an optical fiber-coupled six-dimensional adjustment stage;

[0017] The optical fiber includes an input optical fiber, which is disposed on one side of the chip sample stage so that the laser signal emitted from the input optical fiber enters the light inlet of the chip under test.

[0018] The fiber-coupled six-dimensional adjustment stage includes an input adjustment stage, which is connected to an input optical fiber and is used to adjust the position of the input optical fiber.

[0019] Furthermore, a sample stage adjustment structure is provided on one side of the chip sample stage;

[0020] The sample stage adjustment structure includes a flat plate that is attached to the chip sample stage, a three-dimensional electric displacement adjustment stage that is perpendicular to the flat plate, and an L-shaped tray for placing the chip sample stage.

[0021] The plate has screw holes at each of its four corners for fixing the packaged chip. The distance between any two screw holes is greater than the length of the chip sample stage edge that is parallel to them.

[0022] The L-shaped tray and the chip sample stage are located on the same side of the flat plate, and the height of the L-shaped tray is lower than the height of the chip sample stage.

[0023] The chip sample stage is equipped with vacuum adsorption holes for adsorbing unpackaged chips.

[0024] In a second aspect, the present invention also provides a testing method for an integrated photonic chip, wherein the testing method for the integrated photonic chip is applied to a beam scanning device for the integrated photonic chip described in any one of the first aspects, comprising:

[0025] The chip to be tested is mounted on the chip sample stage;

[0026] Obtain the relative height between the light output port of the chip under test and the chip sample stage plane, as well as the relative distance between the light output port of the chip under test and the reference point;

[0027] The three-dimensional electric displacement stage is adjusted according to the relative height between the light output port of the chip under test and the chip sample stage plane, as well as the relative distance between the light output port of the chip under test and the reference point, so that the chip under test is located at the center of the chip sample stage.

[0028] Based on the light output port size of the chip under test, a near-field imaging lens scheme and a far-field imaging lens scheme are obtained.

[0029] The component that switches between the first lens group, the second lens group, the third lens group, and the fourth lens group according to the near-field imaging lens scheme;

[0030] If the emitted light spot of the chip under test is not at the center point of the beam receiver, adjust the three-dimensional electric displacement adjustment stage according to the relative distance between the emitted light spot and the center point of the beam receiver;

[0031] If the emitted light spot of the chip under test is located at the center point of the beam receiver, rotate the turntable base according to the maximum angle to be measured, and record the near-field imaging results of the chip under test within the maximum angle range.

[0032] The component that switches between the first lens group, the second lens group, the third lens group, and the fourth lens group according to the far-field imaging lens scheme;

[0033] Rotate the turntable base according to the maximum angle to be measured, and record the far-field imaging results of the chip under test within the maximum angle range.

[0034] Furthermore, the acquisition of the relative height between the light emission port of the chip under test and the chip sample stage plane, and the relative distance between the light emission port of the chip under test and the reference point, specifically involves:

[0035] If the chip under test is an unpackaged chip, the thickness of the chip under test is the relative height between the light emission port of the chip under test and the chip sample stage, and the relative distance between the light emission port position of the chip under test and the lower left vertex is the relative distance between the light emission port of the chip under test and the reference point.

[0036] If the chip under test is a packaged chip, the chip under test is bonded to a circuit printed circuit board. The thickness of the chip under test and the thickness of the circuit printed circuit board are the relative heights of the light emission port of the chip under test and the chip sample stage. The relative distance between the light emission port of the chip under test and the screw hole at the lower left is the relative distance between the light emission port of the chip under test and the reference point.

[0037] Furthermore, the adjustment of the three-dimensional electric displacement stage based on the height of the light emission port of the chip under test and the chip sample stage plane, as well as the relative distance between the light emission port of the chip under test and the reference point, to position the chip under test at the center of the chip sample stage, specifically involves:

[0038] If the chip under test is an unpackaged chip, the specific expression for adjusting the three-dimensional electric displacement stage according to the height of the light emission port of the chip under test and the chip sample stage plane and the relative distance between the light emission port of the chip under test and the reference point is as follows:

[0039] ,

[0040] in, This represents the movement of the three-dimensional electric displacement stage along the x-axis. This represents the movement of the three-dimensional electric displacement stage along the y-axis. This represents the movement of the three-dimensional electric displacement stage along the z-axis. The width of the chip sample stage. The width of the chip sample stage. The distance between the light output port of the chip under test and the reference point along the x-axis is denoted as . The distance between the light output port of the chip under test and the reference point along the y-axis is denoted as . The relative height between the light output port of the chip under test and the sample stage;

[0041] If the chip under test is a packaged chip, the specific expression for adjusting the three-dimensional electric displacement stage according to the height of the light emission port of the chip under test and the chip sample stage plane and the relative distance between the light emission port of the chip under test and the reference point is as follows:

[0042] ,

[0043] This represents the relative distance between two screw holes along the x-axis on the flat plate. This represents the relative distance between two screw holes along the y-axis on the flat plate.

[0044] Furthermore, rotating the turntable base according to the maximum angle to be measured includes the following steps:

[0045] Obtain the maximum angle that needs to be measured;

[0046] If the maximum angle to be measured is less than the maximum scanning angle that can be measured by the current optical path, the turntable base is not rotated;

[0047] If the maximum angle to be measured is greater than the maximum scanning angle that the optical path can measure, the maximum angle to be measured is divided into at least two angle intervals, and the turntable base is rotated according to the range of each angle interval.

[0048] Thirdly, the present invention also provides a computer-readable storage medium having a computer program stored thereon, wherein the computer program, when executed by a processor, implements the steps of the test method for any integrated photonics chip in the second aspect.

[0049] Fourthly, the present invention also provides a computer device, including a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to perform any of the testing methods for integrated photonics chips in the second aspect.

[0050] The beneficial effects of adopting the above technical solution are as follows: In this embodiment, multiple lens positions are set inside the lens barrel, and a lens with a corresponding magnification is set for each fixed lens position, which facilitates switching the optical path according to different test requirements; In addition, by setting the lens barrel on the turntable base, the test angle range can be adjusted according to specific test requirements, which is more conducive to a comprehensive understanding of the chip's near and far field imaging and light output. Attached Figure Description

[0051] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the accompanying drawings used in the description of the embodiments or the prior art will be briefly introduced below.

[0052] Figure 1 This is a schematic diagram of a beam scanning device integrating a photonics chip in one embodiment of this application;

[0053] Figure 2 This is a schematic diagram showing the positions of the lens and aperture inside the lens barrel in one embodiment of this application;

[0054] Figure 3 This is a schematic diagram of an optical fiber-assisted alignment device in one embodiment of this application;

[0055] Figure 4 This is a schematic diagram of the chip sample stage and sample stage adjustment structure in one embodiment of this application;

[0056] Figure 5 This is a schematic diagram of a testing method for integrating a photonic chip in one embodiment of this application;

[0057] Figure 6 This is a schematic diagram of the optical path of the near-field test lens in one embodiment of this application;

[0058] Figure 7 This is a schematic diagram of the optical path of the far-field test lens in one embodiment of this application. Detailed Implementation

[0059] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention. To describe the present invention in more detail, the beam scanning device and testing method for integrated photonics chips provided by the present invention will be specifically described below with reference to the accompanying drawings.

[0060] Unless otherwise defined, the technical or scientific terms used in this application shall have the ordinary meaning understood by one of ordinary skill in the art to which this invention pertains. The terms "first," "second," and similar terms used in this invention do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Similarly, the terms "an," "a," or "the" do not indicate a quantity limitation, but rather indicate the presence of at least one. The terms "comprising" or "including" mean that the preceding element or object encompasses the elements or objects listed after the word and their equivalents, without excluding other elements or objects. The terms "connected" or "linked" are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. "Up," "down," "left," "right," etc., are used only to indicate relative positional relationships; when the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0061] Near-field and far-field testing of integrated photonic chips is a core step in ensuring their performance, reliability, and mass production feasibility. Near-field testing (wafer level) before chip dicing and packaging can detect parameters such as insertion loss (IL), polarization dependent loss (PDL), and waveguide response, filtering out chips with manufacturing defects and preventing defective products from entering the high-cost packaging and assembly stages, significantly reducing material waste and rework costs. Far-field testing is performed at the module level, simulating real-world application environments (such as data center optical interconnects) to verify indicators such as bit error rate (BER), TDECQ, and transmit power, ensuring chip stability under high-speed (hundreds of Gb / s to Tb / s) and multi-wavelength conditions.

[0062] As attached Figure 1 As shown, the beam scanning device integrating photonics chips includes a chip sample stage 100, a chip sample stage base 200, a beam receiver 400 connected to a lens tube 300, and a horizontally arranged turntable base 500.

[0063] The lens barrel 300 is positioned above the turntable base 500, and the lens barrel 300 contains an aperture adjustment structure and at least four lens groups.

[0064] It should be noted that in this embodiment, the lens barrel 300 is fixedly positioned above the reference position of the turntable base 500, and can be fixed by screws. The position of the lens barrel is marked as the 0-degree mark of the turntable base. In this embodiment, the lens barrel rotates with the turntable base, and has a field of view of approximately 180°.

[0065] The center point of the chip sample stage base 200 overlaps with that of the turntable base 500. The chip sample stage base 200 is located above the turntable base 500, and the chip sample stage 100 is vertically set at the center point of the chip sample stage base 200.

[0066] Specifically, in this embodiment, both the chip sample stage base 200 and the turntable base 500 can be set to be circular. When both are circular, the overlapping center point is the center position of the two circles.

[0067] It should be noted that in order to measure the light field distribution pattern of the chip under test at various angles by rotating the turntable base, the turntable base and the chip sample stage base move asynchronously. That is to say, the chip sample stage base is fixed, while the turntable base can rotate about the center position as an axis.

[0068] Since the beam scanning device for the integrated photonics chip provided in this embodiment can adjust the optical path according to testing requirements, thereby enabling near-field and far-field testing of the same chip as well as testing of chips of different sizes on the same beam scanning device, the lens barrel 300 in this embodiment is provided with an aperture adjustment structure and at least four lens groups, specifically:

[0069] Combined with appendix Figure 2 The schematic diagram of the lens and aperture positions inside the microscope tube is shown. Along the direction from the beam receiver to the chip sample stage, the microscope tube 300 is provided with the first lens position 301, the second lens position 302, the adjustable aperture position 303, the third lens position 304, the fourth lens position 305 and the microscope objective 306 in sequence.

[0070] In this embodiment, the focal length of the microscope objective 306 is fixed, generally set to a magnification of 10x and a focal length of 200mm, denoted as 10x (200mm).

[0071] A first lens group is provided at the first lens position 301. The first lens group includes a first focal length lens component and a through hole component. The first lens group is disposed on a first movable base, and the components of the first lens group are switched by the horizontal movement of the first movable base.

[0072] A second lens group is provided at the second lens position 302. The second lens group includes a second focal length lens component and a through hole component. The second lens group is disposed on a second movable base, and the components of the second lens group are switched by the horizontal movement of the second movable base.

[0073] The adjustable aperture position 303 is equipped with an aperture adjustment structure, specifically an electric aperture. When the through hole of the electric aperture is adjusted to the maximum, it does not obstruct the optical path and has a filtering effect, which is suitable for the near-field imaging stage.

[0074] A third lens group is provided at the third lens position 304. The third lens group includes a third focal length lens component and a through hole component. The third lens group is mounted on a third movable base. The components of the third lens group are switched by the horizontal movement of the third movable base.

[0075] A fourth lens group is provided at the fourth lens position 305. The fourth lens group includes a fourth focal length lens component and a through hole component. The fourth lens group is disposed on a fourth movable base, and the component of the fourth lens group is switched by the horizontal movement of the fourth movable base.

[0076] Considering the characteristics of lens focal length and lens location, and since the positions of the first lens position 301, second lens position 302, adjustable aperture position 303, third lens position 304, and fourth lens position 305 are fixed, and the lens group settings or selections are all for achieving near-field testing (i.e., ensuring the image focus of the photonic chip falls on the center of the beam receiver) and far-field testing (i.e., ensuring the image focus of the photonic chip at a greater distance falls on the center of the beam receiver), this embodiment combines the above four lens positions with the parameters of the optical components in the four lens groups as follows:

[0077] The first lens group includes a first focal length lens component and a through-hole component. When the first lens group switches to the through-hole component, the direction of light passing through the first lens group remains unchanged. When the first lens group switches to the first focal length lens component, and all other lens groups use through-hole components, the light emitted from the chip under test passes sequentially through the microscope objective 306 and the first focal length lens component, and the focal point falls on the center of the beam receiver 400. At this time, the distance between the first lens position 301 and the beam receiver 400 is the focal length of the first focal length lens component. Meanwhile, considering that the focal point of the third or fourth focal length lens component falls on the center of the adjustable aperture position 303 during the far-field measurement stage, the first focal length lens component is used to adjust the light so that the far-field measurement image falls on the center of the beam receiver 400 in order to achieve far-field measurement. Therefore, the distance between the first lens position 301 and the adjustable aperture position 303 is also the focal length of the first focal length lens component. .

[0078] The second lens group includes a second focal length lens component and a through-hole component. When the second lens group switches to the through-hole component, the direction of light passing through the second lens group remains unchanged. When the second lens group switches to the second focal length lens component, assuming all other lens groups use through-hole components, the light emitted from the chip under test passes sequentially through the microscope objective 306 and the second focal length lens component, and the focal point falls on the center of the beam receiver 400. At this time, the distance between the second lens position 302 and the beam receiver 400 is the focal length of the second focal length lens component. .

[0079] The third lens group includes a third focal length lens component and a through-hole component. When the third lens group switches to the through-hole component, the direction of light passing through the third lens group remains unchanged. When the third lens group switches to the third focal length lens component, assuming all other lens groups use through-hole components, the light emitted from the chip under test passes sequentially through the microscope objective 306 and the third focal length lens component, and the focal point falls on the center of the adjustable aperture position 303. At this time, the distance between the third lens position 304 and the adjustable aperture position 303 is the focal length of the third focal length lens component. .

[0080] Similarly, the fourth lens group is equipped with a fourth focal length lens component and a through-hole component. When the fourth lens group switches to the through-hole component, it does not change the direction of light passing through the fourth lens group. When the fourth lens group switches to the fourth focal length lens component, with all other lens groups using through-hole components, the light emitted by the chip under test passes through the microscope objective 306 and the fourth focal length lens component in sequence, and the focal point falls on the center of the adjustable aperture position 303. At this time, the distance between the fourth lens position 305 and the adjustable aperture position 303 is the focal length of the fourth focal length lens component. .

[0081] It should be noted that, in this embodiment, based on the characteristics of near-field and far-field measurements, the set of the first lens positions and the second lens positions can be denoted as the first lens region, and the set of the third lens positions and the fourth lens positions can be denoted as the second lens region. Specifically, when the chip under test is in the near-field measurement phase, the lens group in the second lens region switches to the through-hole component, and the aperture of the motorized aperture is adjusted to meet the condition of an approximately Gaussian beam. Different focal length lens components in the first lens region are selected according to the size of the light output port of the chip under test. When the chip under test is in the far-field measurement phase, the first lens area switches to the first focal length lens component, and different focal length lens components in the second lens area are selected according to the size of the light output port of the chip under test to ensure that the far-field imaging viewing angle range is more than twice the expected observation area. .

[0082] To better understand the specific arrangement of the lens group and aperture within the microscope tube, in one possible implementation, the microscope objective is an infinity-calibrated microscope objective with a magnification of 10x, which can be paired with a fixed focal length. For use with a 200mm lens; focal length of the first focal length lens component. The focal length of the second focal length lens component is 200mm. The focal length of the third focal length lens component is 300mm. The focal length of the fourth focal length lens component is 100mm. The beam is 50mm, and the resolution of the beam receiver is... pixel size The motorized aperture is model ELL15K motorized aperture kit.

[0083] When the chip under test performs near-field measurements, the imaging magnification received by the beam receiver is: or The corresponding field of view is 50 or When the chip under test (DUT) performs far-field measurements, the beam receiver can receive the far-field image. If the near-field image is then considered equivalent to a Gaussian light source, the far-field beamwidth is... ,in The wavelength of light The near-field image Gaussian beam width.

[0084] In addition, combined with the appendix Figure 3 The schematic diagram of the fiber optic-assisted alignment device shown is provided. Considering that some chips under test cannot achieve self-luminescence, the beam scanning device for the integrated photonics chip in this embodiment also includes an optical fiber 600 and an optical fiber-coupled six-dimensional adjustment stage 700.

[0085] The optical fiber 600 includes at least an input optical fiber 601, which is disposed on one side of the chip sample stage so that the laser signal emitted from the input light enters the light inlet of the chip under test; at the same time, the fiber-coupled six-dimensional adjustment stage 700 includes at least an input adjustment stage 701, which is connected to the input optical fiber 601 and is used to adjust the position of the input optical fiber.

[0086] By setting up the input optical fiber and the input adjustment stage, when the chip under test (DUT) without self-luminous function is placed on the chip sample stage, the position of the input optical fiber is adjusted by the input adjustment stage so that the laser signal emitted from the input optical fiber connected to the external laser enters the light inlet of the DUT, thereby realizing the passive emission of the DUT.

[0087] Based on this, an output fiber 602 can be provided on the side of the optical fiber near the light output port of the chip under test. One side of the output fiber 602 is used to receive the light emitted from the light output port of the chip under test, and the other side is connected to an external optical power meter to determine whether the chip under test is emitting light. At the same time, the fiber-coupled six-dimensional adjustment stage also includes an output adjustment stage 702, which is connected to the output fiber 602 and is used to adjust the position of the output fiber to ensure that the output fiber can receive the light emitted from the light output port of the chip under test.

[0088] In addition, combined with the appendix Figure 4 The schematic diagram of the chip sample stage and sample stage adjustment structure shown is provided on one side of the chip sample stage 100.

[0089] The sample stage adjustment structure includes a flat plate 101 that is attached to the chip sample stage, a three-dimensional electric displacement adjustment stage 102 that is perpendicular to the flat plate, and an L-shaped tray 103 for placing the chip sample stage.

[0090] The plate is provided with screw holes 104 at each of its four corners for fixing the packaged chip. The distance between any two screw holes is greater than the length of the chip sample stage edge that is parallel to them.

[0091] The L-shaped tray 103 and the chip sample stage 100 are located on the same side of the flat plate, and the height of the L-shaped tray is lower than the height of the sample stage.

[0092] The chip sample stage 100 is provided with a vacuum adsorption hole 105 for adsorbing unpackaged chips.

[0093] The L-shaped tray mentioned above can help fix the sample stage and provide a reference point for adjusting the position of the unpackaged chip. At the same time, the height of the L-shaped tray is lower than the height of the sample stage, which can ensure that the circuit board is tightly attached to the surface of the sample stage after it is fixed.

[0094] It should be noted that the packaged chip is attached to the printed circuit board, and the printed circuit board is fixed to the chip sample stage through screw holes, so that the packaged chip is also fixed on the chip sample stage.

[0095] In this embodiment, the width of the chip sample stage can be set to 20mm, the length of the chip sample stage can be set to 20mm, the distance between the two screw holes on the plate along the y-axis direction is set to 50mm, and the distance between the two screw holes on the plate along the x-axis direction is set to 50mm.

[0096] The aforementioned beam scanning device for integrated photonics chips can be configured to fix the chip via the vacuum adsorption hole of the sample stage or the screw hole on the plate that is attached to the sample stage. The lens and aperture inside the lens barrel can be adjusted according to the chip testing requirements, and the rotating base of the rotating disk can be rotated at the required angle to ensure that the beam receiver receives a light field distribution pattern that meets the testing requirements.

[0097] Based on the aforementioned integrated photonics chip, a beam scanning device, combined with an attached... Figure 5 The diagram shows a testing method for an integrated photonics chip. The testing method for the integrated photonics chip includes the following steps:

[0098] Step S801: Install the chip under test onto the chip sample stage.

[0099] Step S802: Obtain the relative height between the light output port of the chip under test and the chip sample stage plane, and the relative distance between the light output port of the chip under test and the reference point.

[0100] Specifically, if the chip under test is an unpackaged chip, the thickness of the chip under test is the relative height between the light emission port of the chip under test and the chip sample stage, and the relative distance between the light emission port position of the chip under test and the lower left vertex is the relative distance between the light emission port of the chip under test and the reference point.

[0101] If the chip under test is a packaged chip, the chip under test is bonded to a circuit printed circuit board. The thickness of the chip under test and the thickness of the circuit printed circuit board are the relative heights of the light emission port of the chip under test and the chip sample stage. The relative distance between the light emission port of the chip under test and the screw hole at the lower left is the relative distance between the light emission port of the chip under test and the reference point.

[0102] It should be noted that the position of the light output port of the chip under test mentioned above refers to the location of the geometric center point of the light output port of the chip under test.

[0103] Step S803: Adjust the three-dimensional electric displacement stage according to the relative height between the center point of the light output port of the chip under test and the chip sample stage plane, and the relative distance between the center point of the light output port of the chip under test and the reference point, so that the chip under test is located at the center position of the chip sample stage.

[0104] When the chip under test is located at the center of the chip sample stage, the light outlet of the chip under test is also located at the center of the turntable, and the height of the light outlet of the chip under test is also located at the center of the optical axis of the lens barrel.

[0105] The specific method for determining whether the chip under test is located at the center of the chip sample stage in this embodiment is as follows: the lens combination of the lens barrel is switched to a preset chip alignment lens combination. The preset chip alignment lens combination is determined according to the center position of the beam receiver and the chip sample stage. For example, different chip alignment lens combinations are selected for different distances between the center position of the beam receiver and the center position of the chip sample stage. The chip alignment lens combination includes the lens combination corresponding to the components of the first lens group, the second lens group, the third lens group and the fourth lens group selected in the lens barrel, as well as the size of the adjustable aperture. The lens barrel is always kept at the position of the turntable at 0°. When the lens combination in the lens barrel is switched to the preset chip alignment lens combination, if the chip is located at the center position of the chip sample stage, the light-emitting area of ​​the chip can also be magnified to a suitable magnification, and a clear near-field image of the light-emitting area can be obtained, and the center point of the light-emitting area is located at the center point of the beam receiver. Among them, whether a clear light-emitting area is obtained can be determined based on whether the spatial resolution (such as the minimum distance between two adjacent feature points in the light-emitting area) is less than the clear distance threshold (such as 30nm), whether the signal-to-noise ratio of the near-field image is greater than the clear signal-to-noise ratio threshold, and whether the contrast of the near-field image can effectively distinguish different materials or functional areas.

[0106] Based on the above judgment criteria, when the chip under test is located at the center of the chip sample stage, i.e., a clear near-field image of the light-emitting area cannot be obtained, the z-axis of the three-dimensional motorized displacement stage is adjusted to make the near-field image clear; if the image of the center point of the light-emitting area deviates from the center point of the beam receiver, the x-axis and y-axis of the three-dimensional motorized displacement stage are adjusted so that the image of the center point of the light-emitting area coincides with the center point of the beam receiver. The above-mentioned x-axis, y-axis, or z-axis adjustment of the three-dimensional motorized displacement stage can be achieved by automatic focusing or manual adjustment. Specifically, in step S803, adjusting the three-dimensional motorized displacement stage to position the chip under test at the center of the chip sample stage includes, if the chip under test is an unpackaged chip, the specific expression for adjusting the three-dimensional motorized displacement stage according to the height of the light-emitting port of the chip under test from the plane of the chip sample stage and the relative distance between the light-emitting port of the chip under test and the reference point is as follows:

[0107] ,

[0108] in, This represents the movement of the three-dimensional electric displacement stage along the x-axis. This represents the movement of the three-dimensional electric displacement stage along the y-axis. This represents the movement of the three-dimensional electric displacement stage along the z-axis. The width of the sample stage. The width of the sample stage. The distance between the light output port of the chip under test and the reference point along the x-axis is denoted as . The distance between the light output port of the chip under test and the reference point along the y-axis is denoted as . The relative height between the light output port of the chip under test and the sample stage;

[0109] If the chip under test is a packaged chip, the specific expression for adjusting the three-dimensional electric displacement stage according to the height of the light emission port of the chip under test and the chip sample stage plane and the relative distance between the light emission port of the chip under test and the reference point is as follows:

[0110] ,

[0111] This represents the relative distance between two screw holes along the x-axis on the flat plate. This represents the relative distance between two screw holes along the y-axis on the flat plate.

[0112] Step S804: Obtain the near-field imaging lens scheme and the far-field imaging lens scheme based on the light output port size of the chip under test.

[0113] Step S805: Switch the components of the first lens group, the second lens group, the third lens group, and the fourth lens group according to the near-field imaging lens scheme.

[0114] Step S806: If the emitted light spot of the chip under test is not at the center point of the beam receiver, adjust the three-dimensional electric displacement adjustment stage according to the relative distance between the emitted light spot and the center point of the beam receiver.

[0115] Step S807: If the emitted light spot of the chip under test is located at the center point of the beam receiver, rotate the turntable base according to the maximum angle to be measured, and record the near-field imaging results of the chip under test within the maximum angle range.

[0116] To determine whether the emitted light spot of the chip under test is at the center point of the beam receiver, the image of the emitted light spot can be uploaded to the processor, and the center position of the light spot can be calculated by combining the Gaussian fitting model, thereby determining whether the center position of the emitted light spot is at the center point of the beam receiver.

[0117] Step S808: Switch the components of the first lens group, the second lens group, the third lens group, and the fourth lens group according to the far-field imaging lens scheme.

[0118] Step S809: Rotate the turntable base according to the maximum angle to be measured, and record the far-field imaging results of the chip under test within the maximum angle range.

[0119] Specifically, the steps S807 and S809 above, in which the turntable base is rotated according to the maximum angle to be measured, include the following steps:

[0120] Obtain the maximum angle that needs to be measured;

[0121] If the maximum angle to be measured is less than the maximum scanning angle that can be measured by the current optical path, the turntable base is not rotated;

[0122] If the maximum angle to be measured is greater than the maximum scanning angle that the optical path can measure, the maximum angle to be measured is divided into at least two angle intervals, and the turntable base is rotated according to the range of each angle interval.

[0123] To better illustrate the selection of lens components during the near-field and far-field measurement of the chip under test in steps S804-S808, the appendix is ​​provided. Figure 6 and attached Figure 7 Explanation:

[0124] The parameters predetermined in this example are: the magnification of the microscope objective is 10x, and it can be used with a fixed focal length. For use with a 200mm lens, the resolution of the beam receiver is... Each pixel is 100 pixels in size. The imaging range of the beam receiver is .

[0125] Combined with appendix Figure 6 The diagram shows the optical path of the near-field test lens. The near-field imaging lens scheme of the chip under test is used to observe the light field distribution on the chip surface. At this time, it is necessary to make the light output area of ​​the chip under test completely imaged in the camera. Based on the light output size of the chip under test, the first focal length lens component or the second focal length lens component is selected, and other lens groups are switched to the through-hole component. The motorized aperture is adjusted to the maximum.

[0126] For example, when the area of ​​the light output port of the chip under test (the area that the microscope tube needs to observe) is close to the minimum area, approximately In near-field imaging, magnification , The focal length of the selected first focal length lens component or the second focal length lens component is then... The corresponding maximum value is Considering the resolution limit of the optical system, three pixels of the beam receiver are used ( )describe The object has already reached its resolution limit, meaning the system only needs to magnify it 18 times. In this case, the second focal length lens component is selected, with a corresponding focal length of [missing information]. This is sufficient, without the need for a larger focal length. Correspondingly, when the output aperture size of the chip under test is close to its maximum size, approximately... During near-field imaging, the magnification is... , The focal length of the selected first focal length lens component or the second focal length lens component is then... The corresponding minimum value is .

[0127] Combined with appendix Figure 7 The diagram shows the optical path of the far-field test lens. The far-field imaging lens scheme of the chip under test is used to observe the light field distribution in the far field (at infinity). The first focal length lens component is selected first. , The third focal length lens component or the fourth focal length lens component is selected according to the light output port size of the chip under test, and other lens groups are switched to the through hole component.

[0128] For example, the size of the light output port of the chip under test is denoted as , Let be the width of the light-emitting region of the chip under test in the x-direction. The height of the light-emitting region of the chip under test in the y-direction is shown; at the adjustable aperture position, the near-field image of the light-emitting port is shown. Given the focal length of the selected third or fourth focal length lens component, the size of the output aperture after magnification of the near-field image is: (in the x direction) (In the y-direction); angular magnification is The propagation angle at the adjustable aperture position is... , , Let x be the x-component of the angle between the light emission direction of the chip under test and the optical axis of the system. Let be the y-component of the angle between the light-emitting direction of the chip under test and the system optical axis. The aperture of the motorized aperture should meet the following requirements. ,and The output beam of the adjustable optical cable is approximated as a Gaussian beam, with an approximate beam width of... After passing through a focal length of The first focal length lens component has a far-field image size of... (in the y direction), (in the x-direction), where λ is the wavelength of the light wave. The center of the light beam is located at its distance from the optical axis in the x and y directions, respectively. as well as To accurately observe the far-field beam and calculate the beam center using the first-order center distance, it is generally required that three times the beam width be observable at the beam receiver, and that there be a sufficient number of pixels (here, 100 pixels) within the beam width. .consider The range is -10mm, wavelength considered as ,but The focal length range is at least .

[0129] At this point, for the beam receiver, its imaging range covers (in the x direction) (in the y-direction); then the maximum observable angle satisfies , At this time, the scanning angle of the chip can be measured as follows: , This system primarily focuses on measuring the scanning angle in the x-direction, therefore the scanning angle in the y-direction can be disregarded.

[0130] It should be understood that, although attached Figure 5 The steps in the flowchart are shown sequentially according to the arrows, but these steps are not necessarily executed in the order indicated by the arrows. Unless otherwise specified in this document, there is no strict order requirement for the execution of these steps, and they can be executed in other orders. Furthermore, [the following is a list of steps]. Figure 5At least some of the steps in the process may include multiple sub-steps or sub-stages. These sub-steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these sub-steps or stages is not necessarily sequential, but can be executed in turn or alternately with other steps or at least some of the sub-steps or stages of other steps.

[0131] In one embodiment, the present invention also provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the steps of the above-described test method for integrated photonics chips.

[0132] The computer-readable storage medium may be an electronic storage device such as flash memory, EEPROM (Electrically Erasable Programmable Read-Only Memory), EPROM (Erasable Programmable Read-Only Memory), hard disk, or ROM. Optionally, the computer-readable storage medium includes a non-transitory computer-readable storage medium. The computer-readable storage medium has storage space for program code that performs any of the method steps described above. This program code can be read from or written to one or more computer program products, and the program code may be compressed in an appropriate form.

[0133] In one embodiment, the present invention provides a computer device including a memory and a processor, the memory storing a computer program, and the processor executing the computer program to perform the above-described test method for integrated photonics chips.

[0134] The computer device includes a memory, a processor, and one or more computer programs, wherein the one or more computer programs can be stored in the memory and configured to be executed by one or more processors, and the one or more application programs are configured to perform the test methods for the integrated photonics chip described above.

[0135] A processor may include one or more processing cores. The processor connects to various parts of the computer device using various interfaces and lines, and performs various functions and processes data by running or executing instructions, programs, code sets, or instruction sets stored in memory, and by calling data stored in memory. Optionally, the processor may be implemented using at least one hardware form of Digital Signal Processing (DSP), Field-Programmable Gate Array (FPGA), or Programmable Logic Array (PLA). The processor may integrate one or a combination of several of the following: Central Processing Unit (CPU), Graphics Processing Unit (GPU), and modem. The CPU primarily handles the operating system, user interface, and applications; the GPU is responsible for rendering and drawing the displayed content; and the modem handles wireless communication. It is understood that the modem may also be implemented separately as a communication chip, without being integrated into the processor.

[0136] The memory may include random access memory (RAM) or read-only memory (ROM). The memory can be used to store instructions, programs, code, code sets, or instruction sets. The memory may include a program storage area and a data storage area. The program storage area may store instructions for implementing an operating system, instructions for implementing at least one function (such as touch functionality, sound playback functionality, image playback functionality, etc.), and instructions for implementing the various method embodiments described above. The data storage area may also store data created by the terminal device during use.

[0137] The above embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. An optical beam scanning device of an integrated photonics chip, characterized in that, The light beam scanning device of the integrated photonics chip comprises a chip sample table, a chip sample table base, a light beam receiver connected with a lens barrel, and a horizontally arranged turntable base; The lens barrel is arranged above the turntable base, and the inside of the lens barrel is provided with an aperture adjusting structure and at least four lens groups; The center point of the chip sample table base overlaps with the center point of the turntable base, the chip sample table base is arranged above the turntable base, and the chip sample table is vertically arranged at the center point of the chip sample table base.

2. The integrated photonics chip's light beam scanning apparatus of claim 1, wherein, The inside of the lens barrel is provided with an aperture adjusting structure and at least four lens groups, specifically: In the direction of the light beam receiver pointing to the chip sample table, the inside of the lens barrel is sequentially provided with a first lens position, a second lens position, an adjustable aperture position, a third lens position, a fourth lens position and a microscope objective; The first lens position is provided with a first lens group, the first lens group comprises a first focal length lens component and a through hole component, the first lens group is arranged on a first movable base, and the components of the first lens group are switched by horizontal movement of the first movable base; The second lens position is provided with a second lens group, the second lens group comprises a second focal length lens component and a through hole component, the second lens group is arranged on a second movable base, and the components of the second lens group are switched by horizontal movement of the second movable base; The third lens position is provided with a third lens group, the third lens group comprises a third focal length lens component and a through hole component, the third lens group is arranged on a third movable base, and the components of the third lens group are switched by horizontal movement of the third movable base; The fourth lens position is provided with a fourth lens group, the fourth lens group comprises a fourth focal length lens component and a through hole component, the fourth lens group is arranged on a fourth movable base, and the components of the fourth lens group are switched by horizontal movement of the fourth movable base; The adjustable aperture position is provided with an aperture adjusting structure.

3. The integrated photonics chip's light beam scanning apparatus of claim 1, wherein, It also includes an optical fiber and an optical fiber coupling six-dimensional adjustment table; The optical fiber comprises an input optical fiber, the input optical fiber is arranged on one side of the chip sample table, so that the laser signal emitted by the input optical fiber enters the light inlet of the chip to be tested; The optical fiber coupling six-dimensional adjustment table comprises an input adjustment table, the input adjustment table is connected with the input optical fiber, and is used for adjusting the position of the input optical fiber.

4. The integrated photonics chip-based optical beam scanning apparatus of claim 1, wherein, One side of the chip sample table is provided with a sample table adjusting structure; The sample table adjusting structure comprises a flat plate matched with the chip sample table, a three-dimensional electric displacement adjusting table arranged vertically with the flat plate, and an L-shaped supporting plate for placing the chip sample table; Screw holes are arranged on the four corners of the flat plate for fixing the packaged chip, and the distance between any two screw holes is greater than the length of the edge of the chip sample table parallel to the screw holes; The L-shaped supporting plate is arranged on the same side of the flat plate as the chip sample table, and the height of the L-shaped supporting plate is lower than the height of the chip sample table; The chip sample table is provided with a vacuum suction hole for suction of the unpackaged chip.

5. A method of testing an integrated photonics chip, the method of testing an integrated photonics chip being applied to the optical beam scanning device of any one of claims 1-4, characterized in that, It includes: The chip to be tested is installed on the chip sample table; The relative height of the light outlet of the chip to be tested and the plane of the chip sample table, and the relative distance between the light outlet of the chip to be tested and the reference point are obtained; The three-dimensional electric displacement adjusting table is adjusted according to the relative height of the light outlet of the to-be-tested chip and the chip sample table plane and the relative distance of the light outlet of the to-be-tested chip and the reference point, so that the to-be-tested chip is located at the center position of the chip sample table; The near-field imaging lens scheme and the far-field imaging lens scheme are obtained according to the size of the light outlet of the to-be-tested chip; The components of the first lens group, the second lens group, the third lens group and the fourth lens group are switched according to the near-field imaging lens scheme; If the exit light spot of the to-be-tested chip is not at the center point of the light beam receiver, the three-dimensional electric displacement adjusting table is adjusted according to the relative distance of the exit light spot and the center point of the light beam receiver; If the exit light spot of the to-be-tested chip is at the center point of the light beam receiver, the turntable base is rotated according to the maximum angle to be measured, and the near-field imaging result of the to-be-tested chip in the maximum angle range is recorded. The components of the first lens group, the second lens group, the third lens group and the fourth lens group are switched according to the far-field imaging lens scheme; The turntable base is rotated according to the maximum angle to be measured, and the far-field imaging result of the to-be-tested chip in the maximum angle range is recorded.

6. The method of testing an integrated photonics chip of claim 5, wherein, The relative height of the light outlet of the to-be-tested chip and the chip sample table plane and the relative distance of the light outlet of the to-be-tested chip and the reference point are obtained, specifically: If the to-be-tested chip is an unpackaged chip, the thickness of the to-be-tested chip is the relative height of the light outlet of the to-be-tested chip and the chip sample table, and the relative distance between the light outlet position of the to-be-tested chip and the lower left vertex is the relative distance of the light outlet of the to-be-tested chip and the reference point; If the to-be-tested chip is a packaged chip, the to-be-tested chip is attached to the circuit printed board, the thickness of the to-be-tested chip and the thickness of the circuit printed board are the relative height of the light outlet of the to-be-tested chip and the chip sample table, and the relative distance between the light outlet position of the to-be-tested chip and the lower left screw hole is the relative distance of the light outlet of the to-be-tested chip and the reference point.

7. The method of testing an integrated photonics chip of claim 6, wherein, The three-dimensional electric displacement adjusting table is adjusted according to the relative height of the light outlet of the to-be-tested chip and the chip sample table plane and the relative distance of the light outlet of the to-be-tested chip and the reference point, so that the to-be-tested chip is located at the center position of the chip sample table, specifically: If the to-be-tested chip is an unpackaged chip, the specific expression of adjusting the three-dimensional electric displacement adjusting table according to the relative height of the light outlet of the to-be-tested chip and the chip sample table plane and the relative distance of the light outlet of the to-be-tested chip and the reference point is: ， wherein, is a movement amount of the x-axis direction of the three-dimensional electric displacement adjustment stage, is a movement amount of the y-axis direction of the three-dimensional electric displacement adjustment stage, is a movement amount of the z-axis direction of the three-dimensional electric displacement adjustment stage, is a width of the chip sample stage, is a width of the chip sample stage, is a relative distance of the light outlet of the chip to be measured and the reference point in the x-axis direction, is a relative distance of the light outlet of the chip to be measured and the reference point in the y-axis direction, is a relative height of the light outlet of the chip to be measured and the chip sample stage; If the to-be-tested chip is a packaged chip, the specific expression of adjusting the three-dimensional electric displacement adjusting table according to the relative height of the light outlet of the to-be-tested chip and the chip sample table plane and the relative distance of the light outlet of the to-be-tested chip and the reference point is: ， is the relative distance between two screw holes in the x-axis direction on the flat plate, is the relative distance between two screw holes in the y-axis direction on the flat plate.

8. The method of testing an integrated photonics chip of claim 7, wherein, Rotating the turntable base according to the maximum angle to be measured includes the following steps: Obtaining the maximum angle to be measured; If the maximum angle to be measured is less than the maximum scanning angle that can be measured by the current optical path, the turntable base is not rotated; If the maximum angle to be measured is greater than the maximum scanning angle that can be measured by the optical path, the maximum angle to be measured is divided into at least two angle intervals, and the turntable base is rotated according to the range of each angle interval.

9. A computer readable storage medium having stored thereon a computer program, characterized in that, The computer program, which a processor executes, implements the steps of the method for testing an integrated photonics chip according to any one of claims 5-8. 10.A computer device, comprising a memory and a processor, wherein the memory stores a computer program, and the computer device is configured to perform the method according to any one of claims 1-9. The processor, when executing the computer program, executes the method for testing an integrated photonics chip according to any one of claims 5-8.

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