Indicator lamp control method and network equipment

Abstract

The embodiment of the invention provides an indicator light control method and network equipment, and relates to the technical field of data processing, the network equipment comprises a network chip and a CPLD, each port management module is used for counting a first number of clock signals transmitted after an initial signal on a second bus after sensing the initial signal transmitted on the first bus; transmitting port state information to the third bus after determining that the first number reaches the transmission offset configured for the third bus; the CPLD is used for reading state information transmitted by each port management module from a third bus according to a transmission offset adopted by each port management module for transmitting data to the third bus after sensing an initial signal transmitted on the first bus; and for each port management module, controlling the state of the indicating lamp corresponding to the port connected with the port management module based on the value of the set bit in the state information corresponding to the port management module. The network chip design and packaging cost of the network equipment can be reduced.

Description

Technical Field

[0001] This invention relates to the field of data processing technology, and in particular to an indicator light control method and network device. Background Technology

[0002] Network devices such as switches and routers have ports for connecting to fiber optic cables or network cables. Each port is equipped with an indicator light. The on / off state of the indicator light can indicate the current status of the port, including the port's connection status and traffic flow status.

[0003] In related technologies, such as Figure 1 As shown, the network chip of the network device integrates a port management module. Each port management module is connected to one port, and each port management module needs to have several output pins connected to the corresponding indicator lights of the port. For example, the output pins of port management module 1 are connected to indicator light 1, the output pins of port management module 2 are connected to indicator light 2, and so on. During operation, after the port management module obtains the status information of the port, it outputs control signals to the indicator lights through the pins, thereby realizing the control of the indicator lights and making the indicator lights in different states such as on and off.

[0004] However, as the number of ports increases, the number of port management modules connecting the ports also increases, which in turn increases the overall number of output pins in the network chip that need to be connected to indicator lights. The increase in the number of output pins leads to an increase in the difficulty and cost of designing and packaging the network chip. Summary of the Invention

[0005] The purpose of this invention is to provide an indicator light control method and a network device to reduce the cost of network chip design and packaging in network devices. The specific technical solution is as follows:

[0006] In a first aspect, embodiments of the present invention provide an indicator light control method applied to a network chip in a network device. The network chip integrates multiple port management modules, which are serially connected to a first bus, a second bus, and a third bus configured in the network chip. Each port management module is connected to a port of the network device. The method includes:

[0007] After the port management module senses the start signal transmitted on the first bus, it counts the first number of clock signals transmitted on the second bus after the start signal.

[0008] After determining that the first number has reached the transmission offset configured for itself, the port management module transmits the status information of the connected ports to the third bus, so that the complex programmable logic device (CPLD) connected to the third bus in the network device controls the indicator lights corresponding to the ports connected to each port management module based on the status information transmitted on the third bus. The transmission offset is different for each port management module.

[0009] In one possible implementation, the port management module transmits the status information of the connected ports to the third bus, including:

[0010] The port management module encodes the status information of each connected port to obtain encoded information;

[0011] The port management module transmits the encoded information corresponding to each status information to the third bus in the order of data transmission of each status information.

[0012] In one possible implementation, the status information includes: native status information of the connected port perceived by the port management module and custom status information set.

[0013] In one possible implementation, the custom status information includes: a first parameter stored in a first register of the network device and a second parameter stored in a second register, wherein the port management module encodes the custom status information in the following manner:

[0014] Logical operations are performed on the values ​​of the first and second bits corresponding to each identical bit position in the first and second parameters, and the value of the third bit in the encoding information corresponding to the custom state information is obtained based on the operation results.

[0015] In one possible implementation, the port management module obtains the value of each third bit in the encoded information corresponding to the custom status information in the following manner:

[0016] If the result of the operation indicates that the values ​​of the first and second bits, which are in the same position as the third bit, are both 1, then the value of the third bit is set to 1.

[0017] If the operation result indicates that the first and second bits, which are in the same position as the third bit, have values ​​of 0 and 1, then the value of the third bit is set as the target value, wherein the target value is the inverse code of the value of the third bit in the previous state information transmission round.

[0018] If the result of the operation indicates that the values ​​of the first and second bits, which are in the same position as the third bit, are both 0, then the value of the third bit is set to 0.

[0019] In one possible implementation, the method further includes:

[0020] The port management module, configured as the main management module, generates a start signal on the first bus at a set first frequency and a clock signal on the second bus at a set second frequency.

[0021] Secondly, embodiments of the present invention provide an indicator light control method applied to a CPLD in a network device. The network chip in the network device integrates multiple port management modules, each port management module being connected to one port of the network device. The CPLD is connected to a first bus, a second bus, and a third bus provided in the network chip, and the CPLD is connected to an indicator light corresponding to each port of the network device. The method includes:

[0022] After sensing the start signal transmitted on the first bus, the status information transmitted by each port management module is read from the third bus according to the transmission offset used by each port management module to transmit data to the third bus. The transmission offset is different for each port management module.

[0023] For each port management module, the state of the first indicator light corresponding to the port connected to the port is controlled based on the first value of the set bit in the status information of the port management module.

[0024] In one possible implementation, controlling the state of the first indicator light corresponding to the port to which the port management module is connected includes:

[0025] If the first value is the same as the second value of the set bit in the previous state information receiving round, then the target state corresponding to the first value is determined directly according to the correspondence between the set value and the on / off state of the indicator light, and the first indicator light corresponding to the port connected to the port management module is controlled to be in the target state.

[0026] If the first value is different from the second value, then based on the set flashing frequency and the time when the first indicator light last switched on and off, it is determined whether the first indicator light meets the switching condition. If it does, then the on / off state of the first indicator light is switched.

[0027] In one possible implementation, the status information transmitted by the port management module is encoded information. The encoded information corresponding to the port management module has multiple set bits, including bits in the first encoded information and bits in the second encoded information. The first encoded information is the encoded information corresponding to the native status information of the port connected to the port of the port management module, and the second encoded information is the encoded information corresponding to the custom status information of the port connected to the port of the port management module. The port connected to the port of the port management module corresponds to multiple first indicator lights to be controlled, and the first value of each set bit is used to control the status of one first indicator light.

[0028] The control of the state of the first indicator light corresponding to the port connected to the port management module based on the first value includes:

[0029] For each set bit, the state of the first indicator light corresponding to that set bit is controlled based on the first value of that set bit.

[0030] Thirdly, embodiments of the present invention provide a network device, including a network chip and a CPLD. The network chip integrates multiple port management modules, which are serially connected to a first bus, a second bus, and a third bus provided in the network chip. Each port management module is connected to one port of the network device. The CPLD is connected to the first bus, the second bus, and the third bus, and the CPLD is connected to an indicator light corresponding to each port of the network device.

[0031] Each port management module is used to count the first number of clock signals transmitted on the second bus after the start signal after sensing the start signal transmitted on the first bus; after determining that the first number has reached the transmission offset configured for itself, it transmits the status information of the connected port to the third bus, wherein the transmission offset corresponding to each port management module is different.

[0032] The CPLD is used to sense the start signal transmitted on the first bus, and read the encoded information transmitted by each port management module from the third bus according to the transmission offset used by each port management module to transmit data to the third bus; for each port management module, it reads the first value of the set bit in the encoded information corresponding to the port management module, and controls the state of the first indicator light corresponding to the port connected to the port management module based on the first value.

[0033] As can be seen from the above, in the indicator light control scheme provided by the embodiments of the present invention, the port management modules integrated in the network chip are connected to the first bus, the second bus and the third bus in a serial manner. The CPLD is also connected to the first bus, the second bus and the third bus. After the port management module senses the start signal transmitted on the first bus, it counts the first number of clock signals transmitted on the second bus after the start signal. After determining that the first number has reached the transmission offset configured for itself, it transmits the status information of the connected port to the third bus. Thus, the CPLD can control the indicator lights corresponding to the ports connected to each port management module based on the status information transmitted on the third bus, thereby realizing the status control of the indicator lights.

[0034] As can be seen, compared to the solution where the port management module directly controls the indicator lights, the output pins of each port management module do not need to be connected to the indicator lights. Only three pins connected to the CPLD need to be output from the three buses set in the network chip. Overall, this reduces the number of pins that need to be output from the network chip, thereby reducing the design and packaging costs of the network chip and also reducing the difficulty of downstream PCB design and routing.

[0035] Furthermore, compared to solutions that rely on a CPU and indicator light control chip to control indicator lights, the indicator light control process does not require CPU involvement. This allows the CPU to allocate more computing resources to the network device's primary services, thus improving CPU utilization and ensuring the continuity and stability of these services. Moreover, the entire indicator light control process is efficiently implemented by hardware such as port management units and CPLDs, without the need for software or CPU intervention. This results in lower data transmission latency and improved real-time performance of indicator light status control.

[0036] Of course, implementing any product or method of the present invention does not necessarily require achieving all of the advantages described above at the same time. Attached Figure Description

[0037] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other embodiments can be obtained based on these drawings.

[0038] Figure 1 This is a schematic diagram of the structure of a network device in related technologies;

[0039] Figure 2 This is a schematic diagram of the structure of another network device in related technologies;

[0040] Figure 3 This application provides a schematic diagram of the structure of a network device according to an embodiment of the present application.

[0041] Figure 4 This is a schematic diagram illustrating a bus data transmission scenario provided in an embodiment of this application.

[0042] Figure 5 A flowchart illustrating the first indicator light control method provided in this application embodiment;

[0043] Figure 6 A flowchart illustrating the second indicator light control method provided in this application embodiment;

[0044] Figure 7 This is a schematic diagram of a data structure for encoded information provided in an embodiment of this application. Detailed Implementation

[0045] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art based on the present invention are within the scope of protection of the present invention.

[0046] Network chips in network devices such as switches and routers integrate multiple port management modules. Each port management module connects to one port, also known as an interface, used to connect fiber optic cables or network cables. Each port is equipped with an indicator light. These indicator lights are typically light-emitting diodes (LEDs), also called status lights or LED status lights. Their on / off states indicate the current status of the port, specifically its connection status and traffic flow status. Staff or users can conveniently and intuitively understand the real-time status of each port in the network device based on the indicator light status, and can also use this real-time status to assist in troubleshooting and other operations.

[0047] In related technologies, the status control of indicator lights is generally achieved by directly controlling them with a port management module or by using a CPU + indicator light control chip. The following will introduce these two methods of indicator light status control.

[0048] The first method: direct control via the port management module.

[0049] like Figure 1As shown, the network chip of the network device integrates port management modules 1 to n, each port management module connecting to one port, i.e., port management modules 1 to n are respectively connected to ports 1 to n; and each port management module needs to have several output pins connected to the corresponding indicator lights of the port, such as the output pins of port management module 1 connected to indicator light 1, the output pins of port management module 2 connected to indicator light 2, and so on, the output pins of port management module n connected to indicator light n, etc. During operation, after the port management module obtains the status information of the port, it outputs control signals to the indicator lights through the pins, thereby realizing the control of the indicator lights, so that the indicator lights are in different states such as on and off.

[0050] Although the above method achieves status control of the indicator lights, it has the following main drawbacks:

[0051] 1. The number of output pins of the network chip has increased, which has increased the complexity of board-level routing.

[0052] Since each port management module needs several output pins to connect to the port's indicator lights, as the number of ports increases, the number of port management modules connecting to those ports also increases. Consequently, the overall number of output pins in the network chip that need to connect to the indicator lights also increases. For example, if it takes 3 output pins to indicate the status of a port, then a network chip with N port management modules would need 3 × N output pins to connect to the indicator lights.

[0053] As the number of ports increases, a large number of output pins in the network chip need to be occupied by indicator lights. Therefore, the design phase of the network chip needs to plan more output pins, which increases the packaging design cost of the network chip and increases the difficulty of downstream printed circuit board (PCB) design and routing.

[0054] 2. The design is rigid and lacks flexibility.

[0055] Each output pin can only identify two states, 0 and 1. With a limited number of output pins, the port states that can be identified by the signals output by the output pins are also limited, which is not flexible enough.

[0056] The second method involves using a CPU and indicator light control chip for control.

[0057] like Figure 2As shown, the CPU in the network device is connected to each port management module, and the indicator light control chip is connected to each indicator light. The CPU obtains the status information of each port in real time through the port management modules. When it determines that the port status has changed, it notifies the indicator light control chip to adjust the status of the corresponding indicator light according to the set indicator light control logic, thereby achieving indicator light control.

[0058] Although the above method achieves status control of the indicator lights, it has the following main drawbacks:

[0059] 1. Network devices consume a lot of CPU resources, which reduces the CPU utilization of the network devices' main services.

[0060] In the above scheme, interrupts or polling are generally used to make the CPU aware of changes in the state of the network port.

[0061] If the interrupt method is used, the port management unit will report the port status to the CPU at high frequency. Each time the port status is reported, an interrupt signal will be sent to the CPU, which will reduce the CPU utilization of the main business and the current business processing of the CPU terminal.

[0062] If a polling method is used, the CPU needs to periodically poll the port status of each port management module, which consumes a lot of computing resources, further reducing the CPU utilization of the main business and affecting the continuity and stability of the main business.

[0063] 2. High control delay and poor real-time performance.

[0064] In the above scheme, after the CPU detects a change in the port's status, it needs to notify the indicator light control chip first. Only then will the indicator light control chip respond to the received notification and output a control signal to the indicator light to complete the lighting step. It is evident that the hardware transmission path and software processing steps in the indicator light control process are relatively long, resulting in a significant delay between the time of network status change and the time of indicator light status change, thus reducing the real-time performance of the indicator lights in identifying port status.

[0065] 3. The cost is relatively high.

[0066] like Figure 2 As shown, the above solution requires a dedicated indicator light control chip, increasing hardware costs. Furthermore, when the number of ports on a network device is large, the pins of a single indicator light control chip are insufficient to connect all the indicator lights, necessitating multiple indicator light control chips, further increasing hardware costs.

[0067] In view of the above, embodiments of the present invention provide an indicator light control scheme to overcome at least one of the problems existing in the above-mentioned related technical solutions.

[0068] To facilitate understanding of the solutions provided in the embodiments of the present invention, the internal structure of a network device provided in the embodiments of the present invention will first be described.

[0069] like Figure 3 As shown, the network chip in the network device integrates multiple port management modules and includes three buses (which can be referred to as the first bus, the second bus, and the third bus from top to bottom). The multiple port management modules are connected serially to the first bus, the second bus, and the third bus in the network chip. The first bus, the second bus, and the third bus lead out three pins to the outside of the network chip. These three pins are connected to a Complex Programmable Logic Device (CPLD) and can be referred to as Led_STB, Led_CLK, and Led_DATA, respectively.

[0070] The functions of the first bus, second bus, and third bus mentioned above will be briefly introduced below.

[0071] First bus:

[0072] This can be referred to as the Led_STB bus, used to transmit a start signal. This start signal instructs each port management module to upload port status information to the third bus, and can be called the start identifier of the status information data stream. In short, each time a start signal is received, each port management module uploads a round of port status information.

[0073] In addition, each port management module determines the timing of uploading status information based on the transmission offset between itself and the aforementioned start signal. The CPLD also parses the status information based on the transmission offset corresponding to each port management module. For details, please refer to the description in the subsequent embodiments, which will not be elaborated here.

[0074] Second bus:

[0075] It can be called the Led_CLK bus, which is used to transmit clock signals. The aforementioned clock signal is a pulse signal used to control the timing logic of data transmission and serves as the reference for the port management module to upload status information and for the CPLD to parse status information.

[0076] Third bus:

[0077] It can be called the Led_DATA bus, which is used to carry the port status information uploaded by each port management module.

[0078] A round of status information uploaded by all port management modules on the third bus can be referred to as an LED data frame. As described above, each port management module determines the timing of uploading status information based on its configured transmission offset. Each port management module has a different transmission offset, meaning that each module uploads status information at different times on the third bus, resulting in a different order in which they upload the information, and consequently, different positions of the uploaded status information within the LED data frame. In one embodiment of this invention, the length of an LED data frame can be 4096 bits.

[0079] The following is through Figure 4 This provides a more intuitive overview of the data transmission on each bus.

[0080] See Figure 4 This is a schematic diagram illustrating a data transmission scenario provided by an embodiment of the present invention. The direction from left to right in the diagram represents the time axis. It can be seen that the Led_CLK bus transmits pulse clock signals at a set frequency. After the Led_STB bus generates a start signal, n port management modules begin uploading status information to the Led_DATA bus according to the configured transmission offset values. These modules are referred to as D1, D2, ..., Dn, and D1-Dn are located at different positions within the Led data frame.

[0081] After receiving the LED data frame, the CPLD can parse the status information D1-Dn uploaded by each port management module through the transmission offset, and then control the status of the indicator lights corresponding to the ports connected to each port management module according to the parsed status information.

[0082] Specifically, the CPLD can locate the starting position of the data sent by each port management module in the LED data frame based on the pre-configured transmission offset corresponding to each port management module. Then, the CPLD can read data of a set length from each starting position backwards. The read data segments are the status information of the ports connected to each port management module. The aforementioned set length is the pre-configured length of the data transmitted by each port management module.

[0083] It should be noted that the signals in the first bus and the second bus mentioned above can be generated by the signal generation module in the network device. Specifically, the signal generation module can generate a start signal in the first bus at a set first frequency and generate a clock signal in the second bus at a set second frequency.

[0084] In one possible implementation, embodiments of the present invention also provide various configuration items for adjusting the overall indicator light control flow. These configuration items include those for configuring the main management module from each port management module. In this case, the signal generation module can be a port management module configured as the main management module. This allows the port management module to generate pulse signals without relying on a separate signal generation module, resulting in a simpler internal structure for the network device and reduced costs. The specific functions of the remaining configuration items will be detailed later and will not be elaborated here.

[0085] Next, we will introduce the roles of network chips and CPLDs in network devices.

[0086] Each port management module in the network chip is used to count the first number of clock signals transmitted on the second bus after the start signal is sensed on the first bus; after determining that the first number has reached the transmission offset configured for itself, it transmits the status information of the connected port to the third bus.

[0087] After sensing the start signal transmitted on the first bus, the CPLD reads the encoded information transmitted by each port management module from the third bus according to the transmission offset used by each port management module to transmit data to the third bus; for each port management module, it reads the first value of the set bit in the encoded information corresponding to the port management module, and controls the state of the first indicator light corresponding to the port connected to the port management module based on the first value.

[0088] As can be seen from the above, in the indicator light control scheme provided by this embodiment of the invention, the port management modules integrated in the network chip are connected serially to the first bus, the second bus, and the third bus. The CPLD is also connected to the first bus, the second bus, and the third bus. After the port management module senses the start signal transmitted on the first bus, it counts the first number of clock signals transmitted on the second bus after the start signal. After determining that the first number has reached the transmission offset configured for itself, it transmits the status information of the connected port to the third bus. Thus, the CPLD can control the indicator lights corresponding to the ports connected to each port management module based on the status information transmitted on the third bus. It can be seen that the status control of the indicator lights is realized through the above-described network chip + board-level CPLD architecture.

[0089] As can be seen, compared to the solution where the port management module directly controls the indicator lights, the output pins of each port management module do not need to be connected to the indicator lights. Only three pins connected to the CPLD need to be output from the three buses set in the network chip. Overall, this reduces the number of pins that need to be output from the network chip, thereby reducing the design and packaging costs of the network chip and also reducing the difficulty of downstream PCB design and routing.

[0090] Furthermore, compared to solutions that rely on a CPU and indicator light control chip to control indicator lights, the indicator light control process does not require CPU involvement. This allows the CPU to allocate more computing resources to the network device's primary services, thus improving CPU utilization and ensuring the continuity and stability of these services. Moreover, the entire indicator light control process is efficiently implemented by hardware such as port management units and CPLDs, without the need for software or CPU intervention. This results in lower data transmission latency and improved real-time performance of indicator light status control.

[0091] The indicator light control method provided in the embodiments of the present invention will be described in detail below with reference to the flowchart.

[0092] First, we will introduce the solutions for network chips used in network devices. See [link / reference] Figure 5 The above is a flowchart illustrating the first indicator light control method provided in the embodiment of the present invention. The method is applied to a network chip in a network device and includes the following steps S501-S502.

[0093] Step S501: After the port management module senses the start signal transmitted on the first bus, it counts the first number of clock signals transmitted on the second bus after the start signal.

[0094] As described above, the start signal is the starting identifier of the status information data stream, used to instruct each port management module to upload the port status information to the third bus.

[0095] In the solution provided by the embodiments of the present invention, in order to ensure that the status information uploaded by each port management module is located at a set position in the LED data frame, each port management module needs to upload the status information on the third bus according to a set timing sequence.

[0096] Therefore, each port management module needs to count the first number of clock signals transmitted on the second bus after the start signal after sensing the start signal, and use this as a basis to determine when to upload its own status information.

[0097] Step S502: After determining that the first number has reached the transmission offset configured for itself, the port management module transmits the status information of the connected ports to the third bus, so that the CPLD in the network device connected to the third bus controls the indicator lights corresponding to the ports connected to each port management module based on the status information transmitted on the third bus.

[0098] The aforementioned transmission offset is a pre-configured offset value from the aforementioned starting identifier. It can be understood that this offset value essentially determines the position of the data uploaded by each port management module in a "series" of data streams in the third bus.

[0099] The aforementioned transmission offset is measured in the time dimension by the number of received clock signals. Therefore, after determining that the first number of received clock signals has reached its corresponding transmission offset, the port management module can transmit the status information of the connected ports to the third bus. This ensures that the status information uploaded by each port management module is located at a predetermined position within the LED data frame.

[0100] When the port management module transmits the status information of the connected port to the third bus, it uploads 1 bit of status information to the third bus at each edge of the clock signal, that is, it uploads 1 bit of status information in one clock cycle.

[0101] The aforementioned status information can include various types, each reflecting a specific state of the port. See subsequent examples for details.

[0102] In one possible implementation, the port management module can encode the status information of each connected port to obtain encoded information, and then transmit the encoded information corresponding to each status information to the third bus in sequence according to the data transmission order corresponding to each status information.

[0103] In this embodiment of the invention, no specific encoding method is limited. In one case, the port management module can encode each status information as 1 bit, and the value can be 1 or 0.

[0104] In this way, the port management module encodes the port status information to facilitate data transmission. In addition, after the CPLD parses the encoded information uploaded by each port management module, it can accurately determine the port status represented by each bit in the encoded information according to the above data transmission order.

[0105] The method by which the CPLD controls the indicator lights corresponding to the ports connected to each port management module based on the status information transmitted on the third bus will be detailed in the subsequent implementation examples of the CPLD, and will not be described in detail here.

[0106] As can be seen from the above, in the indicator light control scheme provided by the embodiments of the present invention, the port management modules integrated in the network chip are connected to the first bus, the second bus and the third bus in a serial manner. After the port management module senses the start signal transmitted on the first bus, it counts the first number of clock signals transmitted on the second bus after the start signal. After determining that the first number has reached the transmission offset configured for itself, it transmits the status information of the connected port to the third bus. Thus, the CPLD in the network device can control the indicator lights corresponding to the ports connected to each port management module based on the status information transmitted on the third bus, thereby realizing the status control of the indicator lights.

[0107] As can be seen, compared to the solution where the port management module directly controls the indicator lights, the output pins of each port management module do not need to be connected to the indicator lights. Only three pins connected to the CPLD need to be output from the three buses set in the network chip. Overall, this reduces the number of pins that need to be output from the network chip, thereby reducing the design and packaging costs of the network chip and also reducing the difficulty of downstream PCB design and routing.

[0108] Furthermore, compared to solutions that rely on a CPU and indicator light control chip to control indicator lights, the indicator light control process does not require CPU involvement. This allows the CPU to allocate more computing resources to the network device's primary services, thus improving CPU utilization and ensuring the continuity and stability of these services. Moreover, the entire indicator light control process is efficiently implemented by hardware such as port management units and CPLDs, without the need for software or CPU intervention. This results in lower data transmission latency and improved real-time performance of indicator light status control.

[0109] Next, we will introduce solutions for CPLDs used in network devices. See [link / reference] Figure 6 This is a flowchart illustrating a second indicator light control method provided in an embodiment of the present invention. The method is applied to a CPLD in a network device and includes the following steps S601-S602:

[0110] Step S601: After sensing the start signal transmitted on the first bus, read the status information transmitted by each port management module from the third bus according to the transmission offset used by each port management module to transmit data to the third bus.

[0111] As can be seen from the foregoing introduction, such as Figure 4 As shown, each port management module uploads status information at different positions in the LED data frame according to the configured transmission offset. Therefore, the CPLD can also parse the status information corresponding to each port management module from the LED data frame according to the above transmission offset.

[0112] In one possible implementation, the aforementioned status information includes: the native status information of the connected port perceived by the port management module and the custom status information set.

[0113] In this embodiment of the invention, the length of the custom status information is not limited, and can be set according to the actual needs of the scenario.

[0114] In this way, the port management module can upload not only the port's native status information, but also custom status information. As a result, the CPLD can control the port's indicator lights in a more flexible way by combining the native and custom status information, which improves the flexibility of indicator light status control and helps to meet the actual needs of various scenarios.

[0115] Step S602: For each port management module, based on the first value of the set bit in the status information corresponding to the port management module, control the status of the first indicator light corresponding to the port connected to the port management module.

[0116] In one implementation, the target state corresponding to the first value can be determined directly based on the correspondence between the set value and the on / off state of the indicator light, and the first indicator light corresponding to the port connected to the port management module can be controlled to be in the target state.

[0117] For example, if the first value is 0, the first indicator light is turned on; if the first value is 1, the first indicator light is turned off.

[0118] It should be noted that when there are multiple first indicator lights to be controlled on the port, each first indicator light can be controlled based on multiple set bit positions.

[0119] In one scenario, the aforementioned multiple set bits may include: bits from the first encoded information and bits from the second encoded information. The first encoded information is the encoded information corresponding to the native status information of the port to which the port management module is connected, and the second encoded information is the encoded information corresponding to the custom status information of the port to which the port management module is connected.

[0120] In this way, on the one hand, the state of a portion of the indicator lights corresponding to a port can be controlled based on the native state information, so that the indicator light state can reflect the actual state of the port; on the other hand, the state of another portion of the indicator lights can be controlled based on the custom state information, so that the on and off of the indicator lights can be customized according to the actual needs of various scenarios, which is conducive to meeting the personalized needs of various scenarios and improving the flexibility of indicator light state control.

[0121] For example, suppose a port has two indicator lights to be controlled, denoted as indicator light A and indicator light B. Based on practical needs, operators expect indicator light A to reflect whether the port is sending a message, and expect indicator light B to be flashing to indicate that the port requires close monitoring. In this case, the bit in the first encoded information corresponding to the message sending status can be used to control the state of indicator light A, and the bit in the second encoded information that continuously flips over the time dimension can be used to control the state of indicator light B. This satisfies the requirements of the practical scenario.

[0122] In another implementation, the state of the first indicator light can be controlled in different ways depending on whether the first value and the second value are the same. The second value is the value of the bit set in the previous round of receiving state information.

[0123] If the first value and the second value are the same, the state of the first indicator light can be controlled using the previous implementation method.

[0124] If the first value differs from the second value, the system can determine whether the first indicator light meets the switching condition based on the set flashing frequency and the last time the first indicator light switched on / off. If it does, the on / off state of the first indicator light is switched. The flashing frequency mentioned above is pre-configured by the staff according to actual needs.

[0125] If the first value differs from the second value, meaning the value of the set bit in the current LED data frame differs from the value of the set bit in the previous LED data frame, then the set bit is in a blink state that is toggling in the time dimension. It's understandable that the clock frequency used to control data timing is generally high, resulting in a high toggle frequency for the set bit in the time dimension. Since the human eye may not be able to perceive excessively high blink frequencies, in this case, it's not necessary to control the indicator light to blink at the aforementioned toggle frequency; instead, it can blink at a pre-set, lower blink frequency, improving the rationality of the solution.

[0126] Specifically, the flashing interval can be obtained by calculating the reciprocal of the flashing frequency. If the interval between the moment when the first indicator light last switched on and off and the current moment is not less than the above flashing interval, the on / off state of the first indicator light can be switched.

[0127] In one possible implementation, the state of one indicator light can be controlled based on multiple set bits, which is reasonable, and no specific examples will be given here.

[0128] As can be seen from the above, in the indicator light control scheme provided by the embodiments of the present invention, the CPLD in the network chip is connected to the first bus, the second bus and the third bus. After the CPLD senses the start signal transmitted on the first bus, it can read the status information transmitted by each port management module from the third bus according to the transmission offset used by each port management module to transmit data to the third bus. Then, for each port management module, based on the first value of the set bit in the status information corresponding to the port management module, it can control the status of the first indicator light corresponding to the port connected to the port management module.

[0129] As can be seen, compared to the solution where the port management module directly controls the indicator lights, the output pins of each port management module do not need to be connected to the indicator lights. Only three pins connected to the CPLD need to be output from the three buses set in the network chip. Overall, this reduces the number of pins that need to be output from the network chip, thereby reducing the design and packaging costs of the network chip and also reducing the difficulty of downstream PCB design and routing.

[0130] Furthermore, compared to solutions that rely on a CPU and indicator light control chip to control indicator lights, the indicator light control process does not require CPU involvement. This allows the CPU to allocate more computing resources to the network device's primary services, thus improving CPU utilization and ensuring the continuity and stability of these services. Moreover, the entire indicator light control process is efficiently implemented by hardware such as port management units and CPLDs, without the need for software or CPU intervention. This results in lower data transmission latency and improved real-time performance of indicator light status control.

[0131] In one possible implementation, the custom status information includes: a first parameter stored in a first register of the network device and a second parameter stored in a second register. In this case, the port management module can encode the custom status information in the following way:

[0132] Logical operations are performed on the values ​​of the first and second bits corresponding to each identical bit position in the first and second parameters, and the value of the third bit in the encoded information corresponding to the custom state information is obtained based on the operation results.

[0133] In this way, by configuring the specific values ​​of each bit in two registers, the specific value of each bit in the custom status information can be flexibly controlled, thus improving the efficiency of setting custom status information.

[0134] The logical operation results of the values ​​of the first and second bits can reflect three cases. The specific methods for determining the value of the third bit in these three cases are described below:

[0135] If the result of the operation indicates that the values ​​of the first and second bits, which are in the same position as the third bit, are both 1, then the value of the third bit is set to 1.

[0136] Thus, the value of the third bit in the time dimension is always 1.

[0137] If the operation result indicates that the first and second bits, which are in the same position as the third bit, have values ​​of 0 and 1 respectively, then the value of the third bit is set as the target value. The target value is the inverse of the value of the third bit in the previous state information transmission round.

[0138] That is, if the value of the third bit in the previous round of status information transmission is 1, then the value of the third bit in this round is 0; conversely, if the value of the third bit in the previous round of status information transmission is 0, then the value of the third bit in this round is 1.

[0139] In this way, the value of the third bit in the time dimension keeps flipping, which can be said to mean that the third bit is in the blink state.

[0140] If the result of the operation indicates that the values ​​of the first and second bits, which are in the same position as the third bit, are both 0, then the value of the third bit is set to 0.

[0141] Thus, the value of the third bit in the time dimension is always 0.

[0142] As can be seen, the above calculation method allows for flexible control over whether each bit in the custom state information is always 1, always 0, or constantly toggling in the time dimension, thus improving the efficiency and flexibility of setting custom state information.

[0143] In one possible implementation, embodiments of the present invention also provide various configuration items for configuring port management modules. The configuration items are the same for each port management module. The functions of the above configuration items are described in detail below.

[0144] 1. LED_CFG_START_CURRENT_REG

[0145] This is used to configure the starting position of the port status information to be uploaded by the port management module in the LED data frame, specifically the offset of the first bit of the status information sent by the port management module relative to the start signal.

[0146] 2. LED_CFG_END_CURRENT_REG

[0147] This is used to configure the end position of the port status information to be uploaded by the port management module in the LED data frame, specifically the offset of the last bit of the status information sent by the port management module relative to the start signal.

[0148] 3. LED_CFG_END_GLOBAL_REG

[0149] Used to configure the end position of all data in an LED data frame, specifically the offset of the last bit in the LED data frame relative to the start signal.

[0150] It should be noted that this configuration of the port configuration module will only take effect when the port configuration module is configured as the master management module.

[0151] 4. LED_CFG_SPEED_REG

[0152] Used to configure the frequency at which the clock signal is generated on the Led_CLK bus.

[0153] 5. LED_CFG_PW_REG

[0154] The pulse width is used to configure the dynamic signal (the signal in the blink state), that is, to configure the blinking frequency of the indicator light controlled by the signal in the blink state. The specific value can be a multiple of the clock frequency.

[0155] 6. LED_CFG_EN_REG

[0156] This is used to configure whether the uploaded status information is valid. When configured to be disabled, the status information uploaded by this port management module will be invalid.

[0157] 7. LED_CFG_MASTER_INST_REG

[0158] Used to configure the main management module, which is one of all port management modules. As mentioned earlier, the main management module is responsible for generating the Led_STB and Led_CLK signals on the bus.

[0159] 8. LED_OVR_DATA_0_REG and LED_OVR_DATA_1_REG

[0160] Corresponding to the first and second parameters introduced above, their specific values ​​are set by the staff. The first and second parameters together determine the custom status information transmitted by the port management unit to the Led_DATA bus.

[0161] The lengths of LED_OVR_DATA_0_REG and LED_OVR_DATA_1_REG can be 32 bits, etc.

[0162] The following example illustrates a specific format of encoded information transmitted by the port management module on the Led_DATA bus, using 8 bits for native status information and 32 bits for custom status information.

[0163] See Figure 7 This illustrates a specific format of the encoded information transmitted by the port management module on the Led_DATA bus, where numerical labels represent individual bits. It can be seen that the encoded information includes several fields, the position of each field as shown in the figure. The first eight fields are the interface's native status information, each 1 bit long. The last field is the interface's custom status information, 32 bits long (i.e., bits 8 to 40). The specific meanings of each field are as follows:

[0164] 1. xge_link_en

[0165] Used to identify three states:

[0166] If the value is 1, it means that the interface is in the linkup state and the receive or transmit function is enabled; if the value is 0, it means that the interface is disabled in the receive or transmit function; if the value is in the blink state, it means that the interface is in the linkdown state and the receive or transmit function is enabled.

[0167] 2. xge_link_act

[0168] Used to identify the active status of the interface link:

[0169] If the value is 1, it means the interface is linked up but no messages are being sent or received; if the value is 0, it means the interface is in the linkdown state; if the value is in the blink state, it means the interface is linked up and messages are being sent and received.

[0170] 3. xge_act_rx_tx

[0171] Used to identify the status of message sending and receiving at the interface:

[0172] If the value is 1, it indicates that a message is being sent or received from the interface; if the value is 0, it indicates other situations.

[0173] 4. xge_act_rx

[0174] Used to identify the status of received messages:

[0175] A value of 1 indicates that a message has been received; a value of 0 indicates that no message has been received.

[0176] 5. xge_act_tx

[0177] Used to identify the status of a sent message:

[0178] A value of 1 indicates that a message has been sent; a value of 0 indicates that no message has been sent.

[0179] 6. xge_err_rx

[0180] Used to identify whether the interface has received an error message:

[0181] If the value is 1, it means that an error message has been received; if the value is 0, it means that no error message has been received.

[0182] 7. xge_fc_tx

[0183] Used to identify the flow control sending status of the interface:

[0184] If the value is 1, it means that a flow control message has been sent; if the value is 0, it means that no flow control message has been sent.

[0185] 8. xge_link

[0186] Used to identify the link status of the interface:

[0187] If the value is 1, it means the interface is in the linkup state; if the value is 0, it means the interface is in the linkdown state.

[0188] 9. led_override_out

[0189] It consists of 32 bits, and the method for determining the value of each bit has been introduced earlier and will not be repeated here.

[0190] It should be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0191] The various embodiments in this specification are described in a related manner. Similar or identical parts between embodiments can be referred to mutually. Each embodiment focuses on describing the differences from other embodiments. In particular, the network device embodiments are basically similar to the method embodiments, so the description is relatively simple; relevant parts can be referred to the descriptions of the method embodiments.

[0192] The above description is merely a preferred embodiment of the present invention and is not intended to limit the scope of protection of the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention are included within the scope of protection of the present invention.

Claims

1. A method for controlling an indicator light, characterized in that, A network chip used in network devices, the network chip integrating multiple port management modules, the multiple port management modules being serially connected to a first bus, a second bus, and a third bus provided in the network chip, each port management module being connected to one port of the network device, the method comprising: After the port management module senses the start signal transmitted on the first bus, it counts the first number of clock signals transmitted on the second bus after the start signal. After determining that the first number has reached the transmission offset configured for itself, the port management module transmits the status information of the connected ports to the third bus, so that the complex programmable logic device (CPLD) connected to the third bus in the network device controls the indicator lights corresponding to the ports connected to each port management module based on the status information transmitted on the third bus. The transmission offset is different for each port management module.

2. The method according to claim 1, characterized in that, The port management module transmits the status information of the connected ports to the third bus, including: The port management module encodes the status information of each connected port to obtain encoded information; The port management module transmits the encoded information corresponding to each status information to the third bus in the order of data transmission of each status information.

3. The method according to claim 2, characterized in that, The status information includes: the native status information of the connected ports sensed by the port management module and the custom status information set.

4. The method according to claim 3, characterized in that, The custom status information includes: a first parameter stored in the first register of the network device and a second parameter stored in the second register. The port management module encodes the custom status information in the following manner: Logical operations are performed on the values ​​of the first and second bits corresponding to each identical bit position in the first and second parameters, and the value of the third bit in the encoding information corresponding to the custom state information is obtained based on the operation results.

5. The method according to claim 4, characterized in that, The port management module obtains the value of each third bit in the encoded information corresponding to the custom status information in the following manner: If the result of the operation indicates that the values ​​of the first and second bits, which are in the same position as the third bit, are both 1, then the value of the third bit is set to 1. If the operation result indicates that the first and second bits, which are in the same position as the third bit, have values ​​of 0 and 1, then the value of the third bit is set as the target value, wherein the target value is the inverse code of the value of the third bit in the previous state information transmission round. If the result of the operation indicates that the values ​​of the first and second bits, which are in the same position as the third bit, are both 0, then the value of the third bit is set to 0.

6. The method according to any one of claims 1-5, characterized in that, The method further includes: The port management module, configured as the main management module, generates a start signal on the first bus at a set first frequency and a clock signal on the second bus at a set second frequency.

7. A method for controlling an indicator light, characterized in that, A CPLD is used in a network device, wherein the network chip in the network device integrates multiple port management modules, each port management module is connected to one port of the network device, the CPLD is connected to a first bus, a second bus, and a third bus set in the network chip, and the CPLD is connected to an indicator light corresponding to each port of the network device. The method includes: After sensing the start signal transmitted on the first bus, the status information transmitted by each port management module is read from the third bus according to the transmission offset used by each port management module to transmit data to the third bus. The transmission offset is different for each port management module. For each port management module, the state of the first indicator light corresponding to the port connected to the port is controlled based on the first value of the set bit in the status information of the port management module.

8. The method according to claim 7, characterized in that, The control of the state of the first indicator light corresponding to the port connected to the port management module includes: If the first value is the same as the second value of the set bit in the previous state information receiving round, then the target state corresponding to the first value is determined directly according to the correspondence between the set value and the on / off state of the indicator light, and the first indicator light corresponding to the port connected to the port management module is controlled to be in the target state. If the first value is different from the second value, then based on the set flashing frequency and the time when the first indicator light last switched on and off, it is determined whether the first indicator light meets the switching condition. If it does, then the on / off state of the first indicator light is switched.

9. The method according to claim 7 or 8, characterized in that, The status information transmitted by the port management module is encoded information. The encoded information corresponding to the port management module has multiple set bits, including bits in the first encoded information and bits in the second encoded information. The first encoded information is the encoded information corresponding to the native status information of the port connected to the port of the port management module, and the second encoded information is the encoded information corresponding to the custom status information of the port connected to the port of the port management module. The port connected to the port of the port management module corresponds to multiple first indicator lights to be controlled. The first value of each set bit is used to control the status of one first indicator light. The control of the state of the first indicator light corresponding to the port connected to the port management module based on the first value includes: For each set bit, the state of the first indicator light corresponding to that set bit is controlled by the first value.

10. A network device, characterized in that, The device includes a network chip and a CPLD. The network chip integrates multiple port management modules, which are serially connected to a first bus, a second bus, and a third bus within the network chip. Each port management module is connected to one port of the network device. The CPLD is connected to the first, second, and third buses, and is also connected to an indicator light corresponding to each port of the network device. Each port management module is used to count the first number of clock signals transmitted on the second bus after the start signal after sensing the start signal transmitted on the first bus; after determining that the first number has reached the transmission offset configured for itself, it transmits the status information of the connected port to the third bus, wherein the transmission offset corresponding to each port management module is different. The CPLD is used to sense the start signal transmitted on the first bus, and read the encoded information transmitted by each port management module from the third bus according to the transmission offset used by each port management module to transmit data to the third bus; for each port management module, it reads the first value of the set bit in the encoded information corresponding to the port management module, and controls the state of the first indicator light corresponding to the port connected to the port management module based on the first value.

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