Manufacturing method for structural layer in large-area structure

By adopting a process route of one-step photolithography + cleaning between photolithography stages + two-step photolithography, the problems of photoresist adhesion and residual adhesive in large-area structures are solved, improving pattern accuracy and cleanliness, reducing the probability of short circuits in metal wires, and enhancing the processing quality and electrical performance of large-area electronic circuits.

CN121454872APending Publication Date: 2026-02-03TSINGHUA UNIVERSITY
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Patent Information

Application Number
CN202511587752.7
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-10-31
Publication Date
2026-02-03

AI Technical Summary

Technical Problem

Existing photolithography processes for large-area structures suffer from problems such as photoresist adhesion, residual photoresist buildup, poor precision of small-pitch patterns, and easy short circuits in metal wires, which affect the processing quality and electrical performance of devices.

Method used

The process route of one-stage photolithography + photolithography cleaning + two-stage photolithography is adopted. By using the edge-enlarged two-stage photolithography mask design, combined with the photolithography cleaning process, the pattern accuracy and cleanliness are improved, and the probability of short circuits in metal wires is reduced.

Benefits of technology

It improves the pattern precision of large-area structural layers, reduces the short-circuit probability of small-pitch wires, ensures the stability of photolithography process and the electrical performance of devices, and improves the yield of large-area electronic circuits.

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Abstract

The invention relates to a manufacturing method for a structural layer in a large-area structure, and the method comprises the steps: for a target structural layer which needs to be prepared through patterning in the large-area structure comprising at least one structural layer, firstly preparing a first material layer above the currently prepared structural layer or substrate of the large-area structure, and then coating a first photoresist; transferring the pattern of the first mask to the first photoresist, etching the exposed first redundant part of the first material layer to obtain a second material layer, removing the residual first photoresist, and performing inter-photoetching cleaning for the currently prepared structure; coating a second photoresist on the upper part of the currently prepared structure; after the pattern of the second mask is transferred to the second photoresist, the exposed redundant material layer is etched, and the remaining second photoresist is removed to obtain a target structure layer; the pattern of the second mask is the same as that of the first mask, and the pattern size is larger than that of the first mask. And the pattern precision of the target structure layer is improved.
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Description

Technical Field

[0001] This disclosure relates to the field of semiconductor manufacturing, and more particularly to a method for manufacturing structural layers in large-area structures. Background Technology

[0002] In the fabrication of large-area devices and circuits such as thin-film transistors, bioelectrode arrays, and in-memory computing circuit arrays, photolithography is a common process for large-area structure fabrication, enabling relatively fine pattern processing. However, the photolithography process applied to large-area structures suffers from serious problems such as photoresist adhesion, residual photoresist buildup, and poor precision in fine-pitch patterns, which are technical problems that urgently need to be solved. Summary of the Invention

[0003] In view of this, this disclosure proposes a method for manufacturing structural layers in large-area structures.

[0004] According to one aspect of this disclosure, a method for manufacturing structural layers in a large-area structure is provided, the large-area structure including at least one structural layer, the method being used to fabricate target structural layers in each of the structural layers that need to be patterned, the method comprising:

[0005] A first material layer is prepared on top of the bottom layer, and a first photoresist is coated on top of the first material layer. The bottom layer includes the structural layer or substrate that has been prepared for the large area structure.

[0006] The pattern of the first mask is transferred onto the first photoresist, and the first redundant portion of the first material layer that is not covered by the patterned first photoresist is etched to obtain the second material layer. The second material layer includes the target structure layer located below the patterned first photoresist and the redundant material layer in the first redundant portion of the first material layer that has not been etched away.

[0007] Remove the remaining first photoresist and perform inter-photolithography cleaning for the currently fabricated structure;

[0008] A second photoresist is coated over the currently fabricated structure;

[0009] The pattern of the second mask is transferred onto the second photoresist, and the redundant material layer of the second material layer that is not masked by the patterned second photoresist is etched to remove the remaining second photoresist and obtain the target structure layer.

[0010] The second mask has the same pattern as the first mask, and the pattern size of the second mask is larger than that of the first mask.

[0011] In one possible implementation, the pattern of the second mask has a target size difference from the pattern of the first mask;

[0012] The target size difference is the edge distance between the pattern edge of the second mask and the pattern edge of the first mask.

[0013] In one possible implementation, the target size difference is determined based on the minimum pattern line spacing corresponding to the pattern of the first mask, the minimum process line spacing allowed by the photolithography process, the thickness of the first material layer, and the maximum alignment deviation of the photolithography process.

[0014] In one possible implementation, the target size difference is greater than or equal to the sum of the maximum alignment deviation and n times the thickness of the first material layer, and the target size difference is less than or equal to half the difference between the minimum pattern line spacing and the minimum process line spacing.

[0015] In one possible implementation, the maximum alignment deviation of the photolithography process is determined based on the alignment accuracy of the alignment pattern of the photolithography and the alignment accuracy of the photolithography process.

[0016] In one possible implementation, photolithographic cleaning is performed on the currently fabricated structure, including:

[0017] The currently prepared structure is rinsed with developer within a preset time interval, and the rinsing time is guaranteed to reach the preset rinsing time, so as to remove the residual first photoresist that was not removed during the development process.

[0018] The residual developer on the currently prepared structure is soaked and rinsed with deionized water, and the currently prepared structure is then dried.

[0019] In one possible implementation, the inter-lithographic cleaning of the currently fabricated structure further includes:

[0020] The impurities adhering to the currently prepared structure are dissolved using an organic solvent and then removed by physical peeling.

[0021] The organic solvent remaining on the currently prepared structure is rinsed off with deionized water, and the currently prepared structure is then dried.

[0022] In one possible implementation, the inter-lithographic cleaning of the currently fabricated structure further includes:

[0023] The currently prepared structure is cleaned using an ultraviolet ozone cleaner, and the cleaning time reaches the preset cleaning time.

[0024] In one possible implementation, the drying process includes blowing and / or baking.

[0025] In one possible implementation, the method further includes:

[0026] After removing the remaining second photoresist, if it is determined that the next target structure layer needs to be prepared by photolithography, a photolithographic cleaning is performed for the currently prepared structure.

[0027] The method for manufacturing a structural layer in a large-area structure provided in this disclosure, for a target structural layer that needs to be fabricated by patterning in a large-area structure including at least one structural layer, firstly, a first material layer is fabricated on top of a currently fabricated structural layer or substrate in the large-area structure, and a first photoresist is coated on top of the first material layer; the pattern of a first mask is transferred to the first photoresist, and a first redundant portion of the first material layer that is not masked by the patterned first photoresist is etched to obtain a second material layer, the second material layer including the target structural layer to be fabricated and a redundant material layer in the first material layer whose first redundant portion has not been etched away; the remaining first photoresist is removed, and photolithographic cleaning is performed for the currently fabricated structure; a second photoresist is coated on top of the currently fabricated structure; the pattern of a second mask is transferred to the second photoresist, and the redundant material layer of the second material layer that is not masked by the patterned second photoresist is etched to remove the remaining second photoresist, to obtain the target structural layer; wherein, the pattern of the second mask is the same as that of the first mask, and the size of the second mask is larger than that of the first mask. This improved the pattern accuracy of the obtained target structural layers. For conductive structural layers such as metal wire layers, a process route of one-step photolithography + inter-photolithography cleaning + two-step photolithography was adopted to solve the problem of short circuits in metal wires during photolithography, significantly reducing the probability of short circuits in small-pitch wires. The edge-enlarged secondary photolithography mask design solved the problem of over-etching during the etching process, ensuring that photolithography would not cause further pattern distortion. The inter-photolithography cleaning process improved the cleanliness of the surface of large-area structural layers during photolithography, reducing the defect density to the theoretical calculation level.

[0028] Other features and aspects of this disclosure will become clear from the following detailed description of exemplary embodiments with reference to the accompanying drawings. Attached Figure Description

[0029] The accompanying drawings, which are included in and form part of this specification, illustrate exemplary embodiments, features, and aspects of this disclosure together with the specification and serve to explain the principles of this disclosure.

[0030] Figure 1 This diagram illustrates a patterned metal layer fabrication process based on etching in related technologies.

[0031] Figure 2 This diagram illustrates a process for fabricating patterned metal layers based on a lift-off process in related technologies.

[0032] Figure 3 A microscope image showing photoresist adhesion is shown.

[0033] Figure 4 This diagram illustrates a situation of excess metal in a small-pitch metal line pattern.

[0034] Figure 5 A flowchart illustrating a method for manufacturing a structural layer in a large-area structure according to an embodiment of the present disclosure is shown.

[0035] Figure 6 A schematic flowchart of a method for manufacturing a structural layer in a large-area structure according to an embodiment of the present disclosure is shown.

[0036] Figure 7 The images show comparison images before and after photolithography cleaning in a method for manufacturing structural layers in a large-area structure according to an embodiment of the present disclosure.

[0037] Figure 8 This diagram illustrates a comparison between a second mask and a first mask in a method for manufacturing a structural layer in a large-area structure according to an embodiment of the present disclosure.

[0038] Figure 9 This diagram illustrates a comparison between a patterned second photoresist and a target structural layer in a method for manufacturing a structural layer in a large-area structure according to an embodiment of the present disclosure.

[0039] Figure 10 This diagram illustrates a comparison between a metal conductive layer manufactured according to an embodiment of the present disclosure for a structural layer in a large-area structure and a metal conductive layer manufactured in related technologies. Detailed Implementation

[0040] Various exemplary embodiments, features, and aspects of this disclosure will now be described in detail with reference to the accompanying drawings. The same reference numerals in the drawings denote elements that have the same or similar functions. Although various aspects of the embodiments are shown in the drawings, they are not necessarily drawn to scale unless specifically indicated otherwise.

[0041] As used herein, the terms “comprising,” “including,” “having,” or variations thereof are open-ended and include one or more of the stated features, integrals, elements, steps, components, or functions, but do not exclude the presence or addition of one or more other features, integrals, elements, steps, components, functions, or groups thereof.

[0042] When an element is referred to as “connected,” “coupled,” “responding,” or a variation thereof relative to another element, it may be directly connected, coupled, or responding to another element, or there may be an intermediate element present.

[0043] Although the terms first, second, third, etc., may be used herein to describe various elements / operations, these elements / operations should not be limited by these terms. These terms are only used to distinguish one element / operation from another. Therefore, without departing from the teachings of the inventive concept, a first element / operation in some embodiments may be referred to as a second element / operation in other embodiments.

[0044] The term “exemplary” as used herein means “serving as an example, embodiment, or illustration.” Any embodiment illustrated herein as “exemplary” is not necessarily to be construed as superior to or better than other embodiments.

[0045] Furthermore, to better illustrate this disclosure, numerous specific details are set forth in the following detailed description. Those skilled in the art will understand that this disclosure can be practiced without certain specific details. In some instances, methods, means, components, and circuits well known to those skilled in the art have not been described in detail in order to highlight the main points of this disclosure.

[0046] In related technologies, taking the fabrication of patterned metal layers in large-area structures as an example, the methods for fabricating patterned metal layers using photolithography include: Figure 1 Method 1 based on etching process is shown. Figure 2 The second method is based on the lifting process.

[0047] Method 1:

[0048] like Figure 1 As shown, in etching-based photolithography, a metal layer is first prepared on the substrate, followed by spin-coating of photoresist. Using a stepper or scanner system, the pattern on the mask is aligned with the photoresist, and then a specific light source is used to illuminate the photoresist to achieve pattern transfer, forming a potential pattern within the photoresist. Pre-baking is then performed (activating the photoacid catalyst (PAG) in the chemically amplified photoresist, promoting the deprotection reaction of the resin, reducing standing wave effects, and homogenizing the pattern). Excess photoresist is then removed using a developer, and the patterned photoresist is used as a barrier to etch the metal layer, transferring the pattern into the metal layer. Finally, the remaining photoresist is removed.

[0049] Method 2:

[0050] like Figure 2As shown, in lift-off lithography, photoresist is first spin-coated onto the substrate. Using a stepper projection or scanning system, the pattern on the photomask is aligned with the photoresist, and then the photoresist is illuminated with a specific light source to achieve pattern transfer, forming a potential pattern in the photoresist, followed by pre-baking. Excess photoresist is removed using a developer, and then metal is deposited to cover the patterned photoresist and the substrate. Finally, the photoresist and the metal layer on it are lifted off the substrate.

[0051] However, both methods of preparing metal layers have the following problems:

[0052] 1. Photoresist adhesion is a serious problem. Photoresist is typically a viscous liquid formed by dissolving photosensitive resin and sensitizer in a specific solution. Suboptimal storage environments, contamination during packaging and use can all cause the photoresist to clump, form particles, or exhibit other non-uniform properties. Non-uniform photoresist, after the photolithography process, results in a pattern that does not accurately reflect the pattern of the photomask. For example… Figure 3 As shown, photoresist adhesion problems often occur at the clumps and particles of photoresist.

[0053] 2. Photoresist residue easily adheres to the sample. In large-area photolithography processes, the development step generates a large amount of photoresist residue. These residues are highly adhesive, easily adhering to the sample surface and are difficult to remove. Whether in lift-off or etching processes, these photoresist residues will affect the processing of metal patterns, leading to pattern defects or excesses.

[0054] 3. Small-pitch metal interconnect patterns are prone to short circuits. In the fabrication of array circuit structures, high-throughput, high-density interconnect networks need to be arranged within the metal patterns. If etching processes are used, the photoresist adhesion and residual photoresist problems inherent in conventional photolithography processes will lead to an overabundance of metal patterns. When there is an overabundance of metal patterns between interconnects, short circuits can easily occur between two interconnects. Figure 4 The short circuit shown can affect the normal operation of the pixel circuits in the entire row, column, and even the entire array.

[0055] 4. Figure 2 The metal pattern formed by the lift-off process shown has uneven edges. Although the lift-off process can solve the problem of short circuits in metal line patterns, as long as the photoresist is not missing, the edge smoothness of the metal pattern depends entirely on the edge smoothness of the photoresist because the lift-off process first prepares the photoresist pattern and then the metal layer. In semiconductor device fabrication, the edge smoothness of the metal directly affects the carrier behavior interface, and thus affects the electrical performance of the device. Semiconductor devices (such as thin-film transistors) fabricated by the lift-off process are prone to non-ideal electrical characteristics.

[0056] 5. Figure 1The etching process shown is prone to "over-etching." Wet etching, commonly used in metal etching, has almost no directional selectivity. Lateral etching can cause the actual size of the metal pattern to be smaller than the size of the photoresist, i.e., over-etching. If the over-etching time is too long, it can lead to severe distortion of the metal pattern, and even abnormalities such as broken lines that damage the circuit structure. Therefore, the etching process requires strict control of the process time, or measures must be taken to avoid over-etching.

[0057] How to provide a solution to the above-mentioned technical problems is an urgent technical issue to be addressed.

[0058] To address the aforementioned technical problems, this disclosure provides a method for manufacturing a structural layer in a large-area structure. For a target structural layer in a large-area structure comprising at least one structural layer that needs to be fabricated through patterning, a first material layer is first fabricated on top of a currently fabricated structural layer or substrate in the large-area structure, and a first photoresist is coated on top of the first material layer. The pattern of a first mask is transferred onto the first photoresist, and a first redundant portion of the first material layer not covered by the patterned first photoresist is etched to obtain a second material layer. The second material layer includes the target structural layer to be fabricated and a redundant material layer in the first material layer whose first redundant portion has not been etched away. The remaining first photoresist is removed, and photolithographic cleaning is performed on the currently fabricated structure. A second photoresist is coated on top of the currently fabricated structure. The pattern of a second mask is transferred onto the second photoresist, and the redundant material layer of the second material layer not covered by the patterned second photoresist is etched to remove the remaining second photoresist, resulting in the target structural layer. The second mask has the same pattern as the first mask, and the size of the second mask is larger than the size of the first mask. This improved the pattern accuracy of the obtained target structural layers. For conductive structural layers such as metal wire layers, a process route of one-step photolithography + inter-photolithography cleaning + two-step photolithography was adopted to solve the problem of short circuits in metal wires during photolithography, significantly reducing the probability of short circuits in small-pitch wires. The edge-enlarged secondary photolithography mask design solved the problem of over-etching during the etching process, ensuring that photolithography would not cause further pattern distortion. The inter-photolithography cleaning process improved the cleanliness of the surface of large-area structural layers during photolithography, reducing the defect density to the theoretical calculation level.

[0059] like Figure 5 , Figure 6As shown, the method for manufacturing structural layers in a large-area structure provided in this disclosure includes steps S101-S105. The large-area structure includes at least one structural layer, and the method is used to fabricate target structural layers that require patterning in each of the structural layers. The large-area structure can be a large-area semiconductor structure such as a bioelectrode array, a large-area thin-film transistor, or a memory computing circuit array; this disclosure does not limit this. The following is combined with… Figure 5 , Figure 6 The implementation method of manufacturing structural layers in large-area structures is explained.

[0060] like Figure 5 , Figure 6 As shown, in step S101, a first material layer is prepared above the bottom layer, and a first photoresist is coated on the first material layer. The bottom layer includes the structural layer or substrate that the large-area structure has already been prepared.

[0061] The material used in the first material layer can be based on the target structural layer to be prepared. This material can be a conductive material such as a metal. The target structural layer can be a metal interconnect layer (used to realize electrical connections between layers and devices in a large-area structure), an electrode layer (such as a bioelectrode array with a certain shape, or the source, gate, and drain electrode layers of each transistor in a transistor array), a pad layer, etc., and this disclosure does not limit this. The preparation of the first material layer can be carried out through physical deposition or chemical deposition processes depending on the material, and this disclosure does not limit this. The coating of the first photoresist can be done by spin coating, spray coating, etc., and this disclosure does not limit this.

[0062] like Figure 5 , Figure 6 As shown, in step S102, the pattern of the first mask is transferred onto the first photoresist, and the first redundant portion of the first material layer that is not covered by the patterned first photoresist is etched to obtain the second material layer. The second material layer includes the target structure layer located below the patterned first photoresist and the redundant material layer in the first redundant portion of the first material layer that has not been etched away.

[0063] The process involves aligning the pattern of a first photomask with the underlying layer using a step-projection or scanning system based on a pre-defined alignment pattern. A specific light source is then used to illuminate the first photoresist to transfer the pattern, forming a potential pattern within the photoresist. The pattern of the first photomask matches the pattern of the target structural layer. After pre-baking, excess first photoresist (i.e., removing photoresist not obscured by the pattern on the first photomask) is removed using a developer, resulting in patterned first photoresist (with a pattern identical to the first photomask). The patterned first photoresist is the opposite of the excess first photoresist. To remove photoresist residue generated during development, it can be rinsed off immediately after development. However, during the removal of excess first photoresist, some residue may remain on the first material layer due to adhesion, forming residual first photoresist outside the patterned first photoresist pattern. The second material layer is obtained by etching the first material layer based on the patterned first photoresist and the residual first photoresist. This second material layer naturally includes the target structure layer located beneath the patterned first photoresist, as well as the redundant material layer that was not etched away from the first redundant portion of the first material layer. This step achieves the fabrication of the target structure layer through patterning; only the redundant material layer needs to be removed.

[0064] like Figure 5 , Figure 6 As shown, in step S103, the remaining first photoresist is removed, and photolithography cleaning is performed for the currently fabricated structure.

[0065] In step S102, although the second material layer is obtained, there may still be photoresist residues and impurities introduced during the processing attached to the substrate, the patterned first photoresist, and the second material layer. Additionally, there may still be residual first photoresist. Therefore, after removing the remaining first photoresist, it is necessary to perform photolithography cleaning of the currently prepared structure.

[0066] In one possible implementation, the photolithographic cleaning of the currently fabricated structure may include: after removing the patterned first photoresist, rinsing the currently fabricated structure with a developing solution within a preset time interval, ensuring the rinsing time reaches the preset rinsing duration, to remove residual first photoresist not removed during the developing process. During this rinsing process, the entire currently fabricated structure must remain moist. Subsequently, the remaining developing solution on the currently fabricated structure is soaked and rinsed with deionized water, and the currently fabricated structure is dried. The preset time interval, preset rinsing duration, and soaking and rinsing durations of the deionized water can be set according to the actual materials of the first material layer and the first photoresist to ensure complete removal of the first photoresist; this disclosure does not impose limitations on this. For example, the preset time interval, preset rinsing duration, and soaking and rinsing durations of the deionized water can be 5s, 10s, 10s, and 10s, respectively.

[0067] In one possible implementation, the photolithographic cleaning of the currently fabricated structure may further include: dissolving impurities adhering to the currently fabricated structure using an organic solvent and removing the impurities by physical stripping; rinsing the remaining organic solvent on the currently fabricated structure with deionized water and drying the currently fabricated structure.

[0068] The organic solvent can be selected based on the types of impurities that may exist on the currently prepared structure, so that the impurities (such as sticky impurities) can dissolve in the organic solvent and be carried away from the surface of the currently prepared structure by the organic solvent during the soaking process. The impurities can then be removed by physical peeling, which can be done by circulating a brush or wiping in a set direction, etc., and this disclosure is not limited in this regard. The brush material can be a dust-free microfiber or other material that can remove impurities without introducing new impurities and without scratching the currently prepared structure, and this disclosure is not limited in this regard. Afterwards, the remaining organic solvent on the currently prepared structure is rinsed with deionized water. The rinsing time can be set according to the organic solvent, such as rinsing for 10 seconds, and this disclosure is not limited in this regard.

[0069] In one possible implementation, the photolithography cleaning of the currently fabricated structure may further include: cleaning the currently fabricated structure using an ultraviolet ozone cleaner, and the cleaning time reaching a preset cleaning duration. The preset cleaning duration may be 10 minutes, etc., and can be set according to actual needs; this disclosure does not limit this. This removes organic contaminants from the currently fabricated structure.

[0070] In one possible implementation, the drying process may include blowing and / or drying. The duration of blowing and / or drying can be set as needed to ensure that the currently prepared structure is completely dry, and this disclosure is not limiting in this regard.

[0071] In this way, the above-described photolithography cleaning steps can remove various impurities and residual first photoresist from the currently fabricated structure, and also expose redundant material layers for subsequent etching removal. Figure 7 As shown, cleaning between photolithography steps can significantly improve the surface cleanliness of currently fabricated structures, removing sticky impurities and exposing redundant material layers.

[0072] like Figure 5 , Figure 6 As shown, in step S104, a second photoresist is coated over the currently fabricated structure. The coating of the second photoresist can be spin-coated or spray-coated, and the material of the second photoresist can be the same as or different from the first photoresist; this disclosure does not impose any limitations on this.

[0073] like Figure 5 , Figure 6 As shown, in step S105, the pattern of the second mask is transferred onto the second photoresist, and the redundant material layer of the second material layer that is not masked by the patterned second photoresist is etched to remove the remaining second photoresist and obtain the target structure layer.

[0074] The implementation process of step S105 is similar to the implementation of removing the remaining first photoresist in steps S102 and S103, and can be referred to above, so it will not be repeated here.

[0075] In this embodiment, to ensure the accuracy of the target structural layer, the second photomask has the same pattern as the first photomask, and the pattern size of the second photomask is larger than that of the first photomask. The pattern size refers to the size of the pattern on the photomask. This is to prevent over-etching and damage to the target structural layer during the second photolithography process.

[0076] In one possible implementation, the pattern of the second mask has a target size difference from the pattern of the first mask; wherein, as... Figure 8 As shown, the target size difference is the edge distance d between the pattern edge of the second mask and the pattern edge of the first mask. This ensures that the patterned second photoresist obtained based on the second mask can completely cover the target structural layer and that the edges have sufficient distance from the edges of the target structural layer, avoiding damage to the target structural layer due to over-etching during the removal of redundant material layers, and also improving the alignment redundancy of the mask.

[0077] In one possible implementation, the target size difference is based on the pattern of the first mask, such as... Figure 8 The minimum pattern line spacing r, the minimum process line spacing allowed by the photolithography process, the thickness of the first material layer, and the maximum alignment deviation of the photolithography process are all determined.

[0078] In some embodiments, the target size difference is greater than or equal to the sum of the maximum alignment deviation and n times the thickness of the first material layer, and the target size difference is less than or equal to half the difference between the minimum pattern line spacing and the minimum process line spacing, that is:

[0079] (ΔL+n*t) m )≤d≤(rr) min ) / 2

[0080] Where ΔL represents the maximum alignment deviation in the photolithography process. m r represents the thickness of the first material layer. min This is the minimum line spacing allowed in the photolithography process. In some embodiments, n can be set according to the thickness of the first material layer, etc., so that the edge of the patterned second photoresist can have sufficient distance from the edge of the target structural layer, avoiding damage to the target structural layer due to over-etching during the removal of redundant material layers.

[0081] In some embodiments, the maximum alignment deviation ΔL of the photolithography process can be determined based on the pattern alignment accuracy of the photolithographic alignment pattern and the alignment accuracy of the photolithography process used.

[0082] For example, such as Figure 9 The example shown uses the alignment accuracy of the alignment pattern based on photolithography and the alignment accuracy of the photolithography process to determine ΔL = 0.5 μm, t m =50nm, r=10μm, r min =6μm, based on t m =50nm, set n=10, then: (ΔL+n*t) m =1μm, (rr) min Since 1μm / 2 = 2μm, or 1μm ≤ d ≤ 2μm, then d can be taken as 1μm. After transferring the pattern of the second mask to the second photoresist, the patterned second photoresist can completely cover the target structure layer, and the target size difference between the edges of the patterned second photoresist and the edges of the target structure layer is d = 1μm, which can protect the target structure layer in subsequent etching. Furthermore, as... Figure 10 As shown, based on the above Figure 1The metal conductor layer 1 prepared by the method shown is of significantly better quality than the metal conductor layer 2 prepared by the method provided in this disclosure embodiment based on "d=1μm".

[0083] Moreover, in such Figure 10 In the example shown, the total area of ​​the pattern on the first mask is A, the average area of ​​the first photoresist adhesion and residual is B, and the number density of adhesion and residual on the surface of the currently fabricated structure is n1. In 1 Under the condition of n1B, the density of excess metal points after secondary photolithography can be approximately calculated as follows:

[0084] n2=n1 2 B

[0085] It can be seen that as long as 1 is satisfied n1B, that is, n2 n1. In this actual example, A≈10 4 mm 2 B≈10 -3 mm 2 n1≈2×10 -3 mm -2 Substituting the values, we can see that for a 10cm × 10cm sample, the number of excess metal points under conventional etching is approximately 20; after secondary photolithography etching, the number of excess metal points is reduced to 4 × 10. -5 .

[0086] As can be seen, when the target structural layer is made of metal, the method provided in this disclosure can solve the problem of metal over-etching in large-area metal pattern photolithography, thus improving the quality of the photolithographic pattern. It significantly reduces the short-circuit probability of small-pitch metal interconnects in photolithography, improving the yield of large-area, large-scale electronic circuit processes. Through mask design, inter-photolithography cleaning, and other related design and process details in the two photolithography processes, problems such as over-etching and contamination caused by secondary photolithography are avoided. It is suitable for the fabrication of large-area electronic circuits, ensuring the stability of metal patterns under large-area processes. It is suitable for the fabrication of large-scale devices and circuit arrays, improving the yield of arrays with tens of thousands or more pixels. Furthermore, it supports the processing of high-density metal interconnects with a minimum line pitch of 5 micrometers, significantly reducing the probability of short circuits between interconnects. It is also applicable to electronic device and circuit processes on glass substrates and PI flexible substrates, and can be applied to flexible circuit processing.

[0087] It should be noted that although the above embodiments have been used as examples to illustrate the manufacturing method of structural layers in large-area structures, those skilled in the art will understand that this disclosure is not limited thereto. In fact, users can flexibly set each step according to their personal preferences and / or actual application scenarios, as long as it conforms to the technical solution of this disclosure.

[0088] The various embodiments of this disclosure have been described above. These descriptions are exemplary and not exhaustive, nor are they limited to the disclosed embodiments. Many modifications and variations will be apparent to those skilled in the art without departing from the scope and spirit of the described embodiments. The terminology used herein is chosen to best explain the principles, practical application, or technical improvements to the embodiments in the market, or to enable others skilled in the art to understand the embodiments disclosed herein.

Claims

1. A method for manufacturing structural layers in large-area structures, characterized in that, The large-area structure includes at least one structural layer, and the method is used to prepare target structural layers that need to be patterned in each of the structural layers. The method includes: A first material layer is prepared on top of the bottom layer, and a first photoresist is coated on top of the first material layer. The bottom layer includes the structural layer or substrate that has been prepared for the large area structure. The pattern of the first mask is transferred onto the first photoresist, and the first redundant portion of the first material layer that is not covered by the patterned first photoresist is etched to obtain the second material layer. The second material layer includes the target structure layer located below the patterned first photoresist and the redundant material layer in the first redundant portion of the first material layer that has not been etched away. Remove the remaining first photoresist and perform inter-photolithography cleaning for the currently fabricated structure; A second photoresist is coated over the currently fabricated structure; The pattern of the second mask is transferred onto the second photoresist, and the redundant material layer of the second material layer that is not masked by the patterned second photoresist is etched to remove the remaining second photoresist and obtain the target structure layer. The second mask has the same pattern as the first mask, and the pattern size of the second mask is larger than that of the first mask.

2. The method according to claim 1, characterized in that, The pattern of the second mask has a target size difference from the pattern of the first mask; The target size difference is the edge distance between the pattern edge of the second mask and the pattern edge of the first mask.

3. The method according to claim 2, characterized in that, The target size difference is determined based on the minimum pattern line spacing corresponding to the pattern of the first mask, the minimum process line spacing allowed by the photolithography process, the thickness of the first material layer, and the maximum alignment deviation of the photolithography process.

4. The method according to claim 3, characterized in that, The target size difference is greater than or equal to the sum of the maximum alignment deviation and n times the thickness of the first material layer, and the target size difference is less than or equal to half the difference between the minimum pattern line spacing and the minimum process line spacing.

5. The method according to claim 3 or 4, characterized in that, The maximum alignment deviation of the photolithography process is determined based on the alignment accuracy of the alignment pattern and the alignment accuracy of the photolithography process.

6. The method according to any one of claims 1-4, characterized in that, Perform inter-lithographic cleaning on the currently fabricated structures, including: The currently prepared structure is rinsed with developer within a preset time interval, and the rinsing time is guaranteed to reach the preset rinsing time, so as to remove the residual first photoresist that was not removed during the development process. The residual developer on the currently prepared structure is soaked and rinsed with deionized water, and the currently prepared structure is then dried.

7. The method according to claim 6, characterized in that, In addition to performing photolithography cleaning for currently fabricated structures, the process also includes: The impurities adhering to the currently prepared structure are dissolved using an organic solvent and then removed by physical peeling. The organic solvent remaining on the currently prepared structure is rinsed off with deionized water, and the currently prepared structure is then dried.

8. The method according to claim 7, characterized in that, In addition to performing photolithography cleaning for currently fabricated structures, the process also includes: The currently prepared structure is cleaned using an ultraviolet ozone cleaner, and the cleaning time reaches the preset cleaning time.

9. The method according to claim 7, characterized in that, The drying process includes blowing and / or baking.

10. The method according to any one of claims 1-4, characterized in that, The method further includes: After removing the remaining second photoresist, if it is determined that the next target structure layer needs to be prepared by photolithography, a photolithographic cleaning is performed for the currently prepared structure.

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