High-bandwidth isolation current detection amplifier circuit, current detection method and current detection chip

Abstract

The invention relates to the technical field of analog integrated circuits, in particular to a high-bandwidth isolation current detection amplifier circuit, a current detection method and a current detection chip. The current detection amplifier circuit comprises a high-voltage side circuit and a low-voltage side circuit which are electrically isolated; in the high-voltage side circuit and the low-voltage side circuit, a to-be-measured voltage is converted into a differential amplification voltage signal through a fully-differential differential amplifier; a feedback loop of a cross-isolation transmission path is formed by a first clamping amplifier, a first voltage-controlled oscillator, a second frequency voltage converter, a second voltage follower, a second voltage-controlled oscillator, a second clamping amplifier, a third frequency voltage converter and a first frequency voltage converter, so that a large bandwidth is provided; under the condition of process-voltage-temperature change, high current detection precision and accuracy are ensured, and influence caused by different processes, temperatures and the like of the high-voltage side circuit and the low-voltage side circuit is avoided.

Description

Technical Field

[0001] This disclosure relates to the field of analog integrated circuit technology, specifically to a high-bandwidth isolation current sensing amplifier circuit, a current sensing method, and a current sensing chip. Background Technology

[0002] An isolated current sense amplifier (ICSA) is a key component in power systems, primarily used for current sensing and electrical isolation. Its working principle involves detecting the voltage drop across a small sampling resistor connected in series in the circuit, converting a weak current signal into a measurable voltage signal. Internal isolation barriers (such as magnetic, capacitive, or optical isolation) are then used to achieve electrical isolation between the high-voltage and low-voltage sides, effectively blocking common-mode noise, ground loop interference, and the conduction of high-voltage surges, ensuring reliable signal transmission and system safety.

[0003] Because the resistance of the sampling resistor is usually extremely small (in the milliohm range to reduce power consumption), the voltage signal it generates is often only in the millivolt or even microvolt range, making it highly susceptible to environmental noise, temperature drift, and amplifier offset. This leads to reduced detection accuracy.

[0004] As the operating frequency of power systems increases, the bandwidth requirements for ICSA products are also rising. However, most ICSA products on the market currently operate in the kilohertz range, with only a very few reaching the megahertz level. This limitation leads to complex circuit structures and higher costs, making it difficult to meet the growing demands of high-frequency applications. Summary of the Invention

[0005] To address the problems in the related technologies, this disclosure provides a high-bandwidth isolation current sensing amplifier circuit, a current sensing method, and a current sensing chip.

[0006] In a first aspect, this disclosure provides a high-bandwidth isolated current detection amplifier circuit, which is used to detect the current of a circuit under test. The circuit under test includes a resistor to be measured, and the current detection amplifier circuit includes: an electrically isolated high-voltage side circuit and a low-voltage side circuit. The high-voltage side circuit includes a fully differential amplifier, a first clamping amplifier, a first voltage-controlled oscillator, and a first frequency-to-voltage converter; the fully differential amplifier is connected to the resistor under test and the first clamping amplifier; the first clamping amplifier is connected to the first voltage-controlled oscillator and the first frequency-to-voltage converter; the low-voltage side circuit includes a second frequency-to-voltage converter and a voltage feedback circuit; the second frequency-to-voltage converter is connected to the voltage feedback circuit. The fully differential amplifier is used to differentially amplify the voltage signal under test across the resistor under test based on the first buffer reference voltage to obtain a first differential amplified voltage signal; the first clamping amplifier is used to output a first control voltage signal based on the first differential amplified voltage signal and a first feedback voltage signal received from the first frequency-voltage converter; the first voltage-controlled oscillator is used to convert the first control voltage signal into a first high-frequency clock signal, the frequency value of the first high-frequency clock signal being related to the first control voltage signal; The second frequency-to-voltage converter is used to convert the second high-frequency clock signal into a second differential amplified voltage signal. The second high-frequency clock signal is a regenerated clock signal of the first high-frequency clock signal in the low-voltage side circuit. The second differential amplified voltage signal and the inverted output voltage are used to determine the current value of the circuit under test. The voltage feedback circuit is used to output a second control voltage signal based on the second differential amplified voltage signal, and convert the second control voltage signal into a third high-frequency clock signal. The frequency value of the third high-frequency clock signal is related to the second control voltage signal. The first frequency-voltage converter is used to convert a fourth high-frequency clock signal into the first feedback voltage signal based on the first buffer reference voltage. The fourth high-frequency clock signal is the regenerated clock signal of the third high-frequency clock signal in the high-voltage side circuit.

[0007] According to an embodiment of this disclosure, the voltage feedback circuit includes a second voltage follower, a second clamping amplifier, a second voltage-controlled oscillator, and a third frequency-voltage converter; the second voltage follower is connected to the second frequency-voltage converter and the third frequency-voltage converter; the second clamping amplifier is connected to the second voltage-controlled oscillator, the third frequency-voltage converter, and the second frequency-voltage converter, and the second voltage-controlled oscillator is connected to the third frequency-voltage converter; The second voltage follower is used to buffer the input second reference voltage to output the second buffered reference voltage, which is used to provide a reference for the second differential amplified voltage signal; The third frequency-to-voltage converter is used to convert the third high-frequency clock signal into the second feedback voltage signal based on the second buffer reference voltage. The second clamping amplifier is used to output a second control voltage signal based on the second differential amplified voltage signal and the second feedback voltage signal received from the third frequency-voltage converter; The second voltage-controlled oscillator is used to convert the second control voltage signal into a third high-frequency clock signal.

[0008] According to embodiments of this disclosure, the high-voltage side circuit further includes a first voltage follower connected to the fully differential amplifier and the first frequency-to-voltage converter; the low-voltage side circuit further includes a third voltage follower. The first voltage follower is used to buffer the input first reference voltage to output the first buffered reference voltage, which is used to provide a reference for the first differential amplified voltage signal and the first feedback voltage signal. The third voltage follower is used to buffer the input second reference voltage to output a third buffered reference voltage, which serves as the inverted output voltage of the low-voltage side circuit.

[0009] According to embodiments of this disclosure, the fully differential amplifier includes a first differential input pair, a second differential input pair, and a single-ended output terminal; The non-inverting and inverting input terminals of the first differential input pair are connected to the two ends of the resistor under test; the non-inverting input terminal of the second differential input pair is connected to the single-ended output terminal, and the inverting input terminal of the second differential input pair and the single-ended output terminal are connected to the feedback module.

[0010] According to embodiments of this disclosure: The feedback module includes a first feedback resistor and a second feedback resistor; The high-voltage side circuit further includes a first voltage follower; the first voltage follower is used to buffer the input first reference voltage to output the first buffered reference voltage, and the first buffered reference voltage is used to provide a reference for the first differential amplified voltage signal; The inverting input terminal of the second differential input pair and the single-ended output terminal are respectively connected to the two ends of the first feedback resistor; the inverting input terminal of the second differential input pair is connected to one end of the second feedback resistor, and the other end of the second feedback resistor is connected to the output terminal of the first voltage follower.

[0011] According to an embodiment of this disclosure, the fully differential amplifier adjusts the differential gain of the first differential amplified voltage signal based on the resistance values ​​of the first feedback resistor and the second feedback resistor.

[0012] According to an embodiment of this disclosure, the non-inverting input of the first clamping amplifier is connected to the single-ended output of the fully differential amplifier, the inverting input of the first clamping amplifier is connected to the feedback signal output of the first frequency-voltage converter, and the control signal output of the first clamping amplifier is connected to the control signal input of the first voltage-controlled oscillator.

[0013] According to embodiments of this disclosure, the high-voltage side circuit further includes a first transmitting end driving circuit and a first receiving end driving circuit; the low-voltage side circuit further includes a second transmitting end driving circuit and a second receiving end driving circuit. The clock signal output terminal of the first voltage-controlled oscillator is connected to the input terminal of the first transmitting end driving circuit. The first transmitting end driving circuit is used to output the first high-frequency clock signal received from the first voltage-controlled oscillator to the second receiving end driving circuit through an electrical isolation barrier. The second receiving end driving circuit restores the first high-frequency clock signal to the second high-frequency clock signal. The clock signal output terminal of the second voltage-controlled oscillator is connected to the input terminal of the second transmitting end driving circuit. The second transmitting end driving circuit is used to output the third high-frequency clock signal received from the second voltage-controlled oscillator to the first receiving end driving circuit through an electrical isolation barrier. The first receiving end driving circuit restores the third high-frequency clock signal to the fourth high-frequency clock signal. The clock signal input terminal of the first frequency-voltage converter is connected to the output terminal of the first receiving terminal driving circuit to receive the fourth high-frequency clock signal.

[0014] Secondly, this disclosure provides a method for current detection in a circuit under test using a high-bandwidth isolation current detection amplifier circuit. The circuit under test includes a resistor to be measured. The high-bandwidth isolation current detection amplifier circuit includes an electrically isolated high-voltage side circuit and a low-voltage side circuit. The high-voltage side circuit includes a fully differential amplifier, a first clamping amplifier, a first voltage-controlled oscillator (VCO), and a first frequency-to-voltage converter. The fully differential amplifier is connected to the resistor to be measured and the first clamping amplifier. The first clamping amplifier is connected to the first VCO and the first frequency-to-voltage converter. The low-voltage side circuit includes a second frequency-to-voltage converter and a voltage feedback circuit. The second frequency-to-voltage converter is connected to the voltage feedback circuit. The method includes: The voltage signal to be measured across the resistor to be measured is differentially amplified based on the first buffer reference voltage using the fully differential amplifier to obtain the first differential amplified voltage signal; The first clamping amplifier outputs a first control voltage signal based on the first differential amplified voltage signal and the first feedback voltage signal obtained from the first frequency-voltage converter; The first control voltage signal is converted into a first high-frequency clock signal using the first voltage-controlled oscillator, and the frequency value of the first high-frequency clock signal is related to the first control voltage signal. The second frequency-to-voltage converter is used to convert the second high-frequency clock signal into a second differential amplified voltage signal. The second high-frequency clock signal is the regenerated clock signal of the first high-frequency clock signal in the low-voltage side circuit. The current value of the circuit under test is determined based on the second differential amplified voltage signal and the inverted output voltage. Specifically, the voltage feedback circuit outputs a second control voltage signal based on the second differential amplified voltage signal, and converts the second control voltage signal into a third high-frequency clock signal. The frequency value of the third high-frequency clock signal is related to the second control voltage signal. The first frequency-voltage converter converts a fourth high-frequency clock signal into the first feedback voltage signal based on the first buffer reference voltage. The fourth high-frequency clock signal is a regenerated clock signal of the third high-frequency clock signal in the high-voltage side circuit.

[0015] According to embodiments of this disclosure, the voltage feedback circuit includes a second voltage follower, a second clamping amplifier, a second voltage-controlled oscillator, and a third frequency-voltage converter; the second voltage follower is connected to the second frequency-voltage converter and the third frequency-voltage converter; the second clamping amplifier is connected to the second voltage-controlled oscillator, the third frequency-voltage converter, and the second frequency-voltage converter; the second voltage-controlled oscillator is connected to the third frequency-voltage converter; the method further includes: The second voltage follower is used to buffer the input second reference voltage to output the second buffered reference voltage, which is used to provide a reference for the second differential amplified voltage signal; The third frequency-to-voltage converter converts the third high-frequency clock signal into the second feedback voltage signal based on the second buffer reference voltage. The second clamping amplifier outputs a second control voltage signal based on the second differential amplified voltage signal and the second feedback voltage signal received from the third frequency-voltage converter; The second control voltage signal is converted into a third high-frequency clock signal using the second voltage-controlled oscillator.

[0016] According to embodiments of this disclosure, the high-voltage side circuit further includes a first voltage follower connected to the fully differential amplifier and the first frequency-to-voltage converter; the low-voltage side circuit further includes a third voltage follower; the method further includes: The first voltage follower is used to buffer the input first reference voltage to output the first buffered reference voltage, which is used to provide a reference for the first differential amplified voltage signal and the first feedback voltage signal. The input second reference voltage is buffered using the third voltage follower to output a third buffered reference voltage, which serves as the inverted output voltage of the low-voltage side circuit.

[0017] According to embodiments of this disclosure, the high-voltage side circuit further includes a first transmitting end driving circuit and a first receiving end driving circuit; the low-voltage side circuit further includes a second transmitting end driving circuit and a second receiving end driving circuit; the clock signal output terminal of the first voltage-controlled oscillator is connected to the input terminal of the first transmitting end driving circuit; the clock signal output terminal of the second voltage-controlled oscillator is connected to the input terminal of the second transmitting end driving circuit; the clock signal input terminal of the first frequency-voltage converter is connected to the output terminal of the first receiving end driving circuit; the method further includes: The first high-frequency clock signal received from the first voltage-controlled oscillator is output to the second receiving end driving circuit through an electrical isolation barrier using the first transmitting end driving circuit; the second receiving end driving circuit restores the first high-frequency clock signal to the second high-frequency clock signal. The third high-frequency clock signal received from the second voltage-controlled oscillator is output to the first receiving end driving circuit through an electrical isolation barrier using the second transmitting end driving circuit; the third high-frequency clock signal is restored to the fourth high-frequency clock signal using the first receiving end driving circuit; The fourth high-frequency clock signal is received using the first frequency-to-voltage converter.

[0018] Thirdly, this disclosure provides a current detection chip, including a high-bandwidth isolated current detection amplifier circuit as described in any of the first aspects.

[0019] Fourthly, this disclosure provides a current detection chip, including a transmitter chip and a receiver chip; the receiver chip includes a low-voltage side circuit and a second isolation capacitor module, wherein the high-voltage side circuit and the low-voltage side circuit are electrically isolated through the first isolation capacitor module and the second isolation capacitor module; The high-voltage side circuit includes a fully differential amplifier, a first clamping amplifier, a first voltage-controlled oscillator, and a first frequency-to-voltage converter; the fully differential amplifier is connected to the resistor under test and the first clamping amplifier; the first clamping amplifier is connected to the first voltage-controlled oscillator and the first frequency-to-voltage converter; the low-voltage side circuit includes a second frequency-to-voltage converter and a voltage feedback circuit; the second frequency-to-voltage converter is connected to the voltage feedback circuit. The fully differential amplifier is used to differentially amplify the voltage signal under test across the resistor under test based on the first buffer reference voltage to obtain a first differential amplified voltage signal; the first clamping amplifier is used to output a first control voltage signal based on the first differential amplified voltage signal and a first feedback voltage signal obtained from the first frequency-voltage converter; the first voltage-controlled oscillator is used to convert the first control voltage signal into a first high-frequency clock signal, the frequency value of the first high-frequency clock signal being related to the first control voltage signal; The second frequency-to-voltage converter is used to convert the second high-frequency clock signal into a second differential amplified voltage signal. The second high-frequency clock signal is a regenerated clock signal of the first high-frequency clock signal in the low-voltage side circuit. The second differential amplified voltage signal and the inverted output voltage are used to determine the current value of the circuit under test. The voltage feedback circuit is used to output a second control voltage signal based on the second differential amplified voltage signal, and convert the second control voltage signal into a third high-frequency clock signal. The frequency value of the third high-frequency clock signal is related to the second control voltage signal. The first frequency-voltage converter is used to convert a fourth high-frequency clock signal into the first feedback voltage signal based on the first buffer reference voltage. The fourth high-frequency clock signal is the regenerated clock signal of the third high-frequency clock signal in the high-voltage side circuit.

[0020] According to an embodiment of this disclosure, the voltage feedback circuit includes a second voltage follower, a second clamping amplifier, a second voltage-controlled oscillator, and a third frequency-voltage converter; the second voltage follower is connected to the second frequency-voltage converter and the third frequency-voltage converter; the second clamping amplifier is connected to the second voltage-controlled oscillator, the third frequency-voltage converter, and the second frequency-voltage converter, and the second voltage-controlled oscillator is connected to the third frequency-voltage converter; The second voltage follower is used to buffer the input second reference voltage to output the second buffered reference voltage, which is used to provide a reference for the second differential amplified voltage signal; The third frequency-to-voltage converter is used to convert the third high-frequency clock signal into the second feedback voltage signal based on the second buffer reference voltage. The second clamping amplifier is used to output a second control voltage signal based on the second differential amplified voltage signal and the second feedback voltage signal received from the third frequency-voltage converter; The second voltage-controlled oscillator is used to convert the second control voltage signal into a third high-frequency clock signal.

[0021] According to embodiments of this disclosure, the high-voltage side circuit further includes a first voltage follower connected to the fully differential amplifier and the first frequency-to-voltage converter; the low-voltage side circuit further includes a third voltage follower. The first voltage follower is used to buffer the input first reference voltage to output the first buffered reference voltage, which is used to provide a reference for the first differential amplified voltage signal and the first feedback voltage signal. The third voltage follower is used to buffer the input second reference voltage to output a third buffered reference voltage, which serves as the inverted output voltage of the low-voltage side circuit.

[0022] According to embodiments of this disclosure, the high-voltage side circuit further includes a first transmitting end driving circuit and a first receiving end driving circuit; the low-voltage side circuit further includes a second transmitting end driving circuit and a second receiving end driving circuit. The clock signal output terminal of the first voltage-controlled oscillator is connected to the input terminal of the first transmitting end driving circuit. The first transmitting end driving circuit is used to output the first high-frequency clock signal received from the first voltage-controlled oscillator to the second receiving end driving circuit through an electrical isolation barrier. The second receiving end driving circuit restores the first high-frequency clock signal to the second high-frequency clock signal. The clock signal output terminal of the second voltage-controlled oscillator is connected to the input terminal of the second transmitting end driving circuit. The second transmitting end driving circuit is used to output the third high-frequency clock signal received from the second voltage-controlled oscillator to the first receiving end driving circuit through an electrical isolation barrier. The first receiving end driving circuit restores the third high-frequency clock signal to the fourth high-frequency clock signal. The clock signal input terminal of the first frequency-voltage converter is connected to the output terminal of the first receiving terminal driving circuit to receive the fourth high-frequency clock signal.

[0023] According to embodiments of this disclosure: The first isolation capacitor module includes a first isolation capacitor, a second isolation capacitor, a third isolation capacitor, and a fourth isolation capacitor; the second isolation capacitor module includes a fifth isolation capacitor, a sixth isolation capacitor, a seventh isolation capacitor, and an eighth isolation capacitor. The output terminal of the first transmitting end driving circuit is connected to the first isolation capacitor and the second isolation capacitor; The input terminal of the first receiving end driving circuit is connected to the third isolation capacitor and the fourth isolation capacitor; The input terminal of the second receiving end driving circuit is connected to the fifth isolation capacitor and the sixth isolation capacitor; The output terminal of the second transmitting end driving circuit is connected to the seventh isolation capacitor and the eighth isolation capacitor; The first isolation capacitor and the fifth isolation capacitor are coupled by an electric field; The second isolation capacitor and the sixth isolation capacitor are coupled by an electric field; The third isolation capacitor and the seventh isolation capacitor are coupled by an electric field. The fourth isolation capacitor and the eighth isolation capacitor are coupled by an electric field.

[0024] This disclosure involves converting the voltage to be measured into a differential amplified voltage signal using a fully differential amplifier in the high-voltage side circuit, and then transmitting and feeding back the clock signal using a first clamping amplifier, a first voltage-controlled oscillator, and a first frequency-voltage converter; in the low-voltage side circuit, restoring the clock signal using a second frequency-voltage converter, and feeding back a differential amplified voltage signal to the high-voltage side circuit using a voltage feedback circuit.

[0025] This disclosure employs a fully differential amplifier to differentially amplify the voltage across the resistor under test, achieving detection of weak input signals while maintaining a fixed signal gain, a fixed common-mode output level, and high bandwidth. This disclosure utilizes a feedback loop across the isolated transmission path, composed of a first clamping amplifier, a first voltage-controlled oscillator, a second frequency-voltage converter, a second voltage follower, a second voltage-controlled oscillator, a second clamping amplifier, a third frequency-voltage converter, and the first frequency-voltage converter. This eliminates the need for traditional methods using phase-locked loop clamping or sigma-delta modulation, ensuring accurate current signal detection even under process-voltage-temperature (PVT) variations. It is unaffected by differences in process and temperature between the high-voltage and low-voltage circuits, meeting the accuracy requirements of high-bandwidth signals (e.g., 10MHz) transmitted across isolated paths. This effectively improves the real-time performance and accuracy of current detection, satisfying the higher bandwidth requirements of power systems for ICSA products.

[0026] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and are not intended to limit this disclosure. Attached Figure Description

[0027] Other features, objects, and advantages of this disclosure will become more apparent from the following detailed description of non-limiting embodiments, taken in conjunction with the accompanying drawings. In the drawings: Figure 1 A schematic diagram of the circuit structure of a high-bandwidth isolation current-sensing amplifier circuit according to an embodiment of the present disclosure is shown. Figure 2This diagram illustrates the circuit component connections of a fully differential amplifier in a high-bandwidth isolation current-sensing amplifier circuit according to an embodiment of the present disclosure. Figure 3 This diagram illustrates the circuit component connections of a first frequency-voltage converter in a high-bandwidth isolation current-sensing amplifier circuit according to an embodiment of the present disclosure. Figure 4 This diagram shows a schematic of the circuit structure of a first voltage-controlled oscillator in a high-bandwidth isolation current-sensing amplifier circuit according to an embodiment of the present disclosure. Figure 5 The voltage gain Bode plot of a high-bandwidth isolation current-sensing amplifier circuit according to an embodiment of the present disclosure is shown. Figure 6 The transient simulation waveform diagram of a high-bandwidth isolation current-sensing amplifier circuit according to an embodiment of the present disclosure is shown. Figure 7 A flowchart is shown illustrating a method for current detection of a circuit under test using a high-bandwidth isolation current-sensing amplifier circuit according to an embodiment of the present disclosure. Figure 8 A schematic diagram of the structure of a current detection chip according to an embodiment of the present disclosure is shown. Detailed Implementation

[0028] In the following, exemplary embodiments of the present disclosure will be described in detail with reference to the accompanying drawings to enable those skilled in the art to readily implement them. Furthermore, for clarity, portions unrelated to the description of exemplary embodiments have been omitted from the drawings.

[0029] In this disclosure, it should be understood that terms such as “comprising” or “having” are intended to indicate the presence of features, figures, steps, behaviors, components, parts or combinations thereof disclosed in this specification, and are not intended to exclude the possibility of the presence or addition of one or more other features, figures, steps, behaviors, components, parts or combinations thereof.

[0030] It should also be noted that, unless otherwise specified, the embodiments and features described in this disclosure can be combined with each other. This disclosure will now be described in detail with reference to the accompanying drawings and embodiments.

[0031] In this disclosure, any operation involving the acquisition of user information or user data, or the display of user information or user data to others, is an operation authorized or confirmed by the user, or actively selected by the user.

[0032] As mentioned above, the inventors have noted the following problems with existing ICSA products: 1) When performing isolation current detection, since the resistance of the sampling resistor is usually extremely small, the voltage signal it generates is often only in the millivolt or even microvolt range. It is easily affected by environmental noise, temperature drift and amplifier offset. Therefore, ICSA products need to have strong noise and offset suppression capabilities to ensure the accuracy of the detection signal.

[0033] 2) Currently, most ICSA products on the market have bandwidths in the kilohertz range, or have broken through to the megahertz level based on complex circuit structures and high costs, making it difficult for existing ICSA products to meet the growing demand for high-frequency applications.

[0034] This disclosure provides a high-bandwidth isolated current sensing amplifier circuit, which is used to detect the current of a circuit under test. The circuit under test includes a resistor to be measured, and the current sensing amplifier circuit includes an electrically isolated high-voltage side circuit and a low-voltage side circuit. The high-voltage side circuit includes a fully differential amplifier, a first clamping amplifier, a first voltage-controlled oscillator, and a first frequency-to-voltage converter; the fully differential amplifier is connected to the resistor under test and the first clamping amplifier; the first clamping amplifier is connected to the first voltage-controlled oscillator and the first frequency-to-voltage converter; the low-voltage side circuit includes a second frequency-to-voltage converter and a voltage feedback circuit; the second frequency-to-voltage converter is connected to the voltage feedback circuit. The fully differential amplifier is used to differentially amplify the voltage signal under test across the resistor under test based on the first buffer reference voltage to obtain a first differential amplified voltage signal; the first clamping amplifier is used to output a first control voltage signal based on the first differential amplified voltage signal and a first feedback voltage signal received from the first frequency-voltage converter; the first voltage-controlled oscillator is used to convert the first control voltage signal into a first high-frequency clock signal, the frequency value of the first high-frequency clock signal being related to the first control voltage signal; The second frequency-to-voltage converter is used to convert the second high-frequency clock signal into a second differential amplified voltage signal. The second high-frequency clock signal is a regenerated clock signal of the first high-frequency clock signal in the low-voltage side circuit. The second differential amplified voltage signal and the second buffer reference voltage are used to determine the current value of the circuit under test. The voltage feedback circuit is used to output a second control voltage signal based on the second differential amplified voltage signal, and convert the second control voltage signal into a third high-frequency clock signal. The frequency value of the third high-frequency clock signal is related to the second control voltage signal. The first frequency-voltage converter is used to convert a fourth high-frequency clock signal into the first feedback voltage signal based on the first buffer reference voltage. The fourth high-frequency clock signal is the regenerated clock signal of the third high-frequency clock signal in the high-voltage side circuit.

[0035] This disclosure achieves the detection of weak input signals while maintaining a fixed signal gain, a fixed common-mode output level, and high bandwidth. It also abandons traditional modulation methods using phase-locked loop clamping or sigma-delta modulation, ensuring accurate current signal detection even under variations in process technology, voltage, and temperature. This meets the accuracy requirements for high-bandwidth signals (e.g., 10MHz bandwidth signals) transmitted across isolated paths, effectively improving the real-time performance and accuracy of current detection, and satisfying the higher bandwidth demands of power systems for ICSA products.

[0036] Figure 1 A schematic diagram of a high-bandwidth isolated current-sensing amplifier circuit according to an embodiment of the present disclosure is shown. The current-sensing amplifier circuit is used to detect the current in a circuit under test, wherein a resistor to be measured is provided in the circuit under test.

[0037] In this disclosure, the resistor under test is the sampling resistor used when current is detected in the circuit under test. Its resistance value is generally small, which can reduce the influence of the impedance of the circuit under test and avoid the problem of a significant drop in the load voltage of the circuit under test due to the insertion of the sampling resistor.

[0038] The current-sensing amplifier circuit includes a high-voltage side circuit and a low-voltage side circuit, which are electrically isolated from each other. In one specific embodiment, the electrical isolation may be capacitive isolation.

[0039] According to embodiments of this disclosure, the high-voltage side circuit includes a fully differential differential amplifier (FDDA), a first clamping amplifier (CA), a first voltage-controlled oscillator (VCO), and a first frequency-to-voltage converter (FVC).

[0040] According to embodiments of this disclosure, the high-voltage side circuit further includes a first voltage follower (Buffer, BUF), a first bandgap reference (BG), a first transmitter (TX) driving circuit, and a first receiver (RX) driving circuit.

[0041] like Figure 1 As shown, the fully differential amplifier FDDA is connected to the resistor under test, the first clamping amplifier CA1, and the first voltage follower BUF1; the first clamping amplifier CA1 is connected to the first voltage-controlled oscillator VCO1 and the first frequency-to-voltage converter FVC1; the first voltage follower BUF1 is connected to the first frequency-to-voltage converter FVC1; the first bandgap reference source BG1 is connected to the first voltage follower BUF1; the first transmitter drive circuit TX1 is connected to the first voltage-controlled oscillator VCO1; and the first receiver drive circuit RX1 is connected to the first frequency-to-voltage converter FVC1.

[0042] According to an embodiment of this disclosure, the low-voltage side circuit includes a second frequency-to-voltage converter and a voltage feedback circuit; wherein the voltage feedback circuit includes a second clamping amplifier, a second voltage follower, a second voltage-controlled oscillator, and a third frequency-to-voltage converter.

[0043] According to embodiments of this disclosure, the low-voltage side circuit further includes a third voltage follower, a second bandgap reference source, a second transmitter driving circuit, and a second receiver driving circuit.

[0044] like Figure 1 As shown, the second receiver driving circuit RX2 is connected to the second frequency-to-voltage converter FVC2; the second frequency-to-voltage converter FVC2 is connected to the second voltage follower BUF2 and the third frequency-to-voltage converter FVC3; the second voltage follower BUF2 is connected to the third frequency-to-voltage converter FVC3, the second bandgap reference source BG2, and the second clamping amplifier CA2; the second clamping amplifier CA2 is connected to the second voltage-controlled oscillator VCO2 and the third frequency-to-voltage converter FVC3; the second voltage-controlled oscillator VCO2 is connected to the second transmitter driving circuit TX2 and the third frequency-to-voltage converter FVC3.

[0045] According to an embodiment of this disclosure, the fully differential amplifier is used to differentially amplify the voltage signal under test across the resistor under test based on a first buffer reference voltage to obtain a first differential amplified voltage signal; the first clamping amplifier is used to output a first control voltage signal based on the first differential amplified voltage signal and a first feedback voltage signal obtained from the first frequency-voltage converter; the first voltage-controlled oscillator is used to convert the first control voltage signal into a first high-frequency clock signal, wherein the frequency value of the first high-frequency clock signal is related to the first control voltage signal.

[0046] According to embodiments of this disclosure, the first voltage follower buffers the input first reference voltage to output a first buffered reference voltage, which provides a reference for the first differential amplified voltage signal and the first feedback voltage signal. The reference reference represents a relative reference potential for the differential amplified voltage, so that when the offset amplified voltage is measured in the low-voltage side circuit, it does not rely on system ground (GND), thereby avoiding noise interference from the ground loop.

[0047] A voltage follower is a linear circuit whose inverting input is directly connected to its output, ensuring that the output voltage matches the reference voltage input through the non-inverting input. However, it offers higher load capacity and lower impedance performance. In this disclosure, a first bandgap reference (BG) can be used to provide a first reference voltage V to the first voltage follower. ref1 The first buffered reference voltage V output by the voltage follower cm1 With the first reference voltage V ref1 In comparison, although the values ​​are the same, it has a higher load capacity and lower impedance. Those skilled in the art should understand that using a bandgap reference source to provide a reference voltage is not intended to limit the scope of this disclosure; other voltage sources capable of providing a reference voltage are also included in the scope of this disclosure. For example, providing the first reference voltage V to the first voltage follower via a buffered reference voltage source chip. ref1 .

[0048] The buffer reference voltage mentioned in this disclosure is the same as the reference voltage in value, indicating that the buffer reference voltage output by the voltage follower is within the set tolerance range of the reference voltage. The set tolerance range, that is, the maximum permissible deviation between the buffer reference voltage and the reference voltage, can be set according to the accuracy requirements of the circuit.

[0049] Similarly, this disclosure can utilize a second bandgap reference source to provide corresponding reference voltages for the second and third voltage followers.

[0050] According to an embodiment of this disclosure, the fully differential amplifier includes a first differential input pair, a second differential input pair, and a single-ended output terminal; the non-inverting input terminal and the inverting input terminal of the first differential input pair are connected to the two ends of the resistor under test; the non-inverting input terminal of the second differential input pair is connected to the single-ended output terminal, and the inverting input terminal of the second differential input pair and the single-ended output terminal are connected to a feedback module.

[0051] Furthermore, the feedback module includes a first feedback resistor and a second feedback resistor; the inverting input terminal of the second differential input pair and the single-ended output terminal are respectively connected to the two ends of the first feedback resistor; the inverting input terminal of the second differential input pair is connected to one end of the second feedback resistor, and the other end of the second feedback resistor is connected to the output terminal of the first voltage follower.

[0052] In detail, the fully differential amplifier adjusts the differential gain of the first differential amplified voltage signal according to the resistance values ​​of the first feedback resistor and the second feedback resistor. Specifically, as shown in the following formula: ; in, The voltage value of the first differential amplified voltage signal. The voltage value of the first buffer reference voltage. The voltage across the resistor being measured is [value]. Let be the resistance value of the first feedback resistor. The value of the second feedback resistor is given.

[0053] Right now, and The differential gain constitutes the voltage signal under test. By controlling and This allows for gain adjustment of the differential amplifier, while the externally input first reference voltage V... ref1 A first buffered reference voltage V is provided to the circuit by introducing a low-impedance path (first voltage follower). cm1 This not only avoids reference drift but also suppresses noise to some extent.

[0054] Figure 2 This diagram illustrates the circuit component connections of a fully differential amplifier in a high-bandwidth isolation current-sensing amplifier circuit according to an embodiment of the present disclosure.

[0055] like Figure 2 As shown, the fully differential amplifier includes a folded operational amplifier module and an output stage module. Among them, the enhancement-mode PMOS transistor M... a1 M a2 M a3 M a4 M a5 M a6 M a7 M a8 M a9 M a10 M a11 M a19 With enhancement-mode NMOS transistor M a12 Ma13 M a14 M a15 M a16 M a17 The constructed folded operational amplifier module has a first differential input pair and a second differential input pair, and an enhancement-mode PMOS transistor M. a20 M a21 and enhancement-mode NMOS transistor M a18 M a22 This constitutes the output stage module, which drives the single-ended output terminal to output a differential amplified signal. To enhance the loop stability of the output stage module, two compensation capacitors C are also included. a1 C a2 Meanwhile, for NMOS transistors M a18 M a15 M a16 Provides the set bias voltage V b2 V b3 V b4 This allows the NMOS transistor to function properly.

[0056] The fully differential amplifier FDDA disclosed herein can not only accurately amplify the voltage signal under test differentially and suppress common-mode noise, but also dynamically adjust the differential amplified voltage signal in conjunction with the feedback module (first feedback resistor and second feedback resistor) to match the measurement requirements of the circuit.

[0057] According to an embodiment of this disclosure, the non-inverting input of the first clamping amplifier is connected to the single-ended output of the fully differential amplifier, the inverting input of the first clamping amplifier is connected to the feedback signal output of the first frequency-voltage converter, and the control signal output of the first clamping amplifier is connected to the control signal input of the first voltage-controlled oscillator.

[0058] Figure 3 This diagram illustrates the circuit element connections of a first frequency voltage converter in a high-bandwidth isolated current-sensing amplifier circuit according to an embodiment of the present disclosure.

[0059] like Figure 3 As shown, the first frequency-voltage converter includes two switches S b1 S b2 and a capacitor C b3 The adjustable resistor formed by the clamping voltage V s The equivalent resistance looking towards ground and the switching frequency (i.e., the input clock signal CK) N4 CK p4 The frequency is inversely proportional to the clamping voltage V. s Clamped to the first buffer reference voltage V cm1The current in the branch containing the adjustable resistor will be proportional to the switching frequency. This current will then flow through the enhancement-mode PMOS transistor M. b1 and M b2 Copy to the new branch and by resistor R rec1 Restored to voltage V rec1 The voltage V rec1 This is proportional to the switching frequency, thus achieving the effect of converting frequency into voltage. A compensation capacitor C is also included in this circuit. b1 C b .

[0060] Among them, the enhancement-type PMOS transistor M b1 and M b2 The constructed current mirror structure copies the current in the branch containing the adjustable resistor to resistor R. rec1 If the branch in question is restored, then the feedback voltage V obtained from the restoration will be... rec1 The expression is as follows: ; Among them, the clamping voltage V s Clamped to the first buffer reference voltage V cm1 V s Follow V cm1 The change, but V s Not equal to V cm1 C b3 and V cm1 The setting is based on the current in the circuit. For example, if a branch needs to be designed with a current of 10uA, V cm1 Around 1V, then It can be set to 100K ohms. Assume CK... N4 and CK P4 clock frequency =10MHz, =1 / Then it can be calculated =1 / ( =1pF.

[0061] Figure 4 This diagram illustrates the circuit structure of a first voltage-controlled oscillator in a high-bandwidth isolation current-sensing amplifier circuit according to an embodiment of the present disclosure.

[0062] like Figure 4 As shown, the first voltage-controlled oscillator includes a gate voltage conversion circuit and a four-stage differential inverter composed of four cascaded differential inverters. The gate voltage conversion circuit converts the offset amplified voltage V... ctrl1 Convert to gate voltage V P1 , gate voltage V N1 And ensure V N1The controlled NMOS transistor current is always V P1 Twice the current of the controlled PMOS transistor; through the gate voltage V P1 , gate voltage V N1 The current is copied into a 4-stage differential inverter, thereby generating a high-frequency clock signal CK. N1 and CK P1 .

[0063] According to an embodiment of this disclosure, the high-voltage side circuit further includes a transmitting end driving circuit; the positive phase clock output terminal of the first voltage-controlled oscillator is connected to the first input terminal of the transmitting end driving circuit, the negative phase clock output terminal of the first voltage-controlled oscillator is connected to the second input terminal of the transmitting end driving circuit, and the first output terminal and the second output terminal of the transmitting end driving circuit are connected to the low-voltage side circuit.

[0064] According to an embodiment of this disclosure, the second frequency-to-voltage converter is used to convert a second high-frequency clock signal into a second differential amplified voltage signal, wherein the second high-frequency clock signal is a regenerated clock signal of the first high-frequency clock signal in the low-voltage side circuit, and the second differential amplified voltage signal and the second buffer reference voltage are used to determine the current value of the circuit under test.

[0065] According to an embodiment of this disclosure, the voltage feedback circuit is used to output a second control voltage signal based on the second differential amplified voltage signal, and convert the second control voltage signal into a third high-frequency clock signal, wherein the frequency value of the third high-frequency clock signal is related to the second control voltage signal; the first frequency-voltage converter is used to convert a fourth high-frequency clock signal into the first feedback voltage signal based on the first buffer reference voltage, wherein the fourth high-frequency clock signal is a regenerated clock signal of the third high-frequency clock signal in the high-voltage side circuit.

[0066] According to an embodiment of this disclosure, the clock signal output terminal of the first voltage-controlled oscillator is connected to the input terminal of the first transmitting end driving circuit. The first transmitting end driving circuit is used to output a first high-frequency clock signal received from the first voltage-controlled oscillator to the second receiving end driving circuit through an electrical isolation barrier. The second receiving end driving circuit restores the first high-frequency clock signal to a second high-frequency clock signal. The clock signal output terminal of the second voltage-controlled oscillator is connected to the input terminal of the second transmitting end driving circuit. The second transmitting end driving circuit is used to output a third high-frequency clock signal received from the second voltage-controlled oscillator to the first receiving end driving circuit through an electrical isolation barrier. The first receiving end driving circuit restores the third high-frequency clock signal to a fourth high-frequency clock signal. The clock signal input terminal of the first frequency-voltage converter is connected to the output terminal of the first receiving end driving circuit to receive the fourth high-frequency clock signal.

[0067] In this disclosure, to ensure that the low-voltage side circuit can correctly reproduce the first differential amplified voltage signal, i.e., to ensure that the low-voltage side circuit can reproduce the signal changes of the high-voltage side circuit, it is necessary to ensure that the second frequency voltage converter FVC2 and the first frequency voltage converter FVC1 have completely identical structures and matched device parameters. However, parameter matching does not mean that the parameters are identical. For example, assuming the first buffer reference voltage V... cm1 The second buffer reference voltage is 5000V. cm2 At 5V, the first differential amplified voltage signal obtained in the high-voltage side circuit varies with a reference of 5000V, while the second differential amplified voltage signal obtained in the low-voltage side circuit varies with a reference of 5V. Alternatively, for example, the first buffer reference voltage V... cm1 The second buffer reference voltage is 1000V. cm2 At 10V, the first differential amplified voltage signal obtained in the high-voltage side circuit varies with a reference of 1000V, while the second differential amplified voltage signal obtained in the low-voltage side circuit varies with a reference of 10V.

[0068] Figure 5 A voltage gain Bode plot of a high-bandwidth isolated current-sensing amplifier circuit according to an embodiment of the present disclosure is shown. Figure 5 As shown, with an input voltage signal of 40mV peak-to-peak value, the high-bandwidth isolated current-sensing amplifier circuit of this disclosure achieves a fixed voltage gain of 12.25dB, or 4 times, and reaches a frequency of 10MHz at a voltage gain of 9dB. Therefore, this disclosure achieves bandwidth performance in the MHz range.

[0069] Figure 6 The transient simulation waveform diagram of a high-bandwidth isolated current-sensing amplifier circuit according to an embodiment of the present disclosure is shown. Figure 6 As shown, the input signal is a triangular wave with a peak-to-peak value of 80mV and a period of 1000ns, and the output signal is a triangular wave with a peak-to-peak value of 339mV and a period of 1000.18ns. This achieves a fixed voltage gain of nearly 4 times and signal transmission at 10MHz, thus enabling normal transmission of MHz-level signals.

[0070] Therefore, this disclosure achieves the detection of weak input signals while maintaining a fixed signal gain, a fixed common-mode level of the output signal, and high-bandwidth signal transmission. Even under conditions of process-voltage-temperature variations, the loop can still accurately convert the detection signal into a high-frequency clock signal, thus ensuring the accuracy of high-bandwidth signal transmission across isolation bands. It not only achieves high-bandwidth signal transmission of 10MHz but also effectively improves the real-time performance and accuracy of current detection, meeting the higher bandwidth requirements of power systems for ICSA products.

[0071] Figure 7 A flowchart illustrating a method for current detection of a circuit under test using a high-bandwidth isolation current-sensing amplifier circuit according to an embodiment of the present disclosure is shown. Figure 7 As shown, the method includes steps S701 to S705.

[0072] In this disclosure, the circuit under test is provided with a resistor to be tested, and the high-bandwidth isolation current detection amplifier circuit includes an electrically isolated high-voltage side circuit and a low-voltage side circuit.

[0073] The high-voltage side circuit includes a fully differential amplifier, a first clamping amplifier, a first voltage-controlled oscillator, and a first frequency-to-voltage converter; the fully differential amplifier is connected to the resistor under test and the first clamping amplifier; the first clamping amplifier is connected to the first voltage-controlled oscillator and the first frequency-to-voltage converter; the low-voltage side circuit includes a second frequency-to-voltage converter and a voltage feedback circuit; the second frequency-to-voltage converter is connected to the voltage feedback circuit.

[0074] According to embodiments of this disclosure, the high-voltage side circuit further includes a first voltage follower connected to the fully differential amplifier and the first frequency-voltage converter; the low-voltage side circuit further includes a third voltage follower.

[0075] According to embodiments of this disclosure, the high-voltage side circuit further includes a first transmitting end driving circuit and a first receiving end driving circuit; the low-voltage side circuit further includes a second transmitting end driving circuit and a second receiving end driving circuit; the clock signal output terminal of the first voltage-controlled oscillator is connected to the input terminal of the first transmitting end driving circuit; the clock signal output terminal of the second voltage-controlled oscillator is connected to the input terminal of the second transmitting end driving circuit; and the clock signal input terminal of the first frequency-voltage converter is connected to the output terminal of the first receiving end driving circuit.

[0076] In step S701, the voltage signal to be measured on both sides of the resistor to be measured is differentially amplified based on the first buffer reference voltage using the fully differential amplifier to obtain the first differential amplified voltage signal.

[0077] In step S702, the first clamping amplifier outputs a first control voltage signal based on the first differential amplified voltage signal and the first feedback voltage signal obtained from the first frequency-voltage converter.

[0078] In step S703, the first control voltage signal is converted into a first high-frequency clock signal using the first voltage-controlled oscillator, and the frequency value of the first high-frequency clock signal is the same as that of the first control voltage signal.

[0079] In step S704, the second high-frequency clock signal is converted into a second differential amplified voltage signal using the second frequency-voltage converter. The second high-frequency clock signal is the regenerated clock signal of the first high-frequency clock signal in the low-voltage side circuit.

[0080] In step S705, the current value of the circuit under test is determined based on the second differential amplified voltage signal and the second buffer reference voltage.

[0081] Specifically, the voltage feedback circuit outputs a second control voltage signal based on the second differential amplified voltage signal, and converts the second control voltage signal into a third high-frequency clock signal. The frequency value of the third high-frequency clock signal is related to the second control voltage signal. The first frequency-voltage converter converts a fourth high-frequency clock signal into the first feedback voltage signal based on the first buffer reference voltage. The fourth high-frequency clock signal is a regenerated clock signal of the third high-frequency clock signal in the high-voltage side circuit.

[0082] According to embodiments of this disclosure, the method further includes: buffering an input first reference voltage using the first voltage follower to output a first buffered reference voltage, the first buffered reference voltage being used to provide a reference for the first differential amplified voltage signal and the first feedback voltage signal; and buffering an input second reference voltage using the third voltage follower to output a third buffered reference voltage, the third buffered reference voltage being used as the inverted output voltage of the low-voltage side circuit.

[0083] According to embodiments of this disclosure, the method further includes: using the first transmitting end driving circuit to output a first high-frequency clock signal received from the first voltage-controlled oscillator through an electrical isolation barrier to the second receiving end driving circuit; using the second receiving end driving circuit to restore the first high-frequency clock signal to a second high-frequency clock signal; using the second transmitting end driving circuit to output a third high-frequency clock signal received from the second voltage-controlled oscillator through an electrical isolation barrier to the first receiving end driving circuit; using the first receiving end driving circuit to restore the third high-frequency clock signal to a fourth high-frequency clock signal; and using the first frequency-voltage converter to receive the fourth high-frequency clock signal.

[0084] This disclosure enables the detection of weak input signals while maintaining a fixed signal gain and achieving high bandwidth. Under the condition of process-voltage-temperature changes in the loop, it can still accurately convert the detection signal into a high-frequency clock signal, thereby achieving the accuracy of high-bandwidth signal transmission across isolation bands.

[0085] This disclosure also provides a current sensing chip, which includes a high-bandwidth isolated current sensing amplifier circuit as described in any of the preceding embodiments.

[0086] This disclosure also provides a current sensing chip. Figure 8 A schematic diagram of the structure of a current detection chip according to an embodiment of the present disclosure is shown.

[0087] like Figure 8 As shown, the chip includes a transmitter chip and a receiver chip; the transmitter chip includes a high-voltage side circuit and a first isolation capacitor module, and the receiver chip includes a low-voltage side circuit and a second isolation capacitor module. The high-voltage side circuit and the low-voltage side circuit are electrically isolated through the first isolation capacitor module and the second isolation capacitor module.

[0088] According to an embodiment of this disclosure, the high-voltage side circuit includes a fully differential amplifier, a first clamping amplifier, a first voltage-controlled oscillator, and a first frequency-to-voltage converter; the fully differential amplifier is connected to the resistor under test and the first clamping amplifier; the first clamping amplifier is connected to the first voltage-controlled oscillator and the first frequency-to-voltage converter; the low-voltage side circuit includes a second frequency-to-voltage converter and a voltage feedback circuit; the second frequency-to-voltage converter is connected to the voltage feedback circuit.

[0089] According to embodiments of this disclosure, the fully differential amplifier is used to differentially amplify the voltage signal under test across the resistor under test based on a first buffer reference voltage to obtain a first differential amplified voltage signal; the first clamping amplifier is used to output a first control voltage signal based on the first differential amplified voltage signal and a first feedback voltage signal obtained from the first frequency-voltage converter; the first voltage-controlled oscillator is used to convert the first control voltage signal into a first high-frequency clock signal, the frequency value of the first high-frequency clock signal being related to the first control voltage signal; the second frequency-voltage converter is used to convert a second high-frequency clock signal into a second differential amplified voltage signal, the second high-frequency clock signal being a regenerated clock signal of the first high-frequency clock signal in the low-voltage side circuit, wherein the second differential amplified voltage signal and the inverted output voltage are used to determine the current value of the circuit under test; the voltage feedback circuit is used to output a second control voltage signal based on the second differential amplified voltage signal and convert the second control voltage signal into a third high-frequency clock signal, the frequency value of the third high-frequency clock signal being related to the second control voltage signal; the first frequency-voltage converter is used to convert a fourth high-frequency clock signal into the first feedback voltage signal based on the first buffer reference voltage, the fourth high-frequency clock signal being a regenerated clock signal of the third high-frequency clock signal in the high-voltage side circuit.

[0090] According to an embodiment of this disclosure, the voltage feedback circuit includes a second voltage follower, a second clamping amplifier, a second voltage-controlled oscillator, and a third frequency-voltage converter; the second voltage follower is connected to the second frequency-voltage converter and the third frequency-voltage converter; the second clamping amplifier is connected to the second voltage-controlled oscillator, the third frequency-voltage converter, and the second frequency-voltage converter, and the second voltage-controlled oscillator is connected to the third frequency-voltage converter.

[0091] Wherein, the second voltage follower is used to buffer the input second reference voltage to output the second buffered reference voltage, which is used to provide a reference for the second differential amplified voltage signal; the third frequency-voltage converter is used to convert the third high-frequency clock signal into the second feedback voltage signal based on the second buffered reference voltage; the second clamping amplifier is used to output a second control voltage signal according to the second differential amplified voltage signal and the second feedback voltage signal received from the third frequency-voltage converter; and the second voltage-controlled oscillator is used to convert the second control voltage signal into the third high-frequency clock signal.

[0092] According to embodiments of this disclosure, the high-voltage side circuit further includes a first voltage follower connected to the fully differential amplifier and the first frequency-voltage converter; the low-voltage side circuit further includes a third voltage follower.

[0093] The first voltage follower buffers the input first reference voltage to output the first buffered reference voltage, which serves as a reference for the first differential amplified voltage signal and the first feedback voltage signal. The third voltage follower buffers the input second reference voltage to output the third buffered reference voltage, which serves as the inverted output voltage of the low-voltage side circuit.

[0094] According to embodiments of this disclosure, the high-voltage side circuit further includes a first transmitting end driving circuit and a first receiving end driving circuit; the low-voltage side circuit further includes a second transmitting end driving circuit and a second receiving end driving circuit; the clock signal output terminal of the first voltage-controlled oscillator is connected to the input terminal of the first transmitting end driving circuit, and the first transmitting end driving circuit is used to output a first high-frequency clock signal received from the first voltage-controlled oscillator to the second receiving end driving circuit through an electrical isolation barrier; the second receiving end driving circuit restores the first high-frequency clock signal to a second high-frequency clock signal; the clock signal output terminal of the second voltage-controlled oscillator is connected to the input terminal of the second transmitting end driving circuit, and the second transmitting end driving circuit is used to output a third high-frequency clock signal received from the second voltage-controlled oscillator to the first receiving end driving circuit through an electrical isolation barrier; the first receiving end driving circuit restores the third high-frequency clock signal to a fourth high-frequency clock signal; the clock signal input terminal of the first frequency-voltage converter is connected to the output terminal of the first receiving end driving circuit to receive the fourth high-frequency clock signal.

[0095] According to embodiments of this disclosure, the first isolation capacitor module includes a first isolation capacitor C1, a second isolation capacitor C2, a third isolation capacitor C3, and a fourth isolation capacitor C4, and the second isolation capacitor module includes a fifth isolation capacitor C5, a sixth isolation capacitor C6, a seventh isolation capacitor C7, and an eighth isolation capacitor C8.

[0096] Wherein, the output terminal of the first transmitting end driving circuit is connected to the first isolation capacitor and the second isolation capacitor; the input terminal of the first receiving end driving circuit is connected to the third isolation capacitor and the fourth isolation capacitor; the input terminal of the second receiving end driving circuit is connected to the fifth isolation capacitor and the sixth isolation capacitor; the output terminal of the second transmitting end driving circuit is connected to the seventh isolation capacitor and the eighth isolation capacitor; the first isolation capacitor and the fifth isolation capacitor are coupled by an electric field; the second isolation capacitor and the sixth isolation capacitor are coupled by an electric field; the third isolation capacitor and the seventh isolation capacitor are coupled by an electric field; and the fourth isolation capacitor and the eighth isolation capacitor are coupled by an electric field.

[0097] This disclosure achieves electrical isolation between the high-voltage side circuit and the low-voltage side circuit through the first isolation capacitor module and the second isolation capacitor module, and also achieves electrical isolation between the transmitter chip and the receiver chip.

[0098] This disclosure enables the detection of weak input signals while achieving high bandwidth; it also ensures that the detection signal can be accurately converted into a high-frequency clock signal under the conditions of process-voltage-temperature changes in the loop, thereby achieving the accuracy of high-bandwidth signal transmission across isolation bands.

[0099] The above description is merely a preferred embodiment of this disclosure and an explanation of the technical principles employed. Those skilled in the art should understand that the scope of the invention involved in this disclosure is not limited to technical solutions formed by specific combinations of the above-described technical features, but should also cover other technical solutions formed by arbitrary combinations of the above-described technical features or their equivalents without departing from the inventive concept. For example, technical solutions formed by substituting the above-described features with (but not limited to) technical features disclosed in this disclosure that have similar functions.

Claims

1. A high bandwidth isolated current sense amplifier circuit, comprising: The current detection amplifier circuit is used for current detection of a to-be-tested circuit, and a to-be-tested resistance is arranged in the to-be-tested circuit. The high-voltage side circuit comprises a full differential differential amplifier, a first clamping amplifier, a first voltage-controlled oscillator and a first frequency-voltage converter; the full differential differential amplifier is connected to the to-be-tested resistance and the first clamping amplifier; the first clamping amplifier is connected to the first voltage-controlled oscillator and the first frequency-voltage converter; the low-voltage side circuit comprises a second frequency-voltage converter and a voltage feedback circuit; the second frequency-voltage converter is connected to the voltage feedback circuit; The full differential differential amplifier is used for differential amplification of a to-be-tested voltage signal between the to-be-tested resistance based on a first buffered reference voltage, to obtain a first differential amplification voltage signal; the first clamping amplifier is used for outputting a first control voltage signal according to the first differential amplification voltage signal and a first feedback voltage signal received from the first frequency-voltage converter; the first voltage-controlled oscillator is used for converting the first control voltage signal into a first high-frequency clock signal, and a frequency value of the first high-frequency clock signal is related to the first control voltage signal; The second frequency-voltage converter is used for converting a second high-frequency clock signal into a second differential amplification voltage signal, and the second high-frequency clock signal is a regenerated clock signal of the first high-frequency clock signal in the low-voltage side circuit, wherein the second differential amplification voltage signal and a reverse output voltage are used for determining a current value of the to-be-tested circuit; The voltage feedback circuit is used for outputting a second control voltage signal based on the second differential amplification voltage signal, converting the second control voltage signal into a third high-frequency clock signal, and a frequency value of the third high-frequency clock signal is related to the second control voltage signal; and the first frequency-voltage converter is used for converting a fourth high-frequency clock signal into the first feedback voltage signal based on the first buffered reference voltage, and the fourth high-frequency clock signal is a regenerated clock signal of the third high-frequency clock signal in the high-voltage side circuit.

2. The current sense amplifier circuit of claim 1, wherein, The voltage feedback circuit comprises a second voltage follower, a second clamping amplifier, a second voltage-controlled oscillator and a third frequency-voltage converter; the second voltage follower is connected to the second frequency-voltage converter and the third frequency-voltage converter; the second clamping amplifier is connected to the second voltage-controlled oscillator, the third frequency-voltage converter and the second frequency-voltage converter; and the second voltage-controlled oscillator is connected to the third frequency-voltage converter; The second voltage follower is used for buffering an input second reference voltage to output a second buffered reference voltage, and the second buffered reference voltage is used for providing a reference reference for the second differential amplification voltage signal; The third frequency-voltage converter is used for converting the third high-frequency clock signal into a second feedback voltage signal based on the second buffered reference voltage. The second clamp amplifier is configured to output a second control voltage signal according to the second differential amplified voltage signal and the second feedback voltage signal received from the third frequency-to-voltage converter; The second voltage-controlled oscillator is configured to convert the second control voltage signal into a third high-frequency clock signal.

3. The current sense amplifier circuit of claim 1, wherein, The high-voltage side circuit further comprises a first voltage follower connected to the fully differential differential amplifier and the first frequency-to-voltage converter; and the low-voltage side circuit further comprises a third voltage follower. The first voltage follower is configured to buffer an input first reference voltage to output a first buffered reference voltage, which is used as a reference for the first differential amplified voltage signal and the first feedback voltage signal. The third voltage follower is configured to buffer an input second reference voltage to output a third buffered reference voltage, which is used as a reverse output voltage of the low-voltage side circuit.

4. The current sense amplifier circuit of claim 1, wherein, The fully differential differential amplifier comprises a first differential input pair, a second differential input pair, and a single-ended output terminal. The non-inverting input terminal and the inverting input terminal of the first differential input pair are connected to the two ends of the resistance to be measured. The non-inverting input terminal of the second differential input pair is connected to the single-ended output terminal, and the inverting input terminal of the second differential input pair and the single-ended output terminal are connected to form a feedback module.

5. The current detection amplifier circuit of claim 4, wherein: The feedback module comprises a first feedback resistor and a second feedback resistor. The high-voltage side circuit further comprises a first voltage follower configured to buffer an input first reference voltage to output a first buffered reference voltage, which is used as a reference for the first differential amplified voltage signal. The inverting input terminal of the second differential input pair and the single-ended output terminal are respectively connected to the two ends of the first feedback resistor. The inverting input terminal of the second differential input pair is connected to one end of the second feedback resistor, and the other end of the second feedback resistor is connected to the output terminal of the first voltage follower.

6. The current sense amplifier circuit of claim 5, wherein, The fully differential differential amplifier adjusts the differential gain of the first differential amplified voltage signal according to the resistance values of the first feedback resistor and the second feedback resistor.

7. The current sense amplifier circuit of claim 1, wherein, The non-inverting input terminal of the first clamp amplifier is connected to the single-ended output terminal of the fully differential differential amplifier, the inverting input terminal of the first clamp amplifier is connected to the feedback signal output terminal of the first frequency-to-voltage converter, and the control signal output terminal of the first clamp amplifier is connected to the control signal input terminal of the first voltage-controlled oscillator.

8. The current sense amplifier circuit of claim 1, wherein, The high-voltage side circuit further comprises a first sending end driving circuit and a first receiving end driving circuit; and the low-voltage side circuit further comprises a second sending end driving circuit and a second receiving end driving circuit. The clock signal output terminal of the first voltage-controlled oscillator is connected to the input terminal of the first sending end driving circuit, and the first sending end driving circuit is configured to output the first high-frequency clock signal received from the first voltage-controlled oscillator to the second receiving end driving circuit through an electrical isolation barrier. The second receiving end drive circuit restores the first high-frequency clock signal to the second high-frequency clock signal; The clock signal output end of the second voltage-controlled oscillator is connected to the input end of the second sending end drive circuit, and the second sending end drive circuit is used to output the third high-frequency clock signal received from the second voltage-controlled oscillator to the first receiving end drive circuit through an electrical isolation barrier; The first receiving end drive circuit restores the third high-frequency clock signal to the fourth high-frequency clock signal; The clock signal input end of the first frequency-voltage converter is connected to the output end of the first receiving end drive circuit to receive the fourth high-frequency clock signal.

9. A method for current sensing of a circuit under test using a high bandwidth isolated current sense amplifier circuit, the method comprising: The high-bandwidth isolation current detection amplifier circuit includes an electrical isolation high-voltage side circuit and a low-voltage side circuit; wherein the high-voltage side circuit includes a full-differential differential amplifier, a first clamping amplifier, a first voltage-controlled oscillator and a first frequency-voltage converter; the full-differential differential amplifier is connected to the first clamping amplifier; the first clamping amplifier is connected to the first voltage-controlled oscillator and the first frequency-voltage converter; the low-voltage side circuit includes a second frequency-voltage converter and a voltage feedback circuit; the second frequency-voltage converter is connected to the voltage feedback circuit; the method includes: The full-differential differential amplifier differentially amplifies the test voltage signal between the test resistance based on a first buffer reference voltage to obtain a first differential amplification voltage signal; The first clamping amplifier outputs a first control voltage signal according to the first differential amplification voltage signal and a first feedback voltage signal obtained from the first frequency-voltage converter; The first voltage-controlled oscillator converts the first control voltage signal into a first high-frequency clock signal, and the frequency value of the first high-frequency clock signal is related to the first control voltage signal; The second frequency-voltage converter converts a second high-frequency clock signal into a second differential amplification voltage signal, and the second high-frequency clock signal is a regenerated clock signal of the first high-frequency clock signal in the low-voltage side circuit; The current value of the test circuit is determined according to the second differential amplification voltage signal and a reverse output voltage; The voltage feedback circuit outputs a second control voltage signal based on the second differential amplification voltage signal, converts the second control voltage signal into a third high-frequency clock signal, and the frequency value of the third high-frequency clock signal is related to the second control voltage signal; and the first frequency-voltage converter converts a fourth high-frequency clock signal into the first feedback voltage signal based on the first buffer reference voltage, and the fourth high-frequency clock signal is a regenerated clock signal of the third high-frequency clock signal in the high-voltage side circuit.

10. The method of claim 9, wherein, The voltage feedback circuit comprises a second voltage follower, a second clamping amplifier, a second voltage-controlled oscillator and a third frequency-voltage converter; the second voltage follower is connected with the second frequency-voltage converter and the third frequency-voltage converter; the second clamping amplifier is connected with the second voltage-controlled oscillator, the third frequency-voltage converter and the second frequency-voltage converter; the second voltage-controlled oscillator is connected with the third frequency-voltage converter; The method further comprises: buffering, by the second voltage follower, an input second reference voltage to output a second buffered reference voltage, the second buffered reference voltage being used to provide a reference reference for the second differential amplified voltage signal; converting, by the third frequency-voltage converter, the third high-frequency clock signal into a second feedback voltage signal based on the second buffered reference voltage; outputting, by the second clamping amplifier, a second control voltage signal according to the second differential amplified voltage signal and the second feedback voltage signal received from the third frequency-voltage converter; converting, by the second voltage-controlled oscillator, the second control voltage signal into a third high-frequency clock signal.

11. The method of claim 9, wherein, The high-voltage side circuit further comprises a first voltage follower connected with the full-differential differential amplifier and the first frequency-voltage converter; The low-voltage side circuit further comprises a third voltage follower; the method further comprises: buffering, by the first voltage follower, an input first reference voltage to output the first buffered reference voltage, the first buffered reference voltage being used to provide a reference reference for the first differential amplified voltage signal and the first feedback voltage signal; buffering, by the third voltage follower, an input second reference voltage to output a third buffered reference voltage, the third buffered reference voltage being used as a reverse output voltage of the low-voltage side circuit.

12. The method of claim 9, wherein, The high-voltage side circuit further comprises a first sending-end drive circuit and a first receiving-end drive circuit; the low-voltage side circuit further comprises a second sending-end drive circuit and a second receiving-end drive circuit; a clock signal output end of the first voltage-controlled oscillator is connected with an input end of the first sending-end drive circuit; a clock signal output end of the second voltage-controlled oscillator is connected with an input end of the second sending-end drive circuit; a clock signal input end of the first frequency-voltage converter is connected with an output end of the first receiving-end drive circuit; The method further comprises: outputting, by the first sending-end drive circuit, a first high-frequency clock signal received from the first voltage-controlled oscillator to the second receiving-end drive circuit through an electrical isolation barrier; restoring, by the second receiving-end drive circuit, the first high-frequency clock signal into the second high-frequency clock signal; outputting, by the second sending-end drive circuit, a third high-frequency clock signal received from the second voltage-controlled oscillator to the first receiving-end drive circuit through an electrical isolation barrier; restoring, by the first receiving-end drive circuit, the third high-frequency clock signal into the fourth high-frequency clock signal; receiving, by the first frequency-voltage converter, the fourth high-frequency clock signal.

13. A current sense chip, characterized by, The high-bandwidth isolated current detection amplifier circuit according to any one of claims 1-8.

14. A current sensing chip, characterized by, The transmitter chip includes a high-voltage side circuit and a first isolation capacitor module, and the receiver chip includes a low-voltage side circuit and a second isolation capacitor module, and the high-voltage side circuit and the low-voltage side circuit are electrically isolated by the first isolation capacitor module and the second isolation capacitor module; The high-voltage side circuit includes a full-differential differential amplifier, a first clamping amplifier, a first voltage-controlled oscillator, and a first frequency-voltage converter; The full-differential differential amplifier is connected to the to-be-measured resistance and the first clamping amplifier; the first clamping amplifier is connected to the first voltage-controlled oscillator and the first frequency-voltage converter; the low-voltage side circuit includes a second frequency-voltage converter and a voltage feedback circuit; the second frequency-voltage converter is connected to the voltage feedback circuit; The full-differential differential amplifier is used to differentially amplify the to-be-measured voltage signal across the to-be-measured resistance based on a first buffered reference voltage, to obtain a first differential amplified voltage signal; the first clamping amplifier is used to output a first control voltage signal according to the first differential amplified voltage signal and a first feedback voltage signal obtained from the first frequency-voltage converter; the first voltage-controlled oscillator is used to convert the first control voltage signal into a first high-frequency clock signal, and the frequency value of the first high-frequency clock signal is related to the first control voltage signal; The second frequency-voltage converter is used to convert a second high-frequency clock signal into a second differential amplified voltage signal, and the second high-frequency clock signal is a regenerated clock signal of the first high-frequency clock signal in the low-voltage side circuit, wherein the second differential amplified voltage signal and a reverse output voltage are used to determine the current value of the to-be-measured circuit; The voltage feedback circuit is used to output a second control voltage signal based on the second differential amplified voltage signal, and convert the second control voltage signal into a third high-frequency clock signal, and the frequency value of the third high-frequency clock signal is related to the second control voltage signal; and the first frequency-voltage converter is used to convert a fourth high-frequency clock signal into the first feedback voltage signal based on the first buffered reference voltage, and the fourth high-frequency clock signal is a regenerated clock signal of the third high-frequency clock signal in the high-voltage side circuit.

15. The chip of claim 14, wherein, The voltage feedback circuit includes a second voltage follower, a second clamping amplifier, a second voltage-controlled oscillator, and a third frequency-voltage converter; the second voltage follower is connected to the second frequency-voltage converter and the third frequency-voltage converter; the second clamping amplifier is connected to the second voltage-controlled oscillator, the third frequency-voltage converter, and the second frequency-voltage converter; and the second voltage-controlled oscillator is connected to the third frequency-voltage converter; The second voltage follower is used to buffer an input second reference voltage to output a second buffered reference voltage, and the second buffered reference voltage is used to provide a reference reference for the second differential amplified voltage signal; The third frequency-voltage converter is configured to convert the third high-frequency clock signal into the second feedback voltage signal based on the second buffered reference voltage; The second clamping amplifier is configured to output a second control voltage signal according to the second differential amplification voltage signal and the second feedback voltage signal received from the third frequency-voltage converter; The second voltage-controlled oscillator is configured to convert the second control voltage signal into a third high-frequency clock signal.

16. The chip of claim 14, wherein, The high-voltage side circuit further comprises a first voltage follower connected to the fully differential differential amplifier and the first frequency-voltage converter; and the low-voltage side circuit further comprises a third voltage follower; The first voltage follower is configured to buffer an input first reference voltage to output a first buffered reference voltage, which is used as a reference for the first differential amplification voltage signal and the first feedback voltage signal; The third voltage follower is configured to buffer an input second reference voltage to output a third buffered reference voltage, which is used as a reverse output voltage of the low-voltage side circuit.

17. The chip of claim 14, wherein, The high-voltage side circuit further comprises a first sending-end drive circuit and a first receiving-end drive circuit; and the low-voltage side circuit further comprises a second sending-end drive circuit and a second receiving-end drive circuit; The clock signal output end of the first voltage-controlled oscillator is connected to the input end of the first sending-end drive circuit, and the first sending-end drive circuit is configured to output a first high-frequency clock signal received from the first voltage-controlled oscillator to the second receiving-end drive circuit through an electrical isolation barrier; The second receiving-end drive circuit restores the first high-frequency clock signal into a second high-frequency clock signal; The clock signal output end of the second voltage-controlled oscillator is connected to the input end of the second sending-end drive circuit, and the second sending-end drive circuit is configured to output a third high-frequency clock signal received from the second voltage-controlled oscillator to the first receiving-end drive circuit through an electrical isolation barrier; The first receiving-end drive circuit restores the third high-frequency clock signal into a fourth high-frequency clock signal; The clock signal input end of the first frequency-voltage converter is connected to the output end of the first receiving-end drive circuit to receive the fourth high-frequency clock signal.

18. The chip of claim 17, wherein: The first isolation capacitor module comprises a first isolation capacitor, a second isolation capacitor, a third isolation capacitor, and a fourth isolation capacitor, and the second isolation capacitor module comprises a fifth isolation capacitor, a sixth isolation capacitor, a seventh isolation capacitor, and an eighth isolation capacitor; The output end of the first sending-end drive circuit is connected to the first isolation capacitor and the second isolation capacitor; The input end of the first receiving-end drive circuit is connected to the third isolation capacitor and the fourth isolation capacitor; The input end of the second receiving-end drive circuit is connected to the fifth isolation capacitor and the sixth isolation capacitor; The output end of the second sending-end drive circuit is connected to the seventh isolation capacitor and the eighth isolation capacitor; The first isolation capacitor and the fifth isolation capacitor are coupled through an electric field; The second isolation capacitor and the sixth isolation capacitor are coupled through an electric field; The third isolation capacitor and the seventh isolation capacitor are coupled through an electric field; The fourth isolation capacitor and the eighth isolation capacitor are coupled through an electric field.

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