Reducing the equivalent series resistance of a power management circuit during a single transmission

Abstract

Disclosed herein is reducing equivalent series resistance (ESR) of a power management circuit during a single transmission. The power management circuit includes a plurality of power amplifier circuits each configured to amplify a signal for transmission. The power management circuit includes a main multi-stage charge pump (MCP), a first voltage modulation circuit, a light-weight MCP, and a second voltage modulation circuit. When only one of the power amplifiers is active to amplify a signal for a single transmission, the power management circuit will opportunistically couple the main MCP, the first voltage modulation circuit, the light-weight MCP, and the second voltage modulation circuit to the active power amplifier. Thus, the active power amplifier will see a reduced ESR collectively presented by the main MCP, the first voltage modulation circuit, the light-weight MCP, and the second voltage modulation circuit, and can therefore operate with improved efficiency during the single transmission.

Description

[0001] Cross-references to related applications

[0002] This application claims the benefit of U.S. Provisional Patent Application Serial No. 63 / 733,476, filed December 13, 2024, and U.S. Provisional Patent Application Serial No. 63 / 747,443, filed January 21, 2025, the disclosure of which is hereby incorporated herein by reference in its entirety. Technical Field

[0003] The present disclosure generally relates to improving the efficiency of power management circuitry during a single transmission. Background Technology

[0004] Mobile communication devices have become increasingly prevalent in modern society for providing wireless communication services. The functionality of these devices is driven in part by the many features now enabled on them. The increased processing power in these devices means that they have evolved from mere communication tools into sophisticated mobile multimedia hubs capable of enhancing the user experience.

[0005] Modern mobile communication devices must be able to transmit radio frequency (RF) signals across various wireless communication systems, such as LTE and NR, based on multiple transmit / receive configurations, including uplink / downlink MIMO (UL / DL-MIMO), enhanced dual connectivity (EN-DC), and diversity reception (DRX). For example, numerous multitransmitter proposals have been put forward for 3GPP Release 18 to support concurrent UL-MIMO and EN-DC transmissions across multiple RF bands. This requires wireless communication devices to transmit at least three RF signals simultaneously (2xMIMO + 1xEN-DC). Consequently, mobile communication devices must employ power management circuitry capable of supporting multiple power amplifiers simultaneously for multiple concurrent transmissions. Furthermore, the mobile communication device must also operate efficiently when only one power amplifier is used for transmission. Summary of the Invention

[0006] Embodiments of this disclosure relate to reducing the equivalent series resistance (ESR) in a power management circuit during a single transmission. Herein, the power management circuit includes multiple power amplifier circuits, each configured to amplify a signal for transmission. The power management circuit includes a main multistage charge pump (MCP) and a first voltage modulation circuit, as well as a lightweight MCP and a second voltage modulation circuit. The main MCP and the first voltage modulation circuit can provide a first low-frequency current and a first modulation voltage at a first voltage output, and the lightweight MCP and the second voltage modulation circuit can provide a second low-frequency current and a second modulation voltage at a second voltage output. When only one of the power amplifiers is actively amplifying the signal for a single transmission, the power management circuit opportunistically couples the main MCP, the first voltage modulation circuit, the lightweight MCP, and the second voltage modulation circuit to the active power amplifier to simultaneously provide the first low-frequency current, the first modulation voltage, the second low-frequency current, and the second modulation voltage to the active power amplifier. Therefore, the active power amplifier will see a reduced ESR resulting from the main MCP, the first voltage modulation circuit, the lightweight MCP, and the second voltage modulation circuit. Consequently, the active power amplifier can operate with improved efficiency during the single transmission.

[0007] On one hand, a power management circuit is provided. The power management circuit includes a plurality of power amplifier circuits. Each of the plurality of power amplifier circuits is configured to amplify a signal based on one of a first modulation voltage and a second modulation voltage. The power management circuit also includes a dual-output voltage conversion circuit. The dual-output voltage conversion circuit includes a main MCP. The main MCP is configured to generate a first low-frequency voltage as a function of a battery voltage, thereby inducing a first low-frequency current at a first voltage output. The dual-output voltage conversion circuit also includes a lightweight MCP. The lightweight MCP is configured to receive a transfer voltage higher than the battery voltage from the main MCP and generate a second low-frequency voltage as a function of the transfer voltage, thereby inducing a second low-frequency current at a second voltage output. The power management circuit also includes a first voltage modulation circuit. The first voltage modulation circuit is configured to generate the first modulation voltage at the first voltage output based on a first modulation target voltage. The power management circuit also includes a second voltage modulation circuit. The second voltage modulation circuit is configured to generate the second modulation voltage at a second voltage output based on a second modulation target voltage. The power management circuit also includes a control circuit. The control circuit is configured to determine that only one of the plurality of power amplifier circuits is active to amplify the signal. The control circuit is also configured to cause the main MCP and the lightweight MCP to simultaneously provide the first low-frequency current and the second low-frequency current to the determined power amplifier circuit among the plurality of power amplifier circuits. The control circuit is further configured to cause the first voltage modulation circuit and the second voltage modulation circuit to simultaneously provide the first modulation voltage and the second modulation voltage to the determined power amplifier circuit among the plurality of power amplifier circuits.

[0008] On the other hand, a wireless device is provided. The wireless device includes a power management circuit. The power management circuit includes a plurality of power amplifier circuits. Each of the plurality of power amplifier circuits is configured to amplify a signal based on one of a first modulation voltage and a second modulation voltage. The power management circuit also includes a dual-output voltage conversion circuit. The dual-output voltage conversion circuit includes a main MCP. The main MCP is configured to generate a first low-frequency voltage as a function of a battery voltage, thereby inducing a first low-frequency current at a first voltage output. The dual-output voltage conversion circuit also includes a lightweight MCP. The lightweight MCP is configured to receive a transfer voltage higher than the battery voltage from the main MCP and generate a second low-frequency voltage as a function of the transfer voltage, thereby inducing a second low-frequency current at a second voltage output. The power management circuit also includes a first voltage modulation circuit. The first voltage modulation circuit is configured to generate the first modulation voltage at the first voltage output based on a first modulation target voltage. The power management circuit also includes a second voltage modulation circuit. The second voltage modulation circuit is configured to generate the second modulation voltage at the second voltage output based on a second modulation target voltage. The power management circuit also includes a control circuit. The control circuit is configured to determine that only one of the plurality of power amplifier circuits is active to amplify the signal. The control circuit is also configured to cause the main MCP and the lightweight MCP to simultaneously provide the first low-frequency current and the second low-frequency current to the determined power amplifier circuit among the plurality of power amplifier circuits. The control circuit is further configured to cause the first voltage modulation circuit and the second voltage modulation circuit to simultaneously provide the first modulation voltage and the second modulation voltage to the determined power amplifier circuit among the plurality of power amplifier circuits.

[0009] On the other hand, a method is provided for reducing the ESR of a power management circuit during a single transmission. The method includes amplifying a signal based on one of a first modulation voltage and a second modulation voltage. The method further includes generating a first low-frequency voltage as a function of a battery voltage, thereby inducing a first low-frequency current at a first voltage output. The method further includes receiving a transfer voltage higher than the battery voltage and generating a second low-frequency voltage as a function of the transfer voltage, thereby inducing a second low-frequency current at a second voltage output. The method further includes generating the first modulation voltage at the first voltage output based on a first modulation target voltage. The method further includes generating the second modulation voltage at the second voltage output based on a second modulation target voltage. The method further includes determining that only one of a plurality of power amplifier circuits is active to amplify the signal. The method further includes simultaneously providing the first low-frequency current and the second low-frequency current to the determined power amplifier circuit among the plurality of power amplifier circuits. The method further includes simultaneously providing the first modulation voltage and the second modulation voltage to the determined power amplifier circuit among the plurality of power amplifier circuits.

[0010] Those skilled in the art will recognize the scope of this disclosure and understand its other aspects after reading the following detailed description of preferred embodiments and the accompanying drawings. Attached Figure Description

[0011] The accompanying drawings, which are incorporated in and form a part of this specification, illustrate several aspects of this disclosure and, together with the specification, serve to explain the principles of this disclosure.

[0012] Figure 1 This is a schematic diagram of an exemplary wireless device that can be configured, according to embodiments of the present disclosure, to reduce the equivalent series resistance (ESR) of a power management circuit during a single transmission.

[0013] Figure 2 It provides Figure 1 A schematic diagram of an exemplary power management circuit in a wireless device;

[0014] Figure 3A and Figure 3B This is a schematic diagram illustrating an exemplary dual-output voltage conversion circuit, which can be set in... Figure 2 In the power management circuit and configured to operate based on various embodiments of this disclosure;

[0015] Figure 4 This is a schematic diagram of an exemplary communication device, in which the following can be provided: Figure 2 The power management circuit; and

[0016] Figure 5 It decreases during a single transmission. Figure 2 A flowchart illustrating an exemplary process of ESR in a power management circuit. Detailed Implementation

[0017] The embodiments described below illustrate the information necessary to enable those skilled in the art to practice the embodiments and demonstrate the best mode of practice. After reading the following description with reference to the accompanying drawings, those skilled in the art will understand the concepts of this disclosure and will appreciate the application of these concepts, even those not specifically set forth herein. It should be understood that these concepts and applications fall within the scope of this disclosure and the appended claims.

[0018] It will be understood that while the terms first, second, etc., may be used herein to describe various elements, these elements should not be limited by these terms. These terms are used only to distinguish one element from another. For example, without departing from the scope of this disclosure, a first element may be referred to as a second element, and similarly, a second element may be referred to as a first element. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0019] It should be understood that when an element, such as a layer, region, or substrate, is referred to as "on another element" or "extending to another element," it may be directly located on or directly extended to the other element, or intermediate elements may be present. Conversely, when an element is referred to as "directly located on another element" or "directly extended to another element," no intermediate elements are present. Similarly, it should be understood that when an element, such as a layer, region, or substrate, is referred to as "on top of another element" or "extending over another element," it may be directly located on top of or directly extended over the other element, or intermediate elements may be present. Conversely, when an element is referred to as "directly located on top of another element" or "extending directly over another element," no intermediate elements are present. It will also be understood that when an element is referred to as "connected" or "coupled" to another element, it may be directly connected to or coupled to the other element, or intermediate elements may be present. Conversely, when an element is referred to as "directly connected" or "directly coupled" to another element, no intermediate elements are present.

[0020] For example, relative terms such as “below” or “above” or “upper” or “lower” or “horizontal” or “vertical” may be used herein to describe the relationship of one element, layer, or region to another element, layer, or region as shown in the figures. It should be understood that these terms, and those discussed above, are intended to include different orientations of the device other than those depicted in the figures.

[0021] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit this disclosure. As used herein, unless the context clearly indicates otherwise, the singular forms “a”, “an”, and “described” are also intended to include the plural forms. It should also be understood that, when used herein, the terms “comprises,” “comprising,” “includes,” and / or “including” specify the presence of the stated features, integers, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.

[0022] Unless otherwise defined, all terms used herein (including technical and scientific terms) shall have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure pertains. It will be further understood that, unless expressly defined herein, the terms used herein shall be interpreted as having the same meaning as they have in the context of this specification and in the relevant art, and shall not be interpreted in an idealized or overly formal sense.

[0023] Embodiments of this disclosure relate to reducing the equivalent series resistance (ESR) in a power management circuit during a single transmission. Herein, the power management circuit includes multiple power amplifier circuits, each configured to amplify a signal for transmission. The power management circuit includes a main multistage charge pump (MCP) and a first voltage modulation circuit, as well as a lightweight MCP and a second voltage modulation circuit. The main MCP and the first voltage modulation circuit can provide a first low-frequency current and a first modulation voltage at a first voltage output, and the lightweight MCP and the second voltage modulation circuit can provide a second low-frequency current and a second modulation voltage at a second voltage output. When only one of the power amplifiers is actively amplifying the signal for a single transmission, the power management circuit opportunistically couples the main MCP, the first voltage modulation circuit, the lightweight MCP, and the second voltage modulation circuit to the active power amplifier to simultaneously provide the first low-frequency current, the first modulation voltage, the second low-frequency current, and the second modulation voltage to the active power amplifier. Therefore, the active power amplifier will see a reduced ESR resulting from the main MCP, the first voltage modulation circuit, the lightweight MCP, and the second voltage modulation circuit. Consequently, the active power amplifier can operate with improved efficiency during the single transmission.

[0024] Figure 1This is a schematic diagram of an exemplary wireless device 10, which may be configured, according to embodiments of the present disclosure, to reduce the ESR of the power management circuitry 12 during a single transmission. In an embodiment, the wireless device 10 includes a first antenna 14A, a second antenna 14B, and a third antenna 14C. In a non-limiting example, the first antenna 14A and the second antenna 14B are disposed on the lower edge 16L of the wireless device 10, while the third antenna 14C is disposed on the upper edge 16U of the wireless device 10.

[0025] In an exemplary embodiment, the power management circuit 12 further includes a first power amplifier circuit 18A, a second power amplifier circuit 18B, and a third power amplifier circuit 18C. The first power amplifier circuit 18A and the second power amplifier circuit 18B are respectively positioned closer to the first antenna 14A and the second antenna 14B than the third antenna 14C to help reduce coupling distortion. Similarly, the third power amplifier circuit 18C is positioned closer to the third antenna 14C than the first antenna 14A and the second antenna 14B, thereby reducing coupling distortion therein.

[0026] The wireless device 10 can be configured to transmit via any one or more of the first antenna 14A, the second antenna 14B, and the third antenna 14C. In one example, the wireless device 10 can operate in multiple-input multiple-output (MIMO) mode to transmit simultaneously via the first antenna 14A and the second antenna 14B. Alternatively, the wireless device 10 can also operate in MIMO mode to transmit simultaneously via the third antenna 14C and any one of the first antenna 14A and the second antenna 14B. In another example, the wireless device 10 can operate in both MIMO mode and enhanced dual connectivity (EN-DC) mode to transmit simultaneously via the first antenna 14A, the second antenna 14B, and the third antenna 14C. In yet another example, the wireless device 10 can operate in a legacy mode to transmit only via the third antenna 14C.

[0027] In one embodiment, the power management circuit 12 includes a power management integrated circuit (PMIC) 19 and a switching circuit 20. As further described below, the PMIC 19 is configured to simultaneously generate a first modulation voltage V. CC1 First low-frequency current I DC1 Second modulation voltage V CC2 Second low-frequency current I DC2 The switching circuit 20 includes various types of switches (not shown), which can adjust the first modulation voltage V according to a specific operating mode of the power management circuit 12. CC1 First low-frequency current I DC1 Second modulation voltage V CC2 Second low-frequency current I DC2Any one or more of the first power amplifier circuit 18A, the second power amplifier circuit 18B, and the third power amplifier circuit 18C are provided to any one or more of the third power amplifier circuit 18C.

[0028] Figure 2 It provides Figure 1 A schematic diagram of an exemplary power management circuit 12 in the wireless device 10. Figure 1 and Figure 2 Common components are shown with common component numbers and will not be described again in this article.

[0029] PMIC 19 includes a first voltage modulation circuit 22 and a second voltage modulation circuit 24. In this document, the first voltage modulation circuit 22 is configured to modulate based on a first modulation target voltage V. TGT1 The first modulation voltage V is generated at the first voltage output 26. CC1 Furthermore, the second voltage modulation circuit 24 is configured to modulate based on the second modulation target voltage V. TGT2 The second modulation voltage V is generated at the second voltage output 28. CC2 In this paper, the term "modulation voltage" refers to the voltage generated based on the time-varying power envelope of a radio frequency (RF) signal (e.g., the first modulation voltage V). CC1 First modulation target voltage V TGT1 Second modulation voltage V CC2 Second modulation target voltage V TGT2 ).

[0030] PMIC 19 also includes a dual-output voltage conversion circuit 30, which provides a first low-frequency current I at the first voltage output 26 and the second voltage output 28, respectively. DC1 Second low-frequency current I DC2 Specifically, the dual-output voltage conversion circuit 30 includes a main MCP 32 and a lightweight MCP 34. The main MCP 32 and the lightweight MCP 34 are configured to simultaneously generate a first low-frequency voltage V at a first low-frequency voltage output 36 and a second low-frequency voltage output 38, respectively. DC1 Second low-frequency voltage V DC2 In a non-limiting example, the first low-frequency voltage V DC1 Second low-frequency voltage V DC2 Each of them can be a direct current (DC) voltage.

[0031] In this embodiment, the main MCP 32 is a buck-boost DC-DC voltage converter circuit that can switch between buck and boost modes to generate a first low-frequency voltage V. DC1 As the battery voltage V BATThe function (e.g., a multiple). On the other hand, the lightweight MCP 34 can be a step-down DC-DC voltage converter circuit that receives voltages higher than the battery voltage V from the main MCP 32. BAT Transfer voltage V TX Therefore, the lightweight MCP 34 can generate a second low-frequency voltage V. DC2 As the transfer voltage V TX A function (e.g., a fraction). Based on a voltage higher than the battery voltage V. BAT Transfer voltage V TX Running this can eliminate the increased battery voltage V in the lightweight MCP 34. BAT Some components are required (e.g., capacitors). Therefore, the overall footprint of the lightweight MCP 34 and the dual-output voltage conversion circuit 30 can be reduced.

[0032] In this embodiment, the main MCP 32 is configured to be equal to 2×V. BAT Transfer voltage V TX (V) TX = 2×V BAT This is provided to the lightweight MCP 34. The lightweight MCP 34 can be configured to operate at a transfer voltage V. TX One times (1×V) TX = 2×V BAT ), transfer voltage V TX Half of (0.5×V) TX = 1×V BAT ) and transfer voltage V TX Zero times (0×V) TX = 0×V BAT Switching between these frequencies generates a second low-frequency voltage V. DC2 .

[0033] PMIC 19 also includes a first power inductor L P1 Second power inductor L P2 The first power inductor L is coupled between the first low-frequency voltage output 36 and the first voltage output 26. P1 It can be based on the first low-frequency voltage V DC1 A first low-frequency current I is induced at the first voltage output point 26. DC1 The second power inductor L is coupled between the second low-frequency voltage output 38 and the second voltage output 28. P2 It can be based on the second low-frequency voltage V DC2 A second low-frequency current I is induced at the second voltage output 28. DC2 .

[0034] PMIC 19 also includes control circuitry 40. In an embodiment, control circuitry 40 can control the main MCP 32 and the lightweight MCP 34 via a first duty cycle signal 42 and a second duty cycle signal 44, respectively. In an embodiment, switching circuitry 20 includes a plurality of switches S coupled as shown. 1-1 S 1-2 S 1-3 S 2-1、 S 2-2 S 2-3 Therefore, the control circuit 40 can also control the switching circuit 20 by switching the control signal 46, thereby adjusting the first modulation voltage V. CC1 First low-frequency current I DC1 Second modulation voltage V CC2 Second low-frequency current I DC2 Any one or more of the first power amplifier circuit 18A, the second power amplifier circuit 18B, and the third power amplifier circuit 18C are provided to any one or more of the third power amplifier circuit 18C.

[0035] The dual-output voltage conversion circuit 30 can be configured according to various embodiments of the present disclosure, which are referred to in reference to... Figure 3A and Figure 3B Further description. Figure 2 , Figure 3A and Figure 3B Common elements between them are shown with common element reference numerals in the accompanying drawings, and will not be described again herein.

[0036] Figure 3A This is a schematic diagram of an exemplary dual-output voltage conversion circuit 30A, which can be configured as a dual-output voltage conversion circuit 30. Figure 2 In the power management circuit 12. In this paper, the dual output voltage conversion circuit 30A includes a main MCP 32A and a lightweight MCP 34.

[0037] In this embodiment, the main MCP 32A includes a first buck-boost voltage converter 48A and a second buck-boost voltage converter 50A. The first buck-boost voltage converter 48A and the second buck-boost voltage converter 50A are coupled in parallel to the battery voltage V. BAT Between the first low-frequency voltage output 36 and the second buck-boost voltage converter 50A, the first buck-boost voltage converter 48A and the second buck-boost voltage converter 50A are configured to alternately transfer the voltage V. TX Provided to the lightweight MCP 34. As described below, a first buck-boost voltage converter 48A and a second buck-boost voltage converter 50A are configured to alternately transfer the voltage V. TXThe lightweight MCP 34 is provided with a feature that ensures it can consistently receive voltages equal to the battery voltage V. BAT Twice the transfer voltage V TX .

[0038] The main MCP 32A can be configured to include a first common switch SW_A and a second common switch SW_B. The first common switch SW_A can be coupled to the battery voltage V. BAT Between the first low-frequency voltage output 36 and the second common switch SW_B, the first low-frequency voltage output 36 and ground (GND) can be coupled.

[0039] The first buck-boost voltage converter 48A includes coupling to a battery voltage V. BAT With the corresponding first intermediate node N 1A The corresponding first switch SW1_1 is coupled in series at the corresponding first intermediate node N. 1A A corresponding pair of second switches SW1_21, SW1_22 (also referred to as "first stacked switches") between the first low-frequency voltage output 36 and the battery voltage V are coupled to the battery voltage V. BAT With the corresponding second intermediate node N 1B The corresponding third switch SW1_3 is coupled to the corresponding second intermediate node N. 1B The corresponding fourth switch SW1_4 between GND and the corresponding first intermediate node N are coupled together. 1A With the corresponding second intermediate node N 1B The corresponding flying capacitor C1 between them.

[0040] The second buck-boost voltage converter 50A includes coupling to the battery voltage V. BAT With the corresponding first intermediate node N 2A The corresponding first switch SW2_1 is coupled in series at the corresponding first intermediate node N. 2A A corresponding pair of second switches SW2_21, SW2_22 (also referred to as "second stacked switches") between the first low-frequency voltage output 36 and the battery voltage V are coupled to the battery voltage V. BAT With the corresponding second intermediate node N 2B The corresponding third switch SW2_3 is coupled to the corresponding second intermediate node N. 2B The corresponding fourth switch SW2_4 between GND and the corresponding first intermediate node N are coupled together. 2A With the corresponding second intermediate node N 2B The corresponding flying capacitor C2 between them.

[0041] One particular advantage of using stacked switches SW1_21 and SW1_22 is that when the second common switch SW_B is closed, the stacked switches SW1_21 and SW1_22 in the first buck-boost voltage converter 48A can be protected from the corresponding first intermediate node N. 1A The 2×V presented at the location BAT Damage. Similarly, when the second common switch SW_B is closed, the corresponding pair of second switches SW2_21 and SW2_22 in the second buck-boost voltage converter 50A can be protected from the corresponding first intermediate node N. 2A The 2×V presented at the location BAT Damage. Therefore, the main MCP32 can be run with a shorter duty cycle than the lightweight MCP 14.

[0042] According to embodiments of this disclosure, the corresponding first intermediate node N in the first buck-boost voltage converter 48A 1A The corresponding first intermediate node N in the second buck-boost voltage converter 50A 2A Each is coupled to a lightweight MCP 34. Therefore, the first buck-boost voltage converter 48A and the second buck-boost voltage converter 50A are configured to alternately couple to their respective first intermediate nodes N. 1A and the corresponding first intermediate node N 2A To the lightweight MCP 34, to alternately transfer voltage V TX Provided to lightweight MCP 34.

[0043] In a non-limiting example, the main MCP 32A can output 1×V at the first low-frequency voltage output 36 by simply closing the first common switch SW_A. BAT And by closing only the second common switch SW_B, 0×V is output at the first low-frequency voltage output 36. BAT To output 2×V at the first low-frequency voltage output point 36. BAT The main MCP 32A must first charge the first flying capacitor C1 and / or the second flying capacitor C2 to the battery voltage V. BAT .

[0044] In this example, the first buck-boost voltage converter 48A is configured to output 2×V at the first low-frequency voltage output 36. BAT First, close the corresponding first switch SW1_1 and the corresponding fourth switch SW1_4, and simultaneously open the corresponding second switches SW1_21, SW1_22 and the corresponding third switch SW1_3, thereby charging the first flying capacitor C1 to the corresponding first intermediate node N. 1AThe battery voltage at that location. Subsequently, the corresponding second switches SW1_21, SW1_22 and the corresponding third switch SW1_3 close, while the corresponding first switch SW1_1 and the corresponding fourth switch SW1_4 open. Therefore, the corresponding first intermediate node N... 1A The voltage at that point will be equal to 2 × V BAT Therefore, the first buck-boost voltage converter 48A can output 2×V at the first low-frequency voltage output 36. BAT And through the corresponding first intermediate node N 1A This will be essentially equal to 2 × V BAT Transfer voltage V TX Provided to the lightweight MCP 34. In this paper, when the transfer voltage V TX The difference between them is equal to 2 × V BAT ±1% (V TX ≈ 2×V BAT At ±1%), the transfer voltage V TX It is said to be essentially equal to (also known as approximately equal to) 2 × V BAT .

[0045] In another example, to configure a second buck-boost voltage converter 50A to output 2×V at the first low-frequency voltage output 36 BAT First, close the corresponding first switch SW2_1 and the corresponding fourth switch SW2_4, and simultaneously open the corresponding second switches SW2_21, SW2_22 and the corresponding third switch SW2_3, thereby charging the second flying capacitor C2 to the corresponding first intermediate node N. 2A The battery voltage at that location. Subsequently, the corresponding second switches SW2_21, SW2_22 and the corresponding third switch SW2_3 close, while the corresponding first switch SW2_1 and the corresponding fourth switch SW2_4 open. Therefore, the corresponding first intermediate node N... 2A The voltage at that point will be equal to 2 × V BAT Therefore, the second buck-boost voltage converter 50A can output 2×V at the first low-frequency voltage output 36. BAT And through the corresponding first intermediate node N 2A This will be essentially equal to 2 × V BAT Transfer voltage V TX Provided to lightweight MCP 34.

[0046] In this embodiment, to ensure that the lightweight MCP 34 can consistently receive essentially 2 × V BAT Transfer voltage V TXThe main MCP 32A can be configured to alternately charge the first flying capacitor C1 in the first buck-boost voltage converter 48A and the second flying capacitor C2 in the second buck-boost voltage converter 50A. Specifically, the corresponding second switches SW1_21, SW1_22 and the corresponding third switch SW1_3 in the first buck-boost voltage converter 48A can be closed to pass through the corresponding first intermediate node N. 1A This will be essentially equal to 2 × V BAT Transfer voltage V TX Provided to the lightweight MCP 34. Simultaneously, the corresponding first switch SW2_1 and the corresponding fourth switch SW2_4 in the second buck-boost voltage converter 50A are closed to charge the corresponding second flying capacitor C2 to the battery voltage V. BAT When the corresponding second flying capacitor C2 is charged to the battery voltage V... BAT At that time, the corresponding second switches SW2_21, SW2_22 and the corresponding third switch SW2_3 in the second buck-boost voltage converter 50A are closed to allow the corresponding first intermediate node N to pass through. 2A This will be essentially equal to 2 × V BAT Transfer voltage V TX Provided to the lightweight MCP 34. Simultaneously, the corresponding first switch SW1_1 and the corresponding fourth switch SW1_4 in the first buck-boost voltage converter 48A are closed to charge the corresponding first flying capacitor C1 to the battery voltage V. BAT .

[0047] The lightweight MCP 34 includes a third common switch SW_C coupled between the second low-frequency voltage output 38 and GND. The lightweight MCP 34 also includes a first switch SW3_1, a second switch SW4_1, and a third switch SW3+4_2. Specifically, the first switch SW3_1 is coupled to a corresponding first intermediate node N in the first buck-boost voltage converter 48A. 1A Between the common node 52 and the corresponding first intermediate node N in the second buck-boost voltage converter 50A, the second switch SW4_1 is coupled. 2A Between the common node 52 and the third switch SW3+4_2, the third switch is coupled between the common node 52 and the second low-frequency voltage output 38.

[0048] The third common switch SW_C can be closed to output 0×V at the second low-frequency voltage output 38. BAT To output 2×V at the second low-frequency voltage output 38. BAT When the first buck-boost voltage converter 48A passes through the corresponding first intermediate node N 1A Provide transfer voltage V TXWhen this occurs, the first switch SW3_1 and the third switch SW3+4_2 can be closed. Alternatively, when the second buck-boost voltage converter 50A passes through the corresponding first intermediate node N... 2A Provide transfer voltage V TX At this time, the second switch SW4_1 and the third switch SW3+4_2 can be closed. The lightweight MCP 34 can operate at 0×V with a 50% duty cycle. BAT With 2×V BAT Switching between these modes, thus outputting 1×V at the second low-frequency voltage output 38. BAT .

[0049] Figure 3B This is a schematic diagram of an exemplary dual-output voltage conversion circuit 30B, which can be configured as a dual-output voltage conversion circuit 30. Figure 2 In the power management circuit 12. In this paper, the dual output voltage conversion circuit 30B includes a main MCP 32B and a lightweight MCP 34.

[0050] In this embodiment, the main MCP 32B includes a first buck-boost voltage converter 48B and a second buck-boost voltage converter 50B. The first buck-boost voltage converter 48B and the second buck-boost voltage converter 50B are coupled in parallel to the battery voltage V. BAT Between the first low-frequency voltage output 36 and the second buck-boost voltage converter 50B, the first buck-boost voltage converter 48B and the second buck-boost voltage converter 50B are configured to alternately transfer the voltage V. TX Provided to lightweight MCP 34.

[0051] The first buck-boost voltage converter 48B includes coupling to the battery voltage V. BAT With the corresponding first intermediate node N 1A The corresponding first switch SW1_1 is coupled to the corresponding first intermediate node N. 1A The corresponding second switch SW1_2 between coupling node 54, the corresponding common switch SW1+2_2 between coupling node 54 and the first low-frequency voltage output 36, and the battery voltage V BAT With the corresponding second intermediate node N 1B The corresponding third switch SW1_3 is coupled to the corresponding second intermediate node N. 1B The corresponding fourth switch SW1_4 between GND and the corresponding first intermediate node N are coupled together. 1A With the corresponding second intermediate node N 1B The corresponding flying capacitor C1 between them.

[0052] The second buck-boost voltage converter 50B includes coupling to the battery voltage V.BAT With the corresponding first intermediate node N 2A The corresponding first switch SW2_1 is coupled to the corresponding first intermediate node N. 2A The corresponding second switch SW2_2 between the coupling node 54 and the battery voltage V is coupled to the battery voltage V. BAT With the corresponding second intermediate node N 2B The corresponding third switch SW2_3 is coupled to the corresponding second intermediate node N. 2B The corresponding fourth switch SW2_4 between GND and the corresponding first intermediate node N are coupled together. 2A With the corresponding second intermediate node N 2B The corresponding flying capacitor C2 between them.

[0053] In this example, the first buck-boost voltage converter 48B is configured to output 2×V at the first low-frequency voltage output 36. BAT First, close the corresponding first switch SW1_1 and the corresponding fourth switch SW1_4, and simultaneously open the corresponding second switch SW1_2, the common switch SW1+2_2, and the corresponding third switch SW1_3, thereby charging the first flying capacitor C1 to the corresponding first intermediate node N. 1A The battery voltage at that location. Subsequently, the corresponding second switch SW1_2, the common switch SW1+2_2, and the corresponding third switch SW1_3 are closed, while the corresponding first switch SW1_1 and the corresponding fourth switch SW1_4 are opened. Therefore, the corresponding first intermediate node N... 1A The voltage at that point will be equal to 2 × V BAT Therefore, the first buck-boost voltage converter 48B can output 2×V at the first low-frequency voltage output 36. BAT And through the corresponding first intermediate node N 1A This will be essentially equal to 2 × V BAT Transfer voltage V TX Provided to lightweight MCP 34.

[0054] In another example, to configure the second buck-boost voltage converter 50B to output 2×V at the first low-frequency voltage output 36 BAT First, close the corresponding first switch SW2_1 and the corresponding fourth switch SW2_4, and simultaneously open the corresponding second switch SW2_2, the common switch SW1+2_2, and the corresponding third switch SW2_3, thereby charging the second flying capacitor C2 to the corresponding first intermediate node N. 2AThe battery voltage at that location. Subsequently, the corresponding second switch SW2_2, the common switch SW1+2_2, and the corresponding third switch SW2_3 are closed, while the corresponding first switch SW2_1 and the corresponding fourth switch SW2_4 are opened. Therefore, the corresponding first intermediate node N... 2A The voltage at that point will be equal to 2 × V BAT Therefore, the second buck-boost voltage converter 50B can output 2×V at the first low-frequency voltage output 36. BAT And through the corresponding first intermediate node N 2A This will be essentially equal to 2 × V BAT Transfer voltage V TX Provided to lightweight MCP 34.

[0055] Return to reference Figure 2 When the power management circuit 12 operates in conventional mode to transmit only through the third antenna 14C, only the third power amplifier circuit 18C will be active. This applies regardless of whether the third power amplifier circuit 18C is based on the first modulation voltage V. CC1 Or the second modulation voltage V CC2 During operation, the third power amplifier circuit 18C will see ESR primarily presented by the main MCP 32. ESR More specifically, the stacked switches SW1_21 and SW1_22 in the first buck-boost voltage converter 48A and the stacked switches SW2_21 and SW2_22 in the second buck-boost voltage converter 50A can enable ESR R ESR This increases by a factor of four (4×), which can significantly reduce the operating efficiency of the third power amplifier circuit 18C.

[0056] To help reduce ESR R ESR This improves the operating efficiency of the third power amplifier circuit 18C in the conventional mode. The power management circuit 12 can be configured to simultaneously couple the main MCP 32, the first voltage modulation circuit 22, the lightweight MCP 34, and the second voltage modulation circuit 24 to the third power amplifier circuit 18C. In an embodiment, the control circuit 40 can simultaneously close the switch S in the switching circuit 20 via the switch control signal 46. 1-3 S 2-3 By doing so, the main MCP 32 and the first power inductor L... P1 The corresponding ESR of the first voltage modulation circuit 22 ESR1 It will become parallel to the lightweight MCP 34, the second power inductor L P2 The corresponding ESR of the second voltage modulation circuit 24 ESR2 This helps to reduce the ESR R seen by the third power amplifier circuit 18C. ESR .

[0057] Although the ESR reduction scheme described above is primarily intended for single transmissions, it should be understood that the power management circuit 12 can also modulate the first modulation voltage V. CC1 Second modulation voltage V CC2 Any one of them is provided to either the first power amplifier circuit 18A or the second power amplifier circuit 18B. As an example, the control circuit 40 can further close the switch S. 1-1 To modulate the first modulation voltage V CC1 Provided to the first power amplifier circuit 18A, or by closing switch S 2-2 To modulate the second modulation voltage V CC2 Provided to the first power amplifier circuit 18A.

[0058] Figure 2 The power management circuit 12 can be disposed in the communication device (e.g., a wireless device) to support the embodiments described above. In this regard, Figure 4 This is a schematic diagram of an exemplary communication device 100, in which a communication device can be provided. Figure 2 The power management circuit 12.

[0059] In this document, communication device 100 can be any type of communication device, such as a mobile terminal, smartwatch, tablet computer, computer, navigation device, access point, base station (e.g., eNB, gNB, etc.), and any other type of wireless communication device that supports wireless communication (e.g., cellular, wireless local area network (WLAN), Bluetooth, ultra-wideband (UWB), and near-field communication). Communication device 100 will typically include a control system 102, a baseband processor 104, a transmitting circuit system 106, a receiving circuit system 108, an antenna switching circuit system 110, multiple antennas 112, and a user interface circuit system 114. In a non-limiting example, as an example, the control system 102 can be a field-programmable gate array (FPGA). In this regard, the control system 102 may include at least a microprocessor, embedded memory circuitry, and a communication bus interface. The receiving circuit system 108 receives radio frequency signals from one or more base stations via antennas 112 and through the antenna switching circuit system 110. Low-noise amplifiers and filters cooperate to amplify and eliminate broadband interference from the received signals for processing. Then, a down-conversion and digitization circuitry system (not shown) down-converts the filtered received signal to an intermediate or baseband frequency signal, which is then digitized into one or more digital streams using an analog-to-digital converter (ADC).

[0060] The baseband processor 104 processes the digitized received signal to extract the information or data bits transmitted in the received signal. This processing typically includes demodulation, decoding, and error correction operations, which will be discussed in more detail below. The baseband processor 104 is typically implemented in one or more digital signal processors (DSPs) and application-specific integrated circuits (ASICs).

[0061] For transmission, baseband processor 104 receives digitized data representing voice, data, or control information from control system 102, and encodes the digitized data for transmission. The encoded data is output to transmission circuitry 106, where a digital-to-analog converter (DAC) converts the digitally encoded data into an analog signal, and a modulator modulates the analog signal onto a carrier signal at the desired transmission frequency or multiple frequencies. A power amplifier amplifies the modulated carrier signal to a level suitable for transmission and delivers the modulated carrier signal to antenna 112 via antenna switching circuitry 110. Multiple antennas 112 and replicated transmission circuitry 106 and receiver circuitry 108 can provide spatial diversity. Those skilled in the art will understand the modulation and processing details.

[0062] In an exemplary embodiment, the power management circuit 12 may be disposed between the transmission circuit system 106 and the antenna switching circuit system 110. In another exemplary embodiment, the power management circuit 12 may be disposed within the antenna switching circuit system 110.

[0063] In the embodiments, process reduction can be implemented. Figure 2 The ESR in the power management circuit 12. In this regard, Figure 5 It is used to reduce Figure 2 A flowchart of an exemplary process 200 for ESR in the power management circuit 12.

[0064] In this document, process 200 includes a first modulation voltage V CC1 Second modulation voltage V CC2 An amplified signal (step 202). Process 200 also includes generating a first low-frequency voltage V. DC1 As the battery voltage V BAT The function of the first voltage output 26 induces a first low-frequency current I. DC1 (Step 204). Process 200 also includes receiving a voltage higher than the battery voltage V. BAT Transfer voltage V TX And generate a second low-frequency voltage V DC2 As the transfer voltage V TX The function of the second voltage output 28 induces a second low-frequency current I. DC2 (Step 206). Process 200 also includes based on the first modulation target voltage V.TGT1 A first modulation voltage V is generated at the first voltage output 26. CC1 (Step 208). Process 200 also includes based on the second modulation target voltage V. TGT2 A second modulation voltage V is generated at the second voltage output 28. CC2 (Step 210). Process 200 further includes determining that only one of the power amplifier circuits 18A, 18B, 18C (e.g., 18C) is active to amplify the signal (step 212). Process 200 also includes applying a first low-frequency current I... DC1 Second low-frequency current I DC2 Simultaneously provided to one of the selected power amplifier circuits (18C) among multiple power amplifier circuits 18A, 18B, 18C (step 214). Process 200 also includes applying the first modulation voltage V CC1 and the second modulation voltage V CC2 Simultaneously, it is provided to one of the selected power amplifier circuits (18C) among the multiple power amplifier circuits 18A, 18B, 18C (step 216).

[0065] Those skilled in the art will recognize improvements and modifications to the preferred embodiments of this disclosure. All such improvements and modifications are considered to be within the scope of the concepts disclosed herein and the claims below.

Claims

1. A power management circuit, comprising: Multiple power amplifier circuits, each configured to amplify a signal based on a first modulation voltage and a second modulation voltage; Dual-output voltage conversion circuit, the dual-output voltage conversion circuit comprising: A main multistage charge pump (MCP) is configured to generate a first low-frequency voltage as a function of the battery voltage, thereby inducing a first low-frequency current at the first voltage output. as well as A lightweight MCP is configured to receive a transfer voltage higher than the battery voltage from the main MCP and generate a second low-frequency voltage as a function of the transfer voltage, thereby inducing a second low-frequency current at the second voltage output. A first voltage modulation circuit is configured to generate the first modulation voltage at the first voltage output based on a first modulation target voltage; A second voltage modulation circuit is configured to generate the second modulation voltage at the second voltage output based on a second modulation target voltage; as well as Control circuit, the control circuit being configured to: Only one of the plurality of power amplifier circuits is determined to be active to amplify the signal; The main MCP and the lightweight MCP simultaneously provide the first low-frequency current and the second low-frequency current to a defined power amplifier circuit among the plurality of power amplifier circuits; and The first voltage modulation circuit and the second voltage modulation circuit simultaneously provide the first modulation voltage and the second modulation voltage to the determined power amplifier circuit among the plurality of power amplifier circuits.

2. The power management circuit of claim 1, further comprising a switching circuit coupled between the first voltage output, the second voltage output and the plurality of power amplifier circuits, wherein the control circuit is further configured to control the switching circuit such that the first low-frequency current, the second low-frequency current, the first modulation voltage and the second modulation voltage are simultaneously provided to the determined power amplifier circuit among the plurality of power amplifier circuits.

3. The power management circuit of claim 1, wherein the transfer voltage is substantially equal to twice the battery voltage.

4. The power management circuit according to claim 1, wherein the main MCP includes a first buck-boost voltage converter and a second buck-boost voltage converter, the first buck-boost voltage converter and the second buck-boost voltage converter being coupled in parallel between the battery voltage and the first low-frequency voltage output.

5. The power management circuit of claim 4, wherein each of the first buck-boost voltage converter and the second buck-boost voltage converter comprises: A corresponding first switch is coupled between the battery voltage and a corresponding first intermediate node, the corresponding first intermediate node being configured to provide the transfer voltage to the lightweight MCP; A corresponding pair of second switches, wherein the corresponding pair of second switches are coupled in series between the corresponding first intermediate node and the first low-frequency voltage output; A corresponding third switch is coupled between the battery voltage and the corresponding second intermediate node; A corresponding fourth switch is coupled between the corresponding second intermediate node and ground; as well as A corresponding flying capacitor is coupled between the corresponding first intermediate node and the corresponding second intermediate node.

6. The power management circuit according to claim 5, wherein: When the first buck-boost voltage converter outputs the transfer voltage to the lightweight MCP through the corresponding first intermediate node, the corresponding pair of second switches in the first buck-boost voltage converter are both closed; and When the second buck-boost voltage converter outputs the transfer voltage to the lightweight MCP through the corresponding first intermediate node, the corresponding pair of second switches in the second buck-boost voltage converter are both closed.

7. The power management circuit of claim 4, wherein each of the first buck-boost voltage converter and the second buck-boost voltage converter comprises: A corresponding first switch is coupled between the battery voltage and a corresponding first intermediate node, the corresponding first intermediate node being configured to provide the transfer voltage to the lightweight MCP; A corresponding second switch is coupled between the corresponding first intermediate node and the coupling node; A corresponding common switch is coupled between the coupling node and the first low-frequency voltage output; A corresponding third switch is coupled between the battery voltage and the corresponding second intermediate node; A corresponding fourth switch is coupled between the corresponding second intermediate node and ground; as well as A corresponding flying capacitor is coupled between the corresponding first intermediate node and the corresponding second intermediate node.

8. The power management circuit according to claim 7, wherein: When the first buck-boost voltage converter outputs the transfer voltage to the lightweight MCP through the corresponding first intermediate node, the corresponding second switch and the common switch in the first buck-boost voltage converter are both closed; and When the second buck-boost voltage converter outputs the transfer voltage to the lightweight MCP through the corresponding first intermediate node, the corresponding pair of second switches and the common switch in the second buck-boost voltage converter are both closed.

9. The power management circuit of claim 4, wherein the lightweight MCP comprises: A first switch is coupled between the respective first intermediate node and the common node in the first buck-boost voltage converter; A second switch is coupled between the respective first intermediate node and the common node in the second buck-boost voltage converter; as well as A third switch is coupled between the common node and the second low-frequency voltage output.

10. The power management circuit according to claim 9, wherein: When the transferred voltage is received through the corresponding first intermediate node in the first buck-boost voltage converter, both the first switch and the third switch are turned off; and When the transferred voltage is received through the corresponding first intermediate node in the second buck-boost voltage converter, both the second switch and the third switch are turned off.

11. A wireless device comprising power management circuitry, the power management circuitry comprising: Multiple power amplifier circuits, each configured to amplify a signal based on a first modulation voltage and a second modulation voltage; Dual-output voltage conversion circuit, the dual-output voltage conversion circuit comprising: A main multistage charge pump (MCP) is configured to generate a first low-frequency voltage as a function of the battery voltage, thereby inducing a first low-frequency current at the first voltage output. as well as A lightweight MCP is configured to receive a transfer voltage higher than the battery voltage from the main MCP and generate a second low-frequency voltage as a function of the transfer voltage, thereby inducing a second low-frequency current at the second voltage output. A first voltage modulation circuit is configured to generate the first modulation voltage at the first voltage output based on a first modulation target voltage; A second voltage modulation circuit is configured to generate the second modulation voltage at the second voltage output based on a second modulation target voltage; as well as Control circuit, the control circuit being configured to: Only one of the plurality of power amplifier circuits is determined to be active to amplify the signal; The main MCP and the lightweight MCP simultaneously provide the first low-frequency current and the second low-frequency current to a defined power amplifier circuit among the plurality of power amplifier circuits; and The first voltage modulation circuit and the second voltage modulation circuit simultaneously provide the first modulation voltage and the second modulation voltage to the determined power amplifier circuit among the plurality of power amplifier circuits.

12. The wireless device of claim 11, wherein the power management circuit further comprises a switching circuit coupled between the first voltage output, the second voltage output and the plurality of power amplifier circuits, wherein the control circuit is further configured to control the switching circuit such that the first low-frequency current, the second low-frequency current, the first modulation voltage and the second modulation voltage are simultaneously provided to the determined power amplifier circuit among the plurality of power amplifier circuits.

13. The wireless device of claim 11, wherein the main MCP includes a first buck-boost voltage converter and a second buck-boost voltage converter, the first buck-boost voltage converter and the second buck-boost voltage converter being coupled in parallel between the battery voltage and the first low-frequency voltage output.

14. The wireless device of claim 13, wherein each of the first buck-boost voltage converter and the second buck-boost voltage converter comprises: A corresponding first switch is coupled between the battery voltage and a corresponding first intermediate node, the corresponding first intermediate node being configured to provide the transfer voltage to the lightweight MCP; A corresponding pair of second switches, wherein the corresponding pair of second switches are coupled in series between the corresponding first intermediate node and the first low-frequency voltage output; A corresponding third switch is coupled between the battery voltage and the corresponding second intermediate node; A corresponding fourth switch is coupled between the corresponding second intermediate node and ground; as well as A corresponding flying capacitor is coupled between the corresponding first intermediate node and the corresponding second intermediate node.

15. The wireless device according to claim 14, wherein: When the first buck-boost voltage converter outputs the transfer voltage to the lightweight MCP through the corresponding first intermediate node, the corresponding pair of second switches in the first buck-boost voltage converter are both closed; and When the second buck-boost voltage converter outputs the transfer voltage to the lightweight MCP through the corresponding first intermediate node, the corresponding pair of second switches in the second buck-boost voltage converter are both closed.

16. The wireless device of claim 14, wherein each of the first buck-boost voltage converter and the second buck-boost voltage converter comprises: A corresponding first switch is coupled between the battery voltage and a corresponding first intermediate node, the corresponding first intermediate node being configured to provide the transfer voltage to the lightweight MCP; A corresponding second switch is coupled between the corresponding first intermediate node and the coupling node; A corresponding common switch is coupled between the coupling node and the first low-frequency voltage output; A corresponding third switch is coupled between the battery voltage and the corresponding second intermediate node; A corresponding fourth switch is coupled between the corresponding second intermediate node and the ground; as well as A corresponding flying capacitor is coupled between the corresponding first intermediate node and the corresponding second intermediate node.

17. The wireless device according to claim 16, wherein: When the first buck-boost voltage converter outputs the transfer voltage to the lightweight MCP through the corresponding first intermediate node, the corresponding second switch and the common switch in the first buck-boost voltage converter are both closed; and When the second buck-boost voltage converter outputs the transfer voltage to the lightweight MCP through the corresponding first intermediate node, the corresponding pair of second switches and the common switch in the second buck-boost voltage converter are both closed.

18. The wireless device of claim 13, wherein the lightweight MCP comprises: A first switch is coupled between the respective first intermediate node and the common node in the first buck-boost voltage converter; A second switch is coupled between the respective first intermediate node and the common node in the second buck-boost voltage converter; as well as A third switch is coupled between the common node and the second low-frequency voltage output.

19. The wireless device according to claim 18, wherein: When the transferred voltage is received through the corresponding first intermediate node in the first buck-boost voltage converter, both the first switch and the third switch are turned off; and When the transferred voltage is received through the corresponding first intermediate node in the second buck-boost voltage converter, both the second switch and the third switch are turned off.

20. A method for reducing the equivalent series resistance (ESR) of a power management circuit during a single transmission, the method comprising: Based on an amplified signal from one of the first modulation voltage and the second modulation voltage; A first low-frequency voltage is generated as a function of the battery voltage, thereby inducing a first low-frequency current at the first voltage output. A transfer voltage higher than the battery voltage is received, and a second low-frequency voltage is generated as a function of the transfer voltage, thereby inducing a second low-frequency current at the second voltage output. The first modulation voltage is generated at the first voltage output based on the first modulation target voltage; The second modulation voltage is generated at the second voltage output based on the second modulation target voltage; Only one of the multiple power amplifier circuits is determined to be active to amplify the signal; A power amplifier circuit is defined that simultaneously provides the first low-frequency current and the second low-frequency current to one of the plurality of power amplifier circuits. as well as The first modulation voltage and the second modulation voltage are simultaneously provided to the determined power amplifier circuit among the plurality of power amplifier circuits.

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