A device and method for suppressing transformer inrush

Abstract

This invention discloses a device and method for suppressing inrush current during transformer operation. The device includes: an AC input terminal, a DC blocking capacitor, a voltage phase detection unit, a control unit, and a switching unit. The AC input terminal is connected to a power frequency voltage. The first end of the DC blocking capacitor is connected to one end of the AC input terminal. The second end of the DC blocking capacitor is connected to both the first end of the voltage phase detection unit and the first end of the switching unit. The second end of the voltage phase detection unit is connected to the other end of the AC input terminal. The voltage phase detection unit detects the phase of the power frequency voltage. Based on the phase of the power frequency voltage, the control unit controls the switching unit to conduct at a preset phase, so that the power frequency voltage is connected to the primary winding of the transformer. This invention solves the problems of large inrush current during transformer operation and DC bias burnout during operation, avoids inrush current during operation, protects the transformer and the power grid, and improves equipment lifespan and system stability.

Description

Technical Field

[0001] This invention relates to the field of power frequency isolation transformer control technology, and in particular to a device and method for suppressing transformer inrush current during closing. Background Technology

[0002] Power frequency isolation transformers are crucial electrical equipment in power systems. However, upon connection to the AC grid, due to residual magnetism in the core and random closing phase, they are highly susceptible to inrush currents with amplitudes several to tens of times the rated current. This inrush current can cause malfunctions in front-end protection devices, grid voltage fluctuations, and accelerate the aging of switching devices and transformer windings, shortening the overall lifespan of the equipment. Furthermore, during transformer operation, the presence of a DC component in the power supply circuit or DC bias caused by asymmetrical conduction of switching devices can easily lead to unidirectional core saturation. Core saturation results in a sharp, nonlinear increase in the excitation current, abnormal transformer temperature rise, and in severe cases, direct transformer burnout, posing a significant threat to production safety.

[0003] To address the aforementioned issues, existing technologies employ series resistors, NTC thermistors, and reactors to limit inrush current. However, these methods suffer from limited current limiting effectiveness, secondary surges during switching, high losses, and insufficient reliability. In recent years, zero-crossing soft-start technology has been applied, which can reduce inrush current to some extent. However, it does not fully consider the actual situation of residual magnetism in the iron core. After the residual magnetism and the zero-crossing closing magnetic flux are superimposed, a significant inrush current still occurs. Existing solutions often focus on suppressing inrush current at the moment of power-on, neglecting the risk of saturation burnout caused by the accumulation of DC bias magnetism during operation. Therefore, they cannot simultaneously meet the requirements of zero-surge power-on and long-term safe operation. Summary of the Invention

[0004] This invention provides a device and method for suppressing transformer inrush current during switching on, in order to solve the problems of large inrush current when transformers are powered on and DC bias burnout during operation.

[0005] According to one aspect of the present invention, an apparatus for suppressing transformer inrush current is provided, comprising: an AC input terminal, a DC blocking capacitor, a voltage phase detection unit, a control unit, and a switching unit; The AC input terminal is connected to the power frequency voltage. The first end of the DC blocking capacitor is connected to one end of the AC input terminal. The second end of the DC blocking capacitor is connected to the first end of the voltage phase detection unit and the first end of the switching unit. The second end of the voltage phase detection unit is connected to the other end of the AC input terminal. The output end of the voltage phase detection unit is connected to the input end of the control unit. The output end of the control unit is connected to the control end of the switching unit. The second end of the switching unit is connected to one end of the primary winding of the transformer. The other end of the primary winding of the transformer is connected to the other end of the AC input terminal. The voltage phase detection unit is used to detect the phase of the power frequency voltage. The control unit is used to control the switching unit to conduct at a preset phase according to the phase of the power frequency voltage, so that the power frequency voltage is connected to the primary winding of the transformer.

[0006] Optionally, the voltage phase detection unit includes a voltage divider sampling circuit, a phase-locked loop (PLL), and a comparator. The first input terminal of the voltage divider sampling circuit is connected to the second terminal of the DC blocking capacitor, the second input terminal of the voltage divider sampling circuit is connected to the other end of the AC input terminal, the output terminal of the voltage divider sampling circuit is connected to the input terminal of the PLL, the output terminal of the PLL is connected to the input terminal of the comparator, and the output terminal of the comparator is connected to the input terminal of the control unit. The voltage divider sampling circuit is used to convert the power frequency voltage into a low-voltage signal. The PLL is used to generate a low-voltage synchronization signal that is in phase with the power frequency voltage. The comparator is used to compare the low-voltage synchronization signal with a reference voltage signal.

[0007] Optionally, the voltage divider sampling circuit includes a first resistor, a second resistor, an operational amplifier, a third resistor, and a fourth resistor. The first end of the first resistor is connected to the second end of the DC blocking capacitor. The second end of the first resistor is connected to the first input terminal of the operational amplifier and the first end of the second resistor. The second end of the second resistor is connected to the ground terminal. The first end of the third resistor is connected to the other end of the AC input terminal. The second end of the third resistor is connected to the second input terminal of the operational amplifier and the first end of the fourth resistor. The output terminal of the operational amplifier is connected to the second end of the fourth resistor and the input terminal of the phase-locked loop.

[0008] Optionally, the switching unit includes a first transistor and a second transistor. The gate of the first transistor is connected to the output terminal of the control unit. The first terminal of the first transistor is connected to the second terminal of the DC blocking capacitor. The second terminal of the first transistor is connected to the second terminal of the second transistor. The first terminal of the second transistor is connected to one end of the primary winding of the transformer. The gate of the second transistor is connected to the output terminal of the control unit.

[0009] Optionally, the first transistor includes a first MOS transistor, the second transistor includes a second MOS transistor, and the switching unit is a bidirectional AC conducting MOS transistor structure.

[0010] Optionally, the DC blocking capacitor is a non-polar AC capacitor or a metallized thin-film capacitor.

[0011] Optionally, the capacitive reactance of the DC blocking capacitor is less than 0.1 times the magnetizing impedance of the primary winding of the transformer.

[0012] According to another aspect of the present invention, a method for suppressing transformer inrush current is also provided, applied to the apparatus for suppressing transformer inrush current described in any embodiment of the present invention, the method comprising: Obtain the phase of the power frequency voltage; Based on the phase of the power frequency voltage, the preset phase control switch unit is turned on, so that the power frequency voltage is connected to the primary winding of the transformer.

[0013] Optionally, based on the phase of the power frequency voltage, a preset phase control switch unit is turned on to connect the power frequency voltage to the primary winding of the transformer, including: Based on the phase of the power frequency voltage, the switching unit is turned on by controlling the phase corresponding to the positive or negative peak value of the power frequency voltage sine wave, so that the power frequency voltage is connected to the primary winding of the transformer.

[0014] Optionally, based on the phase of the power frequency voltage, the switching unit is controlled to conduct at the phase corresponding to the positive or negative peak value of the power frequency voltage sine wave, so that the power frequency voltage is connected to the primary winding of the transformer, including: Based on the phase of the power frequency voltage, the switching unit is controlled to turn on when the phase of the power frequency voltage reaches 90° or 270°, so that the power frequency voltage is connected to the primary winding of the transformer.

[0015] The technical solution of this invention, through the configuration of an AC input terminal, a DC blocking capacitor, a voltage phase detection unit, a control unit, and a switching unit, enables the voltage phase detection unit to detect the phase of the applied power frequency voltage in real time and transmit this information to the control unit. At a preset phase, the control unit sends a control signal to the switching unit, causing the switching unit to close, thus allowing the power frequency voltage to be applied to the primary winding of the transformer. When the transformer is switched on at the preset phase, the change in core magnetic flux is minimal, allowing for natural matching with residual magnetism and achieving virtually no inrush current upon power-on. Simultaneously, the DC blocking capacitor blocks the DC component, suppressing core magnetic saturation and preventing transformer burnout. This invention solves the problems of large inrush current upon transformer power-on and DC magnetic saturation burnout during operation, avoids huge closing current surges, protects the transformer and the power grid, and improves equipment lifespan and system stability.

[0016] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of the present invention, nor is it intended to limit the scope of the invention. Other features of the invention will become readily apparent from the following description. Attached Figure Description

[0017] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0018] Figure 1 This is a schematic diagram of the structure of a device for suppressing transformer inrush current provided in an embodiment of the present invention; Figure 2 This is a schematic diagram of another device for suppressing transformer inrush current provided in an embodiment of the present invention; Figure 3 This is a circuit diagram of a voltage divider sampling circuit provided in an embodiment of the present invention; Figure 4 This is a flowchart of a method for suppressing transformer inrush current according to an embodiment of the present invention; Figure 5 It is a voltage and current response waveform when randomly powered on; Figure 6 It is a voltage and current response waveform when powered on at a position other than the 90° or 270° peak position; Figure 7 It is a voltage and current response waveform when powered on at a 90° peak phase position; Figure 8 It is a voltage and current response waveform when powered on at a peak phase position of 270°. Detailed Implementation

[0019] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.

[0020] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0021] Figure 1 This is a schematic diagram of a device for suppressing transformer inrush current according to an embodiment of the present invention. This embodiment is applicable to various power frequency isolation transformer equipment, used to suppress the transformer's inrush current and prevent DC bias saturation. Figure 1 As shown, the device includes: an AC input terminal 101, a DC blocking capacitor 102, a voltage phase detection unit 103, a control unit 104, and a switching unit 105; AC input terminal 101 is connected to the power frequency voltage. The first end of DC blocking capacitor 102 is connected to one end of AC input terminal 101. The second end of DC blocking capacitor 102 is connected to the first end of voltage phase detection unit 103 and the first end of switching unit 105. The second end of voltage phase detection unit 103 is connected to the other end of AC input terminal 101. The output end of voltage phase detection unit 103 is connected to the input end of control unit 104. The output end of control unit 104 is connected to the control end of switching unit 105. The second end of switching unit 105 is connected to one end of transformer primary winding 20. The other end of transformer primary winding 20 is connected to the other end of AC input terminal 101. Voltage phase detection unit 103 is used to detect the phase of power frequency voltage. Control unit 104 is used to control switching unit 105 to conduct according to the phase of power frequency voltage, so that power frequency voltage is connected to transformer primary winding 20.

[0022] When a transformer is switched on under no-load conditions, the magnetic flux in the core cannot change abruptly, often leading to instantaneous saturation and generating a large inrush current. This inrush current may cause the circuit breaker to trip or interfere with the power grid. The AC input terminal 101 can be a power input, connected to the industrial frequency AC voltage used in homes or industries, such as 220V / 380V 50Hz. The DC blocking capacitor 102 can be used to block the DC component in the circuit. At the moment the inrush current occurs, if a DC component is present, the capacitor can impede it, slowing down the rate of change of magnetic flux and thus suppressing DC bias and saturation of the transformer core. The voltage phase detection unit 103 can detect the phase of the connected industrial frequency voltage in real time and transmit the detected phase information to the control unit 104. The control unit 104 can be a microcontroller, digital logic circuit, or analog phase recognition circuit. Based on the phase information detected by the voltage phase detection unit 103, when the phase of the industrial frequency voltage reaches a preset phase, the control unit 104 sends a control signal to the switching unit 105, controlling the switching unit 105 to close. The preset phase can be the phase corresponding to the voltage peak point, such as a phase of 90° or 270°, at which point the magnetic flux change is the smoothest, the inrush current is minimal, and virtually no inrush current can be achieved upon power-up. The switching unit 105 is connected to the primary winding 20 of the transformer, and the secondary winding 21 of the transformer is connected to the load 22. The switching unit 105 can control the timing of the power frequency voltage being applied to the primary winding 20 of the transformer. The switching unit 105 may include a MOSFET, which is turned on according to the control signal from the control unit 104.

[0023] Specifically, when the device is first powered on, the switching unit 105 is open, and the transformer is not energized. The voltage phase detection unit 103 detects the phase of the power frequency voltage in real time and transmits it to the control unit 104. When the voltage phase detection unit 103 detects that the phase of the power frequency voltage is at the preset phase, the control unit 104 sends a control signal to the switching unit 105 to close the switching unit 105. Since the closing is at the optimal phase point, the change in core magnetic flux is minimal, which can naturally match the residual magnetism, thus achieving virtually no inrush current during power-on. At this time, the power frequency voltage is connected to the primary winding 20 of the transformer through the DC blocking capacitor 102, completing the inrush-free power-on. The DC blocking capacitor 102 continues to work, blocking the DC component in the circuit, preventing the transformer from entering a saturated state due to DC bias magnetism, and preventing excessive temperature rise and burnout.

[0024] The technical solution of this invention, through the configuration of an AC input terminal, a DC blocking capacitor, a voltage phase detection unit, a control unit, and a switching unit, allows the voltage phase detection unit to detect the phase of the applied power frequency voltage in real time and transmit this information to the control unit. At a preset phase, the control unit sends a control signal to the switching unit, causing the switching unit to close and allowing the power frequency voltage to be applied to the primary winding of the transformer. When the transformer is switched on at the preset phase, the change in core magnetic flux is minimal, allowing for natural matching with residual magnetism and achieving virtually no inrush current upon power-on. Simultaneously, the DC blocking capacitor blocks the DC component, suppressing core magnetic saturation and preventing transformer burnout. This invention solves the problems of large inrush current upon transformer power-on and DC magnetic saturation burnout during operation, avoids inrush current during switching, protects the transformer and the power grid, and improves equipment lifespan and system stability.

[0025] Figure 2 This is a schematic diagram of another device for suppressing transformer inrush current provided in an embodiment of the present invention. In some optional embodiments of the present invention, such as... Figure 2 As shown, the voltage phase detection unit 103 includes a voltage divider sampling circuit 1031, a phase-locked loop 1032, and a comparator 1033. The first input terminal of the voltage divider sampling circuit 1031 is connected to the second terminal of the DC blocking capacitor 102, the second input terminal of the voltage divider sampling circuit 1031 is connected to the other end of the AC input terminal 101, the output terminal of the voltage divider sampling circuit 1031 is connected to the input terminal of the phase-locked loop 1032, the output terminal of the phase-locked loop 1032 is connected to the input terminal of the comparator 1033, and the output terminal of the comparator 1033 is connected to the input terminal of the control unit. The voltage divider sampling circuit 1031 is used to convert the power frequency voltage into a low-voltage signal; the phase-locked loop 1032 is used to generate a low-voltage synchronization signal that is in phase with the power frequency voltage; and the comparator 1033 is used to compare the low-voltage synchronization signal with a reference voltage signal.

[0026] In this circuit, the first input terminal of the voltage divider sampling circuit 1031 is connected to the second terminal of the DC blocking capacitor 102, and the second input terminal is connected to the other end of the AC input terminal 101. The mains voltage is typically 220V or higher, while the phase-locked loop (PLL) 1032 and comparator 1033 usually operate at low voltage. The voltage divider sampling circuit 1031 can convert a high-voltage mains frequency sine wave into a low-voltage signal with a lower amplitude and identical waveform shape through resistor voltage division or other methods. The voltage divider sampling circuit 1031 outputs a low-voltage mains frequency sine wave signal. The input terminal of the PLL 1032 receives the low-voltage sine wave from the voltage divider sampling circuit 1031. The PLL 1032 is used for phase locking, outputting a low-voltage synchronization signal that is in phase with the mains voltage. The input terminal of the comparator 1033 is connected to the output terminal of the PLL 1032, and the output terminal is connected to the control unit 104. The comparator 1033 can compare the low-voltage synchronization signal output by the PLL 1032 with a preset reference voltage signal. When the low-voltage synchronization signal output by the phase-locked loop 1032 equals the reference voltage signal, the comparator 1033 flips. That is, when the power frequency voltage reaches the preset phase point, the comparator 1033 outputs a high-level signal to the control unit 104, and the control unit 104 controls the switching unit 105 to turn on.

[0027] Figure 3 This is a circuit diagram of a voltage divider sampling circuit provided in an embodiment of the present invention. In some optional embodiments of the present invention, refer to... Figure 2 and Figure 3 The voltage divider sampling circuit 1031 includes a first resistor R1, a second resistor R2, an operational amplifier LM1, a third resistor R3, and a fourth resistor R4. The first end of the first resistor R1 is connected to the second end of the DC blocking capacitor 102. The second end of the first resistor R1 is connected to the first input terminal of the operational amplifier LM1 and the first end of the second resistor R2. The second end of the second resistor R2 is connected to the ground terminal. The first end of the third resistor R3 is connected to the other end of the AC input terminal 101. The second end of the third resistor R3 is connected to the second input terminal of the operational amplifier LM1 and the first end of the fourth resistor R4. The output terminal of the operational amplifier LM1 is connected to the second end of the fourth resistor R4 and the input terminal of the phase-locked loop 1032.

[0028] The voltage divider sampling circuit 1031 can be a differential amplifier circuit based on an operational amplifier. The first input terminal of the voltage divider sampling circuit 1031 can be a non-inverting input terminal, and the second input terminal can be an inverting input terminal. The power grid frequency voltage is sampled through both input terminals to form a differential input. The first resistor R1 and the second resistor R2 constitute a voltage divider. The fourth resistor R4 is connected in series between the output terminal and the inverting input terminal of the operational amplifier LM1 to form feedback.

[0029] In some alternative embodiments of the present invention, reference continues to be made. Figure 2The switching unit 105 includes a first transistor M1 and a second transistor M2. The gate of the first transistor M1 is connected to the output terminal of the control unit 104. The first terminal of the first transistor M1 is connected to the second terminal of the DC blocking capacitor 102. The second terminal of the first transistor M1 is connected to the second terminal of the second transistor M2. The first terminal of the second transistor M2 is connected to one end of the primary winding 20 of the transformer. The gate of the second transistor M2 is connected to the output terminal of the control unit 104.

[0030] In this circuit, the first transistor M1 and the second transistor M2 can be MOSFETs, with the first terminal being the drain and the second terminal being the source. The first transistor M1 and the second transistor M2 are connected in reverse series to form a bidirectional switching structure. Since the transformer is connected to alternating current (AC), the current needs to flow bidirectionally, hence the need for bidirectional conduction to control the AC current. The gate of the first transistor M1 is connected to the output terminal of the control unit 104, its first terminal is connected to the second terminal of the DC blocking capacitor, and its second terminal is connected to the second terminal of the second transistor. The first terminal of the second transistor M2 is connected to one end of the primary winding 20 of the transformer, and its gate is connected to the control unit 104. The switching unit 105 will only conduct simultaneously, allowing current to flow, when both transistors' gates simultaneously receive a conduction signal.

[0031] Specifically, after the AC input terminal 101 is connected to the power frequency voltage, both transistors are in the off state, and the transformer is not energized. The voltage phase detection unit 103 detects the phase of the power frequency voltage. When the phase reaches the preset phase, the control unit 104 can simultaneously send a high-level signal to the gates of the two transistors, turning on the two transistors. Current can then flow from the power supply side through the DC blocking capacitor 102 to the transformer, and the transformer begins to operate normally.

[0032] In some optional embodiments of the present invention, the first transistor includes a first MOS transistor, the second transistor includes a second MOS transistor, and the switching unit is a bidirectional AC conducting MOS transistor structure.

[0033] The first and second transistors can be MOSFETs, connected in reverse series, allowing them to be controlled to turn on and off during both the positive and negative half-cycles of the AC current. Compared to traditional relays, MOSFETs can achieve turn-on in microseconds, making the phase angle of the transformer energized controllable. They are also contactless electronic switches with no secondary impact and can be frequently started.

[0034] In some alternative embodiments of the present invention, the DC blocking capacitor is a non-polar AC capacitor or a metallized thin-film capacitor.

[0035] In AC circuits, DC blocking capacitors are connected in series, bearing alternating voltage across their terminals, with the current direction constantly changing. Common electrolytic capacitors are polarized, usually marked with positive and negative terminals, and can only be used in DC circuits. Therefore, devices for suppressing transformer inrush current require non-polarized capacitors that can withstand bidirectional voltage. Metallized film capacitors have excellent high-voltage and surge resistance. Compared to other types of capacitors, metallized film capacitors generate less heat under high current, making them suitable for long-term operation.

[0036] In some alternative embodiments of the present invention, the capacitive reactance of the DC blocking capacitor is less than 0.1 times the excitation impedance of the primary winding of the transformer.

[0037] The capacitive reactance of the DC blocking capacitor is much smaller than the magnetizing impedance of the transformer's primary winding, ensuring normal operation. During normal transformer operation, almost all the power frequency voltage needs to be applied to the transformer, not dissipated in the capacitor. The capacitive reactance of the DC blocking capacitor is less than 0.1 times the magnetizing impedance of the transformer's primary winding, having minimal impact on the transformer's output voltage and not affecting the normal operation of the load. If the capacitive reactance is too large, the transformer terminal voltage will drop significantly, potentially failing to power the load. Appropriate selection of the capacitive reactance ensures normal operation without affecting DC blocking.

[0038] Figure 4 This is a flowchart illustrating a method for suppressing transformer inrush current according to an embodiment of the present invention, applicable to devices for suppressing transformer inrush current as described in any embodiment of the present invention. (Refer to...) Figure 2 and Figure 4 Methods for suppressing transformer inrush current include: S201, Obtain the phase of the power frequency voltage; Among them, the voltage phase detection unit 103 can be used to detect the phase of the power frequency voltage, and then control the switching unit 105 according to the phase information.

[0039] S202. Based on the phase of the power frequency voltage, the preset phase control switch unit 105 is turned on, so that the power frequency voltage is connected to the primary winding 20 of the transformer.

[0040] The voltage phase detection unit 103 detects the phase of the power frequency voltage and transmits it to the control unit 104. When the preset phase is reached, the control unit 104 controls the switch unit 105 to turn on, so that the power frequency voltage is connected to the primary winding 20 of the transformer.

[0041] Specifically, when the device is first powered on, the switching unit 105 is open, and the transformer is not energized. The voltage phase detection unit 103 detects the phase of the power frequency voltage in real time and transmits it to the control unit 104. When the voltage phase detection unit 103 detects that the phase of the power frequency voltage is at the preset phase, the control unit 104 sends a control signal to the switching unit 105 to close the switching unit 105. Since the closing is at the optimal phase point, the magnetic flux establishment process in the transformer core is very smooth, thereby suppressing the generation of inrush current. At this time, the power frequency voltage is connected to the primary winding of the transformer 20 through the DC blocking capacitor 102, completing the impact-free power-on. The DC blocking capacitor 102 continues to work, blocking the DC component in the circuit, preventing the transformer from entering a saturation state due to DC bias, and preventing excessive temperature rise and burnout.

[0042] In some optional embodiments of the present invention, according to the phase of the power frequency voltage, a preset phase control switch unit is turned on to allow the power frequency voltage to be connected to the primary winding of the transformer, including: Based on the phase of the power frequency voltage, the phase control switch unit is turned on at the positive or negative peak value of the power frequency voltage sine wave, so that the power frequency voltage is connected to the primary winding of the transformer.

[0043] Among them, closing the circuit at the phase corresponding to the positive or negative peak of the power frequency voltage sine wave results in the smoothest change in magnetic flux and the smallest inrush current, achieving virtually no impact current upon power-on.

[0044] In some optional embodiments of the present invention, according to the phase of the power frequency voltage, the phase control switching unit is turned on at the positive peak or negative peak of the power frequency voltage sine wave, so that the power frequency voltage is connected to the primary winding of the transformer, including: Based on the phase of the power frequency voltage, the control switch unit is turned on when the phase of the power frequency voltage reaches 90° or 270°, so that the power frequency voltage is connected to the primary winding of the transformer.

[0045] Among them, the iron core of the transformer generally has residual magnetism. When the circuit is closed at the peak phase of the grid voltage of 90° or 270°, the change in magnetic flux of the iron core is minimal, which can naturally match the residual magnetism, thus achieving basically no impact current when energized.

[0046] Figure 5 It is a voltage and current response waveform when randomly powered on, such as Figure 5 As shown, waveform 1 represents current and waveform 2 represents voltage. The system is randomly powered on without controlling the phase angle of the input power frequency voltage, resulting in a very large inrush current. Figure 6 It is a voltage and current response waveform when powered on at a position other than 90° or 270° peak position, such as Figure 6 As shown, waveform 3 represents voltage and waveform 4 represents current. When power is applied at a position other than the 90° or 270° peak position, an inrush current is formed. Figure 7It is a voltage and current response waveform when powered on at a 90° peak phase position, such as Figure 7 As shown, waveform 5 represents voltage and waveform 6 represents current. Power is applied at the 90° peak phase position, and the starting current is very small. Figure 8 It is a voltage and current response waveform when powered on at a 270° peak phase position, such as Figure 8 As shown, waveform 7 represents voltage and waveform 8 represents current. Power is applied at the 270° peak phase position, and the starting current is very small.

[0047] The technical solution of this invention involves connecting a DC blocking capacitor in series with the primary winding of the transformer to block the DC component, suppress core saturation, and prevent transformer burnout. A switching unit is connected in series with the input circuit. The control unit, through phase detection by the voltage phase detection unit, activates the switching unit at the 90° or 270° peak position of the power frequency voltage, allowing the power frequency voltage to be applied to the primary winding of the transformer. Since transformers generally have residual magnetism, the magnetic flux change is minimal at the 90° or 270° peak closing position, achieving virtually no inrush current upon power-on. Peak closing also reduces the voltage change rate at the moment the DC blocking capacitor is engaged. The combined effect of these two factors further smooths the startup process, achieving both shock-free power-on and long-term anti-saturation effects. This invention solves the problems of large power-on surges and transformer burnout due to saturation during operation. It has advantages such as simple structure, low cost, shock-free operation, anti-saturation, and high reliability, and is suitable for various power frequency isolation transformer devices.

[0048] It should be understood that the various forms of processes shown above can be used, with steps reordered, added, or deleted. For example, the steps described in this invention can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution of this invention can be achieved, and no limitation is imposed herein.

[0049] The specific embodiments described above do not constitute a limitation on the scope of protection of this invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this invention should be included within the scope of protection of this invention.

Claims

1. A device for suppressing inrush current during transformer closing, characterized in that, include: AC input terminal, DC blocking capacitor, voltage phase detection unit, control unit and switching unit; The AC input terminal is connected to the power frequency voltage. The first end of the DC blocking capacitor is connected to one end of the AC input terminal. The second end of the DC blocking capacitor is connected to the first end of the voltage phase detection unit and the first end of the switching unit. The second end of the voltage phase detection unit is connected to the other end of the AC input terminal. The output terminal of the voltage phase detection unit is connected to the input terminal of the control unit. The output terminal of the control unit is connected to the control terminal of the switching unit. The second end of the switching unit is connected to one end of the primary winding of the transformer. The other end of the primary winding of the transformer is connected to the other end of the AC input terminal. The voltage phase detection unit is used to detect the phase of the power frequency voltage. The control unit is used to control the switching unit to conduct at a preset phase according to the phase of the power frequency voltage, so that the power frequency voltage is connected to the primary winding of the transformer.

2. The device for suppressing transformer inrush current according to claim 1, characterized in that, The voltage phase detection unit includes a voltage divider sampling circuit, a phase-locked loop (PLL), and a comparator. The first input terminal of the voltage divider sampling circuit is connected to the second terminal of the DC blocking capacitor, and the second input terminal of the voltage divider sampling circuit is connected to the other end of the AC input terminal. The output terminal of the voltage divider sampling circuit is connected to the input terminal of the PLL, the output terminal of the PLL is connected to the input terminal of the comparator, and the output terminal of the comparator is connected to the input terminal of the control unit. The voltage divider sampling circuit converts the power frequency voltage into a low-voltage signal. The PLL generates a low-voltage synchronization signal with phase consistent with the power frequency voltage. The comparator compares the low-voltage synchronization signal with a reference voltage signal.

3. The device for suppressing transformer inrush current according to claim 2, characterized in that, The voltage divider sampling circuit includes a first resistor, a second resistor, an operational amplifier, a third resistor, and a fourth resistor. The first end of the first resistor is connected to the second end of the DC blocking capacitor. The second end of the first resistor is connected to the first input terminal of the operational amplifier and the first end of the second resistor. The second end of the second resistor is connected to the ground terminal. The first end of the third resistor is connected to the other end of the AC input terminal. The second end of the third resistor is connected to the second input terminal of the operational amplifier and the first end of the fourth resistor. The output terminal of the operational amplifier is connected to the second end of the fourth resistor and the input terminal of the phase-locked loop.

4. The device for suppressing transformer inrush current according to claim 1, characterized in that, The switching unit includes a first transistor and a second transistor. The gate of the first transistor is connected to the output terminal of the control unit. The first terminal of the first transistor is connected to the second terminal of the DC blocking capacitor. The second terminal of the first transistor is connected to the second terminal of the second transistor. The first terminal of the second transistor is connected to one end of the primary winding of the transformer. The gate of the second transistor is connected to the output terminal of the control unit.

5. The device for suppressing transformer inrush current according to claim 4, characterized in that, The first transistor includes a first MOS transistor, the second transistor includes a second MOS transistor, and the switching unit is a bidirectional AC conducting MOS transistor structure.

6. The device for suppressing transformer inrush current according to claim 1, characterized in that, The DC blocking capacitor is a non-polar AC capacitor or a metallized thin-film capacitor.

7. The device for suppressing transformer inrush current according to claim 1, characterized in that, The capacitive reactance of the DC blocking capacitor is less than 0.1 times the magnetizing impedance of the primary winding of the transformer.

8. A method for suppressing inrush current when closing a transformer, characterized in that, The method of the apparatus for suppressing transformer inrush current as described in claims 1-7 includes: Obtain the phase of the power frequency voltage; Based on the phase of the power frequency voltage, the preset phase control switch unit is turned on, so that the power frequency voltage is connected to the primary winding of the transformer.

9. The method for suppressing transformer inrush current according to claim 8, characterized in that, Based on the phase of the power frequency voltage, when the preset phase control switch unit is turned on, the power frequency voltage is connected to the primary winding of the transformer, including: Based on the phase of the power frequency voltage, the switching unit is turned on by controlling the phase corresponding to the positive or negative peak value of the power frequency voltage sine wave, so that the power frequency voltage is connected to the primary winding of the transformer.

10. The method for suppressing transformer inrush current according to claim 9, characterized in that, Based on the phase of the power frequency voltage, the switching unit is controlled to conduct according to the phase corresponding to the positive or negative peak value of the power frequency voltage sine wave, so that the power frequency voltage is connected to the primary winding of the transformer, including: Based on the phase of the power frequency voltage, the switching unit is controlled to turn on when the phase of the power frequency voltage reaches 90° or 270°, so that the power frequency voltage is connected to the primary winding of the transformer.

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