Display panel, display module, display device and preparation method of display panel
By embedding the first pad electrode in the substrate and electrically connecting it to the signal line, combined with the lateral stripping process, the problems of poor via opening accuracy and toner residue were solved, improving the signal transmission quality and structural stability of the display panel and ensuring the working performance of the display panel.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- XIAMEN TIANMA DISPLAY TECH CO LTD
- Filing Date
- 2026-04-14
- Publication Date
- 2026-07-10
AI Technical Summary
In the prior art, the poor precision of via opening in the display panel leads to toner residue and thermal radiation damage, affecting the signal connection between the driver integrated circuit and the driver circuit layer, making it difficult to guarantee the working performance of the display panel.
The design adopts the first pad electrode embedded in the substrate, which is electrically connected to the signal line through the connecting lead. The surface of the first pad electrode on the side away from the driving circuit layer is flush with the wall of the via, avoiding additional openings. The preparation substrate is removed by a lateral peeling process, which reduces heat radiation and over-etching risk and improves structural stability.
It improves the quality of signal transmission between the display panel and the driver integrated circuit or external circuit, reduces the risk of pad electrode detachment, and enhances the working performance of the display panel.
Smart Images

Figure CN122373637A_ABST
Abstract
Description
Technical Field
[0001] This application belongs to the field of display technology, and in particular relates to a display panel, display module, display device, and a method for manufacturing the display panel. Background Technology
[0002] With the continuous development of technology, the application scenarios of display panels are becoming increasingly widespread. Display panels are commonly used in devices such as mobile phones, computers, televisions, and wearable devices. In related technologies, in order to reduce the bezel size, the driver integrated circuit is mounted on the back of the substrate away from the light-emitting layer, eliminating the bonding area. Vias are directly opened in the substrate to expose the pad electrodes, and then metal is filled into the vias to electrically connect the pad electrodes in the driver circuit layer to the driver integrated circuit. This enables the driver integrated circuit to control the signals of the circuits in the driver circuit layer, thereby controlling the working state of the display panel.
[0003] However, this method has poor aperture precision, and carbon powder residue may remain inside the vias. Furthermore, the aperture process may cause over-etching or thermal radiation damage to the first pad electrode, connecting leads, or circuits in the driving circuit layer on the substrate, thereby affecting the signal connection between the driving integrated circuit and the circuits in the driving circuit layer, making it difficult to guarantee the working performance of the display panel. Summary of the Invention
[0004] This application provides a display panel, a display module, a display device, and a method for manufacturing the display panel, aiming to improve the working performance of the display panel.
[0005] In a first aspect, embodiments of this application provide a display panel, comprising: a substrate, the substrate including a body portion and a first through-hole disposed in the body portion; a driving circuit layer disposed on one side of the substrate, the driving circuit layer including signal lines, the body portion having a first surface facing away from the driving circuit layer; the display panel further comprising connecting leads and a first pad electrode, the first pad electrode being embedded in the first through-hole, the surface of the first pad electrode facing away from the driving circuit layer being exposed from the first through-hole and flush with at least a portion of the first surface surrounding the first through-hole, the first pad electrode being electrically connected to the signal lines via the connecting leads.
[0006] Secondly, embodiments of this application provide a display module, including the display panel described in the first aspect embodiment.
[0007] Thirdly, embodiments of this application provide a display device, including the display module described in the second aspect of the preceding embodiment.
[0008] Fourthly, embodiments of this application also provide a method for manufacturing a display panel, the method comprising: A first pad electrode and a connecting lead are formed in a pre-substrate, and the first pad electrode and the connecting lead are electrically connected. A driving circuit layer is formed on one side of the pre-substrate. The driving circuit layer includes signal lines, and the signal lines are electrically connected to the connection leads. At least a portion of the pre-substrate away from the driving circuit layer is removed to form a substrate having a first surface facing away from the driving circuit layer, wherein the surface of the first pad electrode facing away from the driving circuit layer is exposed on the substrate and flush with at least a portion of the first surface.
[0009] This application provides a display panel including a substrate, a driving circuit layer, connecting leads, and a first pad electrode. The substrate provides mechanical support for the structural layers such as the driving circuit layer and forms physical protection for the display panel. The driving circuit layer is disposed on one side of the substrate and is used to arrange circuits and signal lines to drive the light-emitting functional layer thereon to emit light. The first pad electrode is electrically connected to the signal lines in the driving circuit layer through the connecting leads. The first pad electrode is used to electrically connect to the driving integrated circuit or other external circuits, thereby realizing signal transmission between the signal lines and the driving integrated circuit or other external circuits.
[0010] The substrate includes a body portion and a first through hole disposed in the body portion. The body portion has a first surface facing away from the driving circuit layer. The first pad electrode is embedded in the first through hole, so that the hole wall of the first through hole can have a better embedding effect on the first pad electrode and improve the structural stability of the first pad electrode. The surface of the first pad electrode facing away from the driving circuit layer is exposed through the first via and flush with at least a portion of the first surface surrounding the first via. This means the first pad electrode does not protrude outwards relative to the substrate, reducing the risk of it detaching. Furthermore, the first pad electrode does not retract inwards relative to the substrate, eliminating the need for additional vias on the side facing away from the driving circuit layer. During fabrication, once the connecting leads, the first pad electrode, and the driving circuit layer are fabricated, only the portion of the prepared substrate facing away from the driving circuit layer needs to be removed to expose the surface of the first pad electrode facing away from the driving circuit layer. This solves the problems of poor aperture precision and toner residue in existing technologies. Additionally, this structural design provides feasibility for lateral peeling processes when removing the portion of the prepared substrate facing away from the driving circuit layer, eliminating the need for laser scanning or etching of the prepared substrate along the thickness direction of the display panel. This reduces or eliminates the risk of over-etching or thermal radiation in the first pad electrode, connecting leads, or driving circuit layer, improving the signal transmission quality between the display panel and the driving integrated circuit or external circuits, and enhancing the performance of the display panel. Attached Figure Description
[0011] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the embodiments of this application will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0012] Figure 1 This is a schematic diagram of the structure of a display panel provided in an embodiment of this application; Figure 2 This is a schematic diagram of the arrangement of sub-pixels provided in an embodiment of this application; Figure 3 This is a partial cross-sectional view of a light-emitting layer provided in an embodiment of this application; Figure 4 This is a partial cross-sectional view of a display panel provided in an embodiment of this application; Figure 5 This is a partial top view of a display panel provided in an embodiment of this application; Figure 6 This is an embodiment of the present application. Figure 5 A partial sectional view along the AA direction; Figure 7 This is another embodiment of a display panel provided in this application. Figure 5 A partial sectional view along the AA direction; Figure 8 This is a partial top view of a display panel provided in another embodiment of this application; Figure 9 yes Figure 8 Partial sectional view along the BB direction; Figure 10 This is a partial cross-sectional view of a display panel provided in another embodiment of this application; Figure 11 This is a flowchart of a method for manufacturing a display panel according to an embodiment of the fourth aspect of this application; Figure 12 This is a flowchart of a method for manufacturing a display panel according to another embodiment of the fourth aspect of this application; Figure 13 This is one of the illustrations showing the manufacturing process of a display panel provided in another embodiment of the fourth aspect; Figure 14 This is the second illustration of the manufacturing process of a display panel provided in another embodiment of the fourth aspect; Figure 15 This is the third illustration of the manufacturing process of a display panel provided in another embodiment of the fourth aspect; Figure 16 This is the fourth illustration of the manufacturing process of a display panel provided in another embodiment of the fourth aspect; Figure 17 This is the fifth illustration of the manufacturing process of a display panel provided in another embodiment of the fourth aspect.
[0013] Explanation of reference numerals in the attached figures: 10-Display panel; 100 - Substrate; 110 - Body portion; 111 - First surface; 111a - First sub-surface; 111b - Second sub-surface; 1101 - Step; 120 - First through-hole; 130 - First substrate; 140 - Second substrate; 141 - Second through-hole; 142 - Body portion; 143 - Protrusion; 150 - First barrier layer; 151 - First connecting segment; 152 - Second connecting segment; 160 - Second barrier layer; 200 - Driver circuit layer; 210 - Pixel circuit; 211 - Transistor; 211a - Semiconductor; 211b - Gate; 211c - Source / drain; 212 - Storage capacitor; 212a - First electrode plate; 212b - Second electrode plate; 220 - Signal line; 300 - First electrode layer; 310 - First electrode; 400-pixel definition layer; 410-pixel aperture; 500 - Light-emitting functional layer; 510 - Light-emitting layer; 511 - Light-emitting structure; 512 - Common layer; 512a - Type I common layer; 512aa - Hole injection layer; 512ab - Hole transport layer; 512ac - Electron blocking layer; 512b - Type II common layer; 512ba - Hole blocking layer; 512bb - Electron transport layer; 512bc - Electron injection layer; 600 - Second electrode layer; 700 - Encapsulation layer; 710 - First inorganic encapsulation layer; 720 - Organic encapsulation layer; 730 - Second inorganic encapsulation layer; 800 - Connecting lead; 810 - First segment; 820 - Second segment; 830 - Third segment; 900 - First pad electrode; IL1 - First insulating layer; IL2 - Second insulating layer; IL3 - Third insulating layer; PLN - Planarization layer; SP - Sub-pixel; SP1 - First sub-pixel; SP2 - Second sub-pixel; SP3 - Third sub-pixel; AA - Display area; NA - Border area; 20 - First pre-substrate; 21 - First groove; 22 - First portion; 23 - Second portion; 23a - First pre-section; 23b - Second pre-section; 30 - Second pre-substrate; X - First direction; Y - Second direction; Z - Thickness direction of the display panel. Detailed Implementation
[0014] The features and exemplary embodiments of various aspects of this application will be described in detail below. To make the objectives, technical solutions, and advantages of this application clearer, the application will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are intended only to explain this application and not to limit it. For those skilled in the art, this application can be implemented without some of these specific details. The following description of the embodiments is merely to provide a better understanding of this application by illustrating examples. In the drawings and the following description, at least some well-known structures and technologies are not shown in order to avoid causing unnecessary ambiguity to this application; and, for clarity, the dimensions of some structures may be exaggerated. Furthermore, the features, structures, or characteristics described below can be combined in any suitable manner in one or more embodiments.
[0015] It should be noted that, unless otherwise stated, "a plurality of" in this document means two or more; the terms "upper," "lower," "left," "right," "inner," and "outer," etc., indicating orientation or positional relationships, are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application. Furthermore, relational terms such as "first" and "second" are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.
[0016] The directional terms appearing in the following description refer to the directions shown in the figures and are not intended to limit the specific structure of the embodiments of this application. It should also be noted in the description of this application that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, a rotating connection, or an integral connection; they can refer to a direct connection or an indirect connection. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.
[0017] With the continuous development of technology, the application scenarios of display panel 10 are becoming increasingly widespread. Display panel 10 is commonly used in devices such as mobile phones, computers, televisions, and wearable devices. In related technologies, in order to reduce the bezel size, the driving integrated circuit is mounted on the back side of the substrate 100 away from the light-emitting layer 510, eliminating the bonding area. Vias are directly formed in the substrate 100, and metal is filled into the vias to electrically connect the pad electrodes in the driving circuit layer 200 to the driving integrated circuit. This enables the driving integrated circuit to control the signals of the circuits in the driving circuit layer 200, and the driving integrated circuit controls the working state of the display panel 10.
[0018] In the fabrication process, firstly, a connecting lead 800, a first pad electrode 900, and a driving circuit layer 200 need to be fabricated on a continuous pre-substrate 100 to provide a reliable support for the connecting lead 800, the first pad electrode 900, and the driving circuit layer 200. Then, functional structures such as a light-emitting functional layer 500 are fabricated on the driving circuit layer 200. Next, vias are opened on the pre-substrate 100, and the vias are arranged through the thickness direction of the substrate 100. Metal is filled into the vias, and finally, the electrical connection between the driving integrated circuit and the first pad electrode 900 is completed.
[0019] There are various methods for creating vias in related technologies. For example, laser ablation can be used. However, this process has poor opening precision. During the laser scanning of the substrate 100 along the thickness Z direction of the display panel, thermal radiation can occur on the first pad electrode 900, connecting leads 800, or circuits in the driving circuit layer 200 on the substrate 100, causing thermal damage. Furthermore, carbon powder residue can remain inside the via, and the connection quality between the driving circuit layer 200 and the driving integrated circuit cannot be guaranteed. Alternatively, dry etching or wet etching processes can be used, which offer higher opening precision. However, over-etching may occur during the etching process, damaging structures such as the first pad electrode 900. Carbon powder residue can also remain inside the via, affecting the signal connection between the driving integrated circuit and the circuits in the driving circuit layer 200.
[0020] To address the aforementioned technical problems, this application is provided. To better understand this application, the following detailed description, in conjunction with the accompanying drawings, describes the display panel 10, display module, display device, and method for manufacturing the display panel 10 according to embodiments of this application.
[0021] Figure 1 This is a schematic diagram of the structure of a display panel 10 provided in an embodiment of this application. Figure 2 This is a schematic diagram of the arrangement of sub-pixels SP provided in an embodiment of this application. Figure 3 This is a partial cross-sectional view of a light-emitting layer 510 provided in an embodiment of this application. Figure 4 This is a partial cross-sectional view of a display panel 10 provided in an embodiment of this application. Figure 5 This is a partial top view of a display panel 10 provided in an embodiment of this application. Figure 6 This is an embodiment of the present application. Figure 5 A partial sectional view along the AA direction.
[0022] In the diagram, the X direction represents the first direction X, the Y direction represents the second direction Y, and the Z direction represents the thickness direction Z of the display panel. The first direction X, the second direction Y, and the thickness direction Z of the display panel can intersect each other; for example, the first direction X, the second direction Y, and the thickness direction Z of the display panel can be perpendicular to each other.
[0023] like Figures 1 to 6 As shown, this application embodiment provides a display panel 10, including: The substrate 100 includes a body portion 110 and a first through-hole 120 disposed on the body portion 110. A driving circuit layer 200 is disposed on one side of the substrate 100, and the driving circuit layer 200 includes signal lines 220. The body portion 110 has a first surface 111 facing away from the driving circuit layer 200. The display panel 10 also includes a connecting lead 800 and a first pad electrode 900. The first pad electrode 900 is embedded in the first through-hole 120. The surface of the first pad electrode 900 facing away from the driving circuit layer 200 is exposed from the first through-hole 120 and flush with at least a portion of the first surface 111 surrounding the first through-hole 120. The first pad electrode 900 is electrically connected to the signal lines 220 via the connecting lead 800.
[0024] This application provides a display panel 10, including a substrate 100, a driving circuit layer 200, connecting leads 800, and a first pad electrode 900. The substrate 100 provides mechanical support for the driving circuit layer 200 and other structural layers, and forms physical protection for the display panel 10. The driving circuit layer 200 is disposed on one side of the substrate 100 and is used to arrange circuits and signal lines 220 to drive the light-emitting functional layer 500 thereon to emit light. The first pad electrode 900 is electrically connected to the signal lines 220 in the driving circuit layer 200 through the connecting leads 800. The first pad electrode 900 is used to electrically connect to the driving integrated circuit or other external circuits, thereby realizing signal transmission between the signal lines 220 and the driving integrated circuit or other external circuits.
[0025] The substrate 100 includes a body portion 110 and a first through hole 120 disposed in the body portion 110. The body portion 110 has a first surface 111 on the side opposite to the driving circuit layer 200. The first pad electrode 900 is embedded in the first through hole 120, so that the hole wall of the first through hole 120 can have a better embedding effect on the first pad electrode 900, thereby improving the structural stability of the first pad electrode 900. The surface of the first pad electrode 900 facing away from the driving circuit layer 200 is exposed through the first via 120 and flush with at least a portion of the first surface 111 surrounding the first via 120. This means the first pad electrode 900 does not protrude outwards relative to the substrate 100, reducing the risk of it detaching. Furthermore, the first pad electrode 900 does not retract inwards relative to the substrate 100, eliminating the need for additional vias on the side of the first pad electrode 900 facing away from the driving circuit layer 200. During fabrication, once the connecting lead 800, the first pad electrode 900, and the driving circuit layer 200 are fabricated, only the portion of the prepared substrate 100 facing away from the driving circuit layer 200 needs to be exposed. The first pad electrode 900 can be removed in sections to expose the surface of the first pad electrode 900 facing away from the driving circuit layer 200. This solves the problems of poor opening accuracy and toner residue in the prior art. In addition, when removing the part of the pre-substrate 100 located where the first pad electrode 900 faces away from the driving circuit layer 200, this structural design provides feasibility for lateral peeling process. It eliminates the need to perform laser scanning or etching on the pre-substrate 100 along the thickness direction Z of the display panel. This reduces or eliminates the risk of over-etching or thermal radiation in the first pad electrode 900, connecting lead 800 or driving circuit layer 200, improves the signal transmission quality between the display panel 10 and the driving integrated circuit or external circuit, and improves the working performance of the display panel 10.
[0026] Optionally, the display panel 10 may have a display area AA and a border area NA surrounding the display area AA. The display panel 10 in the display area AA can be used for emitting light and displaying, while the display panel 10 in the border area NA can be used for arranging circuits or wiring.
[0027] Optionally, the display panel 10 of this application embodiment is also applicable to a full-screen display without a border area NA.
[0028] Optionally, the display panel 10 may include a plurality of sub-pixels SP, which may be arrayed within the display area AA. For example, the plurality of sub-pixels SP may be arrayed within the display area AA along a first direction X and a second direction Y.
[0029] Optionally, the sub-pixel SP may include a first sub-pixel SP1, a second sub-pixel SP2, and a third sub-pixel SP3 with different emission colors to facilitate color display of the display panel 10. For example, the emission color of the first sub-pixel SP1 may be red, the emission color of the second sub-pixel SP2 may be green, and the emission color of the third sub-pixel SP3 may be blue.
[0030] Optionally, the display panel 10 provided in this application embodiment can be configured in various ways. For example, the display panel 10 provided in this application embodiment can be a display panel 10 that works based on the organic light-emitting diode (OLED) display principle or a display panel 10 that works based on the light-emitting diode (LED) display principle.
[0031] For ease of description, the following embodiments will be described using the display panel 10 provided in the embodiments of this application as an example of its operation based on the organic light-emitting diode display principle.
[0032] like Figure 4 As shown in the embodiment of this application, a display panel 10 includes a substrate 100, a driving circuit layer 200, a first electrode layer 300, a pixel definition layer 400, a light-emitting functional layer 500, and a second electrode layer 600.
[0033] Optionally, the substrate 100 serves as a mechanical support layer, providing support and physical protection for the driving circuit layer 200 and the first electrode layer 300, pixel definition layer 400, light-emitting functional layer 500, and second electrode layer 600 on the driving circuit layer 200.
[0034] For example, the material of the substrate 100 includes, but is not limited to, rigid materials such as glass or silicon wafers, or flexible materials such as polyimide, ultra-thin glass, metal foil or polymer plastics. The flexible or rigid substrate 100 can block oxygen and moisture, and prevent moisture or impurities from diffusing into the display panel 10 through the substrate 100.
[0035] Optionally, the substrate 100 may have a single-layer or multi-layer structure.
[0036] For example, the substrate 100 may be a single-layer glass substrate 100 or a polyimide substrate.
[0037] In some embodiments, the substrate 100 may further include a first substrate 130 and a second substrate 140 located on the side of the first substrate 130 facing the driving circuit layer 200. The materials of the first substrate 130 and the second substrate 140 may be polyimide (PI), polyethylene terephthalate (PET), or surface-treated polymer soft film, etc. A barrier layer may also be included between the first substrate 130 and the second substrate 140. The barrier layer may be made of inorganic materials such as silicon oxide or silicon nitride. This is to improve the water and oxygen resistance of the substrate 100 and to prevent the further propagation of cracks in the first substrate 130 or the second substrate 140, ensuring that the entire substrate 100 is free of through cracks.
[0038] Optional, such as Figure 4 As shown, the driving circuit layer 200 may include a plurality of pixel circuits 210. For example, a pixel circuit 210 may include a transistor 211, a storage capacitor 212, and signal lines 220 for connecting the various devices. The transistor 211 may include a semiconductor 211a, a gate 211b, and source / drain electrodes 211c. The storage capacitor 212 may include a first electrode 212a and a second electrode 212b.
[0039] Optionally, the pixel circuit 210 can be configured in various ways, such as 2T1C, 4T1C, 7T1C, 7T2C, 8T1C, 8T2C, etc.
[0040] Optionally, the signal lines 220 can be of various types and configurations. For example, signal lines 220 may include scan lines, data lines, power lines, and voltage signal lines 220. Various signal lines 220 are connected to corresponding connection leads 800. Various connection leads 800 are connected to the corresponding signal lines 220 in the display area AA in a fan-out routing manner. Multiple first pad electrodes 900 can be provided. The end of each connection lead 800 furthest from the signal line 220 is electrically connected to the corresponding first pad electrode 900. The first pad electrode 900 can be configured to be electrically connected to a second pad electrode connected to the driver integrated circuit via a soldering process or anisotropic conductive adhesive. The first pad electrode 900 can also be configured as a pin structure for connecting external test circuits. The specific type of signal line 220 connected to the connection lead 800 connected to the first pad electrode 900 can be determined based on the external signal connected to the first pad electrode 900.
[0041] The first pad electrode 900 is electrically connected to the signal line 220 in the driver circuit layer 200 via the connecting lead 800. The first pad electrode 900 is used to electrically connect to the driver integrated circuit or other external circuits, thereby realizing signal transmission between the signal line 220 and the driver integrated circuit or other external circuits.
[0042] The surface of the first pad electrode 900 facing away from the driving circuit layer 200 is exposed through the first via 120 and flush with at least a portion of the first surface 111 surrounding the first via 120. Optionally, the first surface 111 can be a continuous plane parallel to the direction of the surface where the substrate 100 is located, that is, the substrate 100 has no step on the side facing away from the driving circuit layer 200, and the surface of the first pad electrode 900 facing away from the driving circuit layer 200 is flush with the entire first surface 111 to ensure the flatness of the substrate 100 and facilitate the reduction of the thickness of the display panel 10. The driving integrated circuit can be directly fixed to the first surface 111 and bonded to the first pad electrode 900. The first surface 111 can also include two regions with a step, one of which is arranged around the first via 120, and the surface of the first pad electrode 900 facing away from the driving circuit layer 200 is flush with this region to provide mounting space for the connection between the first pad electrode 900 and the second pad electrode connected to the driving integrated circuit, ensuring a compact structure.
[0043] Optionally, the first via 120 can be completely through the thickness direction of the substrate 100, or it can be a non-through blind via. The connecting lead 800 is introduced from the driving circuit layer 200 into the interior of the substrate 100 and electrically connected to the first pad electrode 900.
[0044] The first electrode layer 300 is located on one side of the substrate 100, and the first electrode layer 300 includes a plurality of first electrodes 310 disposed at intervals.
[0045] For example, the first electrode layer 300 may be located on the side of the driving circuit layer 200 away from the substrate 100, and the single pixel circuit 210 may be connected to the single first electrode 310, so that the single pixel circuit 210 can be used to provide driving current to the single first electrode 310.
[0046] Optionally, the display panel 10 may further include a planarization layer PLN disposed on one side of the substrate 100. The planarization layer PLN can be used to improve the flatness of the display panel 10. For example, the planarization layer PLN may be disposed between the driving circuit layer 200 and the first electrode layer 300, that is, the first electrode layer 300 may be located on the side of the planarization layer PLN away from the substrate 100, so that the step differences between the various structures in the driving circuit layer 200 do not easily affect the arrangement of the first electrode layer 300.
[0047] Optionally, in a direction away from the substrate 100, the display panel 10 may further include a first insulating layer IL1, a second insulating layer IL2, and a third insulating layer IL3 stacked sequentially. As an example, at least some of the semiconductors 211a of the transistors 211 may be located on the side of the first insulating layer IL1 facing the substrate 100, the gates 211b of at least some of the transistors 211 and the first electrode 212a of at least some of the storage capacitors 212 may be located between the first insulating layer IL1 and the second insulating layer IL2, the second electrode 212b of at least some of the storage capacitors 212 may be located between the second insulating layer IL2 and the third insulating layer IL3, and the source and drain electrodes 211c of at least some of the transistors 211 may be located between the third insulating layer IL3 and the planarization layer PLN.
[0048] The display panel 10 also includes a pixel definition layer 400, which is located on the side of the first electrode layer 300 away from the substrate 100. The pixel definition layer 400 includes a pixel opening 430 corresponding to the first electrode 310. The pixel definition layer 400 can be used to participate in dividing the sub-pixels SP of the display panel 10, and the pixel definition layer 400 can be used to protect the first electrode 310.
[0049] Optionally, the pixel opening 430 corresponding to the first electrode 310 can refer to a single first electrode 310 being configured to correspond to a single pixel opening 430, and at least a portion of the surface of the single first electrode 310 on the side facing away from the substrate 100 being exposed from the single pixel opening 430.
[0050] Optionally, the pixel definition layer 400 may cover the edge of the first electrode 310, so that the pixel definition layer 400 can be used to protect the first electrode 310.
[0051] The light-emitting functional layer 500 is located on the side of the pixel definition layer 400 away from the substrate 100, and the second electrode layer 600 is located on the side of the light-emitting functional layer 500 away from the substrate 100. The first electrode 310 and the second electrode layer 600 can be used to drive the light-emitting functional layer 500 to emit light, so as to realize the display operation of the display panel 10.
[0052] Optional, such as Figure 3 As shown, the light-emitting functional layer 500 includes a light-emitting layer 510, which includes a light-emitting structure 511 and a common layer 512 located on at least one side of the light-emitting structure 511. For example, the light-emitting layer 510 may include multiple light-emitting structures 511, and the common layer 512 may include a first type of common layer 512a located on the side of the light-emitting structure 511 near the substrate 100 and a second type of common layer 512b located on the side of the light-emitting structure 511 away from the substrate 100. Each light-emitting structure 511 may be located between the same first type of common layer 512a and the same second type of common layer 512b.
[0053] Optionally, in the direction away from the substrate 100, the first type of common layer 512a may include a hole injection layer 512aa (HIL), a hole transport layer 512ab (HTL), and an electron blocking layer 512ac (EBL) stacked sequentially. In the direction away from the substrate 100, the second type of common layer 512b may include a hole blocking layer 512ba (HBL), an electron transport layer 512bb (ETL), and an electron injection layer 512bc (EIL) stacked sequentially.
[0054] Optionally, the light-emitting functional layer 500 may be partially located within the pixel opening 430, and the surface of the first electrode 310 exposed from the pixel opening 430 may be in contact with the light-emitting functional layer 500 within the pixel opening 430. For example, the light-emitting structure 511 of the light-emitting functional layer 500 may be located within the pixel opening 430, and different light-emitting structures 511 may be located within different pixel openings 430. The first common layer 512a and the second common layer 512b of the light-emitting functional layer 500 may extend from within the pixel opening 430 to the side of the pixel definition layer 400 facing away from the substrate 100, and the surface of the first electrode 310 exposed from the pixel opening 430 may be in contact with the first common layer 512a within the pixel opening 430.
[0055] Optionally, the second electrode layer 600 may be partially located within the pixel opening 430. For example, the second electrode layer 600 may be a surface electrode, and the second electrode layer 600 may extend from within the pixel opening 430 to the side of the pixel definition layer 400 opposite to the substrate 100.
[0056] Optionally, the first electrode layer 300 and the second electrode layer 600 can serve as pixel electrode layers of the display panel 10. One of the first electrode layer 300 and the second electrode layer 600 can serve as an anode layer, and the other can serve as a cathode layer to drive the light-emitting functional layer 500 to emit light. Optionally, a sub-pixel SP may include a first electrode 310, a light-emitting functional layer 500, and a second electrode layer 600 overlapping in the thickness direction Z of the display panel, as well as a pixel circuit 210 connected to the first electrode 310. Specifically, in a single sub-pixel SP, the number of the first electrode 310, the light-emitting structure 511, and the pixel circuit 210 may each be one. The first electrodes 310 of adjacent sub-pixels SP may be spaced apart from each other. The common layer 512 of adjacent sub-pixels SP may be integrally formed, and the second electrode layer 600 of adjacent sub-pixels SP may be integrally formed, so as to improve the manufacturing efficiency of the display panel 10.
[0057] Optional, such as Figure 4 As shown, the display panel 10 provided in this application embodiment also includes an encapsulation layer 700 disposed on the side of the second electrode layer 600 away from the substrate 100. The encapsulation layer 700 can be used to encapsulate sub-pixels SP to improve the working stability of the display panel 10.
[0058] Optionally, the encapsulation layer 700 can be configured in various ways. For example, the encapsulation layer 700 can be an encapsulation layer 700 based on thin film encapsulation (TFE) technology.
[0059] Optionally, in the direction away from the substrate 100, the encapsulation layer 700 may include a first inorganic encapsulation layer 710, an organic encapsulation layer 720, and a second inorganic encapsulation layer 730 stacked sequentially. The materials of the first inorganic encapsulation layer 710 and the second inorganic encapsulation layer 730 may include inorganic materials, which can effectively limit the intrusion of moisture into electrical components such as sub-pixels SP, connecting leads 800, and first pad electrodes 900. The material of the organic encapsulation layer 720 may include organic materials, and the organic encapsulation layer 720 can provide better planarization.
[0060] There are several ways to specifically set up the substrate 100.
[0061] In some embodiments, such as Figure 6 As shown, the substrate 100 includes a first substrate 130. The surface of the first substrate 130 facing away from the driving circuit layer 200 is a first surface 111. A first through hole 120 penetrates the first substrate 130 along the thickness direction Z of the display panel. A connecting lead 800 is disposed on the first substrate 130. At least a portion of the connecting lead 800 extends to the hole wall of the first through hole 120 and is electrically connected to the first pad electrode 900.
[0062] In this embodiment, the substrate 100 has a single-layer structure. The display panel 10 has a display area AA and a bezel area NA. A first pad electrode 900 and a connecting lead 800 are located in the bezel area NA. At least a portion of the connecting lead 800 extends into the interior of the first via 120 and is electrically connected to the first pad electrode 900. The connecting lead 800 is located on the first substrate 130, and one end of the connecting lead 800 away from the first pad electrode 900 is electrically connected to the signal line 220 of the display area AA. The first pad electrode 900 is embedded in the first via 120, and the first substrate 130 provides support and fixation for the first pad towards the sidewall of the first via 120. The structure has good stability, and the single-layer substrate 100 has a simple structure, which is beneficial for reducing the thickness of the display panel 10.
[0063] Optionally, signal line 220 also includes a fan-out line located in the bezel area NA, one end of which is electrically connected to connecting lead 800. The fan-out line is electrically connected to data lines or scan lines located in the display area AA in a fan-out manner.
[0064] Optionally, the first through-hole 120 includes a first hole segment and a second hole segment connected together. The first hole segment is located at the end of the first through-hole 120 that is close to the first surface 111, and the first pad electrode 900 is embedded in the first hole segment. The connecting lead 800 includes a first sub-segment located on the first substrate 130 and a second sub-segment located within the second hole segment. The second sub-segment fills the second hole segment and is flush with the side of the first sub-segment facing away from the first surface 111. This ensures the connection quality between the connecting lead 800 and the first pad electrode 900, and also facilitates the flattening of the connecting lead 800, ensuring impedance balance at the connection point between the connecting lead 800 and the first pad electrode 900. Furthermore, the connecting lead 800 located within the second hole segment also provides some reinforcement and support for the first pad electrode 900, which is beneficial to the structural stability of the first pad electrode 900.
[0065] Optionally, the connecting lead 800 extends into the first through hole 120 and is arranged in a ring along the hole wall of the second hole segment to electrically connect with the first pad electrode 900. The second hole segment may also be filled with a buffer structure to provide good cushioning protection for the first pad electrode 900 and the connecting lead 800, and to provide some reinforcement and support for the connecting lead 800 and the first pad electrode 900.
[0066] For example, the buffer structure may be at least one of polyurethane, polyimide or epoxy resin.
[0067] In some embodiments, such as Figure 6As shown, the substrate 100 also includes a second substrate 140 located on the side of the connecting lead 800 away from the first substrate 130. The second substrate 140 includes a connected main body portion 142 and a protrusion portion 143. The main body portion 142 is located on the side of the first substrate 130 facing the driving circuit layer 200, and the protrusion portion 143 is embedded in the first through hole 120.
[0068] In this embodiment, a second substrate 140 is provided on the side of the connecting lead 800 away from the first substrate 130 to improve the overall mechanical strength of the substrate 100. The connecting lead 800 is located on the first substrate 130 and extends into the first via 120 to be electrically connected to the first pad electrode 900. The end of the connecting lead 800 away from the first pad electrode 900 is electrically connected to the signal line 220, thereby realizing signal transmission between the first pad electrode 900 and the signal line 220.
[0069] The main body 142 is located on the side of the first substrate 130 facing the driving circuit layer 200, which can protect the connecting lead 800 and improve the overall mechanical strength of the substrate 100. The protrusion 143 is embedded in the first through hole 120 to ensure that the first pad electrode 900 and the connecting lead 800 located in the first through hole 120 can be firmly embedded in the first through hole 120, and can provide good anti-buffering protection for the first pad electrode 900 and the connecting lead 800 located in the first through hole 120.
[0070] In some embodiments, such as Figure 6 As shown, the second substrate 140 has a second through hole 141. The orthographic projection of the second through hole 141 along the thickness direction Z of the display panel is offset from the orthographic projection of the first through hole 120 along the thickness direction Z of the display panel. At least a portion of the signal line 220 is located in the second through hole 141, and at least a portion of the connecting lead 800 is exposed from the second through hole 141 and contacts the signal line 220.
[0071] In this embodiment, the display panel 10 includes a first substrate 130 and a second substrate 140 disposed opposite to each other. The first substrate 130 has a first through-hole 120, and the second substrate 140 has a second through-hole 141. The orthographic projection of the second through-hole 141 along the thickness direction of the display panel 10 is offset from the orthographic projection of the first through-hole 120 along the thickness direction Z of the display panel, meaning they do not overlap in the thickness direction Z of the display panel. At least a portion of the signal line 220 is accommodated inside the second through-hole 141 and extends along the sidewall or bottom of the second through-hole 141; while at least a portion of the connecting lead 800 is exposed from the opening area of the second through-hole 141 and forms physical contact and electrical connection directly with the portion of the signal line 220 located inside the second through-hole 141 through a conductive medium (e.g., anisotropic conductive film, conductive silver paste, or metal bump). By adopting this combination structure of staggered vias and embedded signal lines 220, on the one hand, the thickness space of the second substrate 140 can be effectively utilized to bury the signal lines 220 in the second vias 141, reducing the overall wiring height and the risk of damage due to exposed connecting leads 800; on the other hand, by staggering the first vias 120 and the second vias 141, it is ensured that the connecting leads 800 can be smoothly led out and connected to the signal lines 220, while also improving the wiring flexibility and integration density, enhancing the connection reliability between the connecting leads 800 and the signal lines 220, and thus ensuring the stability of signal transmission between the signal lines 220 and the first pad electrode 900.
[0072] It should be noted that in this embodiment, the portion of the signal line 220 located within the second through hole 141 can be a fan-out line of the signal line 220.
[0073] Optionally, since a lateral peeling process can be used to expose the first pad electrode 900, and damage to the components in the display area AA is less likely during the lateral peeling process, the first through-hole 120 and the second through-hole 141 can be simultaneously set in the display area AA to achieve a borderless display panel 10. It is understood that the second through-hole 141 can also be set in the display area AA, and the first through-hole 120 can be set in the border area NA to reduce the circuit layout density. Alternatively, the first through-hole 120 and the second through-hole 141 can be simultaneously set in the border area NA; this embodiment does not specifically limit this.
[0074] In some embodiments, such as Figure 6As shown, the connecting lead 800 includes a first segment 810, a second segment 820, and a third segment 830 connected sequentially. The first segment 810 is disposed on the side of the first substrate 130 facing the driving circuit layer 200. The main body 142 covers at least a portion of the first segment 810, and at least a portion of the first segment 810 is exposed through the second through hole 141. The second segment 820 is disposed on the wall of the first through hole 120. The third segment 830 is connected to the end of the second segment 820 away from the first segment 810 and is located in the first through hole 120. The first pad electrode 900 is connected to the side of the third segment 830 away from the driving circuit layer 200. The protrusion 143 is embedded in the first through hole 120 and covers the second segment 820 and the third segment 830.
[0075] In this embodiment, the connecting lead 800 includes a first segment 810, a second segment 820, and a third segment 830 connected sequentially. The first segment 810 is disposed on the side of the first substrate 130 facing the driving circuit layer 200, with the main body 142 covering at least a portion of the first segment 810, and at least a portion of the first segment 810 exposed through a second via 141 to achieve communication with the signal line 220. The second segment 820 is attached to the wall of the first via 120, serving as a transition section for the connecting lead 800 in the depth direction of the first via 120. The third segment 830 is connected to the end of the second segment 820 away from the first segment 810 and is entirely housed inside the first via 120. A first pad electrode 900 is disposed on the side of the third segment 830 away from the driving circuit layer 200, and electrical communication between the first pad electrode 900 and the connecting lead 800 is achieved through the third segment 830.
[0076] The protrusion 143 is embedded inside the first through hole 120 and completely covers the second segment 820 and the third segment 830, thereby physically covering the key bending section of the fixed connection lead 800, effectively preventing defects such as peeling and breakage caused by stress concentration or process deviation, and improving the bonding strength between the connection lead 800 and the first pad electrode 900.
[0077] Figure 7 A display panel 10 provided in another embodiment of this application is in Figure 5 A partial sectional view along the AA direction.
[0078] In some embodiments, such as Figure 7As shown, the substrate 100 also includes a first barrier layer 150, which is located between the connecting lead 800 and the second substrate 140. The first barrier layer 150 includes a first connecting segment 151 and a second connecting segment 152 connected together. The first connecting segment 151 covers the first segment 810, and the second connecting segment 152 is located in the first through hole 120 and between the second segment 820, the third segment 830 and the protrusion 143.
[0079] In this embodiment, the first barrier layer 150 is disposed between the connecting lead 800 and the second substrate 140 to provide reliable electrical isolation and mechanical buffering for the connecting lead 800 and the first pad electrode 900. In addition, when the second substrate 140 develops cracks or moisture intrusion occurs, the first barrier layer 150 can prevent the cracks from spreading to the connecting lead 800 and the first substrate 130 and reduce the risk of moisture intrusion into the connecting lead 800, the first pad electrode 900, and the first substrate 130.
[0080] Specifically, the first barrier layer 150 includes a first connecting segment 151 and a second connecting segment 152 that are interconnected. The first connecting segment 151 covers the surface of the first segment 810 of the connecting lead 800, forming a barrier between the first segment 810 and the second substrate 140. The second connecting segment 152 extends inward along the first through hole 120 and is accommodated inside the first through hole 120. In the thickness direction, it is located between the second segment 820, the third segment 830, and the protrusion 143. That is, the second connecting segment 152 is attached to the surface of the second segment 820 and covered by the protrusion 143, while being adjacent to the third segment 830. Through this "interlayer embedding" arrangement, the first barrier layer 150 not only effectively isolates the first segment 810 from the external environment and adjacent conductive structures in the planar area, but also physically separates the bending sections (second segment 820 and third segment 830) of the connecting lead 800 from the protrusion 143 of the upper layer, thereby reducing the signal delay difference caused by interlayer parasitic capacitance coupling, and at the same time reducing the risk of cracks and moisture intrusion in the connecting lead 800 and the first pad electrode 900.
[0081] In some embodiments, such as Figure 7 As shown, the substrate 100 also includes a second barrier layer 160, which is disposed between the first substrate 130 and the first segment 810 to prevent moisture from entering the first segment 810 from the first substrate 130 and to reduce the risk of cracks spreading to the first segment 810 due to cracking of the first substrate 130, thereby ensuring the stability of signal transmission between the first pad electrode 900 and the signal line 220.
[0082] Optionally, both the first barrier layer 150 and the second barrier layer 160 are made of inorganic materials to ensure good blocking of moisture intrusion and crack propagation. For example, the materials of the first barrier layer 150 and the second barrier layer 160 may include silicon oxide or silicon nitride.
[0083] Figure 8 A partial top view of a display panel 10 provided in another embodiment of this application. Figure 9 for Figure 8 Partial sectional view along the BB direction.
[0084] In other embodiments, such as Figure 8 and Figure 9 As shown, the substrate 100 further includes a second substrate 140 disposed on the side of the first substrate 130 facing the driving circuit layer 200. The second substrate 140 has a second through hole 141. The orthographic projection of the second through hole 141 along the thickness direction Z of the display panel at least partially overlaps with the orthographic projection of the first through hole 120 along the thickness direction Z of the display panel. The connecting lead 800 extends along the thickness direction Z of the display panel and is located in the second through hole 141.
[0085] In this embodiment, the overall mechanical strength of the substrate 100 is improved by providing a second substrate 140 on the side of the first substrate 130 facing the driving circuit layer 200. The end of the connecting lead 800 away from the first pad electrode 900 is electrically connected to the signal line 220 via a fan-out line. The connecting lead 800 is located within the first via 120 and electrically connected to the first pad electrode 900. The orthographic projection of the second via 141 along the thickness direction Z of the display panel at least partially overlaps with the orthographic projection of the first via 120 along the thickness direction Z of the display panel. The connecting lead 800 extends along the extension direction of the first via 120, i.e., along the thickness direction Z of the display panel. The end of the connecting lead 800 away from the first pad electrode 900 is electrically connected to the signal line 220 via a fan-out line. This reduces the size of the connecting lead 800, i.e., reduces the space occupied by the bonding connection area between the driving integrated circuit and the signal line 220, resulting in a compact structure. Since the surface of the first pad electrode 900 facing away from the driving circuit layer 200 is flush with at least a portion of the surface surrounding the first via 120, a lateral peeling process can be used during fabrication to remove the portion of the prepared substrate 100 located on the side of the first pad electrode 900 facing away from the driving circuit layer 200, without scanning or etching the components within the display area AA, thus preventing damage to the components within the display area AA, which is beneficial for the realization of a borderless display screen.
[0086] For example, when the first through hole 120 is provided in the display area AA, the driving integrated circuit is fixed to the first surface 111, and the second pad electrode connected to the driving integrated circuit is directly electrically connected to the first pad electrode 900 located in the display area AA, so that the bonding area is located within the display area AA, thereby achieving a borderless design.
[0087] In some embodiments, such as Figure 9 As shown, the first surface 111 has a first sub-surface 111a and a second sub-surface 111b arranged sequentially along the direction of the surface where the display panel 10 is located. The first sub-surface 111a surrounds the first through hole 120, and the first sub-surface 111a and the second sub-surface 111b are flush.
[0088] That is, the first sub-surface 111a and the second sub-surface 111b are connected successively, and the first sub-surface 111a and the second sub-surface 111b are coplanar. The surface of the first pad electrode 900 facing away from the driving circuit layer 200 is flush with both the first sub-surface 111a and the second sub-surface 111b. During the lateral peeling process, all portions of the prepared substrate 100 below the surface of the first pad electrode 900 facing away from the driving circuit layer 200 can be completely removed to ensure the flatness of the substrate 100 and facilitate the reduction of the thickness of the display panel 10.
[0089] Figure 10 A partial cross-sectional view of a display panel 10 is provided in another embodiment of this application.
[0090] In some embodiments, such as Figure 10 As shown, the distance between the first sub-surface 111a and the driving circuit layer 200 along the thickness direction Z of the display panel is greater than the distance between the second sub-surface 111b and the driving circuit layer 200 along the thickness direction Z of the display panel, so as to form a step 1101.
[0091] The distance from the first sub-surface 111a to the driving circuit layer 200 is greater than the distance from the second sub-surface 111b to the driving circuit layer 200, so that a step 1101 is formed between the first sub-surface 111a and the second sub-surface 111b, so that the second pad electrode connected to the driving integrated circuit is fixed on the step 1101 and electrically connected to the first pad electrode 900, which improves the reliability of the connection between the first pad electrode 900 and the second pad electrode, and the second pad electrode does not need to occupy additional space in the thickness direction, resulting in a compact structure.
[0092] In some embodiments, such as Figure 9As shown, the display panel 10 has a display area AA, a first sub-surface 111a and a second sub-surface 111b are both located in the display area AA, and a first through hole 120 surrounds the first sub-surface 111a, that is, the first through hole 120 is located in the display area AA. The first pad electrode 900 can be bonded to the driver integrated circuit in the display area AA, thereby realizing the borderless design of the display panel 10 and improving the screen ratio of the display panel 10.
[0093] Or, such as Figure 10 As shown, the display panel 10 includes a display area AA and a border area NA surrounding at least a portion of the display area AA. A first sub-surface 111a is located in the display area AA, and a second sub-surface 111b is located in the border area NA. Specifically, the first pad electrode 900 achieves bonding connection with the driver integrated circuit in the border area NA, providing a good wiring layout.
[0094] A second aspect of this application also provides a display module, including the display panel 10 described in any of the first aspects and a circuit board. The circuit board includes a second pad electrode located on the side of the first surface 111 facing away from the driving circuit layer 200 and electrically connected to the first pad electrode 900. The circuit board is used for electrical connection with the driving integrated circuit of the display panel 10.
[0095] The second pad electrode is disposed on the circuit board, the circuit board and the driver integrated circuit are electrically connected, and the circuit board is electrically connected to the first pad electrode 900 through the second pad electrode. The first pad electrode 900 is electrically connected to the signal line 220 through the connecting lead 800, thereby realizing the signal transmission between the driver integrated circuit and the signal line 220.
[0096] Optionally, the driver integrated circuit can be directly mounted on the circuit board, or it can achieve signal communication with the circuit board through flexible circuit boards, connectors, etc.
[0097] Optionally, the first pad electrode 900 and the second pad electrode can be electrically connected by soldering or using anisotropic conductive adhesive.
[0098] Since the display module provided in the second aspect of this application includes the display panel 10 in any of the embodiments of the first aspect, the display module provided in this application has the beneficial effects of the display panel 10 in any of the embodiments of the first aspect, which will not be repeated here.
[0099] In some embodiments, such as Figure 10As shown, the first surface 111 has a first sub-surface 111a and a second sub-surface 111b arranged sequentially along the direction of the display panel 10. The first sub-surface 111a surrounds the through hole. The distance between the first sub-surface 111a and the driving circuit layer 200 along the thickness direction Z of the display panel is greater than the distance between the second sub-surface 111b and the driving circuit layer 200 along the thickness direction Z of the display panel, so as to form a step 1101. One end of the second pad electrode along the direction of the display panel 10 is fixed to the step 1101.
[0100] The distance from the first sub-surface 111a to the driving circuit layer 200 is greater than the distance from the second sub-surface 111b to the driving circuit layer 200, so that a step 1101 is formed between the first sub-surface 111a and the second sub-surface 111b, so that the second pad electrode is fixed on the step 1101 and electrically connected to the first pad electrode 900, which improves the reliability of the connection between the first pad electrode 900 and the second pad electrode, and the second pad electrode does not need to occupy additional space in the thickness direction, resulting in a compact structure.
[0101] A third aspect of this application also provides a display device, including the display module described in any embodiment of the second aspect of this application.
[0102] Since the display device provided in this application includes the display module in any of the aforementioned second aspects, the display device provided in this application has the beneficial effects of the display module in any of the aforementioned embodiments, which will not be repeated here.
[0103] The display device provided in this application embodiment may be a mobile phone, computer, tablet computer, personal digital assistant (PDA), in-vehicle computer, television, smart wearable device, smart home device, virtual reality (VR) device, augmented reality (AR) device, etc. This application embodiment does not impose any special limitation on the specific form of the above-mentioned display device.
[0104] Figure 11 This is a flowchart illustrating a method for manufacturing a display panel 10 according to an embodiment of this application.
[0105] like Figure 11 As shown, the fourth aspect of this application also provides a method for manufacturing a display panel 10, the method comprising: Step 1: Form a first pad electrode 900 and a connecting lead 800 in the pre-substrate 100, and electrically connect the first pad electrode 900 and the connecting lead 800.
[0106] Step S02: A driving circuit layer 200 is formed on one side of the pre-substrate 100. The driving circuit layer 200 includes signal lines 220, which are electrically connected to connecting leads 800.
[0107] Step S03: Remove at least a portion of the prepared substrate 100 away from the driving circuit layer 200 to form a substrate 100. The substrate 100 has a first surface 111 away from the driving circuit layer 200. The surface of the first pad electrode 900 away from the driving circuit layer 200 is exposed on the substrate 100 and flush with at least a portion of the first surface 111.
[0108] In this embodiment, a first pad electrode 900 and a connecting lead 800 are first formed in a pre-substrate 100 through a step S02. The first pad electrode 900 and the connecting lead 800 are electrically connected. Then, a driving circuit layer 200 is formed on one side of the pre-substrate 100 through step S02. The driving circuit layer 200 includes a signal line 220, which is electrically connected to the connecting lead 800. Finally, at least a portion of the pre-substrate 100 away from the driving circuit layer 200 is removed through step S03 to form the substrate 100. The substrate 100 has a first surface 111 facing away from the driving circuit layer 200. The surface of the first pad electrode 900 facing away from the driving circuit layer 200 is exposed on the substrate 100 and is flush with at least a portion of the first surface 111.
[0109] The display panel 10 prepared using this method requires no additional vias. The first pad electrode 900 is embedded within the substrate 100, providing excellent fixation and improving the structural stability of the first pad electrode 900. The first pad electrode 900 does not protrude outwards relative to the substrate 100, reducing the risk of it detaching. Furthermore, the first pad electrode 900 does not retract inwards relative to the substrate 100, eliminating the need for additional vias on the side of the first pad electrode 900 facing away from the driving circuit layer 200. During the fabrication process, after step S02, only the portion of the prepared substrate 100 located where the first pad electrode 900 faces away from the driving circuit layer 200 needs to be removed, exposing the surface of the first pad electrode 900 facing away from the driving circuit layer 200. This solves the problems of poor via accuracy and toner contamination in existing technologies. Regarding residual issues, this structural design provides feasibility for lateral peeling when removing the portion of the pre-substrate 100 located away from the driving circuit layer 200 at the first pad electrode 900. It eliminates the need for laser scanning or etching of the pre-substrate 100 along the thickness direction Z of the display panel, thereby reducing or eliminating the risk of over-etching or thermal radiation in the first pad electrode 900, connecting leads 800, or driving circuit layer 200. This simplifies the process, reduces process risks, improves the quality of signal transmission between the display panel 10 and the driving integrated circuit or external circuits, and enhances the working performance of the display panel 10.
[0110] Figure 12 This is a schematic diagram illustrating the fabrication process of a display panel 10 according to another embodiment of the fourth aspect of this application. Figure 13 for In some embodiments, the pre-substrate 100 includes a first pre-substrate 20 and a second pre-substrate 30 stacked together, such as Figure 12 As shown, in the steps: Step 1: Pattern the first pre-substrate 20 to form a first groove 21. In this step, dry etching, wet etching, or photolithography can be used to form the first groove 21 on the first pre-substrate 20 to facilitate the subsequent fabrication of the connection lead 800 and the first bonding pad electrode 900. (See reference...) Figure 13 .
[0111] Step 2: Fabricate the first pad electrode 900 at the bottom of the first groove 21. In this step, a masking process can be used to form the first pad electrode 900 at the bottom of the first groove 21. (See reference...) Figure 14 .
[0112] Step 3: Fabricate connection leads 800 on the upper surface of the first pre-substrate 20, the walls of the first groove 21, and the surface of the first pad electrode 900 facing away from the bottom of the first groove 21. Specifically, this step may involve first depositing conductive material on the upper surface of the first pre-substrate 20, the walls of the first groove 21, and the surface of the first pad electrode 900 facing away from the bottom of the first groove 21, and then patterning the conductive material to form the connection leads 800. (See reference...) Figure 15 .
[0113] Step 4: Prepare the pre-substrate 100 material on the side of the first pre-substrate 20 facing the connecting lead 800 and within the first groove 21 to form the second pre-substrate 30. The first pre-substrate 20 and the second pre-substrate 30 together form the pre-substrate 100. The second pre-substrate 30 can be used to provide further physical protection and mechanical support for the connecting lead 800 and the first pad electrode 900. (See reference...) Figure 16 .
[0114] In this embodiment, steps 1, 2, 3 and 4 must be performed in sequence.
[0115] In some embodiments, the first pre-substrate 20 has a first portion 22 and a second portion 23 opposite to each other along its thickness direction. The surface of the first portion 22 away from the second pre-substrate 30 is flush with the surface of the first pad electrode 900 away from the second pre-substrate 30. The second portion 23 includes a first pre-segment 23a and a second pre-segment 23b connected successively along the direction of the surface of the first pre-substrate 20. The orthographic projection of the first groove 21 along the thickness direction of the first pre-substrate 20 and the orthographic projection of the second pre-segment 23b along the thickness direction of the first pre-substrate 20 at least partially overlap.
[0116] In step S03: like Figure 17 As shown, the second preparatory section 23b is removed to expose the first pad electrode 900, and a step 1101 is formed between the first portion 22 and the first preparatory section 23a, so that the second pad electrode or other external circuit connected to the driver integrated circuit can be fixed on the step 1101 and electrically connected to the first pad electrode 900. This improves the reliability of the connection between the first pad electrode 900 and the second pad electrode, and the second pad electrode does not need to occupy additional space in the thickness direction, resulting in a compact structure.
[0117] Alternatively, in step S03: At the same time, the first preparatory section 23a and the second preparatory section 23b are removed to expose the first pad electrode 900, and the surface of the substrate 100 facing away from the driving circuit layer 200 is made flush, which is beneficial to achieve a reduction in the thickness of the display panel 10.
[0118] In some embodiments, in step S03: A laser beam is used to scan the interface between the first part 22 and the second part 23 along the first direction X, so as to peel the second preparatory segment 23b from the first part 22, or to peel the first preparatory segment 23a and the second preparatory segment 23b from the first part 22 simultaneously, wherein the first direction X is parallel to the direction of the surface where the first pad electrode 900 is located.
[0119] The first direction X is parallel to the direction of the surface where the display panel 10 is located. When a laser beam is used to scan the interface between the first part 22 and the second part 23 along the first direction X, since the interface does not contact the components in the display area AA and the scanning direction does not pass through the components in the display area AA, there is no need to perform laser scanning or etching on the preparation substrate 100 along the thickness direction Z of the display panel. This can reduce or eliminate the risk of over-etching or thermal radiation in the first pad electrode 900, the connecting lead 800 or the driving circuit layer 200, improve the quality of signal transmission between the display panel 10 and the driving integrated circuit or external circuit, and improve the working performance of the display panel 10.
[0120] During the design phase, if a step 1101 needs to be formed on the side of the substrate 100 away from the driving circuit layer 200, a laser beam is used to scan the interface between the first portion 22 and the second portion 23 along the first direction X to peel the second pre-existing segment 23b from the first portion 22. If a continuous and flush first surface 111 needs to be formed on the side of the substrate 100 away from the driving circuit layer 200, a laser beam is used to scan the interface between the first portion 22 and the second portion 23 along the first direction X to peel the first pre-existing segment 23a and the second pre-existing segment 23b from the first portion 22 simultaneously.
[0121] The surface of the first pad electrode 900 facing away from the driving circuit layer 200 is exposed to the substrate 100 and is flush with at least part of the first surface 111. This allows the laser beam to avoid scanning the first pad electrode 900 as much as possible when scanning along the first direction X, thereby reducing the risk of thermal radiation from the first pad electrode 900. At the same time, no additional vias are needed, solving the problems of toner residue and poor via accuracy.
[0122] In some embodiments, the energy of the laser beam is 170mJ / cm²-300mJ / cm² to ensure good stripping effect and less damage to the surface of the first pad electrode 900 facing away from the driving circuit layer 200.
[0123] Optionally, the energy of the laser beam can be 170mJ / cm², 200mJ / cm², 230mJ / cm², 270mJ / cm², or 300mJ / cm².
[0124] And / or, the thickness of the first preparatory section 23a and the second preparatory section 23b is both 100nm-300nm, in order to ensure that the laser beam has a good stripping effect.
[0125] Optionally, the thickness of the first preparatory segment 23a and the second preparatory segment 23b is 100nm, 170nm, 230nm, 260nm or 300nm.
[0126] The above description is merely a specific implementation of this application. Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working processes of the systems, modules, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here. It should be understood that the protection scope of this application is not limited thereto. Any person skilled in the art can easily conceive of various equivalent modifications or substitutions within the technical scope disclosed in this application, and these modifications or substitutions should all be covered within the protection scope of this application.
Claims
1. A display panel, characterized in that, include: A substrate, the substrate including a body portion and a first through-hole disposed in the body portion; A driving circuit layer is disposed on one side of the substrate, the driving circuit layer includes signal lines, and the body portion has a first surface facing away from the driving circuit layer; The display panel further includes a connecting lead and a first pad electrode, the first pad electrode being embedded in the first through hole, the surface of the first pad electrode facing away from the driving circuit layer being exposed from the first through hole and flush with at least a portion of the first surface surrounding the first through hole, and the first pad electrode being electrically connected to the signal line through the connecting lead.
2. The display panel according to claim 1, characterized in that, The substrate includes a first substrate, the surface of the first substrate facing away from the driving circuit layer is the first surface, the first via penetrates the first substrate along the thickness direction of the display panel, the connecting lead is disposed on the first substrate, at least a portion of the connecting lead extends to the hole wall of the first via and is electrically connected to the first pad electrode.
3. The display panel according to claim 2, characterized in that, The substrate further includes a second substrate disposed on the side of the first substrate facing the driving circuit layer, the second substrate having a second through-hole. The orthographic projection of the second through hole along the thickness direction of the display panel at least partially overlaps with the orthographic projection of the first through hole along the thickness direction of the display panel; The connecting lead extends along the thickness direction of the display panel and is located within the second through hole.
4. The display panel according to claim 2, characterized in that, The substrate further includes a second substrate located on the side of the connecting lead opposite to the first substrate, the second substrate including a connected main body and a protrusion. The main body is located on the side of the first substrate facing the driving circuit layer, and the protrusion is embedded in the first through hole.
5. The display panel according to claim 4, characterized in that, The second substrate has a second through hole, and the orthographic projection of the second through hole along the thickness direction of the display panel is offset from the orthographic projection of the first through hole along the thickness direction of the display panel. At least a portion of the signal line is located within the second through hole. At least a portion of the connecting lead is exposed from the second through-hole and contacts the signal line.
6. The display panel according to claim 5, characterized in that, The connecting lead includes a first segment, a second segment, and a third segment connected in sequence. The first segment is disposed on the side of the first substrate facing the driving circuit layer, the main body covers at least a portion of the first segment, and at least a portion of the first segment is exposed from the second via, the second segment is disposed on the wall of the first via, the third segment is connected to the end of the second segment away from the first segment and is located in the first via, the first pad electrode is connected to the side of the third segment away from the driving circuit layer, and the protrusion is embedded in the first via and covers the second segment and the third segment.
7. The display panel according to claim 6, characterized in that, The substrate further includes a first barrier layer, which is located between the connecting lead and the second substrate. The first barrier layer includes a first connecting segment and a second connecting segment connected together. The first connecting segment covers the first segment, and the second connecting segment is located in the first through hole and between the second segment, the third segment and the protrusion. And / or, the substrate further includes a second barrier layer disposed between the first substrate and the first segment.
8. The display panel according to claim 1, characterized in that, The first surface has a first sub-surface and a second sub-surface arranged sequentially along the direction of the surface of the display panel, and the first sub-surface surrounds the first through hole. The distance between the first sub-surface and the driving circuit layer along the thickness direction of the display panel is greater than the distance between the second sub-surface and the driving circuit layer along the thickness direction of the display panel, so as to form a step; Alternatively, the first sub-face is flush with the second sub-face.
9. The display panel according to claim 8, characterized in that, The display panel has a display area, and both the first sub-surface and the second sub-surface are located in the display area; Alternatively, the display panel includes a display area and a border area surrounding at least a portion of the display area, with the first sub-surface located in the display area and the second sub-surface located in the border area.
10. A display module, characterized in that, Includes the display panel and circuit board as described in any one of claims 1-9. The circuit board includes a second pad electrode located on the side of the first surface away from the driving circuit layer and electrically connected to the first pad electrode. The circuit board is used to electrically connect to the driving integrated circuit of the display panel.
11. The display module according to claim 10, characterized in that, The first surface has a first sub-surface and a second sub-surface arranged sequentially along the direction of the surface of the display panel, and the first sub-surface surrounds the through hole. The distance between the first sub-surface and the driving circuit layer along the thickness direction of the display panel is greater than the distance between the second sub-surface and the driving circuit layer along the thickness direction of the display panel, so as to form a step, and one end of the second pad electrode along the direction of the surface of the display panel is fixed to the step.
12. A display device, characterized in that, Includes the display module as described in any one of claims 10-11.
13. A method for manufacturing a display panel, characterized in that, The method includes: A first pad electrode and a connecting lead are formed in a pre-substrate, and the first pad electrode and the connecting lead are electrically connected. A driving circuit layer is formed on one side of the pre-substrate. The driving circuit layer includes signal lines, and the signal lines are electrically connected to the connection leads. At least a portion of the pre-substrate away from the driving circuit layer is removed to form a substrate having a first surface facing away from the driving circuit layer, wherein the surface of the first pad electrode facing away from the driving circuit layer is exposed on the substrate and flush with at least a portion of the first surface.
14. The method for manufacturing a display panel according to claim 13, characterized in that, The pre-substrate comprises a first pre-substrate and a second pre-substrate stacked together. In the step of forming the first pad electrode and connecting leads in the pre-substrate: The first pre-substrate is patterned to form the first groove; The first pad electrode is prepared at the bottom of the first groove; The connecting leads are prepared on the upper surface of the first pre-substrate, the wall of the first groove, and the surface of the first pad electrode facing away from the bottom of the first groove. A pre-substrate material is prepared on the side of the first pre-substrate facing the connecting lead and within the first groove to form the second pre-substrate, and the first pre-substrate and the second pre-substrate together form the pre-substrate.
15. The method for manufacturing a display panel according to claim 14, characterized in that, The first pre-substrate has a first portion and a second portion opposite to each other along its thickness direction. The surface of the first portion away from the second pre-substrate is flush with the surface of the first pad electrode opposite to the second pre-substrate. The second portion includes a first pre-segment and a second pre-segment connected sequentially along the surface of the first pre-substrate. The orthographic projection of the first groove along the thickness direction of the first pre-substrate at least partially overlaps with the orthographic projection of the second pre-segment along the thickness direction of the first pre-substrate. In the step of removing at least a portion of the pre-substrate on the side away from the driving circuit layer: Remove the second pre-existing section to expose the first pad electrode and create a step between the first portion and the first pre-existing section; Alternatively, in the step of removing at least a portion of the first pre-substrate on the side away from the driving circuit layer: Simultaneously remove the first pre-segment and the second pre-segment to expose the first pad electrode, and make the surface of the substrate facing away from the driving circuit layer flush.
16. The method for manufacturing a display panel according to claim 15, characterized in that, In the step of removing at least a portion of the pre-substrate on the side away from the driving circuit layer: A laser beam is used to scan the interface between the first part and the second part along a first direction to peel the second pre-section from the first part, or to peel the first pre-section and the second pre-section from the first part simultaneously, wherein the first direction is parallel to the direction of the surface where the first pad electrode is located.
17. The method for manufacturing a display panel according to claim 16, characterized in that, The energy of the laser beam is 170mJ / cm²-300mJ / cm²; And / or, the thickness of both the first preparatory segment and the second preparatory segment is 100nm-300nm.