Electrostatic discharge and current protection circuit for a semiconductor bridge

Abstract

The application relates to the technical field of semiconductor bridge electrostatic discharge protection and current protection, and discloses an electrostatic discharge and current protection circuit of a semiconductor bridge, which comprises an ESD protection circuit, a current protection circuit and an NMOS connected in parallel, the ESD protection circuit comprises a bidirectional transient suppression diode and a capacitor connected in parallel, the bidirectional transient suppression diode clamps a transient high voltage by breakdown conduction, the voltage is limited in a safe range, the capacitor reduces a voltage rising rate and suppresses overshoot by shunting and absorbing a transient current, the NMOS provides a low-resistance discharge path, and the voltage and current impact applied to the semiconductor bridge are reduced; the current protection circuit comprises a bidirectional rectifier circuit and a detection circuit; and the NMOS is connected between the detection circuits. The application can realize ESD protection and current protection of the semiconductor bridge, prevents current from damaging the structure, and guarantees the safety of the semiconductor bridge working in an electromagnetic and ESD environment.

Description

Technical Field

[0001] This invention relates to the field of electrostatic discharge protection and current protection technology for semiconductor bridges, and particularly to an electrostatic discharge and current protection circuit for semiconductor bridges. Background Technology

[0002] Semiconductor bridges (SCBs) are miniature electrothermal transducers that have found widespread application in fields such as blasting and aerospace ignition due to their advantages of low ignition energy and high reliability. However, because they are connected to circuits via external leads, they can easily form an equivalent antenna, inducing additional current in electromagnetic pulse environments and converting it into Joule heat. This can lead to abnormal temperature increases in the device, posing a risk of false triggering. To ensure system safety, strict safety current specifications are typically imposed on semiconductor bridges; for example, under a continuous 1A current supply, the device should not reach a threshold temperature within a specified time.

[0003] In existing technologies, negative temperature coefficient thermistors (NTCs) are often connected in parallel with a semiconductor bridge to form a shunt protection structure. The current is shared and the temperature rise is suppressed by the decrease in the resistance of the NTC caused by temperature increase. While this method has some adaptability, it still has significant shortcomings: firstly, NTCs are usually difficult to integrate with semiconductor bridges, which is detrimental to miniaturization and integrated design; secondly, the temperature-resistance characteristics of NTC devices are greatly affected by material and process variations, resulting in poor consistency; furthermore, this type of solution is mainly for current protection and lacks effective protection against transient high-voltage surges such as electrostatic discharge (ESD).

[0004] Therefore, it is necessary to propose a circuit structure that can take into account both current protection and ESD protection and is suitable for integration, so as to improve the safety and reliability of semiconductor bridges in complex electromagnetic environments. Summary of the Invention

[0005] In order to overcome the shortcomings of the prior art, the purpose of this invention is to provide an electrostatic discharge and current protection circuit for a semiconductor bridge, which can realize ESD protection and current protection for the semiconductor bridge, effectively divert large currents to ground, prevent current from continuously passing through the semiconductor bridge and damaging its structure, and ensure the safety of the semiconductor bridge in electromagnetic environment, ESD environment and other conditions.

[0006] To address the aforementioned technical problems, the present invention adopts the following technical solution: an electrostatic discharge and current protection circuit for a semiconductor bridge, which is connected in parallel across the two ends of the semiconductor bridge, including an ESD protection circuit, an ampere-current protection circuit, and an NMOS connected in parallel. The ESD protection circuit includes a bidirectional transient suppression diode and a capacitor connected in parallel. The bidirectional transient suppression diode clamps transient high voltages by breaking down and conducting, limiting the voltage within a safe range. The capacitor reduces the voltage rise rate and suppresses overshoot by shunting and absorbing transient currents. The ampere-current protection circuit includes a bidirectional rectifier circuit and a detection circuit. The bidirectional rectifier circuit rectifies the current flowing into the detection circuit bidirectionally, ensuring that the current direction in the detection circuit remains consistent. The NMOS is connected between the detection circuits.

[0007] Furthermore, the bidirectional rectifier circuit includes a first diode, a second diode, a third diode, and a fourth diode; the anodes of the first diode and the second diode are respectively connected to both ends of the semiconductor bridge, and the cathodes of the first diode and the second diode are interconnected to form a first node; the cathodes of the third diode and the fourth diode are respectively connected to both ends of the semiconductor bridge, and the anodes of the third diode and the fourth diode are interconnected to form a second node.

[0008] Furthermore, the detection circuit includes a fifth diode and a detection resistor connected in series. The cathode of the fifth diode is connected to the first node, the anode of the fifth diode is connected to one end of the detection resistor, and the other end of the detection resistor is connected to the second node. The fifth diode and the detection resistor constitute a detection branch connected between the first node and the second node. Under the action of the bidirectional rectifier circuit, the fifth diode is in a reverse bias state.

[0009] Furthermore, the gate of the NMOS is connected to the third node between the fifth diode and the sense resistor, and the source and drain of the NMOS are connected to the two ends of the semiconductor bridge, respectively.

[0010] Furthermore, the breakdown voltage and clamping voltage of the bidirectional transient suppression diode are selected based on the withstand voltage level of the semiconductor bridge and the maximum transient voltage allowed by the circuit, so that it can be preferentially turned on when an ESD transient occurs, limiting the voltage within the safe operating range of the semiconductor bridge; at the same time, its peak pulse power should meet the requirements for withstanding the expected ESD impact energy.

[0011] Furthermore, the capacitance value of the capacitor is selected according to the amplitude of the ESD transient current, and is used to absorb and buffer the transient current to reduce the voltage change rate and suppress overshoot; the parameters of the capacitor and the bidirectional transient suppression diode are matched to achieve graded absorption and synergistic protection of ESD energy.

[0012] Furthermore, the reverse leakage current characteristics of the fifth diode should be highly sensitive to temperature changes so as to generate a significantly different leakage current when the temperature rises; at the same time, its junction capacitance should meet the ESD transient response requirements to realize the capacitive coupling triggering function.

[0013] Furthermore, the fifth diode is a PN junction diode or an equivalent semiconductor device with temperature-dependent reverse leakage characteristics.

[0014] Furthermore, the threshold voltage of the NMOS should match the output voltage range of the detection circuit to achieve reliable triggering; its on-resistance should be as small as possible to provide a low-resistance shunt path when turned on, thereby effectively reducing the current flowing through the semiconductor bridge; at the same time, the NMOS should have sufficient current carrying capacity and transient response capability to meet ESD and current protection requirements.

[0015] Furthermore, the resistance value of the detection resistor is set according to the triggering conditions to convert the leakage current of the fifth diode D5 into a control voltage; its resistance value should match the NMOS threshold voltage to ensure that the NMOS can be triggered to conduct under the set temperature conditions, while avoiding false triggering under normal operating temperature.

[0016] Compared with the prior art, the beneficial effects of the present invention are as follows: 1. The present invention provides an electrostatic discharge and current protection circuit for a semiconductor bridge. This circuit utilizes a bidirectional transient suppression diode clamping branch and a capacitor absorption branch connected in parallel to form an ESD protection network. An NMOS transistor provides a low-resistance leakage path, reducing voltage and current surges applied to the SCB terminals of the semiconductor bridge. This enables rapid clamping and energy shunting of ESD transient high voltages, effectively suppressing voltage overshoot and current surges, thereby improving the semiconductor bridge's immunity to ESD conditions. Simultaneously, a bidirectional rectifier circuit rectifies the current entering the detection branch, ensuring stable operation of the detection circuit under both forward and reverse current conditions, thus improving the applicability and reliability of current detection and control.

[0017] 2. The electrostatic discharge and current protection circuit of the semiconductor bridge of the present invention combines the reverse leakage current temperature characteristics of the fifth diode with the temperature dependence characteristics of the NMOS threshold voltage to realize a circuit-level triggering mechanism based on temperature feedback. Compared with the traditional NTC shunt scheme, it has better process compatibility, consistency and integrability. By converting the leakage current into a control voltage through the detection resistor, the dynamic control of the NMOS conduction state is realized, thereby forming a controllable shunt path at both ends of the semiconductor bridge and effectively limiting the heat accumulation effect caused by continuous current.

[0018] 3. The electrostatic discharge and current protection circuit of the semiconductor bridge of the present invention realizes adaptive dynamic adjustment of the semiconductor bridge current through the feedback mechanism of "temperature rise triggers current shunting, temperature decreases shuts off current shunting", which improves the safety and stability of the device under complex working conditions. At the same time, through the synergistic effect of the ESD transient capacitive coupling triggering mechanism and the current-ampere thermal feedback triggering mechanism, the integrated design of ESD protection and current-ampere protection is realized, thereby improving the overall integration and reliability of the system. Attached Figure Description

[0019] Figure 1 This is a flowchart of an ESD protection circuit for a semiconductor bridge according to the present invention. Figure 2 This is a block diagram of an electrostatic discharge and current protection circuit for a semiconductor bridge according to the present invention. Figure 3 This is a circuit diagram of an electrostatic discharge and current protection circuit for a semiconductor bridge according to the present invention. Figure 4 This is a diagram illustrating the electrostatic discharge and current protection effect of a semiconductor bridge circuit according to the present invention. Figure 5 This is a diagram illustrating the ESD protection effect of a semiconductor bridge electrostatic discharge and current protection circuit according to the present invention. Detailed Implementation

[0020] The following specific examples illustrate the implementation of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention. It should be noted that, unless otherwise specified, the following embodiments and features described therein can be combined with each other.

[0021] The purpose of this invention is to address the shortcomings of existing technologies by providing a semiconductor bridge electrostatic discharge and current protection circuit.

[0022] (1) Example 1 An electrostatic discharge and current protection circuit for a semiconductor bridge according to the present invention, with reference to... Figure 3As shown, it is connected in parallel across the semiconductor bridge SCB, including an ESD protection circuit, an ampere-current protection circuit, and an NMOS (N-type metal-oxide-semiconductor) Q1 connected in parallel. The ESD protection circuit includes a bidirectional transient voltage suppressor diode (TVS1) and a capacitor C1 connected in parallel, forming two parallel branches. The breakdown voltage and clamping voltage of the bidirectional transient voltage suppressor diode TVS1 are selected based on the withstand voltage level of the semiconductor bridge SCB and the maximum allowable transient voltage of the circuit, ensuring that it preferentially conducts during ESD (electrostatic discharge) transients, limiting the voltage within the safe operating range of the semiconductor bridge; simultaneously, its peak pulse power should meet the expected ESD impact energy requirements.

[0023] In this embodiment, the capacitance value of capacitor C1 is selected according to the amplitude of ESD transient current, and is used to absorb and buffer the transient current to reduce the voltage change rate and suppress overshoot; preferably, the parameters of capacitor C1 and bidirectional transient suppression diode TVS1 are matched to achieve graded absorption and synergistic protection of ESD energy.

[0024] Reference Figure 3 As shown, the current protection circuit includes a bidirectional rectifier circuit and a detection circuit. The bidirectional rectifier circuit is a bridge rectifier structure, including a first diode D1, a second diode D2, a third diode D3, and a fourth diode D4. The anodes of the first diode D1 and the second diode D2 are respectively connected to the two ends of the semiconductor bridge, and their cathodes are connected to each other to form a first node A. The cathodes of the third diode D3 and the fourth diode D4 are respectively connected to the two ends of the semiconductor bridge, and their anodes are connected to each other to form a second node B, thereby bidirectionally rectifying the current flowing into the detection circuit and keeping the current direction in the detection circuit consistent.

[0025] Reference Figure 3 As shown, the detection circuit includes a fifth diode D5 and a detection resistor R1 connected in series. The cathode of the fifth diode D5 is connected to the first node A, and its anode is connected to one end of the detection resistor R1. The other end of the detection resistor R1 is connected to the second node B, thus forming a detection branch connecting the first node A and the second node B. Under the action of the bidirectional rectifier circuit, the fifth diode D5 is in a reverse bias state.

[0026] Reference Figure 3As shown, the gate of NMOS Q1 is connected to the third node C between the fifth diode D5 and the sensing resistor R1. The source and drain of NMOS Q1 are connected to the two ends of the semiconductor bridge, respectively. The threshold voltage of NMOS Q1 should match the output voltage range of the sensing circuit to achieve reliable triggering; its on-resistance should be as small as possible to provide a low-resistance shunt path when turned on, thereby effectively reducing the current flowing through the semiconductor bridge; at the same time, NMOS Q1 should have sufficient current carrying capacity and transient response capability to meet ESD and current protection requirements.

[0027] In this embodiment, the reverse leakage current characteristic of the fifth diode D5 should be highly sensitive to temperature changes so that a significant change in leakage current is generated when the temperature rises; at the same time, its junction capacitance should meet the ESD transient response requirements to realize the capacitive coupling triggering function; preferably, the fifth diode D5 is a PN junction diode or an equivalent semiconductor device with temperature-dependent reverse leakage current characteristics.

[0028] In this embodiment, the resistance value of the detection resistor R1 is set according to the triggering conditions to convert the leakage current of the fifth diode D5 into a control voltage; its resistance value should match the threshold voltage of NMOS Q1 to ensure that NMOS Q1 can be triggered to conduct under the set temperature conditions, while avoiding false triggering under normal operating temperature.

[0029] An electrostatic discharge and current protection circuit for a semiconductor bridge according to the present invention, with reference to... Figure 2 As shown, its ESD protection workflow is as follows: When an external ESD signal is applied to the circuit, the bidirectional transient voltage suppressor diode TVS1 breaks down and conducts first, clamping the transient high voltage and limiting the voltage within a safe range; at the same time, capacitor C1 shunts and absorbs the transient current, reducing the voltage rise rate and suppressing overshoot. Based on this, the remaining ESD current flows through the bidirectional rectifier circuit to the detection circuit and acts on the cathode of the fifth diode D5, causing the fifth diode D5 to be in a reverse bias state. Since the fifth diode D5 has junction capacitance characteristics under reverse bias, it, together with the detection resistor R1, forms an RC network. Under ESD transient effects, a transient voltage signal is generated at the third node C through capacitive coupling, causing the gate potential of NMOS Q1 to rise rapidly. When the NMOS Q1 conduction threshold is reached, NMOS Q1 conducts, forming a low-resistance shunt path across the semiconductor bridge SCB, allowing the remaining ESD current to be preferentially discharged through NMOS Q1, further reducing the voltage and current surges applied across the semiconductor bridge SCB.

[0030] Through the above process, the bidirectional transient suppression diode TVS1 clamping branch, the capacitor C1 buffer branch, and the NMOS Q1 shunt branch triggered by the detection circuit work together to achieve graded suppression and discharge of ESD energy, thereby effectively improving the electrostatic protection capability of the semiconductor bridge.

[0031] The ESD protection effect of the present invention is as follows: Figure 4 As shown. In this embodiment, the input ESD current adopts the current waveform of level 4 (8 kV) in the IEC 61000-4-2 standard, where the first peak current is 29.3 A and the current at 30 ns is 14.7 A. After the synergistic effect of the bidirectional transient suppression diode TVS1 clamping branch, the capacitor C1 absorption branch, and the NMOS Q1 shunt branch, the transient current acting on the semiconductor bridge SCB is significantly suppressed. When the first peak current occurs, the current flowing through the semiconductor bridge SCB is 3.8 A, which is only about 13% of the input ESD peak current; during subsequent transient processes, the current flowing through the semiconductor bridge SCB stabilizes at about 3.2 A. The above results show that the present invention can effectively reduce the impact of ESD transient current on the semiconductor bridge SCB and achieve electrostatic discharge protection for the semiconductor bridge.

[0032] An electrostatic discharge and current protection circuit for a semiconductor bridge according to the present invention, with reference to... Figure 1 As shown, its safety flow protection workflow is as follows: When external current flows through the semiconductor bridge SCB, the bidirectional rectifier circuit ensures that the current flowing into the detection circuit maintains a consistent direction, thereby reverse-biasing the fifth diode D5 at the second node B. At this time, the fifth diode D5 has only a small reverse leakage current, which flows through the detection resistor R1, forming a lower potential at the gate of NMOS Q1. NMOS Q1 is in the off state, and the current mainly flows through the semiconductor bridge SCB.

[0033] As the current continues to flow, the semiconductor bridge SCB generates Joule heat and its temperature rises. This heat is transferred to the fifth diode D5 and NMOS Q1. On one hand, the reverse leakage current of the fifth diode D5 increases with temperature, generating a gradually increasing voltage across the sensing resistor R1; simultaneously, the threshold voltage of NMOS Q1 decreases with increasing temperature. When the gate voltage reaches the NMOS Q1 turn-on condition, NMOS Q1 turns on, forming a shunt path across the semiconductor bridge SCB, allowing most of the current to bypass through NMOS Q1.

[0034] At this point, the current flowing through the semiconductor bridge SCB decreases, the temperature of the semiconductor bridge SCB gradually decreases, the reverse leakage current of the fifth diode D5 decreases, and the voltage across the sensing resistor R1 decreases accordingly. When this voltage is insufficient to keep the NMOS Q1 on, the NMOS Q1 turns off, and the current flows mainly through the semiconductor bridge SCB again.

[0035] The above process is carried out cyclically under the continuous action of current, thereby forming a dynamic adjustment mechanism based on temperature feedback to achieve current protection for semiconductor bridges.

[0036] The current protection effect of the present invention is as follows: Figure 5 As shown in the diagram, in this embodiment, under an input current of 1 A, the semiconductor bridge SCB continuously heats up in the initial stage. Around 8 seconds, the voltage at the third node C reaches the NMOS Q1 conduction condition, and NMOS Q1 conducts, forming a shunt path. At this time, most of the current is shunted through NMOS Q1, and the current flowing through the semiconductor bridge SCB rapidly drops to the milliampere level, remaining in a low-current state for approximately 3 seconds. Subsequently, NMOS Q1 gradually turns off, and the current flowing through the semiconductor bridge SCB recovers to near the input current level, lasting for approximately 1.5 seconds. With continuous current flow, the above process repeats periodically, indicating that the present invention can achieve dynamic regulation of the semiconductor bridge SCB current under a continuous input of 1 A, thereby effectively suppressing temperature rise accumulation and meeting current protection requirements.

[0037] Furthermore, it should be understood that although this specification describes embodiments, not every embodiment contains only one independent technical solution. This narrative style is merely for clarity. Those skilled in the art should consider the specification as a whole, and the technical solutions in each embodiment can also be appropriately combined to form other embodiments that can be understood by those skilled in the art.

Claims

1. An electrostatic discharge and current protection circuit for a semiconductor bridge, connected in parallel across the two ends of the semiconductor bridge SCB, characterized in that: This includes ESD protection circuitry, current protection circuitry, and NMOS Q1 connected in parallel. The ESD protection circuit includes a bidirectional transient suppression diode TVS1 and a capacitor C1 connected in parallel. The bidirectional transient suppression diode TVS1 clamps the transient high voltage by breaking down and conducting, limiting the voltage within a safe range. The capacitor C1 reduces the voltage rise rate and suppresses overshoot by shunting and absorbing the transient current. The current protection circuit includes a bidirectional rectifier circuit and a detection circuit. The bidirectional rectifier circuit rectifies the current flowing into the detection circuit in both directions, so that the current direction in the detection circuit remains consistent. The NMOS Q1 is connected between the detection circuits.

2. The electrostatic discharge and current protection circuit for a semiconductor bridge according to claim 1, characterized in that: The bidirectional rectifier circuit includes a first diode D1, a second diode D2, a third diode D3, and a fourth diode D4; The anodes of the first diode D1 and the second diode D2 are respectively connected to the two ends of the semiconductor bridge, and the cathodes of the first diode D1 and the second diode D2 are connected to each other to form the first node A; The cathodes of the third diode D3 and the fourth diode D4 are respectively connected to the two ends of the semiconductor bridge, and the anodes of the third diode D3 and the fourth diode D4 are connected to each other to form the second node B.

3. The electrostatic discharge and current protection circuit for the semiconductor bridge according to claim 2, characterized in that: The detection circuit includes a fifth diode D5 and a detection resistor R1 connected in series. The cathode of the fifth diode D5 is connected to the first node A, the anode of the fifth diode D5 is connected to one end of the detection resistor R1, and the other end of the detection resistor R1 is connected to the second node B; under the action of the bidirectional rectifier circuit, the fifth diode D5 is in a reverse bias state.

4. The electrostatic discharge and current protection circuit for the semiconductor bridge according to claim 3, characterized in that: The gate of NMOS Q1 is connected to the third node C between the fifth diode D5 and the sense resistor R1. The source and drain of NMOS Q1 are connected to the two ends of the semiconductor bridge SCB, respectively.

5. The electrostatic discharge and current protection circuit for a semiconductor bridge according to claim 1, characterized in that: The breakdown voltage and clamping voltage of the bidirectional transient suppression diode TVS1 are selected based on the withstand voltage level of the semiconductor bridge SCB and the maximum transient voltage allowed by the circuit, so that it can conduct when an ESD transient occurs, limiting the voltage within the safe operating range of the semiconductor bridge SCB; at the same time, the peak pulse power of the bidirectional transient suppression diode TVS1 meets the expected ESD impact energy withstand requirements.

6. The electrostatic discharge and current protection circuit for a semiconductor bridge according to claim 1, characterized in that: The capacitance value of capacitor C1 is selected according to the amplitude of ESD transient current, and is used to absorb and buffer transient current; the parameters of capacitor C1 and TVS1 are matched.

7. The electrostatic discharge and current protection circuit for a semiconductor bridge according to claim 3, characterized in that: The reverse leakage current characteristic of the fifth diode D5 is sensitive to temperature changes, so that the leakage current changes significantly when the temperature rises; at the same time, its junction capacitance should meet the ESD transient response requirements.

8. The electrostatic discharge and current protection circuit for a semiconductor bridge according to claim 7, characterized in that: The fifth diode D5 is a PN junction diode or an equivalent semiconductor device with temperature-dependent reverse leakage characteristics.

9. The electrostatic discharge and current protection circuit for a semiconductor bridge according to claim 4, characterized in that: The threshold voltage of the NMOS Q1 is matched with the output voltage range of the detection circuit; its on-resistance provides a low-resistance shunt path when it is turned on, effectively reducing the current flowing through the semiconductor bridge; at the same time, the NMOS Q1 has current carrying capacity and transient response capability.

10. The electrostatic discharge and current protection circuit for a semiconductor bridge according to claim 3, characterized in that: The resistance value of the detection resistor R1 is set according to the triggering condition and is used to convert the leakage current of the fifth diode D5 into a control voltage; its resistance value is matched with the threshold voltage of NMOS Q1.

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