A video signal depth detection method and system based on physical level and image logical association

Abstract

This invention relates to the field of video signal processing and fault diagnosis technology. Addressing the problem that existing video capture chips easily misjudge "no signal" when signal attenuation occurs, making it difficult for users to distinguish between cable quality issues and physical disconnections, this invention discloses an automatic detection method. This method directly connects the hardware detection cable (such as a hot-swappable detection cable HPD or ID pin) of the video interface (HDMI / VGA / DVI) to the GPIO interface of the SoC. The SoC monitors the physical voltage level in real time and correlates it with the image output status of the capture chip. The system diagnoses based on three logical combinations: "image present + voltage level (normal signal)," "no image + no voltage level (physical no signal)," and "no image + voltage level (abnormal / attenuated signal)." This invention effectively improves the robustness of signal detection, assisting users in accurately locating faults caused by cable quality or signal weakening through hardware-level physical feedback, and has significant practical value.

Description

Technical Field

[0001] This invention relates to the field of video acquisition and processing technology, specifically to a method for accurately determining video signal quality by directly monitoring the physical link level of a video signal using a processor's general purpose input / output interface (GPIO) and combining this with the image output status. Background Technology

[0002] In existing high-definition video display and acquisition systems, HDMI, VGA, and DVI are the mainstream signal transmission interfaces. Traditional video signal detection mainly relies on dedicated video acquisition chips (such as HDMI receiver chips). These chips typically use built-in digital logic to determine the signal status, such as outputting a register status of "signal present" or "no signal" by detecting whether the TMDS clock is locked or whether the data packet check is correct.

[0003] However, this detection mechanism based on pure software logic or internal chip algorithms has significant limitations: High false alarm rate: When the signal amplitude is attenuated due to excessively long transmission cables, poor quality, or environmental electromagnetic interference, the acquisition chip often directly determines "no signal" because it cannot complete clock synchronization.

[0004] Troubleshooting is difficult: When the monitor is black or no image is captured, the chip cannot tell the user whether the signal source is physically disconnected (not plugged in) or the signal is unavailable due to link loss.

[0005] Insufficient hardware redundancy: The logical judgment process of the acquisition chip is a "black box". Once the chip malfunctions or fails to initialize, the system will completely lose its ability to perceive the input source.

[0006] Therefore, developing a method that can directly sense the connection status and perform multi-dimensional fault diagnosis through the hardware physical layer, independent of the acquisition chip logic, has significant engineering application value. Summary of the Invention

[0007] Purpose of the invention The purpose of this invention is to provide a video signal depth detection method, which aims to directly acquire physical layer level signals through SoC and associate them with the image output logic of the acquisition chip, thereby accurately distinguishing between three states: "physical not connected", "signal normal" and "link attenuation abnormal", and improving the reliability and maintainability of the system. Technical solution

[0008] The present invention provides a video signal detection method, characterized by comprising the following core steps: Direct hardware layer monitoring: The hot-plug detection pins in the video interface (HPD pins of HDMI / DVI, or specific identification pins of VGA) are directly connected to the GPIO of the SoC.

[0009] Physical level determination: The SoC internally sets up a monitoring task to acquire pin levels in real time via GPIO. A logic high level (such as 5V or 3.3V after level conversion) is defined as the presence of a physical connection, and a low level is defined as the absence of a physical connection.

[0010] Image logic acquisition: The SoC reads the status register of the video acquisition chip through I2C or bus interface to confirm whether it can output stable image frames.

[0011] Multidimensional correlation diagnosis: The SoC core logic outputs diagnostic results based on the following matrix: State 1: A high level is detected and the image output is normal, which is determined to be "signal normal".

[0012] State 2: Low level detected and no image output, determined as "No physical signal (not connected)".

[0013] State 3: A high level is detected but there is no image output, which is determined to be "signal abnormal (the level exists but the signal attenuation is too large or the cable quality is poor)". Beneficial effects

[0014] Precise troubleshooting: This invention breaks the sole interpretation of signal detection by the acquisition chip, enabling the system to identify "weak signals" and clearly inform users to replace cables or enhance the signal source.

[0015] High robustness: By directly pulling the level through hardware GPIO, the SoC can still sense the insertion and removal of the input source even if the acquisition chip is in a reset or abnormal state, thus enhancing the robustness of the system.

[0016] Low-cost implementation: It can achieve adaptive monitoring of complex cable environments with only minimal additional circuit wiring, offering extremely high cost-effectiveness. Attached Figure Description

[0017] Figure 1: System hardware link layout diagram, showing the parallel connection architecture of signal source, interface, SoC GPIO and acquisition chip; Figure 2: Flowchart of the automatic detection algorithm based on level-image correlation; Figure 3: Schematic diagram of fault diagnosis logic under abnormal signal conditions. Detailed Implementation

[0018] Hardware connection solution Taking the HDMI interface as an example: Signal path: The high-frequency differential signal (TMDS) of HDMI is connected to the input of a dedicated video capture chip.

[0019] Detection path: Connect pin 19 (Hot Plug Detect, HPD) of the HDMI interface to the GPIO10 port of the SoC through a 1K ohm current-limiting resistor (depending on the level matching, a voltage divider circuit or level conversion chip can be selected).

[0020] Power supply verification: Ensure that the +5V power output from the signal source is sufficient to maintain the HPD cable level when it is plugged in.

[0021] SoC monitoring program implementation The SoC runs a low-priority background monitoring thread (the monitoring period can be set from 100ms to 500ms), and the specific process is as follows: Phase 1: Interrupt Response. GPIO 10 is set to trigger an interrupt on both rising and falling edges. When the user plugs or unplugs a cable, the SoC immediately locks the physical state via the GPIO status register.

[0022] Phase Two: Status Polling. When a high level is detected on the GPIO pin, the SoC initiates a polling of the interrupt status register (ISR) inside the acquisition chip.

[0023] Phase 3: Logical alignment.

[0024] If the SoC detects that the GPIO is continuously high (active level), but the chip register shows Lock_Status = 0 (unlocked), then the exception flag ERR_SIGNAL_WEAK will be set to 1.

[0025] If the GPIO is low, regardless of the chip status, STATUS_DISCONNECTED will be displayed.

[0026] Fault-assisted analysis applications When the condition is determined to be "State 3 (Electrical level present, no image)," the SoC processing logic can further trigger advanced diagnostic functions: GUI prompt: The display interface or log system will explicitly output: "Physical connection detected, but the acquisition signal quality is insufficient. Please check the video cable length or quality." Parameter tuning: Try to automatically adjust the equalizer (EQ) parameters of the acquisition chip to compensate for signal attenuation caused by cable quality.

Claims

1. A method for automatic detection of video signals, characterized in that, Includes the following steps: Hardware link construction steps: Connect the physical detection pin of the video input interface directly to the general-purpose input / output port (GPIO) of the SoC processor through signal lines to realize real-time electrical monitoring of the physical connection status; Level status acquisition steps: The SoC samples the level signal of the GPIO port in real time to determine whether there is effective voltage feedback in the current physical link; Image data status acquisition steps: Synchronously acquire the image data output status of the video acquisition chip to determine whether there is currently identifiable video stream data; Correlation analysis and diagnostic steps: Establish a logical mapping matrix between the level state and the image state, and output the final detection conclusion.

2. The method according to claim 1, characterized in that: The video input interfaces include HDMI, DVI, and VGA; The HDMI and DVI interfaces are connected to the SoC via a hot-swappable detection line (HPD), while the VGA interface is connected to the SoC via a specific identification pin level.

3. The method according to claim 1, characterized in that, The logical criteria for the correlation analysis and diagnosis steps are as follows: Signal normal: The acquisition chip outputs image data, and the SoC detects that the physical detection pin is at a high level; No signal: The acquisition chip outputs no image data, and the SoC detects that the physical detection pin is at a low level, which is determined to be a physical disconnection; Signal Abnormality: The acquisition chip outputs no image data, but the SoC detects that the physical detection pin is at a high level, which is determined to be due to signal attenuation or substandard cable quality.

4. The method according to claim 1, characterized in that: The SoC processor monitors GPIO level transitions in real time through an internal interrupt mechanism, with a response time of no more than 10ms, ensuring real-time detection.

5. The method according to claim 1, characterized in that: The system has a visual alarm function. When it is determined to be "signal abnormal", it will push cable inspection suggestions or signal enhancement prompts to the user through the graphical user interface (GUI).

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