Multi-node distributed cooperative control method and system based on timestamp hardware interrupt

Abstract

This invention relates to the field of real-time control technology for industrial automation using multi-node networks. Existing technologies employ a centralized software model, where the control and operation of the lower-level machine highly depend on the upper-level machine, making it difficult to simultaneously achieve synchronization, stability, and high efficiency. This invention provides a multi-node distributed collaborative control method and system based on timestamp hardware interrupts. For high-speed multi-system collaborative control and multi-node network collaborative operations, the upper-level machine pre-issues multi-cycle collaborative task sequences via an industrial communication network. These sequences are stored in the lower-level machine's local instruction buffer. During operation, the bus communication frequency is reduced, bandwidth utilization is improved, and the risk of lower-level machine operation being affected by a single point of failure in the upper-level machine is reduced. This invention balances synchronization accuracy, stability, and high efficiency, and is suitable for high-speed continuous operation scenarios with a large number of nodes and stringent synchronization requirements, such as multi-robotic arm collaboration, high-speed production lines, precision CNC, and laser processing. It has strong versatility and engineering applicability.

Description

Technical Field

[0001] This invention relates to the field of industrial automation real-time control technology in multi-node networks, and more specifically, to a multi-node distributed collaborative control method and system based on timestamp hardware interrupts. Background Technology

[0002] In high-speed, multi-system collaborative industrial automation scenarios, the current mainstream industry approach is to adopt a host computer-based centralized control architecture with multi-threaded polling. The host computer, typically an industrial PC or general-purpose embedded controller, primarily handles task planning, logic operations, and human-machine interaction, and periodically polls each slave node through multiple threads. The slave nodes, including drivers, actuators, and motion nodes, receive position and speed control commands from the host computer and report the equipment's operating status back to the host computer, thereby enabling multi-node coordinated operation.

[0003] The existing architecture is essentially a centralized software scheduling model, which has been used for a long time and is reflected in many published patents. For example, Chinese patent application CN114356518A describes a data interaction method, device, equipment, and medium between upper and lower computers. While it uses multi-threading to decompose tasks and multi-level buffering for transmission, the control of the lower computer still relies on the upper computer's thread scheduling to issue commands. Chinese patent application CN121523840A proposes an automated communication and data processing method and system for upper computers based on state machines and multi-threaded task management, separating communication and processing into independent threads, but this still does not deviate from the upper computer's thread scheduling model. The existing centralized control architecture has several inherent defects and can no longer meet the requirements of high-speed, high-precision operations. 1. Poor motion synchronization accuracy and high timing uncertainty. The host computers typically run non-real-time or soft real-time operating systems such as Windows and Linux, resulting in millisecond-level jitter in thread scheduling, which cannot meet the microsecond-level synchronization requirements of high-speed precision equipment. Although Chinese patent CN107395304B proposes a global clock-based scheme for the device and method for controlling automated equipment, the control task still relies on software polling and scheduling, and does not introduce hardware-level time comparison and interrupt mechanisms, thus limiting synchronization accuracy and determinism.

[0004] 2. The centralized architecture leads to insufficient stability and robustness. Real-time control and command decisions are completely concentrated on the host computer, making the host computer a single point of failure. When the host computer is overloaded, software is abnormal, threads are stuck, or communication is briefly interrupted, it is very easy to cause the entire line to lose control or to shut down urgently.

[0005] 3. Low resource utilization and serious bandwidth waste. The host computer needs to continuously consume a lot of computing power to perform low-value-added tasks such as high-frequency polling and timed triggering, which crowds out the core functional resources of task planning, vision processing and algorithm optimization. At the same time, periodic point-to-point communication leads to low bus bandwidth utilization, and the latency and jitter will be further aggravated when the number of nodes increases.

[0006] In summary, existing technologies have not yet formed a complete technical solution encompassing instruction pre-caching, global timestamps, hardware comparison interrupts, and distributed autonomy, making it difficult to simultaneously achieve microsecond-level synchronization, high stability, and efficient operation. Therefore, there is an urgent need for a novel collaborative control method and system that decouples centralized control, decentralizes real-time tasks, and relies on hardware interrupts to ensure timing determinism. Summary of the Invention

[0007] To address the shortcomings of existing technologies, the present invention aims to provide a multi-node distributed collaborative control method and system based on timestamp hardware interrupts. This invention, based on instruction pre-caching and hardware interrupts, eliminates timing jitter caused by software thread scheduling, improves the synchronization accuracy of multi-node actions to the microsecond level, and unlike traditional centralized control architectures, eliminates the risk of single-point failure of the host computer, enhances the fault tolerance and continuous operation capability of the multi-node distributed control system, frees up the computing power of the host computer, optimizes the efficiency of communication bandwidth utilization, realizes layered decoupling of the control architecture, and adapts to large-scale, high-speed industrial collaborative operation scenarios.

[0008] To achieve the above objectives, the present invention provides the following technical solution: A multi-node distributed collaborative control method based on timestamp hardware interrupts specifically includes the following steps: Step 1. The host computer generates action instructions based on the multi-node collaborative operation logic. The host computer uses the global clock as a reference to configure a globally unified timestamp for each action instruction, forming a collaborative task sequence with future execution times. Step 2. During the multi-node collaborative operation, based on the tasks executed by each lower-level machine at different positions in the multi-node network, the upper-level machine pre-sends the collaborative task sequence generated in Step 1 to the corresponding lower-level machine through the industrial communication network. The lower-level machine receives the collaborative task sequence and stores it in its local instruction buffer. Step 3. The hardware comparator in the lower-level machine compares the current time with the timestamp of the cooperative task sequence to be executed in the local instruction buffer of the lower-level machine in real time, and determines the time node when the cooperative task sequence to be executed starts. All lower-level machines independently trigger the cooperative task sequence to be executed based on the global clock. Step 4. During the multi-node collaborative operation, the host computer monitors the operating status of all slave computers in a low-frequency mode. When the communication between the host computer and the slave computer is interrupted or the host computer malfunctions, the slave computer runs autonomously according to the collaborative task sequence stored in its local instruction buffer.

[0009] Furthermore, in step 3, the hardware comparator of the lower-level machine compares the current time, based on the global clock, with the timestamp of the collaborative task sequence in real time. The specific operation is as follows: If the current time is equal to the timestamp of the cooperative task sequence to be executed in the local instruction buffer of the lower-level machine, the hardware comparator immediately sends a hardware interrupt signal. The hardware interrupt controller receives the hardware interrupt signal and sends an interrupt request to the CPU of the lower-level machine. The CPU responds to the interrupt request and executes the action instruction whose timestamp is equal to the current time in the interrupt service routine. At the same time, the hardware comparator sends an acknowledgment signal to the local instruction buffer, and uses the timestamp of the next action instruction in the cooperative task sequence as the object of the hardware comparator's next comparison. If the current time is not equal to the timestamp of the cooperative task sequence to be executed in the local instruction buffer of the lower-level machine, it is determined that the execution time of the cooperative task sequence has not yet arrived. The hardware comparator does not issue a hardware interrupt signal, the lower-level machine maintains the current state, and the hardware comparator continues to compare the local clock with the timestamp in the cooperative task sequence. If the local instruction buffer of the lower-level machine is empty, the lower-level machine maintains its current state and waits for the upper-level machine to send a new cooperative task sequence; at the same time, the local clock of the lower-level machine continues to run and keeps in sync with the global clock, waiting to receive a new cooperative task sequence.

[0010] Furthermore, in step 3, the hardware comparators of all lower-level machines independently trigger hardware interrupts based on the global clock, thereby realizing synchronous operation of the multi-node distributed collaborative control system.

[0011] Furthermore, in step 4, during the autonomous operation of the lower-level machine based on the collaborative task sequence stored in the local instruction buffer, if the lower-level machine's local instruction buffer is empty and the waiting time exceeds the preset maximum silent time without receiving a new collaborative task sequence, the lower-level machine automatically executes the controlled shutdown logic. When the local instruction buffer of the lower-level machine is empty but the waiting time has not exceeded the preset maximum silence time, the local clock of the lower-level machine is synchronized with the global clock, waiting to receive a new sequence of cooperative tasks; When the local instruction buffer of the lower-level machine is not empty, the lower-level machine continues to execute the remaining cooperative task sequence until all action instructions in the cooperative task sequence are completed. Then, it is determined whether the waiting time exceeds the preset maximum silence time. If it exceeds the maximum silence time, the lower-level machine executes the controlled shutdown logic; otherwise, the lower-level machine keeps its local clock synchronized with the global clock and waits for a new cooperative task sequence.

[0012] Furthermore, the host computer and all slave computers complete global clock alignment based on the IEEE 1588 Precision Time Protocol PTP or EtherCAT distributed clock mechanism, which serves as the reference for the global clock.

[0013] A multi-node distributed collaborative control system based on timestamp hardware interrupts is used to implement the above-mentioned multi-node distributed collaborative control method based on timestamp hardware interrupts. It includes a multi-node network for high-speed multi-system collaborative control. The multi-node network includes a host computer and several slave computers. The host computer and all slave computers are connected through an industrial communication network. The host computer, as the top-level task management unit, generates several collaborative task sequences and distributes the corresponding collaborative task sequences according to the job tasks executed by each slave computer in the multi-node network. The lower-level machine receives the corresponding collaborative task sequence and stores it in the local instruction buffer in timestamp order.

[0014] Furthermore, the host computer monitors the operating status of all slave computers in a low-frequency mode. The monitoring cycle in the low-frequency mode is at least three orders of magnitude longer than the cycle of the slave computer's hardware interrupt triggering and response. The host computer also includes a timestamp tag module. The host computer configures a globally unified timestamp for each action instruction through the timestamp tag module, forming a collaborative task sequence with future execution times.

[0015] Furthermore, the lower-level machine includes a high-precision local clock, a hardware comparator, and an interrupt controller. The hardware comparator determines whether the current time is equal to the timestamp of the cooperative task sequence, and confirms the start time of the interrupt controller based on the determination result.

[0016] In summary, the invention has the following beneficial effects: This invention differs from traditional software multi-threaded polling modes by employing a combination of hardware comparison and hardware interrupts to trigger interrupt execution. The hardware interrupt response latency is fixed, eliminating software scheduling jitter and reducing the original millisecond-level action deviation to the microsecond level, meeting the synchronization requirements of high-speed, precision operations. Real-time control tasks are distributed across various lower-level machines, eliminating the single point of real-time control on the upper-level machine. The upper-level machine's resources and computing power are concentrated on complex task planning, data processing, and visual computation. The upper-level machine's mode of issuing multi-cycle action instructions at once significantly reduces bus communication frequency and improves bandwidth utilization. The slave unit continues to run according to locally cached instructions. If the communication is temporarily interrupted due to an abnormality of the host computer, it will not affect the slave unit, thus greatly reducing the scope of the fault impact. At the same time, it is equipped with controlled shutdown logic for monitoring abnormal states, effectively avoiding the risk of loss of control. The robustness of the multi-node distributed control system of this invention is comprehensively improved, which facilitates the functional expansion, equipment expansion and daily maintenance during later operation. This invention takes into account synchronization accuracy, stability and efficient operation, and is suitable for high-speed continuous operation scenarios with a large number of nodes and strict synchronization requirements, such as multi-robotic arm collaboration, high-speed production lines, precision CNC, and laser processing. It has strong versatility and engineering applicability. Attached Figure Description

[0017] Figure 1 This is a schematic diagram of the distributed collaborative control system of the present invention.

[0018] Figure 2 This is a flowchart of the distributed collaborative control method of the present invention. Detailed Implementation

[0019] The present invention will now be described in further detail with reference to the accompanying drawings.

[0020] It should be noted that, for ease of description, the descriptions of direction in the following text are consistent with the directions in the accompanying drawings, but they do not limit the structure of the present invention.

[0021] like Figures 1-2 As shown, this invention discloses a multi-node distributed collaborative control method based on timestamp hardware interrupts. For multi-node network collaborative operations in high-speed multi-system collaborative control, the host computer pre-issues multi-cycle collaborative task sequences to the slave computers via an industrial communication network. These collaborative task sequences are stored in the slave computers' local instruction buffers. Each slave computer is configured with a unique address. When planning and distributing tasks, the host computer determines the corresponding action instruction for each slave computer and distributes the instructions based on the slave computer's address. The slave computers only receive the timestamped action instructions corresponding to their own computers, i.e., the collaborative task sequence. During operation, this method reduces the bus communication frequency, improves bandwidth utilization, and reduces the risk of single-point failures of the host computer affecting the operation of the slave computers. Specifically, it includes the following steps: Step 1. The host computer generates action instructions based on the multi-node collaborative operation logic. The host computer configures a globally unified timestamp for each action instruction using the global clock as a reference, forming a collaborative task sequence with future execution times. The host computer and all slave computers complete global clock alignment based on the IEEE 1588 Precision Time Protocol PTP or EtherCAT distributed clock mechanism. As the reference for the global clock, the slave computers use the order of the configured globally unified timestamps as the execution order of the action instructions when executing them in the future.

[0022] Step 2. During the multi-node collaborative operation, based on the tasks executed by each lower-level machine at different positions in the multi-node network, the upper-level machine pre-sends the collaborative task sequence generated in Step 1 to the corresponding lower-level machine through the industrial communication network. The lower-level machine receives the collaborative task sequence and stores it in its local instruction buffer.

[0023] Step 3. The hardware comparator in the lower-level machine compares the current time with the timestamp of the cooperative task sequence to be executed in the local instruction buffer of the lower-level machine in real time to determine the start time node of the cooperative task sequence to be executed. All lower-level machines independently trigger the cooperative task sequence to be executed based on the global clock. The hardware comparator of the lower-level machine compares the current time based on the global clock with the timestamp of the cooperative task sequence in real time. That is, the hardware comparator of the lower-level machine checks whether the current time of the local clock and the timestamp of the cooperative task sequence in the local instruction buffer are numerically equal. The hardware comparators of all lower-level machines independently trigger hardware interrupts based on the global clock to realize the synchronous operation of the multi-node distributed cooperative control system. The specific operation is as follows: If the current time is equal to the timestamp of the cooperative task sequence to be executed in the local instruction buffer of the lower-level machine, the hardware comparator immediately sends a hardware interrupt signal. The hardware interrupt controller receives the hardware interrupt signal and sends an interrupt request to the CPU of the lower-level machine. The CPU responds to the interrupt request and executes the action instruction whose timestamp is equal to the current time in the interrupt service routine. At the same time, the hardware comparator sends an acknowledgment signal to the local instruction buffer and uses the timestamp of the next action instruction in the cooperative task sequence as the object of the hardware comparator's next comparison.

[0024] If the current time is not equal to the timestamp of the cooperative task sequence to be executed in the local instruction buffer of the lower-level machine, it is determined that the execution time of the cooperative task sequence has not yet arrived. The hardware comparator does not issue a hardware interrupt signal, the lower-level machine maintains its current state, and the hardware comparator continuously compares the local clock with the timestamp in the cooperative task sequence. The timestamp in the cooperative task sequence has been determined before the upper-level machine sends it to the lower-level machine. The hardware comparator compares the local clock with the timestamp in the earliest time-sorted cooperative task sequence until the local clock is equal to the earliest timestamp.

[0025] If the local instruction buffer of the lower-level machine is empty, the lower-level machine maintains its current state and waits for the upper-level machine to send a new cooperative task sequence; at the same time, the local clock of the lower-level machine continues to run and keeps in sync with the global clock, waiting to receive a new cooperative task sequence.

[0026] Step 4. During the multi-node collaborative operation, the host computer monitors the operating status of all slave computers in a low-frequency mode. When the communication between the host computer and the slave computer is interrupted or the host computer malfunctions, the slave computer runs autonomously according to the collaborative task sequence stored in the local instruction buffer.

[0027] During the autonomous operation of the lower-level machine based on the collaborative task sequence stored in its local instruction buffer, if the lower-level machine's local instruction buffer is empty and the waiting time exceeds the preset maximum silence time without receiving a new collaborative task sequence, the lower-level machine automatically executes controlled shutdown logic. The controlled shutdown logic consists of safety instructions pre-written into the lower-level machine. When the lower-level machine determines that it needs to shut down autonomously, it performs a safe shutdown operation according to the controlled shutdown logic, such as decelerating to a stop or returning to a set safe position according to a pre-planned route. If the lower-level machine's local instruction buffer is empty but the waiting time does not exceed the preset maximum silence time, the lower-level machine's local clock is synchronized with the global clock, waiting to receive a new collaborative task sequence.

[0028] When the local instruction buffer of the lower-level machine is not empty, the lower-level machine continues to execute the remaining cooperative task sequence until all action instructions in the cooperative task sequence are completed. Then, it is determined whether the waiting time exceeds the preset maximum silence time. If it exceeds the maximum silence time, the lower-level machine executes the controlled shutdown logic; otherwise, the lower-level machine keeps its local clock synchronized with the global clock and waits for a new cooperative task sequence.

[0029] This invention also discloses a multi-node distributed collaborative control system based on timestamp hardware interrupts, used to implement the aforementioned multi-node distributed collaborative control method based on timestamp hardware interrupts. The system includes a high-speed multi-system collaborative control multi-node network, comprising a host computer and several slave computers, with at least two slave computers. The host computer and all slave computers are connected via an industrial communication network. The host computer, acting as the top-level task management unit, generates several collaborative task sequences and distributes corresponding collaborative task sequences according to the tasks executed by each slave computer in the multi-node network. Each slave computer receives its corresponding collaborative task sequence and stores it in a local instruction buffer in timestamp order. The slave computer includes a high-precision local clock, a hardware comparator, and an interrupt controller. The hardware comparator determines whether the current time is equal to the timestamp of the collaborative task sequence, and confirms the interrupt controller's start time based on the determination result. The local clock is an internal timer of the slave computer, and the global clock is the time scale of the high-speed multi-system collaborative control multi-node network.

[0030] The host computer monitors the operating status of all slave computers in a low-frequency mode. The monitoring period of the low-frequency mode is at least three orders of magnitude longer than the period of the slave computer's hardware interrupt triggering and response. The period of the hardware interrupt triggering and response is in the microsecond range, and the monitoring period of the low-frequency mode in this invention is at least in the millisecond range. The host computer also includes a timestamp tag module. The host computer configures a globally unified timestamp for each action instruction through the timestamp tag module to form a collaborative task sequence with future execution times.

[0031] The local instruction buffer of the lower-level machine adopts hardware queue management logic to store the collaborative task sequence issued by the upper-level machine. The hardware comparator compares the current time with the timestamp of the collaborative task sequence in the local instruction buffer in real time. When the timestamp is equal to the current time, the hardware comparator outputs an interrupt signal to the interrupt controller and sends an acknowledgment signal to the local instruction buffer. The hardware queue management logic of the local instruction buffer automatically points the task pointer to the next action instruction in the collaborative task sequence. The execution process of the hardware queue management logic of the lower-level machine is automatically completed by the hardware logic of the lower-level machine without software intervention.

[0032] This invention addresses the technical shortcomings of existing high-speed multi-system collaborative control, particularly in multi-robot collaborative operation scenarios, such as low synchronization accuracy of multi-node actions caused by multi-threaded polling of the host computer, susceptibility to single-point failures in multi-node distributed control systems, and low utilization of computing and communication resources. It achieves distributed autonomy of the multi-node network through pre-distributed collaborative task sequences. All lower-level machines can autonomously execute action commands or be controlled to stop, while the host computer only retains non-real-time management tasks such as task planning and distribution, and status monitoring. This eliminates the risk of single-point failures in the host computer, improves the fault tolerance and continuous operation capability of the multi-node network, frees up host computer computing power, optimizes communication bandwidth utilization efficiency, and achieves layered decoupling of the control architecture, making it suitable for large-scale, high-speed industrial collaborative operation scenarios.

[0033] The above description is merely a preferred embodiment of the present invention. The scope of protection of the present invention is not limited to the above embodiments. All technical solutions falling within the scope of the present invention's concept are within the scope of protection of the present invention. It should be noted that for those skilled in the art, any improvements and modifications made without departing from the principles of the present invention should also be considered within the scope of protection of the present invention.

Claims

1. A multi-node distributed collaborative control method based on timestamp hardware interrupts, characterized in that, Specifically, the following steps are included: Step 1. The host computer generates action instructions based on the multi-node collaborative operation logic. The host computer uses the global clock as a reference to configure a globally unified timestamp for each action instruction, forming a collaborative task sequence with future execution times. Step 2. During the multi-node collaborative operation, based on the tasks executed by each lower-level machine at different positions in the multi-node network, the upper-level machine pre-sends the collaborative task sequence generated in Step 1 to the corresponding lower-level machine through the industrial communication network. The lower-level machine receives the collaborative task sequence and stores it in its local instruction buffer. Step 3. The hardware comparator in the lower-level machine compares the current time with the timestamp of the cooperative task sequence to be executed in the local instruction buffer of the lower-level machine in real time, and determines the time node when the cooperative task sequence to be executed starts. All lower-level machines independently trigger the cooperative task sequence to be executed based on the global clock. Step 4. During the multi-node collaborative operation, the host computer monitors the operating status of all slave computers in a low-frequency mode. When the communication between the host computer and the slave computer is interrupted or the host computer malfunctions, the slave computer runs autonomously according to the collaborative task sequence stored in its local instruction buffer.

2. The multi-node distributed collaborative control method based on timestamp hardware interrupts according to claim 1, characterized in that, In step 3, the hardware comparator of the lower-level machine compares the current time, based on the global clock, with the timestamp of the collaborative task sequence in real time. The specific operation is as follows: If the current time is equal to the timestamp of the cooperative task sequence to be executed in the local instruction buffer of the lower-level machine, the hardware comparator immediately sends a hardware interrupt signal. The hardware interrupt controller receives the hardware interrupt signal and sends an interrupt request to the CPU of the lower-level machine. The CPU responds to the interrupt request and executes the action instruction whose timestamp is equal to the current time in the interrupt service routine. At the same time, the hardware comparator sends an acknowledgment signal to the local instruction buffer, and uses the timestamp of the next action instruction in the cooperative task sequence as the object of the hardware comparator's next comparison. If the current time is not equal to the timestamp of the cooperative task sequence to be executed in the local instruction buffer of the lower-level machine, it is determined that the execution time of the cooperative task sequence has not yet arrived. The hardware comparator does not issue a hardware interrupt signal, the lower-level machine maintains the current state, and the hardware comparator continues to compare the local clock with the timestamp in the cooperative task sequence. If the local instruction buffer of the lower-level machine is empty, the lower-level machine maintains its current state and waits for the upper-level machine to send a new cooperative task sequence; at the same time, the local clock of the lower-level machine continues to run and keeps in sync with the global clock, waiting to receive a new cooperative task sequence.

3. The multi-node distributed collaborative control method based on timestamp hardware interrupts according to claim 2, characterized in that, In step 3, the hardware comparators of all lower-level machines independently trigger hardware interrupts based on the global clock, thereby realizing the synchronous operation of the multi-node distributed collaborative control system.

4. The multi-node distributed collaborative control method based on timestamp hardware interrupts according to claim 1, characterized in that, In step 4, during the autonomous operation of the lower-level machine based on the collaborative task sequence stored in the local instruction buffer, if the local instruction buffer of the lower-level machine is empty and the waiting time exceeds the preset maximum silent time without receiving a new collaborative task sequence, the lower-level machine automatically executes the controlled shutdown logic. When the local instruction buffer of the lower-level machine is empty but the waiting time has not exceeded the preset maximum silence time, the local clock of the lower-level machine is synchronized with the global clock, waiting to receive a new sequence of cooperative tasks; When the local instruction buffer of the lower-level machine is not empty, the lower-level machine continues to execute the remaining cooperative task sequence until all action instructions in the cooperative task sequence are completed. Then, it is determined whether the waiting time exceeds the preset maximum silence time. If it exceeds the maximum silence time, the lower-level machine executes the controlled shutdown logic; otherwise, the lower-level machine keeps its local clock synchronized with the global clock and waits for a new cooperative task sequence.

5. The multi-node distributed cooperative control method based on timestamp hardware interrupts according to claim 1, characterized in that, The host computer and all slave computers complete global clock alignment based on the IEEE 1588 Precision Time Protocol PTP or EtherCAT distributed clock mechanism, which serves as the reference for the global clock.

6. A multi-node distributed cooperative control system based on timestamp hardware interrupts, used to implement the multi-node distributed cooperative control method based on timestamp hardware interrupts as described in any one of claims 1 to 5, characterized in that, It includes a multi-node network for high-speed multi-system collaborative control. The multi-node network includes a host computer and several slave computers. The host computer and all slave computers are connected through an industrial communication network. The host computer, as the top-level task management unit, generates several collaborative task sequences and distributes the corresponding collaborative task sequences according to the job tasks executed by each slave computer in the multi-node network. The lower-level machine receives the corresponding collaborative task sequence and stores it in the local instruction buffer in timestamp order.

7. The multi-node distributed collaborative control system based on timestamp hardware interrupts according to claim 6, characterized in that, The host computer monitors the operating status of all slave computers in a low-frequency mode. The monitoring cycle of the low-frequency mode is at least three orders of magnitude longer than the cycle of the slave computer hardware interrupt triggering and responding. The host computer also includes a timestamp tag module. The host computer configures a globally unified timestamp for each action instruction through the timestamp tag module to form a collaborative task sequence with future execution times.

8. The multi-node distributed collaborative control system based on timestamp hardware interrupts according to claim 6, characterized in that, The lower-level machine includes a high-precision local clock, a hardware comparator, and an interrupt controller. The hardware comparator determines whether the current time is equal to the timestamp of the cooperative task sequence, and confirms the start time of the interrupt controller based on the determination result.

Images