Soft fast recovery FRD diode chip

Abstract

The utility model relates to the technical field of diodes, in particular to a soft fast recovery (FRD) diode chip, which comprises a silicon wafer, the silicon wafer adopts a double-base region diffusion sheet, the double-base region diffusion sheet comprises a P + region, the thickness of the P + region is 90 microns, one side of the P + region is provided with an N-region, the thickness of the N-region is 60 microns, one side of the N-region is provided with an N region, and the thickness of the N-region is 60 microns. The thickness of the N region is 30 [mu] m, one side of the N region is provided with an N + region, and the thickness of the N + region is 50 [mu] m. A silicon wafer with the resistivity of 45-50 omega.cm and the thickness T of 250 + / -5 microns is selected, compared with a traditional FRD chip, the chip made of the silicon wafer can obtain higher reverse breakdown voltage under the condition that forward voltage is not remarkably increased, the impurity concentration of a newly-added base region N is higher than that of an original base region N-by adopting a double-base-region diffusion technology, and when reverse bias voltage is applied, the thickness T of the chip is larger than that of the original base region N-. According to the invention, the current carrier extraction time is prolonged, that is, the tb value is increased, the softness factor S value is increased to about 0.65, and the softness of the diode is effectively improved.

Description

Technical Field

[0001] The utility model relates to the technical field of diodes, in particular to a soft fast recovery FRD diode chip. Background Art

[0002] The invention of thyristors in 1956 marked the transition of semiconductor devices from weak current applications to strong current applications. With the subsequent invention of planar processes and epitaxial technologies, semiconductor device research has developed in two directions: one is microelectronics based on semiconductor integrated circuits; the other is power electronics based on thyristors. In electronic power circuits, whether the main circuit uses thyristors, GTOs, MOSFETs, etc., a fast recovery diode (FRD) connected in parallel is required to reduce the charging time of the main switch device capacitor and suppress the high voltage generated by induction. In recent years, with the continuous improvement of semiconductor device manufacturing technology, the frequency performance of new devices such as VDMOS and IGBT has been greatly improved. The fast recovery diodes that match them must have the ability to turn on and off quickly, that is, they need a smaller Trr and soft recovery characteristics.

[0003] At present, the parameters of domestic fast recovery diodes are: reverse breakdown voltage 1100V, reverse recovery time 500ns. The softness factor is about 0.35, and the characteristics are very hard. Internationally, the reverse breakdown voltage of fast recovery diodes is 1300V, the reverse recovery time is 300ns, and the softness factor is about 0.55. With the in-depth development of power electronics technology, various semiconductor device technologies are constantly improving and the frequency is constantly increasing, which puts forward new requirements for the fast recovery diodes that match them, namely, smaller Trr and larger softness factor. Utility Model Content

[0004] The utility model aims to solve the shortcomings in the prior art and proposes a soft fast recovery FRD diode chip.

[0005] In order to achieve the above purpose, the utility model adopts the following technical solutions:

[0006] A soft fast recovery FRD diode chip includes a silicon wafer, wherein the silicon wafer adopts a double base diffusion sheet, and the double base diffusion sheet includes a P + Area, the P + The thickness of the region is 90 μm, the P + One side of the zone is provided with N - Area, the N - The thickness of the zone is 60 μm, the N - An N region is provided on one side of the region, the thickness of the N region is 30 μm, and an N + Area, the N +The thickness of the zone was 50 μm.

[0007] Preferably, the silicon wafer has a thickness of 250 μm and a resistivity of 45-50 Ω·cm, and the total thickness of the dual-base region diffusion sheet is 230 μm.

[0008] Preferably, the N of the dual base diffuser is - The N region is a lightly doped substrate region of the original silicon wafer, and the N region is a heavily doped region. The doping concentration of the N region is higher than that of the N - area, and is much lower than N + district.

[0009] Preferably, the double base region diffuser has a softness factor of 0.65, a reverse breakdown voltage of 1300 V, and a reverse recovery time of 250 ns.

[0010] The beneficial effects of the utility model are:

[0011] By selecting silicon wafers with a resistivity of 45-50Ω·cm and a thickness of T=250±5μm, compared with traditional FRD chips, the chip made of this silicon wafer can obtain a higher reverse breakdown voltage without significantly increasing the forward voltage. By adopting a double base diffusion process, the newly added base region N is larger than the original base region N. - The impurity concentration is high. When a reverse bias is applied, the time it takes to extract the carriers is prolonged, that is, the tb value becomes larger, and the softness factor S value is increased to about 0.65, effectively improving the softness of the diode.

[0012] By adopting the double base diffusion process, the reverse recovery time Trr is greatly increased when reverse bias is applied. In order to reduce the reverse recovery time to a reasonable range and increase the operating frequency of the device, the platinum diffusion temperature is increased from 880°C to about 920°C, so that the reverse recovery time of the diode is controlled to below 250ns. The platinum diffusion temperature is increased, the Trr level is reduced, and passivation protection is performed according to the traditional GPP process. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Figure 1 A schematic diagram of a double base diffusion structure of a soft fast recovery FRD diode chip proposed by the utility model;

[0014] Figure 2 The figure is a current and voltage waveform diagram of the reverse recovery process of a soft fast recovery FRD diode chip proposed by the utility model.

[0015] In the figure:

[0016] 1. Single base diffuser; 110, original N + District; 111, former N - Area; 112, original P + Area; 2, double base area diffuser; 220, N+ Area; 221, N Area; 222, N - Area; 223, P + district. DETAILED DESCRIPTION

[0017] The technical solutions in the embodiments of the present invention will be described clearly and completely below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all of the embodiments.

[0018] The contents not described in detail in this specification belong to the prior art known to professional and technical personnel in this field.

[0019] The standard parts used in the utility model can all be purchased from the market, and special-shaped parts can be customized according to the instructions and the drawings. The specific connection methods of each part adopt the conventional means such as mature bolts, rivets, welding, etc. in the existing technology. The machinery, parts and equipment all adopt the conventional models in the existing technology, and the circuit connection adopts the conventional connection method in the existing technology, which will not be described in detail here.

[0020] Example:

[0021] Reference Figure 1-2 A soft fast recovery FRD diode chip includes a silicon wafer, the silicon wafer adopts a double base diffuser 2, and the double base diffuser 2 includes P + Area 223, P + The thickness of region 223 is 90 μm, P + One side of the area 223 is provided with N - Area 222, N - The thickness of region 222 is 60 μm, N - An N region 221 is disposed on one side of the region 222. The thickness of the N region 221 is 30 μm. + Area 220, N + The thickness of region 220 is 50 μm.

[0022] The thickness of the silicon wafer is 250 μm, the resistivity is 45-50 Ω·cm, and the total thickness of the double base region diffusion sheet 2 is 230 μm.

[0023] N of double base diffuser 2 - Region 222 is a lightly doped substrate region of the original silicon wafer, and N region 221 is a heavily doped region. The doping concentration of N region 221 is higher than that of N - Area 222, and much lower than N + Zone 220.

[0024] The double base diffuser 2 has a softness factor of 0.65, a reverse breakdown voltage of 1300 V, and a reverse recovery time of 250 ns.

[0025] In this embodiment, a double base diffusion process is adopted to replace a single base diffusion process. The single base diffusion process mainly adopts a single base diffusion sheet 1. The single base diffusion sheet 1 is composed of the original N + Area 110, former N - Area 111 and the original P + Region 112, due to the low impurity concentration of the single base region diffusion plate 1, through the softness factor formula It can be seen that to increase the softness factor S value, it is only necessary to increase tb. When a reverse bias is applied, the S value is lower and the reverse recovery characteristic is harder. After the double base diffusion process is adopted, the newly added N region 221 is stronger than the original N region. - The impurity concentration of region 111 is high. When a reverse bias is applied, the impurity concentration of the buffer layer is higher than that of the substrate. Therefore, the expansion of the depletion region after reaching the buffer layer slows down significantly during the reverse recovery process. As a result, after the minority carrier storage time, there are still a large number of carriers in the buffer layer that have not been recombined or extracted, which increases the recombination time and tb, thereby improving the softness factor of the diode. Prolonging the time for carrier extraction, that is, increasing the tb value, increases the softness factor S value, and through the reverse recovery time formula It can be seen that, among them, τ p is the maximum injected carrier lifetime, J F is the forward current density, J RM is the reverse peak current density, reverse recovery time Trr and maximum injection lifetime τ p Proportional to the reverse peak current density J RM Inversely proportional, when the double base diffusion process is used, the reverse recovery time Trr also increases significantly when the reverse bias is applied. In order to reduce the reverse recovery time to a reasonable range and increase the device operating frequency, the platinum diffusion temperature is increased from 880℃ to about 920℃, so that the reverse recovery time of the diode is controlled to less than 250ns.

[0026] By formula (W is the base width, τH is the carrier lifetime, and DH is the bipolar diffusion coefficient) It can be seen that Vm is proportional to the base width W, and at the same time, Vm is proportional to the resistivity ρ of the silicon wafer. Therefore, to reduce the forward Vm (i.e., Vf), it is necessary to select a silicon wafer with a narrow base width and a small resistivity; on the contrary, if the reverse Vm (i.e., VB) is to be increased, it is necessary to select a silicon wafer with a wide base width and a large resistivity. It can be seen that the requirements of the forward and reverse electrical parameters for the base width and resistivity are contradictory. Therefore, considering the need to increase the reverse withstand voltage of the chip, the selection of the thickness and resistivity of the silicon wafer should be considered accordingly. Therefore, a silicon wafer with a thickness of about 250 microns and a resistivity of 45-50Ω·cm is used for diffusion. Compared with the traditional FRD chip, the chip made of this silicon wafer can obtain a higher reverse breakdown voltage without significantly increasing the forward voltage.

[0027] When performing phosphorus diffusion, first, a low-concentration phosphorus paper is used for diffusion, and the final diffusion depth is 80μm. Secondly, a normal-concentration phosphorus paper is used for secondary diffusion, and the final diffusion depth is 50μm. When the phosphorus diffusion is completed, the P surface of the double-base diffusion sheet 2 is sandblasted, and then a boron source is applied for boron surface diffusion. After the diffusion is completed, sand is blown on both sides to complete the diffusion process.

[0028] In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present invention.

[0029] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present utility model, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0030] The above description is only a preferred specific implementation manner of the present invention, but the protection scope of the present invention is not limited thereto. Any technician familiar with the technical field can make equivalent replacements or changes within the technical scope disclosed by the present invention according to the technical scheme and the utility model concept of the present invention, which should be covered by the protection scope of the present invention.

Claims

1. A soft fast recovery FRD diode chip, comprising a silicon wafer, characterized in that: The silicon wafer adopts a double base region diffusion plate (2), and the double base region diffusion plate (2) includes P + Area (223), the P + The thickness of the region (223) is 90 μm, and the P + One side of the zone (223) is provided with N - Area (222), the N - The thickness of the region (222) is 60 μm, and the N - An N region (221) is disposed on one side of the region (222), wherein the thickness of the N region (221) is 30 μm, and an N region (221) is disposed on one side of the N region (221). + Area (220), the N + The thickness of the region (220) is 50 μm.

2. The soft fast recovery FRD diode chip according to claim 1, characterized in that: The thickness of the silicon wafer is 250 μm, the resistivity is 45-50 Ω·cm, and the total thickness of the double base region diffusion sheet (2) is 230 μm.

3. The soft fast recovery FRD diode chip according to claim 1, characterized in that: The N of the double base region diffuser (2) - The N region (222) is a lightly doped substrate region of the original silicon wafer, and the N region (221) is a relatively heavily doped region. The doping concentration of the N region (221) is higher than that of the N - Area (222), and much lower than N + Area (220).

4. The soft fast recovery FRD diode chip according to claim 1, characterized in that: The double base region diffusion plate (2) has a softness factor of 0.65, a reverse breakdown voltage of 1300V, and a reverse recovery time of 250ns.

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