Video mainboard control circuit

Abstract

The utility model relates to the technical field of video mainboards, and particularly discloses a video mainboard control circuit. A video receiving port, a decoder for decoding a video signal into an audio signal and an image signal, a memory for storing the video signal, an audio processing circuit for processing the decoded audio signal, and an image processing circuit for processing the decoded image signal are used. A video processing unit composed of a signal amplification circuit for amplifying processed audio signals and image signals and a video output port is matched with a display unit and a single-chip microcomputer, and the video signals are decoded through a decoder and divided into the audio signals and the image signals. And the image processing circuit and the audio processing circuit are used for synchronously processing the audio signal and the image signal at the same time, and the processed audio signal and image signal are output after being amplified by the signal amplification circuit, so that the processing rate of the video signal is greatly improved, and the display definition of the display unit is improved.

Description

Technical Field

[0001] The utility model relates to the technical field of video mainboards, in particular to a video mainboard control circuit. Background Art

[0002] The video motherboard usually refers to the control board of the display, which is responsible for converting the input signal into a signal that the display can recognize and controlling the display content. The video motherboard usually includes input interface, processing chip, memory and output interface, etc., which are used to process video signals and drive the display to display images. Video motherboards are found in computer monitors, TVs, monitors and other devices.

[0003] The decoding processing capability of the video motherboards currently on the market depends on their hardware configuration. If the hardware performance is low, such as insufficient performance of the processor, graphics processing unit (GPU), etc., it will lead to insufficient decoding processing capability and inability to process high-definition video signals, resulting in poor image quality. Therefore, we need to propose a video motherboard control circuit to solve the above problems. Utility Model Content

[0004] The purpose of the utility model is to provide a video mainboard control circuit, which greatly improves the processing rate of video signals and the clarity of display of the display unit through the cooperation of a video processing unit, a display unit and a single-chip microcomputer, so as to solve the problems raised in the background technology.

[0005] To achieve the above-mentioned object, the utility model provides the following technical solutions: a video mainboard control circuit, comprising: a video processing unit, the video processing unit comprising a video processor capable of receiving a video signal for decoding, processing and optimization;

[0006] The video processor is composed of a video receiving port, a decoder for decoding a video signal into an audio signal and an image signal, a memory for storing the video signal, an audio processing circuit for processing the decoded audio signal, an image processing circuit for processing the decoded image signal, a signal amplifying circuit for amplifying the processed audio signal and image signal, and a video output port, wherein the video receiving port is connected to the memory, the memory is connected to the decoder, the decoder is connected to the audio processing circuit and the image processing circuit respectively, the audio processing circuit and the image processing circuit are both connected to the signal amplifying circuit, and the signal amplifying circuit is connected to the video output port;

[0007] A display unit for processing and displaying graphic data, the display unit being electrically connected to the video output port;

[0008] A single-chip microcomputer used to enable the video processing unit and the display unit to work together.

[0009] Preferably, the decoder includes a decoding chip U11, an integrated chip U16 and an integrated chip U13, the CLK pin of the decoding chip U11 is connected to a trigger U12, the connection end between the trigger U12 and the decoding chip U11 is connected to a diode D11, the QC pin of the decoding chip U11 is connected to the input end of the integrated chip U13, and the IN1 pin of the integrated chip U13 and the A pin of the decoding chip U11 are connected to a comparator U14, the OUT end of the integrated chip U13 is connected to a trigger U15, the output end of the trigger U15 and the output end of the comparator U14 are both connected to the integrated chip U16, and the output end of the integrated chip U16 is connected to a trigger U17.

[0010] Preferably, the audio processing circuit includes an audio processing chip U1, pin 19 of the audio processing chip U1 is connected to a capacitor C1 for receiving an audio signal, pin 2 of the audio processing chip U1 is connected to a capacitor C2 for receiving an audio signal, and the audio processing chip U1 is respectively connected to a bass adjustment circuit, a treble adjustment circuit, a balance adjustment circuit, an equal loudness selection circuit and a volume adjustment circuit, the bass adjustment circuit, the treble adjustment circuit, the balance adjustment circuit, the equal loudness selection circuit and the volume adjustment circuit are arranged in parallel, and the bass adjustment circuit The circuit is mainly composed of capacitor C12, resistor R1 and adjustable resistor K1. The volume adjustment circuit is mainly composed of capacitor C13, capacitor C14, resistor R2 and adjustable resistor K2. The equal loudness selection circuit is mainly composed of a tripod switch S. The balance adjustment circuit is mainly composed of capacitor C11, resistor R3 and adjustable resistor K3. The three pins of the tripod switch S are respectively connected to capacitor C13, adjustable resistor K3 and pin 7 of the audio processing chip U1. The treble adjustment circuit is mainly composed of capacitor C10, resistor R4 and adjustable resistor K4.

[0011] Preferably, the image processing circuit includes a processing chip U2, pin 5 of the processing chip U2 is connected to an integrated chip Z101, one end of the integrated chip Z101 is connected to a capacitor C112, one end of the capacitor C112 is connected in parallel with a resistor R110, an inductor L102 and a transistor Q101, the emitter of the transistor Q101 is connected to a resistor R116 with one end grounded, the base of the transistor Q101 is connected to a resistor R115, one end of the resistor R115 is connected to a capacitor C113 with one end grounded, and one end of the capacitor C113 is connected to one end of the resistor R110.

[0012] Preferably, the signal amplification circuit includes an amplifier U8, pin 6 of the amplifier U8 is connected to a capacitor C20 and a ground capacitor C21, one end of the capacitor C20 is connected to a resistor R6 for receiving a video signal to be amplified, pin 1 of the amplifier U8 is connected to a ground capacitor C22, the output pin of the amplifier U8 is connected in parallel to a ground capacitor C25, a resistor R7 and a ground capacitor C26 arranged in series, a ground resistor R8 and an inductor L1 for outputting a video signal, and a capacitor C27 is connected between the ground resistor R8 and the resistor R7.

[0013] Preferably, the video output port and the video receiving port both include an HDMI interface, a VGA interface, a DisplayPort interface, a DVI interface and a USB interface.

[0014] Preferably, the display unit includes a driving chip U9, pin 2 of the driving chip U9 is connected to a transistor Q3 for receiving a video signal, pin 5 of the driving chip U9 is connected to a transistor Q2, the emitter of the transistor Q2 is connected to a ground capacitor C31, pin 6 of the driving chip U9 is connected to a resistor R31 and a ground resistor R32, pin 14 of the driving chip U9 is connected to a transistor Q4, the collector of the transistor Q4 is connected in parallel with a ground capacitor C34 and a ground capacitor C35, the emitter of the transistor Q4 is connected to a transistor Q5, the base of the transistor Q5 is connected to pin 11 of the driving chip U9, pin 13 of the driving chip U9 is connected in parallel with a ground capacitor C32, a ground capacitor C33 and an inductor L30 for signal output, a resistor R37, a resistor R35 and a capacitor C40 are connected in series between the inductor L30 and pin 3 of the driving chip U9, and a ground resistor R36 is connected between the resistor R37 and the resistor R35.

[0015] Compared with the prior art, the beneficial effects of the utility model are:

[0016] 1. The utility model decodes the video signal through a decoder and divides it into an audio signal and an image signal, and then uses the image processing circuit and the audio processing circuit to synchronously process the audio signal and the image signal. The processed audio signal and the image signal are amplified and processed by the signal amplification circuit, and the video output port. The video processing unit is composed of a video receiving port, a decoder for decoding the video signal into an audio signal and an image signal, a memory for storing the video signal, an audio processing circuit for processing the decoded audio signal, an image processing circuit for processing the decoded image signal, a signal amplification circuit for amplifying the processed audio signal and the image signal, and a video output port, and cooperates with a display unit and a single-chip microcomputer. The video signal is first decoded by the decoder and divided into an audio signal and an image signal, and then the image processing circuit and the audio processing circuit are used to synchronously process the audio signal and the image signal at the same time. The processed audio signal and the image signal are amplified and processed by the signal amplification circuit and then output, thereby greatly improving the processing rate of the video signal and improving the clarity of the display unit. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 This is a system block diagram of the utility model;

[0018] Figure 2 The circuit diagram of the decoder of the utility model;

[0019] Figure 3 A circuit diagram of the audio processing circuit of the utility model;

[0020] Figure 4 A circuit diagram of the image processing circuit of the utility model;

[0021] Figure 5 The circuit diagram of the signal amplifying circuit of the utility model;

[0022] Figure 6 This is a circuit diagram of the display unit of the utility model. DETAILED DESCRIPTION

[0023] The following will be combined with the drawings in the embodiments of the utility model to clearly and completely describe the technical solutions in the embodiments of the utility model. Obviously, the described embodiments are only part of the embodiments of the utility model, not all of the embodiments. Based on the embodiments in the utility model, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the utility model.

[0024] See also Figure 1-6 , the utility model provides a technical solution: a video mainboard control circuit, including a video processing unit, a display unit for processing and displaying graphic data, and a single chip microcomputer for enabling the video processing unit and the display unit to work in coordination; the video processing unit includes a video processor capable of receiving a video signal for decoding, processing and optimization;

[0025] The video processor is composed of a video receiving port, a decoder for decoding a video signal into an audio signal and an image signal, a memory for storing the video signal, an audio processing circuit for processing the decoded audio signal, an image processing circuit for processing the decoded image signal, a signal amplifying circuit for amplifying the processed audio signal and image signal, and a video output port. The video receiving port is connected to the memory, the memory is connected to the decoder, the decoder is connected to the audio processing circuit and the image processing circuit respectively, the audio processing circuit and the image processing circuit are both connected to the signal amplifying circuit, the signal amplifying circuit is connected to the video output port, and the display unit is electrically connected to the video output port.

[0026] The video signal is first decoded by a decoder and divided into an audio signal and an image signal, and then the audio signal and the image signal are synchronously processed by an image processing circuit and an audio processing circuit. The processed audio signal and image signal are amplified by a signal amplification circuit and then output, which greatly improves the processing rate of the video signal and improves the clarity of the display unit.

[0027] like Figure 2 As shown, the decoder includes a decoding chip U11, an integrated chip U16 and an integrated chip U13. The CLK pin of the decoding chip U11 is connected to a trigger U12. The connection end of the trigger U12 and the decoding chip U11 is connected to a diode D11. The QC pin of the decoding chip U11 is connected to the input end of the integrated chip U13, and the IN1 pin of the integrated chip U13 and the A pin of the decoding chip U11 are connected to a comparator U14. The OUT end of the integrated chip U13 is connected to a trigger U15. The output end of the trigger U15 and the output end of the comparator U14 are both connected to the integrated chip U16 is connected, and the output end of the integrated chip U16 is connected to a trigger U17. The trigger U12 is used to provide a clock signal to the decoding chip U11. The decoding chip U11 transmits the decoded video signal to the integrated chip U13. The integrated chip U13 receives the video signal and performs corresponding processing, including the extraction of audio signals and image signals. The decoded audio signals and image signals are then transmitted to the comparator U14 for processing through the integrated chip U13. The integrated chip U16 is then used to generate audio signals and image signals according to the control signal output by the comparator U14.

[0028] like Figure 3As shown, the audio processing circuit includes an audio processing chip U1, the 19th pin of the audio processing chip U1 is connected to a capacitor C1 for receiving an audio signal, the 2nd pin of the audio processing chip U1 is connected to a capacitor C2 for receiving an audio signal, and the audio processing chip U1 is respectively connected to a bass adjustment circuit, a treble adjustment circuit, a balance adjustment circuit, an equal loudness selection circuit and a volume adjustment circuit, the bass adjustment circuit, the treble adjustment circuit, the balance adjustment circuit, the equal loudness selection circuit and the volume adjustment circuit are arranged in parallel, and the bass adjustment circuit is mainly composed of a capacitor C12, a resistor R1 and an adjustable resistor K1. One end of the resistor R1 and the capacitor C12 are both connected to the 14th pin of the audio processing chip U1, the other end of the capacitor C12 is grounded, and the adjustment end of the adjustable resistor K1 is connected to the other end of the resistor R1; the volume adjustment loop is mainly composed of capacitor C13, capacitor C14, resistor R2 and adjustable resistor K2, one end of the resistor R2 is connected to the 13th pin of the audio processing chip U1, one end of the capacitor C13 is connected to the end of the resistor R2 close to the audio processing chip U1, the other end of the resistor R2 is connected to the adjustment end of the adjustable resistor K2, one end of the capacitor C14 is connected to one end of the capacitor C13, The other end of capacitor C13 is grounded, the equal loudness selection circuit is mainly composed of a three-pin switch S, the balance adjustment circuit is mainly composed of capacitor C11, resistor R3 and adjustable resistor K3, one end of capacitor C11 is connected to pin 9 of audio processing chip U1, the connection end of capacitor C11 and audio processing chip U1 is connected to one end of resistor R3, the other end of resistor R3 is connected to the adjustment end of adjustable resistor K3, the other end of adjustable resistor K3 is grounded, the three pins of the three-pin switch S are respectively connected to capacitor C13, adjustable resistor K3 and pin 7 of audio processing chip U1, the treble adjustment circuit is mainly composed of capacitor C10, resistor R4 and adjustable resistor K4 are composed, one end of capacitor C10 is connected to pin 4 of audio processing chip U1, one end of resistor R4 is connected to the connection end of capacitor C10 and audio processing chip U1, the other end of resistor R4 is connected to the adjustment end of adjustable resistor K4, adjustable resistor K1, adjustable resistor K2, adjustable resistor K3 and adjustable resistor K4 are connected in parallel in sequence, and by setting the bass adjustment circuit, treble adjustment circuit, balance adjustment circuit, equal loudness selection circuit and volume adjustment circuit in parallel, multiple processing operations can be performed on the audio signal at the same time, improving the efficiency of audio processing. In this way, multiple processing tasks can be completed in the same audio processing circuit, reducing the path and components of the processing signal, and improving the processing speed.

[0029] like Figure 4As shown, the image processing circuit includes a processing chip U2, wherein the 5th pin of the processing chip U2 is connected to an integrated chip Z101, one end of the integrated chip Z101 is connected to a capacitor C112, one end of the capacitor C112 is connected in parallel with a resistor R110, an inductor L102 and a transistor Q101, the emitter of the transistor Q101 is connected to a resistor R116 having one end grounded, the base of the transistor Q101 is connected to a resistor R115, one end of the resistor R115 is connected to a capacitor C113 having one end grounded, one end of the capacitor C113 is connected to one end of the resistor R110, the 3rd pin of the processing chip U2 is connected to a capacitor C203, the 4th pin of the processing chip U2 is connected to a capacitor C210 and a resistor R202, one end of the resistor R202 is connected in parallel with a resistor R201 and a resistor R237, and the 8th pin of the processing chip U2 is connected in parallel with capacitors C204 and C205 and inductor L201, capacitor C206 and resistor R203 are connected in series at pin 9 of the processing chip U2, resistor R205, capacitor C207 and resistor R204 are connected in parallel at pin 10 of the processing chip U2, one end of resistor R204 is connected to the single-chip microcomputer, resistor R206 and capacitor C047 are connected in parallel at pin 11 of the processing chip U2, resistor R207 and capacitor C046 are connected in parallel at pin 12 of the processing chip U2, the connection ends of resistor R207 and capacitor C046 and the connection ends of resistor R206 and capacitor C047 are both connected to the single-chip microcomputer, resistor R228 and resistor R917 are connected at pin 46 of the processing chip U2, an image signal output pin is provided between resistor R228 and resistor R917, the image signal is processed by the processing chip U2, the image signal and the audio signal can be processed synchronously, and the processing rate of the video signal is improved.

[0030] like Figure 5 As shown, the signal amplification circuit includes an amplifier U8, pin 6 of the amplifier U8 is connected to a capacitor C20 and a ground capacitor C21, one end of the capacitor C20 is connected to a resistor R6 for receiving a video signal to be amplified, pin 1 of the amplifier U8 is connected to a ground capacitor C22, the output pin of the amplifier U8 is connected in parallel to a ground capacitor C25, a resistor R7 and a ground capacitor C26 arranged in series, a ground resistor R8 and an inductor L1 for outputting a video signal, and a capacitor C27 is connected between the ground resistor R8 and the resistor R7.

[0031] The video output port and the video receiving port both include HDMI interface, VGA interface, DisplayPort interface, DVI interface and USB interface, and use HDMI interface, VGA interface, DisplayPort interface, DVI interface and USB interface to provide different interface modes, so that it can be suitable for video transmission of different devices.

[0032] like Figure 6As shown, the display unit includes a driver chip U9, a transistor Q3 for receiving a video signal is connected to the 2nd pin of the driver chip U9, a transistor Q2 is connected to the 5th pin of the driver chip U9, the emitter of the transistor Q2 is connected to a capacitor C31 to ground, a resistor R31 and a resistor R32 to ground are connected to the 6th pin of the driver chip U9, a transistor Q4 is connected to the 14th pin of the driver chip U9, a capacitor C34 and a capacitor C35 to ground are connected in parallel to the collector of the transistor Q4, the emitter of the transistor Q4 is connected to the transistor Q5, the base of the transistor Q5 is connected to the 11th pin of the driver chip U9, and a capacitor C32 to ground, a capacitor C33 to ground and a capacitor C34 to ground are connected in parallel to the collector of the transistor Q4, and the base of the transistor Q5 is connected to the 11th pin of the driver chip U9, and a capacitor C32 to ground, a capacitor C33 to ground and a capacitor C34 to ground are connected in parallel to the collector of the transistor Q4. The output inductor L30, the resistor R37, the resistor R35 and the capacitor C40 are connected in series between the inductor L30 and the 3rd pin of the driver chip U9, and the resistor R36 to ground is connected between the resistor R37 and the resistor R35. The video signal is input to the 2nd pin of the driver chip U9, which is connected to the transistor Q3. The transistor Q3 is a receiving device responsible for receiving and amplifying the video signal. The output signal of the driver chip U9 is connected to the transistor Q2 through the 5th pin, and the transistor Q2 amplifies and adjusts the signal. The emitter of the transistor Q2 is connected to the capacitor C31 to ground, which is used to amplify and filter the signal. The resistor R31 and the resistor R32 to ground are connected to the 6th pin of the driver chip U9. These resistors can be used to adjust the level and amplitude of the output signal. The 14th pin of the driver chip U9 is connected to the transistor Q4, and the collector of the transistor Q4 is connected in parallel with the capacitors C34 and C35 to ground. Transistor Q4 is used as a switch to control the drive display. The emitter of transistor Q4 is connected to transistor Q5, and the base of transistor Q5 is connected to pin 11 of driver chip U9. Transistor Q5 is responsible for amplifying the signal. Pin 13 of driver chip U9 is connected in parallel with ground capacitors C32 and C33 and output inductor L30. These components are combined to output signals and provide certain filtering. Resistors R37, R35 and capacitor C40 are connected in series between inductor L30 and pin 3 of driver chip U9. Resistors and capacitors are used to filter and adjust signals.

[0033] Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the appended claims and their equivalents.

Claims

1. A video mainboard control circuit, characterized in that: include: A video processing unit, the video processing unit comprising a video processor capable of receiving a video signal for decoding, processing and optimization; The video processor is composed of a video receiving port, a decoder for decoding a video signal into an audio signal and an image signal, a memory for storing the video signal, an audio processing circuit for processing the decoded audio signal, an image processing circuit for processing the decoded image signal, a signal amplifying circuit for amplifying the processed audio signal and image signal, and a video output port, wherein the video receiving port is connected to the memory, the memory is connected to the decoder, the decoder is connected to the audio processing circuit and the image processing circuit respectively, the audio processing circuit and the image processing circuit are both connected to the signal amplifying circuit, and the signal amplifying circuit is connected to the video output port; A display unit for processing and displaying graphic data, the display unit being electrically connected to the video output port; A single-chip microcomputer used to enable the video processing unit and the display unit to work together.

2. A video mainboard control circuit according to claim 1, characterized in that: The decoder includes a decoding chip U11, an integrated chip U16 and an integrated chip U13. The CLK pin of the decoding chip U11 is connected to a trigger U12. The connection end of the trigger U12 and the decoding chip U11 is connected to a diode D11. The QC pin of the decoding chip U11 is connected to the input end of the integrated chip U13, and the IN1 pin of the integrated chip U13 and the A pin of the decoding chip U11 are connected to a comparator U14. The OUT end of the integrated chip U13 is connected to a trigger U15. The output end of the trigger U15 and the output end of the comparator U14 are both connected to the integrated chip U16. The output end of the integrated chip U16 is connected to a trigger U17.

3. A video mainboard control circuit according to claim 2, characterized in that: The audio processing circuit includes an audio processing chip U1, pin 19 of the audio processing chip U1 is connected to a capacitor C1 for receiving an audio signal, pin 2 of the audio processing chip U1 is connected to a capacitor C2 for receiving an audio signal, and the audio processing chip U1 is respectively connected to a bass adjustment circuit, a treble adjustment circuit, a balance adjustment circuit, an equal loudness selection circuit and a volume adjustment circuit, the bass adjustment circuit, the treble adjustment circuit, the balance adjustment circuit, the equal loudness selection circuit and the volume adjustment circuit are arranged in parallel, and the bass adjustment circuit It is mainly composed of capacitor C12, resistor R1 and adjustable resistor K1. The volume adjustment loop is mainly composed of capacitor C13, capacitor C14, resistor R2 and adjustable resistor K2. The equal loudness selection loop is mainly composed of a tripod switch S. The balance adjustment loop is mainly composed of capacitor C11, resistor R3 and adjustable resistor K3. The three pins of the tripod switch S are respectively connected to capacitor C13, adjustable resistor K3 and pin 7 of the audio processing chip U1. The treble adjustment loop is mainly composed of capacitor C10, resistor R4 and adjustable resistor K4.

4. A video mainboard control circuit according to claim 3, characterized in that: The image processing circuit includes a processing chip U2, wherein pin 5 of the processing chip U2 is connected to an integrated chip Z101, one end of the integrated chip Z101 is connected to a capacitor C112, one end of the capacitor C112 is connected in parallel to a resistor R110, an inductor L102 and a transistor Q101, an emitter of the transistor Q101 is connected to a resistor R116 having one end grounded, a base of the transistor Q101 is connected to a resistor R115, one end of the resistor R115 is connected to a capacitor C113 having one end grounded, and one end of the capacitor C113 is connected to one end of the resistor R110.

5. A video mainboard control circuit according to claim 4, characterized in that: The signal amplification circuit includes an amplifier U8, wherein pin 6 of the amplifier U8 is connected to a capacitor C20 and a ground capacitor C21, one end of the capacitor C20 is connected to a resistor R6 for receiving a video signal to be amplified, pin 1 of the amplifier U8 is connected to a ground capacitor C22, an output pin of the amplifier U8 is connected in parallel to a ground capacitor C25, a resistor R7 and a ground capacitor C26 arranged in series, a ground resistor R8 and an inductor L1 for outputting a video signal, and a capacitor C27 is connected between the ground resistor R8 and the resistor R7.

6. A video mainboard control circuit according to claim 5, characterized in that: The video output port and the video receiving port both include an HDMI interface, a VGA interface, a DisplayPort interface, a DVI interface and a USB interface.

7. A video mainboard control circuit according to claim 6, characterized in that: The display unit includes a driving chip U9, pin 2 of the driving chip U9 is connected to a transistor Q3 for receiving a video signal, pin 5 of the driving chip U9 is connected to a transistor Q2, the emitter of the transistor Q2 is connected to a ground capacitor C31, pin 6 of the driving chip U9 is connected to a resistor R31 and a ground resistor R32, pin 14 of the driving chip U9 is connected to a transistor Q4, the collector of the transistor Q4 is connected in parallel with a ground capacitor C34 and a ground capacitor C35, the emitter of the transistor Q4 is connected to a transistor Q5, the base of the transistor Q5 is connected to pin 11 of the driving chip U9, pin 13 of the driving chip U9 is connected in parallel with a ground capacitor C32, a ground capacitor C33 and an inductor L30 for signal output, a resistor R37, a resistor R35 and a capacitor C40 are connected in series between the inductor L30 and pin 3 of the driving chip U9, and a ground resistor R36 is connected between the resistor R37 and the resistor R35.

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