Quad flat no-lead (QFN) packaging type lead frame unit and chip
By adding pins outside the third side of the base island in the lead frame unit in the QFN package form, and using a T-shaped load-bearing structure, the problem of limited number of pins in the prior art is solved, achieving higher pin density and structural reliability.
Patent Information
- Application Number
- CN202420705892.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-04-08
- Publication Date
- 2025-03-18
- Estimated Expiration
- 2034-04-08
AI Technical Summary
The lead frame unit structure in the existing QFN package has a large limit on the number of chip pins and cannot meet the demand for increasing number of pins under the same external size.
A new lead frame unit structure in QFN package form is adopted. By adding pins outside the third side of the base island and using left and right ribs to form a T-shaped load-bearing structure, the three-end triangular ends are subjected to force, increasing the number of pins.
While maintaining the same package size, the number of pins is significantly increased, solving the problem of limited number of pins in the prior art, and at the same time, the structure is reliable, area saving and low cost.
Smart Images

Figure CN222637292U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to integrated circuit packaging design technology, in particular to a lead frame unit and a chip in a QFN packaging form. Background Art
[0002] With the improvement of integrated circuit manufacturing technology, the area of bare chips (DIE) is getting smaller and smaller, and the functions are increasing. The number of pins of finished chips has not decreased, and may even increase, which is equivalent to an increase in the number of pins under the same area. This requires a packaging form with small dimensions and relatively more pins.
[0003] QFN is a relatively mature and low-cost packaging form. After years of application, a variety of commonly used general lead frames have been formed. The commonly used QFN shape is mostly square, and the size is marked in millimeters (mm). The nominal value of the length or width is usually an integer. Some shapes are rectangular, and some dimensions are non-integer. Since the integer-sized QFN shape is more commonly used and accounts for a large proportion, the packaging test equipment works in the integer size state most of the time, and is manually modified to switch to non-integer size when necessary.
[0004] The common structure of the existing lead frame unit is a central symmetrical structure with a connecting rib at each of the four corners. Figure 1 The figure shows a lead frame unit of a QFN package with a 3mm*3mm external dimension, and a pin pitch of 0.4mm. In the figure, 01 is a support frame, 02 is a base island, 03 is a connecting rib, and 04 is a pin. The total number of pins of the QFN package with this external dimension is 20. In the existing QFN package lead frame unit structure, the total number of pins with external dimensions of 2mm*2mm, 3mm*3mm, 4mm*4mm, 5mm*5mm, 6mm*6mm, and 7mm*7mm are 12, 20, 32, 40, 52, and 60, respectively. It can be seen that this lead frame unit structure will have a large restriction on the number of pins of the QFN chip. Summary of the invention
[0005] Purpose of the invention: In order to solve the problem that the lead frame unit structure of the QFN package form in the prior art has a large limitation on the number of chip pins, and to provide more pins under the commonly used QFN outer dimensions, the utility model provides a lead frame unit and chip in the QFN package form.
[0006] Technical solution: A lead frame unit in a QFN package form, comprising a plurality of lead frame units, wherein the lead frame unit comprises:
[0007] Support frame;
[0008] an even number of pins, including the first pin;
[0009] The base island includes a first side, a second side and a third side, the first side is opposite to the second side, the first side and the second side are adjacent to the third side, the first side and the second side of the base island are each connected to a supporting frame through a connecting rib, and the third side of the base island is connected to the first pin.
[0010] Further, among the pins outside the third side of the base island, the number of pins on both sides of the first pin is equal or differs by 1.
[0011] Furthermore, it also includes a fourth side, which is opposite to the third side; the connection between the connecting rib and the first side and the second side is far away from the third side, and there is a second pin on the side of the connecting rib far away from the third side, and the second pin is in the same row with the pins on the outside of the first side and the second side, or in the same row with the pins on the outside of the fourth side.
[0012] Furthermore, the nominal value of the pin pitch is 0.4 mm.
[0013] Furthermore, the nominal value of the pin length ranges from 0.18 mm to 0.25 mm.
[0014] Furthermore, the nominal value of the QFN package size is one of 2mm*2mm, 3mm*3mm, 4mm*4mm, 5mm*5mm, 6mm*6mm, and 7mm*7mm.
[0015] Furthermore, when the nominal values of the QFN package dimensions are 2mm*2mm, 3mm*3mm, 4mm*4mm, 5mm*5mm, 6mm*6mm, and 7mm*7mm, the total number of pins are 16, 26, 36, 46, 56, and 66, respectively.
[0016] Furthermore, it also includes a connecting portion, wherein the connecting portion connects the third side of the base island and the first pin, and the connecting portion is half-etched.
[0017] A chip in a QFN package form is manufactured by a lead frame composed of the lead frame units in the QFN package form.
[0018] Furthermore, the first pin is a zero potential pin.
[0019] Compared with the prior art, the lead frame unit and chip in the form of a QFN package provided by the utility model have the following beneficial effects:
[0020] (1) The package dimensions of the utility model are the same as those of the existing commonly used QFN, making full use of the existing package testing equipment, without the need to modify or switch flow channels of different sizes, thus saving time and cost;
[0021] (2) Compared with the lead frame unit of the prior art with a central symmetrical structure having a connecting rib at each corner, the present invention adopts a T-shaped load-bearing structure formed by connecting ribs on the left and right sides and a pin, so that the three ends of the triangle bear the force, and the structure is reliable;
[0022] (3) The T-shaped bearing structure of the utility model saves area and has relatively more pins. The total number of pins of the QFN packages with dimensions of 2mm*2mm, 3mm*3mm, 4mm*4mm, 5mm*5mm, 6mm*6mm, and 7mm*7mm are 16, 26, 36, 46, 56, and 66, respectively, which are significantly more than the existing general QFN packages with the same dimensions and the same pin pitch, which is equivalent to a smaller dimension with the same number of pins and a lower cost;
[0023] (4) It adopts the mainstream 0.4mm pin pitch, which does not require improving the manufacturing accuracy. It has a simple structure, mature technology and low cost. BRIEF DESCRIPTION OF THE DRAWINGS
[0024] Figure 1 It is a schematic diagram of the structure of a lead frame unit of a QFN package with a size of 3mm*3mm in the prior art;
[0025] Figure 2 It is a schematic structural diagram of a lead frame unit of a QFN package with an outer size of 2mm*2mm in an embodiment;
[0026] Figure 3 It is a schematic structural diagram of a lead frame unit of a QFN package with an overall size of 3mm*3mm in an embodiment;
[0027] Figure 4 It is a schematic structural diagram of a lead frame unit of a QFN package with an overall size of 4mm*4mm in an embodiment;
[0028] Figure 5 It is a schematic structural diagram of a lead frame unit of a QFN package with an overall size of 5 mm*5 mm in an embodiment;
[0029] Figure 6 It is a schematic structural diagram of a lead frame unit of a QFN package with an overall size of 6mm*6mm in an embodiment;
[0030] Figure 7 It is a schematic structural diagram of a lead frame unit of a QFN package with an outer dimension of 7 mm*7 mm in an embodiment;
[0031] Figure 8 It is a schematic diagram of the structure of a chip in a QFN package with an outer size of 2mm*2mm in an embodiment. DETAILED DESCRIPTION
[0032] The present invention is further explained below in conjunction with the accompanying drawings and specific embodiments.
[0033] A lead frame unit in the form of a QFN package, such as Figures 2 to 7 Shown are lead frame units in various form factors, including:
[0034] Support frame 11 (simplified schematically in the figure);
[0035] an even number of pins, including a first pin 14;
[0036] The base island 12 is used to fix and carry the chip during packaging. The base island includes a first side 15, a second side 16, a third side 17, and a fourth side 19. The first side 15 is opposite to the second side 16, the third side 17 is opposite to the fourth side 19, and the first side 15 and the second side 16 are adjacent to the third side 17. Figure 2 As shown, the first side 15 and the second side 16 are the left and right sides of the base island 12, respectively, and the third side 17 is the lower side of the base island. The first side 15 and the second side 16 of the base island are each connected to the support frame through a connecting rib 13, and the connecting rib 13 is half-etched. The line width of the half-etching can be thinner to save space and prevent the connecting rib 13 from appearing in the pins of the finished chip.
[0037] The third side 17 of the base island is connected to the first pin 14. It also includes a connecting portion 18, which connects the third side 17 of the base island and the first pin 14. The connecting portion 18 can be half-etched or full-etched. The pin is wider or thicker than the connecting rib and has a stronger load-bearing capacity. This structure allows the first pin 14 to replace the E-PAD at the bottom of the QFN package to achieve electrical connection, avoiding the high difficulty of manually soldering the QFN bottom pad, and there is no need to worry about the problem of cold soldering when manually soldering the E-PAD at the bottom of the QFN.
[0038] The connecting ribs 13 on the left and right sides of the base island, the base island 12 and the first pins 14 connected to the base island form a T-shaped or nearly T-shaped bearing structure, with the three ends of the triangle bearing force, and the structure is relatively reliable.
[0039] Preferably, the first pin 14 is located in the middle of the third side 17. Among the pins outside the third side 17 of the base island, the number of pins on the left and right sides of the first pin 14 is equal or only differs by 1, so as to make the force on the left and right sides as even as possible. Figure 2 As shown, there are five pins outside the third side 17, the first pin 14 is the middle pin, and there are two pins on each side; Figure 4 As shown, there are ten pins outside the third side 17, the first pin 14 is the fifth from the left (or the sixth from the left), and the left and right sides differ by only one pin.
[0040] Preferably, the connection between the connecting rib 13 and the first side 15 and the second side 16 is far away from the third side 17, that is, Figure 2 As shown, the connecting rib 13 connects the first side 15 and the second side 16 of the base island. The best embodiment is to leave a second pin 21 above the connecting rib 13. Such a structure can make full use of the edge space to place more pins while supporting the base island. The second pin 21 located above the connecting rib 13 can be in the same row as the top row of pins of the base island (the pins outside the fourth side 19), such as Figure 2 , Figure 4 , Figure 6 As shown, it can also be Figure 3 , Figure 5 , Figure 7 The pins shown are in the same row as the first side and the second side.
[0041] The nominal value of the pin pitch is preferably 0.4mm, that is, the distance between the centers of two adjacent pins is 0.4mm, taking into account both pin density and processing convenience. In addition to 0.4mm, common pin pitches include 0.5mm and 0.65mm. There is also a 0.35mm pin pitch, which has slightly higher requirements for PCB design and processing and is relatively less used. The structural solutions under various pin pitches are similar.
[0042] The nominal value of the pin length ranges from 0.18 mm to 0.25 mm, preferably 0.2 mm.
[0043] The QFN package adopts common dimensions, and the nominal value of D*E is one of 2mm*2mm, 3mm*3mm, 4mm*4mm, 5mm*5mm, 6mm*6mm, and 7mm*7mm.
[0044] The total number of pins of a QFN package with an outline size of D*E is [(D+E)*2 / e-4], where e is the pin pitch and 4 is subtracted because the four sides of the base island lose one pin space at each of the four corners due to the overlap of the two-side ends. Figures 2 to 7 As shown in the figure, the total number of pins of the QFN package with dimensions of 2mm*2mm, 3mm*3mm, 4mm*4mm, 5mm*5mm, 6mm*6mm, and 7mm*7mm are 16, 26, 36, 46, 56, and 66 respectively. Excluding the pins fixed to the base island, there are 15, 25, 35, 45, 55, and 65 free pins left respectively. Figure 3 and Figure 1 Although they are QFN packages with the same outer dimensions, the total number of pins differs by 6.
[0045] From the inside, it is a basically symmetrical structure except for the first pin 14 connected to the base island and the optional base island bevel indication.
[0046] From the perspective of external pins, the left and right directions are symmetrical, and the total number of pins is an even number.
[0047] A chip in a QFN package is made by a lead frame composed of the lead frame units in the QFN package. Figure 8 As shown, a bare chip (DIE) 20 is fixed on the base island 12, and the PAD of the bare chip 20 is connected to the pins and / or the base island through a downbond. The lead frame includes a plurality of lead frame units, and the plurality of lead frame units are arranged in an array. In the process of manufacturing the finished chip, the lead frame will be cut to form independent units, and the support frame will be cut off, so the support frame no longer exists in the finished chip.
[0048] Preferably, in order to fully utilize the first pin 14, the first pin 14 can be set as a zero potential pin. The zero potential PAD of the packaged bare chip 20 is connected to the base island 12 or the first pin 14 through a downbond. The above zero potential pin is usually marked as GND or VSS.
[0049] The structural schematic diagram of the lead frame unit of the above embodiment only reflects the pin layout, connecting ribs, base island connection relationship related to this embodiment, and the main components visible from the perspective of the finished chip. Among them, the base island is represented by a simple rectangle, and the pin is represented by a simple rectangular pin, and no restrictions are made on the detailed shape of the base island or the pin or the bracket. The schematic diagram also does not reflect the details related to stress, plastic encapsulation material, injection molding, silver-plated area, grooves, brackets and bracket connections, including but not limited to modifying the edge of the base island or partially half-etching the base island or pin to improve adhesion, adjusting the rectangular pin in the figure to a bevel or rounded corner or setting a groove, setting a bevel indication at the corner position of the base island corresponding to the 1# pin, etc., all of which can adopt a general solution.
Claims
1. A lead frame unit in a QFN package, characterized in that: include: Support frame; an even number of pins, including the first pin; The base island includes a first side, a second side and a third side, the first side is opposite to the second side, the first side and the second side are adjacent to the third side, the first side and the second side of the base island are each connected to a supporting frame through a connecting rib, and the third side of the base island is connected to the first pin.
2. The lead frame unit of the QFN package form according to claim 1, characterized in that: Among the pins outside the third side of the base island, the number of pins on both sides of the first pin is equal or differs by 1.
3. The lead frame unit of the QFN package form according to claim 1 or 2, characterized in that: It also includes a fourth side, which is opposite to the third side; the connection between the connecting rib and the first side and the second side is far away from the third side, and a second pin is provided on the side of the connecting rib far away from the third side, and the second pin is in the same row as the pins outside the first side and the second side, or in the same row as the pins outside the fourth side.
4. The lead frame unit of the QFN package form according to claim 1 or 2, characterized in that: The nominal pin pitch is 0.4mm.
5. The lead frame unit of the QFN package form according to claim 1 or 2, characterized in that: The nominal value range of the pin length is 0.18mm~0.25mm.
6. The lead frame unit of the QFN package form according to claim 1 or 2, characterized in that: The nominal value of the QFN package size is one of 2mm*2mm, 3mm*3mm, 4mm*4mm, 5mm*5mm, 6mm*6mm, and 7mm*7mm.
7. The lead frame unit of the QFN package form according to claim 6, characterized in that: When the nominal values of the QFN package dimensions are 2mm*2mm, 3mm*3mm, 4mm*4mm, 5mm*5mm, 6mm*6mm, and 7mm*7mm, the total number of pins are 16, 26, 36, 46, 56, and 66 respectively.
8. The lead frame unit of the QFN package form according to claim 1 or 2, characterized in that: It also includes a connecting portion, which connects the third side of the base island and the first pin, and the connecting portion is half-etched.
9. A chip in a QFN package, characterized in that: The chip in QFN package form is manufactured by a lead frame composed of the lead frame units in QFN package form as claimed in any one of claims 1 to 8.
10. The chip in QFN package according to claim 9, characterized in that: The first pin is a zero potential pin.