Active clamping forward switching power supply with dead zone control

Abstract

The utility model discloses an active clamping forward switching power supply with dead zone control. The active clamping forward switching power supply comprises a minimum pulse circuit, a dead zone setting circuit, a signal interlocking circuit and an active clamping forward switching circuit, the minimum pulse circuit, the dead zone setting circuit and the signal interlocking circuit are connected in sequence; the active clamping forward switching circuit comprises a transformer T1, the two ends of a primary side winding of the transformer T1 are connected with a clamping absorption circuit in parallel, a primary side negative electrode of the transformer is connected with a main power circuit, and the clamping absorption circuit and the main power circuit are connected with a signal interlocking circuit. The circuit can flexibly set dead time to avoid circuit failure caused by direct connection of a clamping tube and a main power switch tube, input signal burrs can be eliminated, mistaken switching-on caused by the signal burrs can be avoided, one path of PWM can be converted into two paths of PWM output, and the number of external equipment is reduced.

Description

Technical Field

[0001] The utility model relates to an active clamped forward switching power supply with dead - zone control. Background Technique

[0002] The traditional forward active - clamped topology uses a controllable switch tube to replace the diode, reducing the loss, but there is a risk of direct - through between the main power switch tube and the clamping tube. At the same time, the diode in the secondary part has a relatively high loss under large - current conditions; for example, in the clamped flyback circuit control device, control method and clamped flyback circuit disclosed in the patent with publication number CN118199411A, a method of non - complementary conduction between the clamping switch and the flyback switch is used to reduce the conduction time of the clamping switch, reduce the loss of the clamping switch tube, and at the same time reduce the current stress on the secondary side accordingly. Content of the Utility Model

[0003] To solve the above - mentioned technical problems, the utility model provides an active clamped forward switching power supply with dead - zone control.

[0004] The utility model is achieved through the following technical solutions.

[0005] An active clamped forward switching power supply with dead - zone control provided by the utility model includes a minimum - pulse circuit, a dead - zone setting circuit, a signal interlock circuit, and an active clamped forward switching circuit; the minimum - pulse circuit, the dead - zone setting circuit, and the signal interlock circuit are connected in sequence; the active clamped forward switching circuit includes a transformer T1. The two ends of the primary - side winding of the transformer T1 are connected in parallel with a clamping absorption circuit. The negative pole of the primary side of the transformer is connected to the main power circuit. The clamping absorption circuit and the main power circuit are connected to the signal interlock circuit.

[0006] The minimum - pulse circuit includes a resistor R1, a capacitor C1, and a first flip - flop U1. One end of the resistor R1 is connected to a PWM signal, and the other end is connected to one end of the capacitor C1 and the input terminal of the first flip - flop U1. The other end of the capacitor C1 is grounded, and the output terminal of the first flip - flop U1 is connected to the dead - zone setting circuit.

[0007] The dead - zone setting circuit includes a resistor R2, a capacitor C2, and a second flip - flop U2. One end of the resistor R2 is connected to the output terminal of the second flip - flop U1. The other end of the resistor R2 is connected to one end of the capacitor C2 and the input terminal of the second flip - flop U2. The other end of the capacitor C2 is grounded, and the output terminal of the second flip - flop U2 is connected to the signal interlock circuit.

[0008] The signal interlock circuit includes an inverter U3. The input end of the inverter U3 is connected to the output end of the second flip-flop U2. The output end of the inverter U3 is connected to the second input end of an exclusive-OR gate U4 and the second input end of a second AND gate U6. The first input end of the exclusive-OR gate U4 is connected to the input end of the first flip-flop U1. The output end of the exclusive-OR gate U4 is connected to the second input end of a first AND gate U5 and the first input end of the second AND gate U6. The first input end of the first AND gate U5 is connected to the output end of the first Schmitt trigger U1. The output end of the first AND gate U5 is connected to a first gate driver. The output end of the second AND gate U6 is connected to a second gate driver.

[0009] The clamping and absorbing circuit includes a clamping switch Q1. The drain of the clamping switch Q1 is connected to a capacitor C1. The capacitor C1 is connected to the positive pole of the primary side of a transformer T1. The source of the clamping switch Q1 is connected to the negative pole of the primary side of the transformer. The drain and source of the clamping switch Q1 are also reversely connected in parallel with a diode D1. The gate of the clamping switch Q1 is connected to the first gate driver.

[0010] The main power circuit includes a main switch Q2. The drain of the main switch Q2 is connected to the negative pole of the primary side of the transformer. The source is connected to the negative pole of the power supply. The drain and source of the clamping switch Q2 are also reversely connected in parallel with a diode D2. The gate of the clamping switch Q1 is connected to the second gate driver.

[0011] The active clamping forward switch circuit further includes a secondary side circuit. The secondary side circuit includes a diode D3. The negative pole of the diode D3 is connected to the negative pole of the secondary side of the transformer T1. The positive pole is connected to the negative pole of a diode D4 and an inductor L. The positive pole of the diode D4 is connected to the positive pole of the secondary side of the transformer T1. The other end of the inductor L is connected to a capacitor C2 and a resistor RL. The other ends of the capacitor C2 and the resistor RL are connected to the positive pole of the secondary side of the transformer T1.

[0012] The beneficial effects of the present utility model are as follows: The circuit can flexibly set the dead time to avoid the direct connection of the clamping tube and the main power switch tube, which may cause the circuit to fail. And it can eliminate the input signal glitches to avoid mis-turn-on caused by signal glitches. At the same time, it can convert one-way PWM into two-way PWM outputs, reducing the number of external devices. Description of the Drawings

[0013] Figure 1 It is the schematic diagram of the dead time generation circuit of the present utility model;

[0014] Figure 2 It is the schematic diagram of the active clamping forward switch circuit of the present utility model;

[0015] Figure 3 It is the timing diagram of the dead time generation circuit of the present utility model. Detailed Embodiments

[0016] The technical solution of the present utility model will be further described below, but the scope of protection is not limited thereto.

[0017] An active clamp forward switch power supply with dead zone control includes a minimum pulse circuit, a dead zone setting circuit, a signal interlock circuit, and an active clamp forward switch circuit; the minimum pulse circuit, the dead zone setting circuit, and the signal interlock circuit are connected in sequence; the active clamp forward switch circuit includes a transformer T1, the two ends of the primary side winding of the transformer T1 are connected in parallel with a clamp absorption circuit, the negative pole of the primary side of the transformer is connected to the main power circuit, and the clamp absorption circuit and the main power circuit are connected to the signal interlock circuit.

[0018] The minimum pulse circuit includes a resistor R1, a capacitor C1, and a first flip-flop U1. One end of the resistor R1 is connected to the PWM signal, and the other end is connected to one end of the capacitor C1 and the input end of the first flip-flop U1. The other end of the capacitor C1 is grounded, and the output end of the first flip-flop U1 is connected to the dead zone setting circuit. The PWM signal charges the capacitor C1 through the resistor R1. If the PWM signal is only a voltage glitch, the voltage at the capacitor C1 is not sufficient to trigger the Schmitt trigger U1, avoiding the risk of mis-turn-on of the gate driver caused by voltage glitches, such as Figure 3 t1 in. The minimum pulse width of the pulse is determined by the values of the resistor R1 and the capacitor C1.

[0019] The dead zone setting circuit includes a resistor R2, a capacitor C2, and a second flip-flop U2. One end of the resistor R2 is connected to the output end of the second flip-flop U1, and the other end of the resistor R2 is connected to one end of the capacitor C2 and the input end of the second flip-flop U2. The other end of the capacitor C2 is grounded, and the output end of the second flip-flop U2 is connected to the signal interlock circuit. When the pulse width of the PWM signal is sufficient to trigger the first Schmitt trigger U1, the capacitor C2 is charged through the resistor R2, and the signal triggers the second Schmitt trigger U2 to input a signal to the signal interlock circuit after a delay equal to the charging time of the capacitor C2. The dead zone length is determined by the values of the resistor R2 and the capacitor C2.

[0020] The signal interlock circuit includes an inverter U3. The input end of the inverter U3 is connected to the output end of the second flip-flop U2. The output end of the inverter U3 is connected to the second input end of an exclusive OR gate U4 and the second input end of a second AND gate U6. The first input end of the exclusive OR gate U4 is connected to the input end of the first flip-flop U1. The output end of the exclusive OR gate U4 is connected to the second input end of a first AND gate U5 and the first input end of the second AND gate U6. The first input end of the first AND gate U5 is connected to the output end of the first Schmitt trigger U1. The output end of the first AND gate U5 is connected to a first gate driver, and the output end of the second AND gate U6 is connected to a second gate driver. As Figure 3As shown, at times t2 - t4, for the two signals input by the first Schmitt trigger U1 and the second Schmitt trigger U2, when they are not both 1 when input to the exclusive - OR gate U4, the exclusive - OR gate U4 outputs 0 to the first AND gate U5 and the second AND gate U6. Both the first AND gate U5 and the second AND gate U6 output 0 externally, forming a dead zone.

[0021] The clamping and absorbing circuit includes a clamping switch Q1. The drain of the clamping switch Q1 is connected to a capacitor C1. The capacitor C1 is connected to the positive pole of the primary side of the transformer T1. The source of the clamping switch Q1 is connected to the negative pole of the primary side of the transformer. The drain and source of the clamping switch Q1 are also reversely connected in parallel with a diode D1. The gate of the clamping switch Q1 is connected to the first gate driver.

[0022] The main power circuit includes a main switch Q2. The drain of the main switch Q2 is connected to the negative pole of the primary side of the transformer. The source is connected to the negative pole of the power supply. The drain and source of the clamping switch Q2 are also reversely connected in parallel with a diode D2. The gate of the clamping switch Q1 is connected to the second gate driver.

[0023] The active - clamped forward - switching circuit further includes a secondary - side circuit. The secondary - side circuit includes a diode D3. The negative pole of the diode D3 is connected to the negative pole of the secondary side of the transformer T1. The positive pole is connected to the negative pole of a diode D4 and an inductor L. The positive pole of the diode D4 is connected to the positive pole of the secondary side of the transformer T1. The other end of the inductor L is connected to a capacitor C2 and a resistor RL. The other ends of the capacitor C2 and the resistor RL are connected to the positive pole of the secondary side of the transformer T1.

Claims

1. An active clamp forward switching power supply with dead zone control, characterized in that: It includes a minimum pulse circuit, a dead zone setting circuit, a signal interlocking circuit, and an active clamping forward switching circuit; the minimum pulse circuit, the dead zone setting circuit, and the signal interlocking circuit are connected in sequence; the active clamping forward switching circuit includes a transformer T1, both ends of the primary side winding of the transformer T1 are connected in parallel with the clamping absorption circuit, the negative pole of the primary side of the transformer is connected to the main power circuit, and the clamping absorption circuit and the main power circuit are connected to the signal interlocking circuit.

2. The active clamp forward switching power supply with dead zone control according to claim 1, characterized in that: The minimum pulse circuit includes a resistor R1, a capacitor C1, and a first trigger U1. One end of the resistor R1 is connected to the PWM signal, and the other end is connected to one end of the capacitor C1 and the input end of the first trigger U1. The other end of the capacitor C1 is grounded, and the output end of the first trigger U1 is connected to the dead zone setting circuit.

3. The active clamp forward switching power supply with dead zone control according to claim 1, characterized in that: The dead zone setting circuit includes a resistor R2, a capacitor C2, and a second trigger U2. One end of the resistor R2 is connected to the output end of the second trigger U1, the other end of the resistor R2 is connected to one end of the capacitor C2 and the input end of the second trigger U2, the other end of the capacitor C2 is grounded, and the output end of the second trigger U2 is connected to the signal interlocking circuit.

4. The active clamp forward switching power supply with dead zone control according to claim 1, characterized in that: The signal interlock circuit includes an inverter U3, an input end of the inverter U3 is connected to the output end of the second trigger U2, an output end of the inverter U3 is connected to the second input end of the XOR gate U4 and the second input end of the second AND gate U6, a first input end of the XOR gate U4 is connected to the input end of the first trigger U1, an output end of the XOR gate U4 is connected to the second input end of the first AND gate U5 and the first input end of the second AND gate U6, a first input end of the first AND gate U5 is connected to the output end of the first Schmitt trigger U1, an output end of the first AND gate U5 is connected to the first gate driver, and an output end of the second AND gate U6 is connected to the second gate driver.

5. The active clamp forward switching power supply with dead zone control according to claim 1, characterized in that: The clamp absorption circuit includes a clamp switch Q1, the drain of the clamp switch Q1 is connected to the capacitor C1, the capacitor C1 is connected to the positive electrode of the primary side of the transformer T1, the source of the clamp switch Q1 is connected to the negative electrode of the primary side of the transformer, the drain and source of the clamp switch Q1 are also connected in reverse parallel with the diode D1, and the gate of the clamp switch Q1 is connected to the first gate driver.

6. The active clamp forward switching power supply with dead zone control according to claim 1, characterized in that: The main power circuit includes a main switch Q2, the drain of the main switch Q2 is connected to the negative electrode of the primary side of the transformer, the source is connected to the negative electrode of the power supply, the drain and source of the clamp switch Q2 are also reversely connected in parallel with the diode D2, and the gate of the clamp switch Q1 is connected to the second gate driver.

7. The active clamp forward switching power supply with dead zone control according to claim 1, characterized in that: The active clamp forward switching circuit also includes a secondary circuit, which includes a diode D3, wherein the cathode of the diode D3 is connected to the cathode of the secondary side of the transformer T1, and the anode is connected to the cathode of the diode D4 and the inductor L, the anode of the diode D4 is connected to the anode of the secondary side of the transformer T1, the other end of the inductor L is connected to the capacitor C2 and the resistor RL, and the other ends of the capacitor C2 and the resistor RL are connected to the anode of the secondary side of the transformer T1.

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