Amplification circuit and Hall sensor

Abstract

This provides an amplifier circuit configuration that can reduce circuit area and power consumption. [Solution] The input selector switch 110 modulates the input signal Sin into a first signal S1 with a predetermined operating frequency and inputs it to an amplifier 120 which has a built-in frequency conversion switch 125. The amplifier 120 is configured such that, as the frequency conversion switch 125 works in coordination with the input selector switch 110, the first signal S1 is amplified inside the amplifier and the amplified signal is demodulated by the frequency conversion switch 125, thereby outputting a second signal S2 with the same frequency as the input signal Sin. The filter 130 outputs a signal S3 obtained by attenuating or removing the component of the operating frequency of the frequency conversion switch 125 from the second signal S2 output from the amplifier 120.

Description

Technical Field

[0001] The present disclosure relates to an amplifier circuit and a Hall element sensor.

Background Art

[0002] There are various sensors that utilize the characteristics of a bridge circuit. For example, as a sensor for detecting a drive current flowing through a conductor, a Hall element sensor using a Hall element is known. In addition, when a Hall element is made of silicon, the Hall element can be integrated into an IC (Integrated Circuit), so that the Hall element sensor can be manufactured in a small size and at a low cost.

[0003] Normally, the sensitivity of the sensor is low and the output signal from the bridge circuit is a low voltage. Therefore, it is necessary to amplify the output signal by an amplifier circuit. However, due to the offset included in the output signal due to manufacturing variations of the sensor, etc., there has been a problem that the output of the amplifier circuit saturates.

[0004] Therefore, as a technique for effectively suppressing the offset, a chopper is proposed in Japanese Patent Translation Publication No. 2010-507095 (Patent Document 1). Also, a spinning current is proposed in Japanese Patent Translation Publication No. 2013-535661 (Patent Document 2). <00000>

Prior Art Documents

Patent Documents

[0005] <000D023>

Patent Document 1

Patent Document 2

Summary of the Invention

Problems to be Solved by the Invention

[0006] In the technology described in Patent Document 1, only one Hall element is used as the sensor, and the offset component of the Hall element is amplified by a chopper amplifier in the amplification circuit. Therefore, there is a concern that the offset component will need to be fed back and suppressed to prevent the chopper amplifier from saturating. In addition, the amplification circuit requires the use of many amplifiers and / or filters, as well as the aforementioned feedback configuration. Therefore, there is a concern that the circuit size and current consumption will increase.

[0007] The spinning current used in Patent Document 2 has the problem that noise is generated at a frequency of (1 / 2) of the modulation frequency due to residual offset caused by manufacturing variations in the sensor (Hall element). Therefore, when the signal bandwidth is high, a steep filter is required in the amplification circuit to suppress the noise at a frequency of (1 / 2) of the modulation frequency. In contrast, the configuration in Patent Document 2 does not take into consideration the noise at this frequency, nor does it mention the need for a filter, so there are concerns that the noise at the aforementioned frequency component will be a problem.

[0008] Furthermore, in the configuration of Patent Document 2, since the amplifier in the amplification circuit is located before the demodulator, the output of the amplifier is a square wave at the modulation frequency mentioned above. For this reason, in order to ensure the amplification factor at that frequency, it is necessary to increase the bandwidth of the amplifier, which raises concerns about an increase in circuit size and current consumption.

[0009] This disclosure was made to solve these problems, and the purpose of this disclosure is to provide an amplifier circuit configuration that can reduce circuit area and power consumption by amplifying the input signal while efficiently attenuating noise. [Means for solving the problem]

[0010] In certain aspects of this disclosure, an amplification circuit is provided. The amplification circuit comprises an amplifier with a built-in frequency conversion switch, an input selector switch, and a filter. The input selector switch is configured to modulate an input signal of a first frequency to a first signal of a predetermined second frequency and input it to the amplifier. The amplifier is configured to output a second signal of the first frequency by having the frequency conversion switch work in coordination with the input selector switch to amplify the first signal internally and demodulate the amplified signal by the frequency conversion switch operating at the second frequency. The filter is configured to attenuate or remove the second frequency component from the second signal output from the amplifier.

[0011] In another aspect of this disclosure, a Hall element sensor is provided. The Hall element sensor comprises one or more Hall elements, the amplification circuit, and an output circuit. The amplification circuit operates by receiving the output signals of each Hall element as input signals. The output circuit receives the signals that have passed through the filter of the amplification circuit and generates a sensor output signal. The output circuit is configured to have a filtering function to suppress noise generated in the amplification circuit. [Effects of the Invention]

[0012] According to this disclosure, an input signal modulated by an input selector switch is input to an amplifier that incorporates a frequency conversion switch operating at the same frequency as the input selector switch. The amplifier's output signal is obtained by demodulating the amplified signal using the frequency conversion switch, and the component of the frequency conversion switch's operating frequency is suppressed by a filter. This configuration allows for efficient noise attenuation while amplifying the input signal, thereby reducing the circuit area and power consumption of the amplification circuit. [Brief explanation of the drawing]

[0013] [Figure 1] This is a block diagram illustrating the configuration of an amplifier circuit in a comparative example. [Figure 2]It is a schematic waveform diagram for explaining the operation of the amplifier circuit shown in FIG. 1. [Figure 3] It is a block diagram for explaining a configuration example of an amplifier circuit according to Embodiment 1. [Figure 4] It is a first schematic waveform diagram for explaining the operation of the amplifier circuit according to Embodiment 1. [Figure 5] It is a second schematic waveform diagram for explaining the operation of the amplifier circuit according to Embodiment 1. [Figure 6] It is a conceptual diagram for explaining an example of the frequency characteristics of the filter shown in FIG. 3. [Figure 7] It is a block diagram for explaining a configuration example of an amplifier circuit according to a modification of Embodiment 1. [Figure 8] It is a block diagram for explaining a configuration example of a Hall element sensor according to Embodiment 2.

Embodiments for Carrying Out the Invention

[0014] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings. In the following, the same or corresponding parts in the drawings are denoted by the same reference numerals, and the description thereof will not be repeated in principle.

[0015] Embodiment 1. (Regarding the amplifier circuit according to the comparative example) First, using the amplifier circuit according to the comparative example, the problems of the technology described in Patent Document 2 will be described in detail.

[0016] FIG. 1 is a block diagram for explaining the configuration of an amplifier circuit 10♯ according to a comparative example based on Patent Document 2.

[0017] As shown in FIG. 1, the amplifier circuit 10♯ includes an input switching switch 12, an amplifier 13, a demodulator 14, and an output buffer 16.

[0018] The input switching switch 12 operates according to the clock CLK (frequency f2) to switch the connection between the input signal Sin (frequency f1) from the bridge circuit 11 such as a Hall element and the input terminal (not shown) of the amplifier 13. As a result, the input signal Sin is modulated into a signal S1 of frequency f2 and input to the amplifier 13.

[0019] The amplifier 1 three outputs a signal S2a of frequency f2 obtained by amplifying the signal S1 (frequency f2). At this time, the amplifier 13 is configured to generate the signal S2a by amplification involving the synthesis (for example, addition) of two signals S1a.

[0020] The demodulator 14 includes a chopper switch 15 that operates according to the clock CLK. By the chopper switch 15, the signal S2a (frequency f2) output from the amplifier 13 is demodulated into a signal S2b of frequency f1. As a result, a signal S2b obtained by amplifying the input signal Sin is obtained. The output buffer 16 outputs a signal S3 according to the voltages of two signals S2b.

[0021] Figure 2 is a schematic waveform diagram for explaining the operation of the amplifier circuit 10♯. In Fig. 2(a), an example waveform of the input signal Sin is shown, and in Fig. 2(b), an example waveform of the signal S1 input from the input switching switch 12 to the amplifier i3 is shown. Note that the waveforms of each signal in Fig. 2 exemplarily show one of the plurality of signals shown in parallel in Fig. 1.

[0022] Referring to Fig. 2(a), the input signal Sin is typically a DC voltage (that is, f1 = 0 [Hz]) output from a bridge circuit 11 such as a Hall element. Referring to Fig. 2(b), the signal S1 becomes a rectangular AC voltage signal of frequency f2 obtained by the input switching switch 12 modulating the input signal Sin to the high-frequency side according to the clock CLK.

[0023] In Fig. 2(c), an example waveform of the signal S2a output from the amplifier 13 is shown, and in Fig. 2(d), an example waveform of the signal S2b output from the demodulator 14 is shown.

[0024] Referring to Figure 2(c), the signal S2a has a waveform represented by the sum of the AC voltage component V2X (frequency f2) with an amplified amplitude of the signal S1 and the offset component (DC voltage component) V2of generated by the amplifier 13.

[0025] In the amplification circuit 10♯, the signal S2b demodulated by the demodulator 14 has a waveform represented by the sum of a DC voltage component V2dc obtained by demodulating the AC voltage component V2x to the low frequency side, i.e., frequency f1 (here, f1 = 0 [Hz]), and a rectangular wave AC voltage component V2ac (frequency f2) obtained by modulating the offset component V2of to the high frequency side.

[0026] As shown in Figure 2(d), the output buffer 16 can suppress the AC voltage component V2ac contained in the signal S2b and output a signal S3 based on the DC voltage component V2dc. That is, in signal S3, the AC voltage component V2ac is suppressed (attenuated or removed) by the bandwidth limiting (frequency characteristics) of the output buffer 16.

[0027] As can be seen from Figures 1 and 2, in the comparative example amplifier circuit 10#, the chopper switch 15 is placed after the amplifier 13, so the output signal (S2a) of the amplifier 13 is inverted at the modulation frequency (frequency f2). To address this, it is necessary to increase the bandwidth of the amplifier 13.

[0028] Furthermore, as mentioned above, although not mentioned in Patent Document 2, in the spinning current method, residual offset due to manufacturing variations of the sensor (Hall element) may occur that cannot be completely eliminated by the modulation operation by the input selector switch 12. As a result, noise will be generated at a frequency of (1 / 2) of the modulation frequency (frequency f2 in Figure 1) with respect to the signal S1, so measures must also be taken to suppress the noise at this frequency (f2 / 2).

[0029] (Regarding the amplification circuit according to Embodiment 1) Figure 3 is a block diagram illustrating an example configuration of the amplifier circuit 100A according to Embodiment 1.

[0030] As shown in Figure 3, the amplification circuit 100A includes an input selector switch 110 that operates according to the clock CLK (frequency f2), an amplifier 120 with a built-in frequency conversion switch 125, and a filter 130.

[0031] The input selector switch 110 operates similarly to the input selector switch 12 in Figure 1, switching the connection between the input signal Sin and the input side of the amplifier 120 according to the clock CLK. As a result, similar to the comparative example, the input signal Sin is modulated into a signal S1 with frequency f2 and input to the amplifier 13.

[0032] The frequency conversion switch 125 operates in coordination with the input selector switch 110 according to the clock CLK (frequency f2). As a result, the amplifier 120 amplifies the signal S1 modulated by the input selector switch 110 and outputs a signal S2 obtained by demodulating the amplified signal S1 (frequency f1) with frequency conversion at frequency f2. In this case, the amplifier 120 is configured to perform amplification operation involving the combination (e.g., addition) of the two signals S1, similar to the amplifier 13 in the comparative example.

[0033] The filter 130 outputs a signal S3 from which unwanted signal components such as harmonics contained in the signal S2 output from the amplifier 120 have been attenuated or removed. The filter 130 is configured to have a frequency characteristic that attenuates or removes components at frequency f2, which is the operating frequency (i.e., modulation frequency) of the input selector switch 110 and the frequency conversion switch 125. For example, the filter 130 can be configured by a switched-capacitor circuit that operates in coordination with the input selector switch 110 and the frequency conversion switch 125 according to a clock CLK, and is designed to have a notch at frequency f2. The clock CLK may be supplied from outside the amplifier circuit 100A or generated inside the amplifier circuit 100A.

[0034] Figure 4 is a schematic waveform diagram illustrating the operation of the amplifier circuit 10. The waveforms of each signal in Figure 4 are illustrative examples of one of the multiple signals shown in parallel in Figure 3.

[0035] Figure 4(a) shows an example of the waveform of the input signal Sin, and Figure 4(b) shows an example of the waveform of the signal S1 input from the input selector switch 110 to the amplifier 120. The input signal Sin and signal S1 in Figures 4(a) and (b) are the same as in Figures 2(a) and (b), and signal S1 is a rectangular wave AC voltage with frequency f2 obtained by modulating the input signal Sin (here, frequency f1 = 0 [Hz]) to the higher frequency side.

[0036] Figure 4(c) shows an example waveform of the signal S2 output from amplifier 120, and Figure 4(d) shows an example waveform of the signal S3 output from filter 130.

[0037] As explained in Figure 3, in the amplification circuit 100A, the frequency conversion switch 125 is built into the amplifier 120, which in turn has the frequency conversion switch 125 implemented inside the amplifier. The signal S1 modulated by the input selector switch 110 is input to the amplifier 120. The frequency conversion switch 125 operates in coordination with the input selector switch 110 at the same frequency according to a common clock CLK. As a result, the signal S1 is amplified inside the amplifier 120, and demodulation is performed on the amplified signal simultaneously. Consequently, the amplifier 120 outputs a signal S2, which is the amplified signal S1 demodulated to frequency f1 with frequency conversion at frequency f2.

[0038] Therefore, as shown in Figure 4(c), the signal S2 has a waveform that includes a voltage signal (V2dc) with the same frequency f1 as the signal S1 input to the amplifier 120. In the example in Figure 4, since f1 = 0 [Hz], the signal S2 has a waveform that is the sum of a DC voltage component V2dc with the same frequency as the input signal Sin and an AC voltage (square wave) component V2ac at the operating frequency (frequency f2) of the frequency conversion switch 125 (S2 = V2dc + V2ac).

[0039] The AC voltage component V2ac corresponds to a signal obtained by modulating unwanted signal components such as offsets that occurred in the path from the amplifier 120 to the frequency conversion switch 125 with the operating frequency of the frequency conversion switch 125.

[0040] The signal S2 output by amplifier 120 is not a square wave AC voltage that inverts at the operating frequency (frequency f2) of the input selector switch 110, unlike the signal S2a output from amplifier 13 in the comparative example. Therefore, unlike amplifier 13 in the comparative example, amplifier 120 does not require excessive bandwidth. In other words, circuit design to ensure gain in the high-frequency range is unnecessary.

[0041] Referring to Figure 4(d), by configuring the filter 130 to have a notch at frequency f2, which is the operating frequency of the input selector switch 110 and the frequency conversion switch 125, the AC voltage component V2ac can be attenuated or removed from the signal S3 output from the filter 130. As a result, the DC voltage component V2dc of the signal S2, i.e., the DC voltage component V3 obtained by amplifying the signal S1 (in this case, a DC voltage) input to the amplifier 120, can be output from the amplification circuit 100A.

[0042] Furthermore, by providing gain to the filter 130, the overall amplification factor of the amplification circuit 100A, that is, the amplification factor of signal S3 relative to signal S1 input to the amplifier 120, can be further secured. For example, a design in which gain is provided by the capacitance ratio between multiple capacitors in a switched capacitor circuit is well known.

[0043] Next, using Figure 5, we will explain how the amplification circuit 100A according to Embodiment 1 addresses noise at a frequency of (1 / 2) of the operating frequency (frequency f2) of the input selector switch 110, which is not mentioned in Patent Document 2.

[0044] Figure 5 shows a schematic waveform diagram illustrating the operation of the amplification circuit 100A when it receives an input signal Sin from a sensor with multiple outputs.

[0045] Figure 5(a) shows two input signals, Sin1 and Sin2, from the same sensor. Each of the input signals Sin1 and Sin2 corresponds to the single input signal Sin input to the input selector switch 110 in Figure 3. In Figure 5(a), an example is shown where each of the input signals Sin1 and Sin2 is a DC voltage (i.e., f1 = 0 [Hz]). For example, the input signals Sin1 and Sin2 correspond to the output from a Hall element to which the spinning current method described in Patent Document 2 is applied.

[0046] Figures 5(b) to (d) show the waveforms of one of the input signals Sin1 and Sin2, specifically the signal S1 input to the amplifier 120 modulated by the input selector switch 110, the signal S2 output from the amplifier 120, and the signal S3 output from the filter 130, for input signal Sin1. Similarly, signals S1 to S3 are obtained for the other input signal Sin2 through processing by the input selector switch 110, amplifier 120, and filter 130. Note that the waveforms of signals S1 to S3 in Figures 5(b) to (d) are illustrative examples of multiple signals shown in parallel in Figure 3, similar to Figure 4.

[0047] Figure 5 shows an example waveform where residual offset due to manufacturing variations in the sensor (Hall element) occurs, which could not be eliminated by the modulation operation using the input selector switch 110. As mentioned above, this residual offset can occur in the spinning current method, but it was not anticipated in the operation examples in Patent Document 2 and Figure 4.

[0048] As a result, the signal S1 in Figure 5(b) is a waveform obtained by combining (adding) the AC voltage component V1x, which corresponds to the signal S1 in Figure 4(a), and the AC voltage component V1y, which has a frequency f3 (f3 = f2 / 2), which is half the operating frequency (frequency f2) of the input selector switch 110. This AC voltage component V1y corresponds to the signal obtained by modulating the above residual offset (DC component) with the aforementioned frequency f3.

[0049] When the signal S1 in Figure 5(b) is input to the amplifier 120, the frequency conversion switch 125 operates according to the clock CLK common to the input selector switch 110, so that the signal S3 becomes a waveform similar to that in Figure 4(c), including the DC voltage component V2dc obtained by demodulating the signal S1 input to the amplifier 120.

[0050] In the signal S3 in Figure 5(c), in addition to the AC voltage (square wave) component V2ac (frequency f2) similar to Figure 4(c), which modulates unwanted signal components such as offsets generated in the path to the frequency conversion switch 125 inside the amplifier 120, the noise component at frequency f3 included in the signal S1 remains unsuppressed, so the AC voltage component V2acx at frequency f3 is further superimposed as noise (S2 = V2dc + V2ac + V2acx).

[0051] This AC voltage component V2acx (frequency f3) cannot be attenuated or removed by the filter 130 which has a notch at frequency f2.

[0052] Therefore, it is preferable that the filter 130 in Figure 3 be configured to have the frequency characteristics shown in Figure 6 in order to attenuate or remove both the frequency f2 and frequency f3 components.

[0053] As shown in Figure 6, it is preferable that the filter 130 is configured to have notches at both frequency f2, which is the operating frequency of the input selector switch 110 and the frequency conversion switch 125, and frequency f3 (f3 = f2 / 2). Typically, by configuring the filter 130 using a second-order or higher resonant switched-capacitor filter (e.g., a Fleisher-Laker filter) that operates in coordination with the input selector switch 110 and the frequency conversion switch 125 according to the clock CLK, a frequency characteristic having notches at both frequencies f2 and f3 can be achieved.

[0054] As shown in Figure 5(d), the filter 130 has the frequency characteristics shown in Figure 6, so that the signal S3 can have a waveform similar to Figure 4(d), which includes a DC voltage component V3 demodulated from the signal S1, with the noise at frequency f2 (AC voltage component V2ac) caused by the offset that occurred in the path to the frequency conversion switch 125 inside the amplifier 120 and the noise at frequency f3 (AC voltage component V2acx) caused by the residual offset that could not be attenuated or removed from the input signal Sin attenuated or removed.

[0055] As described above, according to the amplification circuit of Embodiment 1, the input signal is modulated by the input selector switch 110 and input to an amplifier 120 equipped with a frequency conversion switch 125 that operates in coordination with the input selector switch 110 at the same frequency. By performing signal amplification and demodulation by frequency conversion within the amplifier 120, an excessive bandwidth is not required for the amplifier 120. Furthermore, by passing the output signal of the amplifier 120 through a filter 130 that attenuates or removes components of the operating frequency (frequency f2) of the input selector switch 110 and the frequency conversion switch 125, the input signal can be amplified while efficiently attenuating noise. As a result, the circuit area and power consumption of the amplification circuit 100A can be reduced.

[0056] Furthermore, as explained in Figures 5 and 6, by configuring the filter 130 to suppress (attenuate or remove) both the operating frequency (frequency f2) of the input selector switch 110 and the frequency conversion switch 125, and its (1 / 2) frequency (frequency f3), it becomes possible to attenuate or remove noise caused by residual offset that could not be suppressed by modulation by the input selector switch 110, such as when applying a spinning current method to the Hall element.

[0057] In this embodiment, signals S1, S2, and S3 correspond to one embodiment of the "first signal," "second signal," and "third signal," respectively, and frequencies f1, f2, and f3 correspond to one embodiment of the "first frequency," "second frequency," and "third frequency," respectively.

[0058] A modified example of Embodiment 1. Figure 7 is a block diagram illustrating an example configuration of an amplifier circuit 100B according to a modified example of Embodiment 1.

[0059] As shown in Figure 7, the amplifier circuit 100B further includes a feedback circuit 140 in addition to the configuration of the amplifier circuit 100A shown in Figure 1.

[0060] In the amplification circuit 100A, unwanted signal components such as offsets (hereinafter referred to as the first unwanted signal component) generated by the path from the amplifier 120 to the frequency conversion switch 125 are modulated by the operating frequency of the frequency conversion switch 125, as explained in Figure 2. Therefore, this first unwanted signal component can be attenuated or removed by the filter 130 and is not included in the signal S3.

[0061] On the other hand, unwanted signal components such as offsets generated in the amplifier 120 by the path after the frequency conversion switch 125 (hereinafter referred to as the second unwanted signal component) are included in the signal S3 without being modulated. Normally, this second unwanted signal component is relatively small and does not pose a problem, but in the amplification circuit 100B, by providing the feedback circuit 140, unwanted signal components generated in the path after the frequency conversion switch 125 in the amplifier 120 can also be suppressed.

[0062] The feedback circuit 140 can be configured to extract unwanted signal components (frequency f4) by frequency-converting the signal S3 output from the filter 130, and to return the signal S4 obtained by integrating these signal components to the input side of the amplifier 120. The frequency component (frequency f4) extracted by the feedback circuit 140 can be predetermined by the frequency at which the signal S3 is frequency-converted. Frequency f4 corresponds to the "fourth frequency".

[0063] As a result, the amplifier 120 receives a signal that is the sum of the signal S2 from the input selector switch 110 and the signal S4 from the feedback circuit 140. Consequently, the second unwanted signal component is canceled out by the signal S4 from the feedback circuit 140 and removed from the signal S2.

[0064] As a result, according to the modified amplifier circuit 100B of Embodiment 1, in addition to the effects of the amplifier circuit 100A of Embodiment 1, it is possible to output a signal S3 from which unwanted signal components generated by the path after the frequency conversion switch 125 within the amplifier 120 have also been removed.

[0065] Embodiment 2. Embodiment 2 describes a Hall element sensor using an amplification circuit according to Embodiment 1 and its modified form.

[0066] Figure 5 is a block diagram illustrating an example configuration of the Hall element sensor 200 according to Embodiment 2.

[0067] As shown in Figure 5, the Hall element sensor 200 comprises a plurality of Hall elements 210, an amplification circuit 100 (collectively referred to as 100A and 100B) according to Embodiment 1 or a modified version thereof, and an output circuit 220.

[0068] As is well known, each Hall element 210, when placed in a magnetic field with current flowing through it, can utilize the Hall effect to generate an electromotive force in a direction perpendicular to the current and the magnetic field, thereby outputting a potential difference signal corresponding to the magnetic field strength as the output voltage of the bridge circuit.

[0069] When the amplification circuit 100 receives the output signal from the Hall element 210 as the input signal Sin, it can output a signal S3 which is the input signal Sin amplified after efficiently attenuating the noise.

[0070] In this case, as explained in Figure 5, the input signal Sin from the Hall element 210 operated in the spinning current method can also be amplified by attenuating the noise component at frequency f3, which is half the operating frequency (frequency f2) of the input selector switch 110.

[0071] The output circuit 220 can output a sensor detection signal Sout from the Hall element sensor 200 based on the signal output from the filter 130 of the amplification circuit 100. For example, the output circuit 220 can be configured to perform single-phase differential conversion on two signals S3 and drive an external load to which the detection signal is output. Typically, the output circuit 220 can be configured using a second-order multiple feedback filter.

[0072] Furthermore, the output circuit 220 can suppress signals other than the potential difference signal generated in the Hall element 210. For example, if the filter 130 inside the amplification circuit 110 is configured as a resonant switched-capacitor filter, noise will be generated at the operating frequency of the filter 130. However, by configuring the output circuit 220 to have a frequency characteristic that attenuates the operating frequency of the filter 130, this noise can also be suppressed by the filtering function of the output circuit 220.

[0073] Thus, according to Embodiment 2, the Hall element sensor can be miniaturized and power-efficient by using an amplification circuit that reduces circuit area and power consumption, thereby amplifying the output signal (potential difference signal) of the Hall element sensor with an amplification circuit according to Embodiment 1 and its modified version.

[0074] <Note> The embodiments and variations described above include the following technical concepts.

[0075] [Configuration 1] Amplifier circuit (100A), An amplifier (120) with a built-in frequency conversion switch (125), The system includes an input selector switch (110) that modulates an input signal (Sin) of a first frequency (f1) into a first signal (S1) of a predetermined second frequency (f2) and inputs it to the amplifier. The amplifier is configured such that, when the frequency conversion switch operates in coordination with the input selector switch, the first signal is amplified within the amplifier, and the amplified signal is demodulated by the frequency conversion switch operating at the second frequency, thereby outputting a second signal at the first frequency. The aforementioned amplification circuit is An amplification circuit further comprising a filter (130) configured to attenuate or remove a component of the second frequency from the second signal output from the amplifier.

[0076] [Configuration 2] The amplifier circuit according to configuration 1, wherein the filter (130) operates in coordination with the input selector switch (110) and the frequency conversion switch (125), and includes a switched capacitor circuit configured to have a notch at the second frequency (f2).

[0077] [Configuration 3] The amplifier circuit according to configuration 1 or 2, wherein the filter (130) is configured to further attenuate or remove a component of the second signal (S2) at a third frequency (f3) which is half the second frequency (f2).

[0078] [Structure 4] The amplifier circuit according to configuration 3, wherein the filter (130) operates in coordination with the input selector switch (110) and the frequency conversion switch (125), and includes a second-order or higher resonant switched capacitor circuit configured to have notches at both the second frequency (f2) and the third frequency (f3).

[0079] [Composition 5] The amplifier circuit according to any one of claims 1 to 4, wherein the filter (130) is configured to have gain.

[0080] [Composition 6] An amplifier circuit (100B) according to any one of configurations 1 to 5, further comprising a feedback circuit (140) that extracts a signal component of a predetermined fourth frequency (f4) from the third signal (S3) output from the filter and returns it to the input of the amplifier (120).

[0081] [Composition 7] The amplifier circuit described in any one of configurations 1 to 6, wherein the first frequency (f1) is 0 [Hz].

[0082] [Structure 8] One or more Hall elements (210), An amplifier circuit (100) according to any one of configurations 1 to 7 that operates by receiving the output signal of the Hall element as the input signal (Sin), The amplifier circuit includes an output circuit (220) that receives the signal that has passed through the filter (130) and generates a sensor output signal (Sout), The output circuit is a Hall element sensor (200) configured to have a filter function for suppressing noise generated in the amplification circuit.

[0083] The embodiments disclosed herein should be considered in all respects to be illustrative and not restrictive. The scope of this disclosure is indicated by the claims rather than the foregoing description, and all modifications within the meaning and scope equivalent to the claims are intended. [Explanation of symbols]

[0084] 10♯, 100, 100A, 100B Amplifier circuits, 11 Bridge circuit, 12, 110 Input selector switches, 13 Amplifier, 14 Demodulator, 15 Chopper switch, 16 Output buffer, 120 Amplifier, 125 Frequency conversion switch, 130 Filter, 140 Feedback circuit, 200 Hall element sensor, 210 Hall element, 220 Output circuit, CLK Clock, S1~S4 Signals, Sout Sensor output signal, Sin Input signal (Amplifier circuit).

Claims

1. It is an amplification circuit, An amplifier with a built-in frequency conversion switch, The system includes an input selector switch that modulates a first frequency input signal into a predetermined second frequency first signal and inputs it to the amplifier. The amplifier is configured such that, when the frequency conversion switch operates in coordination with the input selector switch, the first signal is amplified within the amplifier, and the amplified signal is demodulated by the frequency conversion switch operating at the second frequency, thereby outputting a second signal at the first frequency. The aforementioned amplification circuit is An amplification circuit further comprising a filter configured to attenuate or remove a component of the second frequency from the second signal output from the amplifier.

2. The amplifier circuit according to claim 1, wherein the filter includes a switched capacitor circuit configured to operate in coordination with the input selector switch and the frequency conversion switch and to have a notch at the second frequency.

3. The amplifier circuit according to claim 1, wherein the filter is configured to further attenuate or remove a component of the second signal at a third frequency that is half the second frequency.

4. The amplifier circuit according to claim 3, wherein the filter includes a second-order or higher resonant switched-capacitor circuit configured to operate in coordination with the input selector switch and the frequency conversion switch, and to have notches at both the second frequency and the third frequency.

5. The amplifier circuit according to any one of claims 1 to 4, wherein the filter is configured to have gain.

6. The amplification circuit according to any one of claims 1 to 4, further comprising a feedback circuit that extracts a signal component of a predetermined fourth frequency from the third signal output from the filter and returns it to the input of the amplifier.

7. The amplification circuit according to any one of claims 1 to 4, wherein the first frequency is 0 [Hz].

8. One or more Hall elements, An amplification circuit according to any one of claims 1 to 4, which operates by receiving the output signal of the Hall element as the input signal, The amplifier circuit includes an output circuit that receives the signal that has passed through the filter and generates a sensor output signal, The output circuit is configured to have a filter function for suppressing noise generated in the amplification circuit, and is a Hall element sensor.

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