Method for producing a semiconductor device and semiconductor device

Abstract

Method for producing a semiconductor device comprising the steps of - providing a semiconductor body (1) of SiC with a top side (10); - producing a silicon containing interface layer (Figure 1) directly on the top side (10), a thickness of the interface layer is at most 5 nm; - applying a nitride-based dielectric layer (2) directly on the silicon containing interface layer, the dielectric layer (2) is applied with a thickness of at least 5 nm; - annealing the dielectric layer (2) in an annealing atmosphere which contains hydrogen at a temperature of at least 1050 °C, incorporating hydrogen atoms at nitrogen vacancies in the nitride-based dielectric (2); and - applying an electrically conductive layer (3 Fig. 6) on the annealed dielectric layer (2).

Description

[0001] Description

[0002] Method for producing a semiconductor device and semiconductor device

[0003] The present disclosure relates to a method for producing a semiconductor device and to a semiconductor device.

[0004] Document US 2019 / 0296146 Al relates to a semiconductor device including a silicon carbide layer, a gate electrode, a gate insulating layer disposed between the silicon carbide layer and the gate electrode, a first region disposed in the silicon carbide layer and containing nitrogen, and a second region disposed between the first region and the gate insulating layer, and containing at least one element selected from the group consisting of nitrogen, phosphorus, arsenic, antimony, scandium, yttrium, lanthanum, lanthanoids, hydrogen, deuterium, and fluorine.

[0005] Document US 2020 / 0220001 Al relates to a semiconductor device including a silicon carbide layer having a first and a second planes, a first electrode located on a side of the first plane, a second electrode located on a side of the second plane, a gate electrode, an aluminum nitride layer containing an aluminum nitride crystal between the second silicon carbide region and the gate electrode, and an insulating layer between the aluminum nitride layer and the gate electrode and having a wider band gap than the aluminum nitride layer.

[0006] Document US 2012 / 0223338 Al relates to a method of manufacturing a semiconductor device including the steps of forming a silicon oxide film on a silicon carbide substrate, annealing the silicon carbide substrate and the silicon oxide film in gas containing hydrogen, and forming an aluminum oxynitride film on the silicon oxide film after the annealing of the silicon carbide substrate and the silicon oxide film.

[0007] Document US 2020 / 0091297 Al relates to a semiconductor device including a silicon carbide layer, a gate electrode, a gate insulating layer provided between the silicon carbide layer and the gate electrode, and a region located between the silicon carbide layer and the gate insulating layer, the region having a first bonding structure, the first bonding structure including a threefold coordinated first nitrogen atom bonded to three first silicon atoms, a threefold coordinated second nitrogen atom bonded to three second silicon atoms, and a threefold coordinated third nitrogen atom bonded to three third silicon atoms, the first to third nitrogen atoms being adjacent to each other in the first bonding structure.

[0008] Document US 2023 / 0187525 Al discloses an insulated gate structure.

[0009] One object to be achieved is to provide a method for producing a semiconductor device with the help of which the flat band voltage (Vpg) can be engineered. Vpg influences Vpp and this in turn influences the device performance. A further object to be achieved is to provide a semiconductor device with an engineered flat band voltage, thereby having a proper threshold voltage in order to enhance the device's blocking and on-state performance.

[0010] First, the method for producing a semiconductor device is specified. According to an embodiment, the method for producing a semiconductor device comprises a step of providing a semiconductor body with a surface formed at least partially of SiC. In a further step, a nitride-based dielectric layer is applied on this surface. Then, the dielectric layer is annealed in an atmosphere which contains hydrogen. The surface may also be referred to as the top side.

[0011] According to an embodiment, the method for producing a semiconductor device comprises the following steps, for example, in the stated order:

[0012] - providing a semiconductor body of SiC having a top side;

[0013] - producing a silicon containing interface layer directly on the top side, a thickness of the interface layer is at most 5 nm;

[0014] - applying a nitride-based dielectric layer directly on the interface layer;

[0015] - annealing the dielectric layer in an atmosphere which contains hydrogen at a temperature of at least 1050 °C, and

[0016] - applying an electrically conductive layer, which is in particular a gate electrode, on the annealed dielectric layer.

[0017] For example, the producing the silicon containing interface layer includes:

[0018] - producing a silicon layer directly on the top side, a thickness of the silicon layer is at most 5 nm, and

[0019] - annealing the silicon layer in an atmosphere containing nitrogen at a temperature of, for example, at least 1200°C to create the silicon containing interface layer. For example, the silicon layer is a layer of amorphous Si. The thickness of the silicon layer is, for example, one monolayer or at least two monolayers or at least 1 nm. Alternatively or additionally, said thickness is at most 5 nm or at most 3 nm or at most 2 nm.

[0020] The silicon layer may either be produced from the SiC of the semiconductor body, or the silicon layer is produced by applying silicon onto the top side. It is possible that the silicon for the silicon layer is applied by CVD or PVD, for example .

[0021] For example, the silicon layer is annealed at a temperature of at least 1000 °C or of at least 1200 °C. Said temperature may be at most 1600 °C or at most 1400 °C.

[0022] For example, the silicon layer is annealed in an atmosphere containing nitrogen. The atmosphere may consist of nitrogen. Here and in the following in this context 'consists of' may mean, for example, that a mass proportion of all other substances than mentioned is at most 1% or is at most 0.1% or is at most 0.01%. The for annealing the silicon layer atmosphere may be at atmospheric pressure + / - 20%, for example .

[0023] For example, an average concentration of carbon atoms and / or of nitrogen atoms in the interface layer is at most 1 x 10^-^ cm-3oris ap most 5 x lO^ cm-3oris at most 2 x lO^ cm-3. These values may be referred to as free of carbon.

[0024] For example, the interface layer is of silicon nitride. Especially, the interface layer is of SixNy with

[0025] 2.5 < x < 3.5 and 3.3 < y < 4.7, like stoichiometric SigNi. In this case, the average concentration of carbon atoms inthe interface layer is at most 1 x 1018cm-3or is at most5 x 1016cm-3or is at most 2 x 1015cm-3.Thus, by the annealing in the nitrogen atmosphere, the interface layer made of silicon nitride, for example, may be created. It is possible that the electrically conductive layer is a gate electrode. In this case, for example, the electrically conductive layer is of poly-Si or of a metal. If the electrically conductive layer is made of poly-Si, then it may be annealed at a temperature of at least 500 °C. The latter annealing may be at a temperature less than during producing the silicon layer and / or less than during annealing the dielectric layer. Further, it is possible that the dielectric layer is applied by a method different from producing the silicon containing interface layer. Especially, the dielectric layer may be applied by chemical vapor deposition, CVD, or by physical vapor deposition, PVD. On the contrary, for example, the silicon layer may be produced by thermal decomposition of the SiC of the semiconductor body as well as CVD and PVD. For example, a thickness of the dielectric layer as applied is at least 5 nm or is at least 10 nm or is at least 20 nm. Alternatively or additionally, said thickness is at most 300 nm or at most 200 nm or at most 100 nm. It is possible that the dielectric layer is applied with its final material composition; this means, for example, that indeed a nitride is grown on the silicon containing interface layer and not just a raw material layer the dielectric layer is later produced from. Conventional SiC semiconductor devices, like SiC MOSFETs orSiC IGBTs, usually have SiO2as the dielectric layer. Due tothe defective interface between the dielectric layer and the SiC, such devices suffer from limited mobility values causinghigh RONvalues. To minimize the defect density at theinterfaces SiO2can be annealed in NO or N2O ambient toimprove the interface with the SiC. However, this treatment yields limited improvements in terms of mobility.To decrease the RON, it is also possible to implement high-kinsulators, e.g. as gate dielectrics. Such materials offerhigher dielectric capacitance values leading to lower RONvalues with process optimization compared to their SiO2counterparts. However, these materials suffer fromundesirably high VFBshifts (towards negative or positivevalues) when integrated into SiC semiconductor devices and annealed in inert atmospheres. Indeed, annealing of nitride-based dielectric materials ininert atmospheres (mainly N2) at high temperature (>1000°C)creates nitrogen vacancies in the dielectric layer. These defects are responsible for deep-level trap creation in thematerial, shifting VFBto undesirably high (positive ornegative) voltage levels. In the current invention, this problem is solved by hydrogen-based annealing of the nitride- based dielectric layer after its deposition. Reintroducing hydrogen into the dielectric layer replaces the nitrogen vacancies. It converts the deep traps into shallow ones,resulting in several volts, e.g. ~3V, reduction of the VFB which, in a MOSFET or IGBT, translates into lessnegative / positive VTHcharacteristics.The semiconductor body of the semiconductor device comprises SiC, e.g. 4H-SiC or 3C-SiC. For example, the semiconductor body comprises a substrate on which SiC is epitaxially grown.The substrate may be of Si, SiO2or SiC. At least a portionof the semiconductor body, e.g. the SiC thereof, may be doped, for example n-doped. A portion of a surface or the whole surface of the semiconductor body is formed of SiC, i.e. SiC is exposed at a surface of the semiconductor body. For example, the SiC portion of the surface is located at a top side of the semiconductor body or in a trench formed in the semiconductor body. The exposed SiC may be epitaxially grown SiC. The nitride-based dielectric layer is applied onto the surface which is at least partially formed of SiC. Particularly, the nitride-based dielectric layer is applied onto the SiC portion(s) of this surface. For example, the nitride-based dielectric layer is applied directly onto the exposed SiC such that it adjoins the SiC of the semiconductor body. An interface is then formed between the nitride-based dielectric layer and the semiconductor body at which SiC and the nitride-based dielectric material are in direct contact with each other. Alternatively, an interlayer may be formed between the nitride-based dielectric layer and the SiC. Theinterlayer could be if SiO2, for example. The interlayer mayhave a thickness of at most 200 nm or at most 100 nm or at most 50 nm, for example. The nitride-based dielectric layer, in the following also called “dielectric layer” is, for example, applied by vacuum deposition, like PECVD, PEALD or LPCVD.

[0026] In particular, the dielectric layer is or forms at least a part of a gate dielectric, i.e. the dielectric layer electrically insulates a gate electrode from the semiconductor body.

[0027] The nitride-based dielectric layer is, in particular, a high k dielectric layer. For example, the nitride-based dielectric layer is applied with a layer thickness between 10 nm and 1 pm, preferably between 20 nm and 200 nm.

[0028] After application of the dielectric layer, the dielectric layer is annealed in an atmosphere which contains hydrogen. In this step, hydrogen molecules come into contact with the dielectric layer and hydrogen atoms can diffuse into the dielectric layer. For example, annealing of the dielectric layer is only performed in the atmosphere containing hydrogen. Particularly, no annealing in a hydrogen-free atmosphere is performed before annealing in the atmosphere containing hydrogen.

[0029] According to a further embodiment, the atmosphere in which the dielectric layer is annealed mainly comprises or consists of nitrogen and hydrogen. For example, at least 80 at-% or at least 90 at-% or at least 99 at-% or at least 99.9 at-% of the atmosphere is formed by nitrogen (N2) and hydrogen (H2). at-% is herein used as the abbreviation of atomic percentage.

[0030] According to a further embodiment, the concentration of hydrogen in the atmosphere, in which the dielectric layer is annealed, is at least 1 at-% or at least 2 at-%. Additionally or alternatively, the concentration is at most 10 at-% or at most 6 at-%. For example, the concentration is 4 at-%.

[0031] According to a further embodiment, the dielectric layer is annealed at a temperature of at least 800°C or at least 1000°C.

[0032] According to a further embodiment, the dielectric layer is annealed at atmospheric pressure ± 20% or at atmospheric pressure ± 10%. That is, the pressure at which the dielectric layer is annealed is in the range between 811 mbar and 1216 mbar, particularly in the range between 912 mbar and 1115 mbar. The borders are included.

[0033] According to a further embodiment, the dielectric layer is annealed for at least ten minutes or at least half an hour or at least one hour in the atmosphere containing hydrogen.

[0034] According to a further embodiment, the dielectric layer comprises or consists of a nitride or oxynitride of a metal or of a nitride or oxynitride of a semiconductor material. For example, the dielectric layer is of aluminum oxynitride. Further, boron nitride or boron oxynitride is also possible as well as phosphorous nitride or phosphorous oxynitride. Especially, the dielectric layer may not be made of AIN.

[0035] According to a further embodiment, the dielectric layer comprises or consists of at least one of: silicon nitride (SigN^), silicon oxynitride (e.g. SigNgO). For example, the dielectric layer consists of silicon nitride or of silicon oxynitride. The silicon nitride or of silicon oxynitride may be a stoichiometric or a non-stoichiometric one.For example, the dielectric layer is of SimNnwith2.5 ≤ m ≤ 3.5 and 3.3 ≤ n ≤ 4.7, or the dielectric layer isof SiiNjOkwith 1.5 ≤ i ≤ 1.5, 1.5 ≤ j ≤ 1.5 and0.5 ≤ k ≤ 1.5. According to a further embodiment, the method comprises a further step of cleaning the surface which is at least partially formed of SiC. This step is performed before applying the dielectric layer. The surface is cleaned, for example, in a wet cleaning process. According to a further embodiment, the method further comprises a step of applying an electrically conductive layer onto the dielectric layer after annealing of the dielectric layer. For example, the electrically conductive layer is formed of metal or highly-doped polysilicon. The electrically conductive layer is, for example, a gate electrode of the semiconductor device. The electrically conductive layer may be applied directly onto the dielectric layer so that the electrically conductive material of the electrically conductive layer adjoins the nitride-based dielectric material of the dielectric layer. Next, the semiconductor device is specified. The semiconductor device can be produced, for example, with the method according to any of the embodiments described herein. Accordingly, all features disclosed for the method are also disclosed for the semiconductor device and vice versa. According to an embodiment, the semiconductor device comprises a semiconductor body and a nitride-based dielectric layer on the semiconductor body. At least a side of the semiconductor body facing the nitride-based dielectric layer is at least partially formed of SiC. The nitride-based dielectric layer comprises hydrogen atoms at nitrogen vacancies .

[0036] The dielectric layer is, in particular, applied directly onto a material stemming from the semiconductor body. For example, the semiconductor material of the semiconductor body adjoining the dielectric layer is at least partially, particularly completely, formed of SiC which has been modified to become the silicon containing interface layer. This means that there can be an interface at which the silicon containing interface layer adjoins the nitride-based dielectric layer and the remaining semiconductor body the silicon containing interface layer is made from.

[0037] According to a further embodiment, the concentration of hydrogen in the dielectric layer is at least 0.1 at-% or at least 0.5 at-% or at least 1 at-%. Alternatively or additionally, said concentration is at most 10 at-% or at most 5 at-% or at most 2 at-%.

[0038] According to a further embodiment, the semiconductor device is a power semiconductor device.

[0039] According to a further embodiment, the semiconductor device is an insulated gate device, particularly a transistor with an insulated gate electrode. Particularly, the dielectric layer serves as an insulation between a gate electrode and the semiconductor body. In other words, the dielectric layer forms at least a part of the gate dielectric. According to a further embodiment, the semiconductor device is a MISFET or MOSFET or an IGBT or a JFET. The IGBT can be a normal IGBT or an RC IGBT.

[0040] Hereinafter, the method for producing a semiconductor device and the semiconductor device will be explained in more detail with reference to the drawings on the basis of exemplary embodiments. The accompanying figures are included to provide a further understanding. In the figures, elements of the same structure and / or functionality may be referenced by the same reference signs. It is to be understood that the embodiments shown in the figures are illustrative representations and are not necessarily drawn to scale. Insofar as elements or components correspond to one another in terms of their function in different figures, the description thereof is not repeated for each of the following figures. For the sake of clarity, elements might not appear with corresponding reference symbols in all figures.

[0041] Figures 1 to 6 show different positions in an exemplary embodiment of the method for producing a semiconductor device,

[0042] Figure 7 and 8 show different exemplary embodiments of the semiconductor device,

[0043] Figures 9 and 10 show different measurements,

[0044] Figure 11 shows a further exemplary embodiment of the semiconductor device.

[0045] Figure 1 shows a first position in an exemplary embodiment of the method for producing a semiconductor device. A semiconductor body 1 is provided with a top side 10 and a bottom side 19, opposite to the top side 10. At least the top side 10 is formed of SiC. The semiconductor body 1 may completely consist of SiC. Particularly, the semiconductor body 1 of figure 1 consists of n-doped semiconductor material .

[0046] At the top side 10, a silicon containing interface layer 22 is produced. The interface layer 22 may especially be produced by having a nitrogen atmosphere on top of the semiconductor body 1 and by applying a temperature of at least 1200 °C. A thickness of the resulting interface layer 22 is, for example, at least one monolayer and at most 2 nm.

[0047] For simplicity of the drawings, the interface layer 22 is not shown in the following figures.

[0048] For example, the producing the silicon containing interface layer 22 includes:

[0049] - producing a silicon layer directly on the top side 10, a thickness of the silicon layer is at least one monolayer or at least two monolayers and at most 5 nm, the silicon layer may be produced by CVD or PVD, and

[0050] - annealing the silicon layer in an atmosphere containing nitrogen at a temperature of, for example, at least 1200°C to create the silicon containing interface layer which is, for example, a silicon nitride layer, like SigN^ a layer.

[0051] Concerning producing the interface layer, reference is also made to document US 2023 / 0187525 Al, the disclosure content of which is incorporated by reference, especially the disclosure content of paragraphs 57 to 60 in which the first nitride layer may correspond to the interface layer of the present application, and the second nitride layer may correspond to the nitride-based dielectric layer of the present application.

[0052] Figure 2 shows an optional position in which the interface layer 22 is cleaned. Further optionally, the top side 10 of the semiconductor body 1 can be cleaned before producing the interface layer 22.

[0053] In the position of figure 3, the semiconductor body 1 has been further processed. Particularly, p-doped base regions 12 have been formed inside the semiconductor body 1, e.g. with the help of ion implantation. Furthermore, n-doped contact regions 11 have been formed, e.g. also with the help of ion implantation. The n-doped contact regions 11 are separated and spaced from a drift region 14 of the semiconductor body 1 by the base regions 12. The drift region 14 is also n-doped. An n-doped contact layer 13 has been formed at the bottom side 19 of the semiconductor body 1.

[0054] Figure 4 shows a position in which a dielectric layer 2 is deposited directly onto the top side 10 of the semiconductor body 1. The dielectric layer 2 is a high k nitride-based dielectric layer. The dielectric layer 2 consists, for example, of SigN^. The dielectric layer 2 may have been applied by vacuum deposition. Thereby, an interface is formed between the semiconductor body 1 and the dielectric layer 2, at which the Si containing interface layer 12 and the nitride-based dielectric material adjoin each other.

[0055] Figure 5 shows a position in which the dielectric layer 2 is annealed in an atmosphere which contains hydrogen. The dielectric layer 2 is, for example, annealed at a temperature of at least 1000°C and at atmospheric pressure. For example, the atmosphere only comprises hydrogen and nitrogen and the concentration of hydrogen in the atmosphere is about 4 at-%. Annealing of the dielectric layer 2 may be done for at least half an hour, for example. During the annealing, nitrogen vacancies are formed. These nitrogen vacancies are at least partially filled with hydrogen atoms.

[0056] Figure 6 shows a position after annealing of the dielectric layer 2 and after application of an electrically conductive layer 3 in the form of a gate electrode 3 onto the dielectric layer 2. The gate electrode 3 is, for example, formed of highly-doped polysilicon. The dielectric layer 2 forms the gate dielectric.

[0057] Figure 7 shows a position after finalizing of the semiconductor device 100. The semiconductor device 100 is, in this case, MOSFET or MISFET, respectively. For finalizing the semiconductor device 100, the gate electrode 3 has further been covered by dielectric material and main electrodes 4, 5 have been applied onto the top side 10 and the bottom side 19. The first main electrode 4 electrically contacts the contact regions 11 and the second main electrode 5 electrically contacts the contact layer 13. The IGBT of figure 7 is of planar design or planar gate design, respectively .

[0058] Figure 8 shows a further exemplary embodiment of the semiconductor device 100 which can also be produced with the method described herein. In this case, the semiconductor device 100 is a MOSFET or MISFET, respectively, of a trench design or trench gate design, respectively. Here, the gate electrode 3 is arranged in trenches 6 which extend from the top side 10 into the semiconductor body 1. The gate electrode 3 inside the trenches 6 is electrically insulated from the semiconductor body 1 by the nitride-based dielectric layer 2. The semiconductor body 1 may again consist of SiC. The dielectric layer 2 has again been annealed in an atmosphere containing hydrogen and, accordingly, comprises hydrogen atoms at nitrogen vacancies.

[0059] Figures 9 and 10 show measurements of the capacitance voltage characteristics of different dielectric layers applied onto SiC epi wafers. The y-axis shows the relative capacitance C / Cmax and the x-axis shows the applied voltage Vg.

[0060] In figure 9, the dielectric layer consists of a nitride, e.g. SigN4. The curve Al shows the result when the dielectric layer 2 is annealed in a pure nitrogen atmosphere and the curve A2 shows the result when the dielectric layer is annealed in an atmosphere comprising nitrogen and hydrogen, namely about 4 at-% of hydrogen.

[0061] In figure 10, a stack of an oxide layer and a nitride-based dielectric layer is applied onto the wafer. Curve Bl shows the result of this stack being annealed in a pure nitrogen atmosphere wherein curve B2 shows the result of the dielectric layer being annealed in an atmosphere comprising nitrogen and hydrogen.

[0062] In both figures 9 and 10 it can be seen that the annealing of the nitride-based dielectric layer 2 in a hydrogen containing atmosphere results in a clear shift of Vpg towards 0 V.

[0063] Figure 11 shows a further exemplary embodiment of the semiconductor device 100. It is similar to the one of figure J. However, in this case, the contact layer 13 is p-doped so that the semiconductor device 100 constitutes an IGBT.

[0064] The embodiments shown in the Figures 1 to 8 and 11 as stated represent exemplary embodiments of the method for producing a semiconductor device and the semiconductor device; therefore, they do not constitute a complete list of all embodiments according to the method and the semiconductor device. Actual methods and semiconductor devices may vary from the embodiments shown in terms of arrangements, devices, for example.

[0065] Reference Signs

[0066] 1 semiconductor body

[0067] 22 silicon containing interface layer

[0068] 2 nitride-based dielectric layer

[0069] 3 electrically conductive layer / gate electrode

[0070] 4 first main electrode

[0071] 5 second main electrode

[0072] 6 trench

[0073] 10 top side

[0074] 11 contact region

[0075] 12 base region

[0076] 13 contact layer

[0077] 14 drift region

[0078] 19 bottom side

[0079] 100 semiconductor device

[0080] Al, A2 curves

[0081] Bl, B2 curves

Claims

Claims1. Method for producing a semiconductor device (100) comprising the steps of- providing a semiconductor body (1) of SiC with a top side (10);- producing a silicon containing interface layer (22) directly on the top side (10), a thickness of the interface layer (22) is at most 5 nm;- applying a nitride-based dielectric layer (2) directly on the silicon containing interface layer (22), the dielectric layer (2) is applied with a thickness of at least 5 nm;- annealing the dielectric layer (2) in an annealing atmosphere which contains hydrogen at a temperature of at least 1050 °C; and- applying an electrically conductive layer (3) on the annealed dielectric layer (2).

2. Method according to claim 1, wherein- the dielectric layer (2) is of SigN4 or of SigNgO.

3. Method according to claim 1 or 2, wherein- the annealing atmosphere consists of nitrogen and hydrogen and the concentration of hydrogen in the annealing atmosphere is at least 1 at-% and at most 10 at-%.

4. Method according to any one of the preceding claims, wherein- the silicon containing interface layer (22) is produced in an intermediate atmosphere consisting of or comprising nitrogen and the finished interface layer is of silicon nitride, and the producing the silicon containing interface layer (22)includes:- producing a silicon layer directly on the top side (10), a thickness of the silicon layer is at most 5 nm, and- annealing the silicon layer in an atmosphere containing nitrogen at a temperature of at least 1200°C to create the silicon containing interface layer (22).

5. Method according to any one of the preceding claims, wherein- the dielectric layer (2) is annealed at atmospheric pressure ± 20%.

6. Method according to any one of the preceding claims, wherein- the dielectric layer (2) is applied by chemical vapor deposition, CVD, or by physical vapor deposition, PVD.

7. Method according to any one of the preceding claims, wherein- the dielectric layer (2) is applied with a thickness of at most 200 nm .

8. Method according to at least one embodiment further comprising- applying a further dielectric layer on the electrically conductive layer (3).

9. Method according to claim 8, wherein- the dielectric layer (2) is a gate dielectric and- the electrically conductive layer (3) is a gate electrode, and the method further comprises- applying a first main electrode (4) on the further dielectric layer.

10. Semiconductor device (100) comprising- a semiconductor body (1) of SiC having a top side (10),- a silicon containing interface layer (22) directly at the top side (10) and having a thickness of at most 5 nm,- a nitride-based dielectric layer (2) directly on the silicon containing interface layer (22) having a thickness of at least 5 nm, and- an electrically conductive layer (3) directly on the dielectric layer (2), wherein- the nitride-based dielectric layer (2) comprises hydrogen atoms at nitrogen vacancies.

11. Semiconductor device (100) according to claim 10, wherein- the concentration of hydrogen in the nitride-based dielectric layer (2) is at least 0.1 at-%.

12. Semiconductor device (100) according to any one of claims 10 and 11, wherein- the semiconductor device (100) is a power semiconductor device.

13. Semiconductor device (100) according to any one of claims 10 to 12, wherein- the semiconductor device (100) is an insulated gate device,- the nitride-based dielectric layer (2) forms at least a part of the gate dielectric.

14. Semiconductor device (100) according to claim 13, wherein- the semiconductor device (100) is a MOSFET or a MISFET or an IGBT.

15. Semiconductor device (100) according to any one of claims 10 to 14, which is produced by the method of any one of claims 1 to 9.

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