Novel silicon-on-insulator wafer and preparation method therefor

By preparing TRL or porous silicon on a silicon wafer and injecting hydrogen, combining low-temperature bonding and high-temperature peeling, a new type of silicon wafer on insulator is formed, which solves the problem of insufficient backgate leakage and deposition processes, and achieves lower backgate leakage and smoother bonding surfaces, improving the regulation capability of RF circuits.

WO2025138554A1 Publication Date: 2025-07-03INST OF MICROELECTRONICS CHINESE ACAD OF SCI LTD
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Patent Information

Application Number
PCT/CN2024/094949
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2023-12-25
Filing Date
2024-05-23
Publication Date
2025-07-03

AI Technical Summary

Technical Problem

In the existing RF circuit structure, there is a large backgate leakage current in the backgate region, which affects the backgate regulation capability. The existing SOI wafer deposition process has problems such as poor step coverage, low surface flatness, and slow output.

Method used

The method of preparing TRL or porous silicon on a silicon wafer and injecting hydrogen is used to form a hydrogen-injected silicon wafer, and then a new type of silicon wafer on insulator is formed through low-temperature bonding and high-temperature peeling. The specific steps include growing SiO2 as BOX2 and BOX1, and subjecting hydrophilic treatment and high-temperature peeling to form a new RFSOI structure.

Benefits of technology

It achieves lower back gate leakage capability, and the bonding surface is smoother, flatter and even, improving the back gate control capability of RF circuits.

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Abstract

The present invention provides a novel silicon-on-insulator wafer and a preparation method therefor. According to the present invention, the preparation method for a novel silicon-on-insulator wafer comprises the following steps: S1: preparing a TRL or porous silicon on and injecting hydrogen into a silicon wafer to form a hydrogen-injected silicon wafer; S2: growing SiO2 as BOX2 on a substrate, and flipping the hydrogen-injected silicon wafer over to undergo low-temperature bonding with BOX2; S3: after high-temperature stripping, growing SiO2 as BOX1 on the TRL or porous silicon; and S4: injecting hydrogen into the silicon wafer, then flipping the silicon wafer over to undergo low-temperature bonding with BOX1, and, after high-temperature stripping, forming SOI to obtain a novel silicon-on-insulator wafer. The novel silicon-on-insulator wafer of the present invention has lower back gate leakage.
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