Task scheduling method capable of realizing energy consumption sensing under reliability constraints

Abstract

The present invention belongs to the technical field of applications of heterogeneous multi-core systems, in particular relates to a task scheduling method capable of realizing energy consumption sensing under reliability constraints. The method comprises: constructing a heterogeneous multi-core system model, comprising a task model, an energy consumption model and a reliability model; on the basis of the heterogeneous multi-core system model, determining the execution priority of a task; performing first-stage task duplication on the task, ensuring that the reliability value of each subtask is higher than a system reliability requirement, and obtaining the initial number of copies of the task; if an actual reliability value of a system is less than the system reliability requirement, performing second-stage task duplication on the task, so as to obtain the final number of copies of the task; and on the basis of the execution priority of the task, assigning all the copies of the task to corresponding processor cores, and then on the basis of DPM technique use conditions, switching the processor cores from an idle mode to a sleep mode, so as to reduce power consumption. The present invention realizes the joint optimization scheduling for a heterogeneous multi-core system with respect to reliability and low power consumption, and has wide application prospects in heterogeneous multi-core systems.

Description

An Energy-Aware Task Scheduling Method under Reliability Constraints Technical Field

[0001] This invention belongs to the field of heterogeneous multi-core system application technology, specifically relating to an energy consumption-aware task scheduling method under reliability constraints. Background Technology

[0002] The development of processor architecture is one of the important directions in the field of computer science. It has evolved from single-core to multi-core and finally realized the heterogeneous multi-core architecture. Heterogeneous multi-core processors have diverse functions and characteristics. Compared with single-core processors and homogeneous multi-core processors, heterogeneous multi-core processors can adapt to diverse application requirements. They can allocate tasks to the most suitable cores for processing according to the characteristics of the task, thereby optimizing task execution and improving the overall efficiency and performance of the system.

[0003] With the continuous advancement of semiconductor technology and the rapid increase in computing demands, heterogeneous multi-core processors have become an important component of modern computer systems. Against this backdrop, the reliability and low-power design of heterogeneous multi-core processors have become a research hotspot. In heterogeneous multi-core processors, reliability refers to the system's ability to maintain good operating conditions under various workloads and environmental conditions, while energy efficiency optimization refers to maintaining good performance while minimizing power consumption.

[0004] Currently, the joint optimization of reliability and energy consumption has become one of the key research focuses in heterogeneous multi-core processor systems. However, there are challenges and trade-offs in optimizing reliability and low power consumption in heterogeneous multi-core processors. Simultaneously considering reliability and low power consumption in heterogeneous multi-core processors is not easy. This is because improving system reliability often requires increasing system redundancy, which leads to additional power consumption. For example, adding redundant computing or storage units to the system. However, this will increase the overall power consumption of the system because additional hardware resources are needed for redundancy backup. On the other hand, to reduce power consumption, Dynamic Voltage and Frequency Scaling (DVFS) technology can be used to reduce the processor's operating frequency and voltage. However, reducing voltage and frequency may cause the system to fail to meet performance requirements under high loads, increasing the probability of transient failures and thus reducing system reliability.

[0005] In system design, when there are multiple optimization objectives (such as real-time performance, energy consumption, reliability, thermal design power (TDP), etc.), one objective is typically chosen as the primary constraint, while the others are treated as secondary objectives. This approach maximizes the value of the secondary objectives while satisfying the primary constraint. This helps achieve a balance between different objectives, ensuring the system reaches its optimal state as much as possible under the primary constraint. For the joint optimization problem of reliability and energy consumption at the task scheduling level, considering that the success rate of task execution in any system cannot reach 100%, a system reliability requirement R is usually set. req When the actual reliability value R of the system sys A system is considered reliable only when its reliability requirement is not less than or equal to the system's reliability threshold. The MaxRe algorithm and the RR algorithm are two classic task scheduling algorithms with reliability constraints; both algorithms aim to ensure system reliability R. sys The problem is transformed into a subtask reliability problem to meet the system reliability requirements. However, in order to meet the system reliability requirements, both algorithms will perform an excessive task copying process, thereby introducing a lot of redundancy and wasting system resources. Summary of the Invention

[0006] To address the shortcomings of existing technologies, this invention proposes an energy consumption-aware task scheduling method under reliability constraints, which includes:

[0007] S1: Construct a heterogeneous multi-core system model, including a task model, an energy consumption model, and a reliability model;

[0008] S2: Based on a heterogeneous multi-core system model, determine the execution priority of tasks;

[0009] S3: Perform the first phase of task replication to ensure that the reliability value of each subtask is higher than the system reliability requirement, and obtain the initial number of task replicas;

[0010] S4: If the actual system reliability value is less than the system reliability requirement, perform the second stage of task replication to obtain the final number of task replicas; otherwise, proceed to step S5.

[0011] S5: Allocate all task copies to the corresponding processor cores according to the task execution priority. Then, based on the DPM technology usage conditions, i.e., if the processor idle time is greater than the critical time, switch the processor core from idle mode to hibernation mode to reduce power consumption.

[0012] Preferably, the task model includes: introducing a directed acyclic graph (DAG) to represent a periodic parallel real-time task with priority constraints, and using a triple G = (N, W, E) to represent the DAG task with priority constraints; where N = {n1, n2, ..., n}M Let} be the task set, M represent the number of tasks in the task set, and n M Let W represent the M-th subtask of the DAG, where W is an M×U matrix, U represents the number of processor cores, and the elements w in the matrix represent the M-th subtask. i,p This indicates that task n i In processor core c p The worst execution time; E is an M×M matrix representing the set of communication times between constrained tasks, with elements in the matrix represented by e. i,j Let represent the i-th subtask n. i and the j-th subtask n j The communication overhead is zero if two tasks are assigned to the same processor core.

[0013] Preferably, the energy consumption model includes: each core of the processor can operate in working mode, idle mode, and sleep mode; when the processor core is operating in working mode, the total power consumption p total Represented as: p total =p s +λ(ρc eff V 2 f+p ind )

[0014] Where, p s Represents static power consumption, λ represents the coefficient, and c eff The average switched capacitance is represented by V, the operating voltage is represented by f, and the operating current is represented by p. ind Indicates power consumption independent of speed;

[0015] When the processor is in an idle state with no tasks executing, the critical time t for the processor to switch from the idle state to the sleep state. crit Represented as:

[0016] Among them, E sw This indicates the switching overhead.

[0017] Preferably, the reliability model includes:

[0018] Single task node n i In processor core c p Reliability R during execution i,p Represented as:

[0019] Where, λ p Indicates processor core c p constant failure rate per unit time, w i,p Represents task n i In processor core c pWorst execution time;

[0020] After the task is copied, task n, which has multiple backup tasks, i Reliability R(n) i ) is represented as:

[0021] Where R(n) x i,p ) represents task n i The xth copy task is in processor core c p Reliability during execution, num i Represents task n i number of copies;

[0022] System reliability R sys Represented as:

[0023] Where M represents the number of tasks in the task set.

[0024] Preferably, the formula for calculating the execution priority of a task is as follows:

[0025] Among them, rank u (n i ) represents task n i Execution priority Represents task n i The average of the worst execution time across all processor cores, e i,j Represents task n i and task n j The resulting communication overhead, suc(n i ) represents n i The direct successor task, rank u (n j ) represents task n j The execution priority.

[0026] Preferably, the first-stage task replication process includes:

[0027] S31: Calculate the reliability value of the current subtask on all processor cores and mark all processor cores as unmapped and unused.

[0028] S32: Copy the current task and recalculate its reliability value. Select the processor core that produces the highest reliability value and is not currently mapped as the core for task mapping, and mark that the processor core has been mapped and used. Continue until the reliability value of the current task is greater than the system reliability requirement, and obtain the minimum redundancy of the current task.

[0029] S33: Each task in the system executes steps S31-S32 to obtain the initial number of task replicas.

[0030] Preferably, the second-stage task replication process includes:

[0031] S41: Each task selects the processor core that produces the highest reliability value from the remaining unmapped processor cores as the pre-selected processor core; calculates the updated task reliability value R'(n i );

[0032] S42: For each task, the reliability value R(n) before the update is used. i ) and the updated task reliability value R′(n i Recalculate the system reliability value R i sys ;

[0033] S43: Select the task with the highest system reliability value for replication, and map the newly replicated task copy to the pre-selected processor core of that task;

[0034] S44: R'(n) i Assign the value to R(n) i The maximum system reliability value R is determined. i sys The system reliability value R is assigned to the current system. sys ;

[0035] S45: Repeat steps S41-S44 until R sys >R req This yields the final number of mission replicas; where R req This indicates the system reliability requirements.

[0036] Furthermore, the formula for recalculating the system reliability value is expressed as:

[0037] Where R(n) j ) represents the task n before the update. j The task reliability value, where M represents the number of tasks in the task set.

[0038] The beneficial effects of this invention are as follows: The task scheduling method proposed in this invention adopts a two-stage task replication strategy to ensure minimal task redundancy in the system while simultaneously meeting system reliability requirements. Finally, DPM technology is introduced to optimize system energy consumption. This method, through a reasonable task replication strategy, enables the system to significantly reduce redundant tasks and effectively optimize power consumption while meeting system reliability requirements, demonstrating high practicality and feasibility. This invention achieves joint optimization scheduling for reliability and low power consumption in heterogeneous multi-core systems, and has broad application prospects in such systems. Attached Figure Description

[0039] Figure 1 is a diagram illustrating the execution structure of the scheduling method of the present invention.

[0040] Figure 2 is a simple DAG task diagram illustrated in this invention;

[0041] Figure 3 is a flowchart of the first-stage task replication mechanism in this invention;

[0042] Figure 4 is a flowchart of the second-stage task replication mechanism in this invention;

[0043] Figure 5 shows the task allocation results of the present invention;

[0044] Figure 6 is an example of a slack block in the allocation result of Figure 5 in this invention that can use DPM technology. Detailed Implementation

[0045] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0046] This invention proposes an energy consumption-aware task scheduling method under reliability constraints, as shown in Figure 1. The method includes:

[0047] S1: Construct a heterogeneous multi-core system model, including a task model, an energy consumption model, and a reliability model.

[0048] Modeling of heterogeneous multi-core systems involves establishing task models, power consumption models, and reliability models; specifically:

[0049] Building a task model:

[0050] In this embodiment of the invention, a directed acyclic graph (DAG) is introduced to represent periodic parallel real-time tasks with priority constraints. The invention uses a triple G = (N, W, E) to represent a DAG task with priority constraints, where N = {n1, n2, ..., n}. M Let} be a task set, M represent the number of tasks in the task set, and n be the number of task nodes. i ∈N represents a subtask of the DAG. W is an M×U matrix, where U represents the number of processor cores, and the elements w in the matrix are... i,p This indicates that task n i In processor core c p The worst-case execution time (WCET) is obviously significantly different for the same task n due to the heterogeneity of heterogeneous multi-core processors. i WCET may differ across different processor cores. E is an M×M matrix representing the set of communication times between constrained tasks; the elements in the matrix are represented by e. i,j It means that n i and n j The resulting communication overhead, where n j Called n i The direct successor of n, and n i is n j The direct predecessor. Due to communication overhead e i,j This occurs between different processor cores. If two tasks are assigned to the same processor core, the communication overhead between them is e. i,j =0.

[0051] Figure 2 illustrates a simple DAG application with 10 tasks. Nodes in the figure represent subtasks within the DAG task set, and the weights of directed edges represent the communication overhead between two tasks with a constraint relationship. Table 1 below shows the WCET information of the subtasks in the DAG application across three heterogeneous cores (c1, c2, c3).

[0052] Table 1. Execution time of tasks on different cores

[0053] Constructing an energy consumption model:

[0054] Each core of the processor can operate in active mode, idle mode, and sleep mode. When a processor core is operating in active mode, its total power consumption is p. total From static power consumption p s and dynamic power consumption p d Composition, total power consumption p total It can be represented as: p total =p s +pd (1)

[0055] Wherein, static power consumption p s Dynamic power consumption p is determined by leakage current. d The power consumption is determined by system activity; specifically, dynamic power consumption is determined by speed-related power consumption p. dep and speed-independent power consumption p ind Composition, that is: p d =p dep +p ind (2)

[0056] Then the total power consumption p total This can be further expressed as:

[0057] Where λ represents a coefficient, when λ = 0, the processor has no tasks running, and when λ = 1, the processor has tasks running; c eff It is the average switched capacitor, and V and f are the operating voltage and operating current, respectively.

[0058] When the processor is idle and has no tasks to execute, DPM (Discretionary Power Management) technology can be used to put the processor into a sleep state. In sleep mode, the processor's primary goal is to minimize power consumption while maintaining fast system responsiveness, consuming only a small amount of static power. However, there is a switching overhead E when the processor switches from idle to sleep mode. sw The switching overhead mainly involves context saving and restoring, changes in some hardware states, etc., therefore there is a critical time t. crit The critical time can be expressed as:

[0059] Where, p s This refers to the power consumption in the idle state, also known as static power consumption. The time required for processor state transitions is negligible. When the processor idle period is greater than t... crit This idle period of the processor is named a slack block. The DPM technology can be used on the slack block to put the processor into a sleep state to reduce power consumption.

[0060] Constructing a reliability model:

[0061] In reliability models, transient and permanent failures are two common failure types in processor systems. Permanent failures, once they occur, cannot recover on their own and require hardware replacement to resolve; their probability of occurrence is extremely low. Transient failures are temporary and have a relatively small impact on the overall system; their occurrence follows a Poisson distribution. A single task node n i In processor core c p The above is based on the execution frequency f max During execution, task n i The reliability can be expressed as:

[0062] Where, λ p Indicates processor core c p constant failure rate per unit time, w i,p Representing task n i In processor core c p The WCET value.

[0063] If the system uses task duplication technology to ensure the reliability of task execution, then task n i In addition to itself serving as the original task, there will be multiple backup tasks, defined as task n. i The number of copies is task n i The total number of tasks n is the sum of the number of tasks n itself and all its backup tasks. i Collection of replicas The set contains elements n 1 i For the original task n i The set itself, and the other elements in the set are the original task n. i Backup task, task n i The number of replicas is num i The number of backup tasks is num i -1.

[0064] Task n i Collection of replicas If at least one instance of the quest is successfully executed, then quest n is considered successful. i Execution was successful; no failures occurred. Therefore, there is task n with multiple backup tasks. i The reliability calculation formula has been updated to:

[0065] Where R(n) x i,p ) represents task n i The xth copy task is in processor core c p Reliability.

[0066] The execution of each task in the system is independent, and the probability of transient failures is also independent. The reliability of the entire system depends on the probability of successful execution of each task. Assuming there are M tasks in the system, the system reliability R is... sys It can be represented as:

[0067] The system redundancy is the sum of the number of replicas of all subtasks, and the formula for system redundancy can be expressed as:

[0068] S2: Based on the heterogeneous multi-core system model, determine the execution priority of tasks.

[0069] In heterogeneous multi-core systems, the heterogeneous nature of tasks leads to differences in execution time across different cores, and the task allocation scheme directly affects the task scheduling result. This invention employs the classic rank-based scheduling method. u The value determines the execution priority of the task. Task n i The execution priority is represented by the symbol rank. u (n i The calculation method is as follows:

[0070] Among them, rank u (n i ) represents task n i Execution priority, n j For n i The direct successor task, suc(n) i ) represents n i The direct successor task, rank u (n j ) represents task n j Execution priority Represents task n i The average WCET value across all processor cores is calculated as follows:

[0071] rank u The values ​​start at the bottom of the DAG graph and are calculated layer by layer upwards for the rank of each task node. u The value extends up to the entry node. Task n i rank u The larger the value, the higher the priority of the task, meaning that the task is given priority in core allocation.

[0072] Each original task may have no backup task, or it may have multiple backup tasks, i.e., task n. iThe number of copies of the original task may be one (the original task itself) or multiple, depending on the replication strategy.

[0073] If task n i There are multiple backup tasks, task n i Collection of replicas Each task in the process has the same priority, that is... Therefore, the set is used during task allocation. Each task is assigned consecutively; generally, the original task n is assigned first. i Then, the corresponding backup task is assigned. Based on rank(n) i The formula for calculating the rank of a task node in Figure 2 can be used to calculate the rank of that node. u The values ​​are shown in Table 2.

[0074] Table 2. Rank of the Tasks u value

[0075] S3: Perform the first stage of task replication to ensure that the reliability value of each subtask is higher than the system reliability requirement, and obtain the initial number of task replicas.

[0076] The first-stage task replication mechanism aims to ensure that the reliability value of each subtask is higher than the system reliability requirement, because the reliability value of each subtask is less than 1, i.e., R(n i ) < 1; therefore, if R(n) i ) < R req Then R sys =R(n1)...R(n) M )<R(n i ), that is, R sys It must be less than R req This does not meet the system reliability requirements.

[0077] Due to task n i The reliability values ​​vary across different processors. The core idea of ​​the first-stage task replication mechanism is to create a set of replicas for each subtask. The replicas are iteratively mapped to the core that produces the highest reliability value, until the task's reliability value meets the system's reliability requirements. The flowchart of the first-stage task replication mechanism is shown in Figure 3. The specific steps are as follows:

[0078] S31: Calculate the reliability value of the current subtask on all processor cores according to formula (5) and mark all processor cores as unmapped.

[0079] S32: Copy the current task and recalculate its reliability value according to formula (6). Select the processor core that produces the maximum reliability value and is not currently mapped as the core for task mapping, and mark that the processor core has been mapped and used, until the reliability value of the current task is greater than the system reliability requirement, i.e., R(n). i )>R req This gives the minimum redundancy for the current task.

[0080] S33: Each task in the system executes steps S31-S32 to obtain the initial number of task replicas.

[0081] The following example illustrates the first-stage task replication mechanism. Using Figure 2 as an example, ten original tasks are distributed across three processor cores. Assume the constant failure rates per unit time for the three processor cores are λ1 = 0.001, λ2 = 0.0015, and λ33 = 0.002, and the system reliability requirement R... req =0.942. According to formula (5), the reliability value R of each task on each processor core can be calculated. i,p As shown in Table 3, bold text indicates that the task has the highest reliability value under this processor core.

[0082] Table 3. Reliability values ​​of the task across three processor cores

[0083] According to the task execution priorities in Table 2, task n1 is assigned first. Since task n1 has the highest reliability value on processor core c1, the first copy of task n1 is assigned to processor core c1. At this point, the reliability value of task n1 is the same as the reliability value of its first copy assigned to c1. The reliability value of task n1, R(n1) = R 1,1 =0.98609754, satisfying R(n1)>R req Then, the task replication of task n1 in the first stage is completed, and the redundancy of task n1 is 1. The same steps are used to replicate ten tasks and select the corresponding processor cores for mapping. The processor cores selected for mapping each task and the corresponding reliability value are highlighted in bold in Table 3. The final system task redundancy NUM is obtained. sys =10, according to formula (7), the reliability R of the current system is... sys =0.89092057.

[0084] This example shows that in the first-stage task replication mechanism, each task has only one copy, and there are no additional task copies. This is normal because, in general, the reliability value of a single task on different processors is greater than the system reliability requirement, and the reliability value of each task only needs to be guaranteed once.

[0085] S4: If the actual system reliability value is less than the system reliability requirement, perform the second stage of task replication to obtain the final number of task replicas; otherwise, proceed to step S5.

[0086] If the actual system reliability value is not less than the system reliability requirement, then the initial number of task replicas obtained in the first stage of task replication is the final number of task replicas.

[0087] If the actual reliability value of the system is less than the system reliability requirement, for example, although the reliability value of each subtask satisfies R(n) i )>R req However, the reliability R of the current system in the example sys =0.89092057, which is far below the system reliability requirement of 0.942, and then the second-stage task replication mechanism is initiated.

[0088] During the first phase of task replication, only the reliability R(n) of each subtask is guaranteed. i Exceeding the system's required reliability R req This is not enough. To improve the overall reliability of the system and meet the system's reliability requirements, additional backup tasks must be replicated within the system. However, this additional task replication process is complex because choosing which tasks to replicate and which processor cores to map them to results in different system reliability values. Therefore, developing a reasonable task replication strategy is crucial.

[0089] During the second phase of task replication, when a certain task n i When a new copy of the task is created and a processor core is selected for execution, task n... i The number of copies l = num i +1, Task n i The updated reliability formula is shown below:

[0090] When task n i After the reliability value is updated, the system reliability R sys The system reliability formula has also been updated accordingly, and the updated formula is shown below:

[0091] The core idea of ​​the second-stage task replication mechanism is to continue selecting the task that generates the maximum system reliability value and its corresponding mapped processor core, based on the task replication in the first stage, until the system reliability requirements are met. The flowchart of the second-stage task replication mechanism is shown in Figure 4. The specific steps are as follows:

[0092] S41: Each task selects the processor core that produces the highest reliability value from the remaining unmapped processor cores as the pre-selected processor core; calculates the updated task reliability value R'(n i ).

[0093] The reliability of the task, R(n), is improved due to the mapping of the new replica. i The task needs to be updated. The reliability R'(n) after the update is calculated according to formula (11). i ).

[0094] S42: For each task, the reliability value R(n) before the update is used. i ) and the updated task reliability value R′(n i Recalculate the system reliability value R i sys .

[0095] The updated system reliability R is calculated according to formula (12). i sys Each task will generate an updated system reliability value.

[0096] S43: Select the task with the highest system reliability value for replication, and map the newly replicated task copy to the pre-selected processor core of that task.

[0097] M original tasks calculate M system reliability values. After mapping the M original tasks to their corresponding pre-replicated processor cores, R is defined. i sys =max{R 1 sys ,R 2 sys ,...,R M sys The task with the highest reliability is replicated, and the pre-selected processor core for this task is the actual processor core selected by the task.

[0098] S44: R'(n) i Assign the value to R(n) i The maximum system reliability value R is determined. i sys The system reliability value R is assigned to the current system. sys .

[0099] S45: Repeat steps S41-S44 until R sys >R req And update the system task redundancy NUM. sys That is, to obtain the final number of task replicas; where R req This indicates the system reliability requirements.

[0100] The second-stage task replication mechanism will be illustrated with an example. This mechanism occurs after the first stage. Assume the constant failure rates per unit time for the three processor cores are λ1 = 0.001, λ22 = 0.0015, and λ33 = 0.002, and the system reliability requirement R... req =0.942, these parameter values ​​are the same as those in the first stage.

[0101] According to the second phase execution step S41, each task needs to select the processor cores that generate the maximum reliability value R on the remaining unmapped processor cores. i,p The processor core is a pre-selected processor core. Since the task model in Figure 2 has ten task nodes, it requires ten iterations. Firstly, for task n1, since processor core p1 has already been marked and mapped in the first stage, the new copy of task n1 can only be mapped to c2 and c3. According to Table 3, the execution reliability R of the task on c3 is... i,3 The maximum value is given, therefore the pre-selected processor core for the new copy task n1 is c3. The updated reliability R′(n1) of task n1 is calculated according to formula (11) as 0.99975199. Then, in step S42, the updated system reliability R′ is calculated according to formula (12). sys =0.90325711. At this point, the pre-copying process of task n1 ends, that is, the new copy of task n1 is pre-mapped on processor core c3. The remaining tasks are then processed in the same way, and the corresponding R′ is obtained. sys After all ten tasks have pre-selected their corresponding preprocessor cores, the first round of tasks assumes the copying process is complete. According to step S43, R... i sys =max{R 1 sys ,R 2 sys ,...,R M sys ,}=R 9 sys =0.9068, meaning the task actually selected for replication in the first round is n9, and it is mapped to processor core c2. According to step S44, R... i sys Assign to R sys The updated system reliability R is obtained. sys =0.9068, system redundancy NUM sys =11. Step S45: After the first round, repeat the above steps until R... sys >R reqIn the fourth round, the new copy of task n2 is mapped to processor core c2, resulting in the largest R′ for that round. sys At this time, the system reliability R sys =0.9430, which meets the system reliability requirement R. req =0.942, proving that the system is considered reliable after the task replication is completed in this round, and the system redundancy NUM is also within acceptable limits. sys =14. The pre-selected processor cores for each task. p and the corresponding updated system reliability R′ sys As shown in Table 4, the bold text in the table indicates the processor cores selected for mapping in each round of new copy tasks and the corresponding updated system reliability values. This concludes the second phase of the task replication mechanism.

[0102] Table 4 Examples of the second-stage task replication mechanism

[0103] Table 5 shows the task allocation results of the task model in Figure 2 when this method is applied. Each row records the processor core that is finally selected and mapped for each task, the corresponding reliability value, and the number of task replicas. The bold text indicates the reliability value corresponding to the processor core that is finally selected and mapped for that task.

[0104] Table 5. Reliability values ​​of the task across three processor cores

[0105] Furthermore, based on the data in Table 5, copies of all tasks are allocated to the corresponding processor cores, as shown in Figure 5. The task allocation mechanism of this invention is based on the reliability constraint. As can be seen from Figure 5, the allocation of tasks among cores exhibits an uneven characteristic. This is because there are differences in the constant failure rate of different processor cores and the WCET values ​​of tasks among different cores. According to formula (1), the reliability values ​​of tasks on different cores also differ, which makes the tasks preferentially select the processor core that produces the highest reliability value.

[0106] S5: Allocate all task copies to the corresponding processor cores according to the task execution priority. Then, based on the DPM technology usage conditions, i.e., if the processor idle time is greater than the critical time, switch the processor core from idle mode to hibernation mode to reduce power consumption.

[0107] Due to reliability constraints, the task mapping to the processor exhibits a bias, resulting in fewer tasks executing on processor cores c2 and c3 in the task allocation results, leading to longer idle times (i.e., longer processor slack block durations). Since the processor still consumes energy even when idle, DPM technology can be used to switch the processor to sleep mode to reduce power consumption. As shown in the energy consumption model of this invention, when the slack block duration t... slack >t crit When the processor core applies DPM (Distributed Power Management) technology to the slack block, the slack duration ends when the next task arrives, at which point the processor switches to working mode to execute the next task. A slack block using DPM technology in the processor core is shown in the dashed box in Figure 6.

[0108] The above-described embodiments further illustrate the purpose, technical solution, and advantages of the present invention. It should be understood that the above-described embodiments are merely preferred embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made to the present invention within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A method for scheduling energy-aware tasks under reliability constraints, characterized in that, include: S1: Construct a heterogeneous multi-core system model, including a task model, an energy consumption model, and a reliability model; S2: Based on a heterogeneous multi-core system model, determine the execution priority of tasks; S3: Perform the first phase of task replication to ensure that the reliability value of each subtask is higher than the system reliability requirement, and obtain the initial number of task replicas; S4: If the actual system reliability value is less than the system reliability requirement, perform the second stage of task replication to obtain the final number of task replicas; otherwise, proceed to step S5. S5: Allocate all task copies to the corresponding processor cores according to the task execution priority. Then, based on the DPM technology usage conditions, i.e., if the processor idle time is greater than the critical time, switch the processor core from idle mode to hibernation mode to reduce power consumption.

2. The energy consumption-aware task scheduling method under reliability constraints according to claim 1, characterized in that, The task model includes: introducing a directed acyclic graph (DAG) to represent periodic parallel real-time tasks with priority constraints, and using a triple G = (N, W, E) to represent the DAG task with priority constraints; where N = {n1, n2, ..., n} M Let} be the task set, M represent the number of tasks in the task set, and n M Let W represent the M-th subtask of the DAG, where W is an M×U matrix, U represents the number of processor cores, and the elements w in the matrix represent the M-th subtask. i,p This indicates that task n i In processor core c p The worst execution time; E is an M×M matrix representing the set of communication times between constrained tasks, with elements in the matrix represented by e. i,j Let represent the i-th subtask n. i and the j-th subtask n j The communication overhead is zero if two tasks are assigned to the same processor core.

3. The energy consumption-aware task scheduling method under reliability constraints according to claim 1, characterized in that, The energy consumption model includes: each core of the processor can operate in working mode, idle mode, and sleep mode; when the processor core is operating in working mode, the total power consumption p total Represented as: p total =p s +λ(ρc eff V 2 f+p ind ) Where, p s Represents static power consumption, λ represents the coefficient, and c eff The average switched capacitance is represented by V, the operating voltage is represented by f, and the operating current is represented by p. ind Indicates power consumption independent of speed; When the processor is in an idle state with no tasks executing, the critical time t for the processor to switch from the idle state to the sleep state. crit Represented as: Among them, E sw This indicates the switching overhead.

4. The energy consumption-aware task scheduling method under reliability constraints according to claim 1, characterized in that, The reliability model includes: Single task node n i In processor core c p Reliability R during execution i,p Represented as: Where, λ p Indicates processor core c p constant failure rate per unit time, w i,p Represents task n i In processor core c p Worst execution time; After the task is copied, task n, which has multiple backup tasks, i Reliability R(n) i ) is represented as: Where R(n) x i,p ) represents task n i The xth copy task is in processor core c p Reliability during execution, num i Represents task n i number of copies; System reliability R sys Represented as: Where M represents the number of tasks in the task set.

5. The energy consumption-aware task scheduling method under reliability constraints according to claim 1, characterized in that, The formula for determining the execution priority of a task is as follows: Among them, rank u (n i ) represents task n i Execution priority Represents task n i The average of the worst execution time across all processor cores, e i,j Represents task n i and task n j The resulting communication overhead, suc(n i ) represents n i The direct successor task, rank u (n j ) represents task n j The execution priority.

6. The energy consumption-aware task scheduling method under reliability constraints according to claim 1, characterized in that, The first phase of task duplication includes: S31: Calculate the reliability value of the current subtask on all processor cores and mark all processor cores as unmapped and unused. S32: Copy the current task and recalculate its reliability value. Select the processor core that produces the highest reliability value and is not currently mapped as the core for task mapping, and mark that the processor core has been mapped and used. Continue until the reliability value of the current task is greater than the system reliability requirement, and obtain the minimum redundancy of the current task. S33: Each task in the system executes steps S31-S32 to obtain the initial number of task replicas.

7. The energy consumption-aware task scheduling method under reliability constraints according to claim 1, characterized in that, The second phase of the task replication process includes: S41: Each task selects the processor core that produces the highest reliability value from the remaining unmapped processor cores as the pre-selected processor core; calculates the updated task reliability value R'(n i ); S42: For each task, the reliability value R(n) before the update is used. i ) and the updated task reliability value R′(n i Recalculate the system reliability value R i sys ; S43: Select the task with the highest system reliability value for replication, and map the newly replicated task copy to the pre-selected processor core of that task; S44: R'(n) i Assign the value to R(n) i The maximum system reliability value R is determined. i sys The system reliability value R is assigned to the current system. sys ; S45: Repeat steps S41-S44 until R sys >R req This yields the final number of mission replicas; where R req This indicates the system reliability requirements.

8. The energy consumption-aware task scheduling method under reliability constraints according to claim 7, characterized in that, The formula for recalculating the system reliability value is expressed as: Where R(n) j ) represents the task n before the update. j The task reliability value, where M represents the number of tasks in the task set.

Images