Semiconductor device, semiconductor system, and method for controlling semiconductor device

Abstract

A semiconductor device, a semiconductor system, and a method for controlling a semiconductor device are provided, wherein the semiconductor device is capable of reducing power consumption. According to one embodiment, the semiconductor device includes: an optical coupler control circuit that transmits the current to a first signal path for a predetermined period of time when a change in an input signal provided from the outside is detected; an insulating circuit that transmits a pulse signal indicating a change in the input signal from the first signal path to a second signal path insulated from the first signal path according to the current flowing to the first signal path; a holding circuit that generates an input reproduction signal from the pulse signal transmitted by the insulating unit to the second signal path as a reproduction signal of the input signal; and an internal circuit that receives the input reproduction signal generated by the holding circuit.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] The disclosure of Japanese Patent Application No. 2017-216518 filed on November 9, 2017 including the specification, drawings and abstract is incorporated herein by reference in its entirety. Technical Field

[0003] The present invention relates to a semiconductor device, a semiconductor system, and a method of controlling the semiconductor device, and more particularly, to a semiconductor device, a semiconductor system, and a method of controlling the semiconductor device for reducing power consumption. Background Art

[0004] Generally, the input / output unit of the remote input / output device used in the terminal of the industrial network is provided with an insulating circuit for insulating the remote input / output device from an external device. For example, the input / output unit of the remote input / output device is provided with photocouplers for a plurality of I / O channels as an insulating circuit. Current always flows in these photocouplers, thereby unfavorably increasing the power consumption in the remote input / output device. This results in an increase in power consumption in a factory using the industrial network system.

[0005] A solution to this problem is disclosed in Japanese Unexamined Patent Application Publication No. 2015-119434. The insulated signal transmission circuit disclosed in the above patent suppresses current flow in the light-emitting diode by periodically switching the on and off operation of the switch coupled to the light-emitting diode of the series photocoupler, thereby reducing the power consumption of the photocoupler. Summary of the invention

[0006] However, in the structure of Japanese Unexamined Patent Application Publication No. 2015-119434, the switch is periodically turned on regardless of whether the input signal changes, and when the input signal is fixed at the power supply voltage level (H level), each time the switch is turned on, current flows in the light emitting diode. In short, in the structure of the above patent, there is still a problem of increased power consumption. Other problems and novel features will become apparent from the description of this specification and the accompanying drawings.

[0007] According to one embodiment, a semiconductor device includes: a first control circuit, which transmits current to a first signal path of a first power system for a predetermined period of time only when a change in a first input signal provided from the outside is detected; a first insulating unit, which sends a first pulse signal indicating a change in the first input signal from the first signal path to a second signal path of a second power system insulated from the first signal path according to the current flowing to the first signal path; a first holding circuit, which reproduces the first input signal from the first pulse signal sent by the first insulating unit to the second signal path; and a first internal circuit, which receives the first input signal reproduced by the first holding circuit.

[0008] According to another embodiment, a method for controlling a semiconductor device includes the following steps: delivering current to a first signal path of a first power system for a predetermined period of time only when a change in a first input signal provided externally is detected; sending a first pulse signal indicating the change in the first input signal from the first signal path to a second signal path of a second power system insulated from the signal path based on the current flowing to the first signal path; reproducing the first input signal from the first pulse signal sent to the second signal path; and providing the reproduced first input signal to a first internal circuit.

[0009] One embodiment described above can provide a semiconductor device, a semiconductor system, and a method of controlling a semiconductor device capable of reducing power consumption. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] Figure 1 is a block diagram showing a configuration example of a semiconductor system in which the semiconductor device according to the first embodiment is mounted.

[0011] Figure 2 Specifically, it shows the setting Figure 1 FIG. 1 is a diagram showing a first configuration example of an insulated signal transmission circuit in a semiconductor device.

[0012] Figure 3 It shows Figure 2 The timing diagram of the receiving operation of the isolated signal transmission circuit is shown.

[0013] Figure 4 It shows that the Figure 2 A timing diagram of a receiving operation of a semiconductor device of an isolated signal transmission circuit is shown.

[0014] Figure 5 Specifically, it shows the setting Figure 1 FIG. 2 is a diagram showing a second configuration example of an insulated signal transmission circuit in a semiconductor device.

[0015] Figure 6It shows Figure 5 The timing diagram of the receiving operation of the isolated signal transmission circuit is shown.

[0016] Figure 7 It shows Figure 1 The illustrated block diagram is a first modified example of a semiconductor device and a semiconductor system having the same.

[0017] Figure 8 It shows Figure 1 A block diagram of a second modified example of a semiconductor device and a semiconductor system having the same is shown.

[0018] Fig. 9 It shows Figure 1 A block diagram of a third modified example of a semiconductor device and a semiconductor system having the same is shown.

[0019] Fig.10 is a block diagram showing a configuration example of a semiconductor system in which the semiconductor device according to the second embodiment is mounted.

[0020] Fig.11 Specifically, it shows the setting Fig.10 FIG. 1 is a diagram showing an example of a configuration of an isolated signal transmission circuit on the transmission side in a semiconductor device.

[0021] Fig.12 It shows that the Fig.11 A timing diagram of the transmission operation of the semiconductor device of the isolated signal transmission circuit is shown.

[0022] Fig.13 It shows Fig.10 The illustrated block diagram is a first modified example of a semiconductor device and a semiconductor system having the same.

[0023] Fig.14 It shows Fig.10 A block diagram of a second modified example of a semiconductor device and a semiconductor system having the same is shown.

[0024] Fig.15 It shows Fig.10 A block diagram of a third modified example of a semiconductor device and a semiconductor system having the same is shown.

[0025] Fig.16 is a block diagram showing a configuration example of a semiconductor system in which the semiconductor device according to the third embodiment is mounted. DETAILED DESCRIPTION

[0026] The embodiments will be described below with reference to the accompanying drawings. Although the drawings are simplified, the technical scope of the embodiments should not be understood in a narrow sense based on the description of the drawings. The same reference numerals are given to the same elements, and repeated descriptions are omitted.

[0027] In the following description, for convenience, if necessary, the subject matter will be divided into multiple parts or embodiments. However, unless otherwise specified, these parts or embodiments are not independent of each other. On the contrary, the relationship between them is that one part or embodiment represents a modification, application example, detail, supplementary explanation, etc. of part or all of another part or embodiment. Further, in the following embodiments, if any number of elements, etc. (including the number, value, amount, range, etc. of units) is mentioned, the present invention should not be limited to this number. On the contrary, the number can be greater or less than this value, unless otherwise clearly specified and obviously limited to a specific value in principle.

[0028] Further, in the following embodiments, components (including operation steps) are not necessarily required unless otherwise specifically stated and are obviously considered to be required in principle. Similarly, in the following embodiments, if the shape, positional relationship, etc. of any component, etc. is mentioned, the shape, positional relationship that is roughly close to or similar to the shape, etc. should be included. The same applies to the quantities mentioned above (the number of units, values, amounts, ranges, etc.).

[0029] First embodiment

[0030] Figure 1 1 is a block diagram showing a configuration example of a semiconductor system SYS1 in which a semiconductor device 1 according to a first embodiment is installed. The semiconductor device 1 is, for example, a remote input / output device for receiving an input signal provided from an external device through an insulating circuit such as a photocoupler in a terminal on an industrial network. When a change in an input signal provided from an external device is detected, the semiconductor device 1 drives the insulating circuit, thereby reducing the power consumed by the insulating circuit. The details will be described below.

[0031] like Figure 1 As shown, the semiconductor system SYS1 includes a semiconductor device 1 and an external device 5 .

[0032] The semiconductor device 1 includes one or more semiconductor chips, for example, including an internal circuit 11, an I / O connector 12, an insulating circuit (insulator) 13, a photocoupler control circuit 14, a holding circuit 15, and an insulating circuit 17, all in one package. The insulating circuit 13, the photocoupler control circuit 14, and the holding circuit 15 form an insulating signal transmission circuit 10.

[0033] The external device 5 is provided outside the package of the semiconductor device 1 to transmit signals to and from the semiconductor device 1. The external device 5 adopts the same mechanism of the insulating circuit as the semiconductor device 1.

[0034] In the semiconductor device 1, the I / O connector 12 is coupled to the I / O connector 51 of the external device 5, and the signal between the semiconductor device 1 and the external device 5 is interfaced. Figure 1 In the example of FIG. 1 , an input signal Din from an external device 5 is provided to the semiconductor device 1 through the I / O connector 12 . Further, an output signal Dout generated by an internal circuit 11 of the semiconductor device 1 is provided to the external device 5 through the I / O connector 12 .

[0035] The isolated signal transmission circuit 10 transmits the input signal Din provided from the external device 5 to another signal path insulated from the signal path of the input signal Din as an input reproduction signal Din'. The input reproduction signal Din' transmitted to the other signal path through the isolated signal transmission circuit 10 enters the internal circuit 11.

[0036] In the insulating signal transmission circuit 10, when a change in the logic level of the input signal Din is detected, the photocoupler control circuit 14 supplies the power supply voltage VDD1 to the insulating circuit 13 for a predetermined period of time. When the photocoupler control circuit 14 supplies the power supply voltage VDD1, the insulating circuit 13 is driven and sends the change of the input signal Din (in short, a pulse signal indicating the change of the input signal Din) from the signal path that supplies the power supply voltage VDD1 to another signal path that supplies the power supply voltage VDD2. Here, the predetermined period of time indicates a period of time sufficient for the insulating circuit 13 to send the change of the input signal Din from one signal path to another signal path. The holding circuit 15 generates an input reproduction signal Din' as a reproduction signal of the input signal Din according to the change of the input signal Din sent by the insulating circuit 13. The input reproduction signal Din' generated by the holding circuit 15 is made to enter the internal circuit 11. Here, the insulating signal transmission circuit 10 drives the insulating circuit 13 only when a change in the input signal Din is detected, and therefore, the power consumed by the insulating circuit 13 can be reduced.

[0037] (First Configuration Example of Insulated Signal Transmission Circuit 10)

[0038] Figure 2 1 is a diagram specifically showing a first configuration example of the insulated signal transmission circuit 10 as the insulated signal transmission circuit 10 a . Figure 3 is a timing chart showing the operation of the insulating signal transmission circuit 10a. Figure 2In the example of FIG. 1 , the insulating circuit 13, the photocoupler control circuit 14, and the holding circuit 15 forming the insulating signal transmission circuit 10 are respectively shown as the insulating circuit 13a, the photocoupler control circuit 14a, and the holding circuit 15a in the insulating signal transmission circuit 10a.

[0039] The photocoupler control circuit 14a includes an inverter IV1, a resistor R1, a capacitor C1, and an exclusive NOR circuit (referred to as an XNOR circuit) EX1. The inverter IV1 outputs an inverted signal of the input signal Din. Here, the output signal of the inverter IV1 varies with the time corresponding to the time constant determined by the resistance value of the resistor R1 and the capacitance value of the capacitor C1 and the input signal Din ( Figure 3 Compared with the time t11, t13, and t15 in the figure, there is a delayed change ( Figure 3 The XNOR circuit EX1 outputs the XNOR of the input signal Din and a signal (voltage of the node N11) obtained by delaying the inverted signal of the input signal Din. In short, when a change in the input signal Din is detected, the photocoupler control circuit 14a makes the output signal active (H level) for a predetermined period ( Figure 3 In other words, the photocoupler control circuit 14a generates a pulse in the output signal when detecting a change in the input signal Din.

[0040] The insulating circuit 13 a is, for example, a photocoupler, and includes a light emitting diode PD11 , a photo transistor PT11 , resistor elements R11 and R12 , and a switching transistor ST11 .

[0041] The light emitting diode PD11, the resistor element R11 and the switching transistor ST11 are arranged in series in a signal path (first signal path) between a power supply voltage terminal (hereinafter referred to as the power supply voltage terminal VDD1) that provides the power supply voltage VDD1 and a ground voltage terminal (hereinafter referred to as the ground voltage terminal GND) that provides the ground voltage GND. The current flowing between the collector and the emitter of the switching transistor ST11 is controlled by the output signal of the optocoupler control circuit 14a (the current of the node N12). Specifically, during the period when the output signal of the optocoupler control circuit 14a is activated (H level) after the change of the input signal Din is detected, the current flows between the collector and the emitter of the switching transistor ST11, otherwise the current does not flow. The light emitting diode PD11 emits light during the period when the current flows in the switching transistor after the switching transistor ST11 is turned on.

[0042] The phototransistor PT11 and the resistor element R12 are arranged in series in another signal path (second signal path) insulated from the first signal path, and the other signal path is between a power supply voltage terminal (hereinafter referred to as the power supply voltage terminal VDD2) that provides a power supply voltage VDD2 different from the power supply voltage VDD1 and a ground voltage terminal GND. When the light emitting diode PD11 emits light, current flows between the collector and the emitter of the phototransistor PT11. Since the current also flows in the resistor element R12, the voltage of the node N13 between the phototransistor PT11 and the resistor element R12 indicates the power supply voltage VDD2 level (H level). On the contrary, when the light emitting diode PD11 does not emit light, the current does not flow between the collector and the emitter of the phototransistor PT11. Since the current does not flow to the resistor element R12, the voltage of the node N13 indicates the ground voltage level (L level). In short, the voltage of the node N12 is sent to the node N13 through the insulating circuit 13a. The voltage of the output node N13 is used as the output signal of the insulating circuit 13a.

[0043] The holding circuit 15a includes, for example, a flip-flop FF1. The input terminal D of the flip-flop FF1 is pulled high on the inside and is set to be at the power supply voltage VDD2 level (H level) when powered on. Then, the flip-flop FF1 receives and outputs the inverted signal QB of the output signal Q of the flip-flop FF1 in synchronization with the rise of the output signal (voltage of the node N13) of the insulating circuit 13a. In other words, the flip-flop FF1 receives and outputs the inverted signal QB of the output signal Q of the insulating circuit 13a in synchronization with the rise of the output signal (voltage of the node N13) of the insulating circuit 13a. Figure 3 The output signal Q is inverted synchronously with the times t11, t13 and t15 in the flip-flop FF1. The holding circuit 15a outputs the output signal Q of the flip-flop FF1 to the internal circuit 11 as a reproduced signal Din' of the input signal Din.

[0044] Back to Figure 1 The description continues. The insulating circuit 17 sends the output signal Dout generated by the internal circuit 11 to another signal path insulated from the signal path of the output signal Dout as an output reproduction signal Dout'. The output reproduction signal Dout' sent to another signal path through the insulating circuit 17 is output to the external device 5 through the I / O connector 12.

[0045] The internal circuit 11 performs predetermined processing based on the input signal Din received from the external device 5 and transmits the processing result to the external device 5 as an output signal Dout. The internal circuit 11 includes, for example, a central processing unit (CPU) 111, a real-time OS (RTOS) accelerator 112, a random access memory (RAM) 113, and a general-purpose input / output (GPIO) 114.

[0046] In the internal circuit 11, for example, the CPU 111 executes a program having a designated address among a plurality of programs stored in the RAM 113. In addition to the plurality of programs executed by the CPU 111, the RAM 113 also stores the processing results of the CPU 111 and the input signal Din provided from the outside (specifically, the input reproduction signal Din' obtained through the insulating signal transmission circuit 10). The RTOS accelerator 112 has, for example, a function of improving the response to interrupts and the task switching speed so as to ensure the real-time performance of the internal circuit 11. For example, the RTOS accelerator 112 is installed by hardware. The GPIO 114 is a general-purpose input / output port that interfaces the signal transmitted between the internal circuit 11 and the outside. For example, the input reproduction signal Din' is stored in the RAM 113 through the GPIO 114 and the data read from the RAM 113 is output as the output signal Dout through the GPIO 114. Here, the internal circuit 11 is not limited to the components mentioned above, but other components may also be provided.

[0047] (flow chart)

[0048] Next, use Figure 4 The receiving operation of the semiconductor device 1 will be described. Figure 4 is a flowchart indicating a receiving operation of the semiconductor device 1 .

[0049] exist Figure 4 In the example of , first, the input signal Din from the external device 5 is provided to the semiconductor device 1 (step S101). When the logic level of the input signal Din does not change ("No" in step S102), the insulating signal transmission circuit 10 does not operate because the switching transistor ST11 is not turned on. On the contrary, when a change in the logic level of the input signal Din is detected ("Yes" in step S102), the insulating signal transmission circuit 10 operates during a predetermined period because the switching transistor ST11 is turned on for the predetermined period (step S103). Accordingly, through the insulating circuit 13, the change of the input signal Din (in short, the pulse signal indicating the change of the input signal Din) is sent from the signal path providing the power supply voltage VDD1 to another signal path providing the power supply voltage VDD2 (step S104). The holding circuit 15 generates the input reproduction signal Din' as the reproduction signal of the input signal Din according to the change of the input signal Din sent through the insulating circuit 13 (step S105). The input reproduction signal Din generated by the holding circuit 15 is made to enter the internal circuit 11.

[0050] As mentioned above, the semiconductor device 1 and the semiconductor system SYS1 having the same according to the present embodiment drive the insulating circuit 13 only when a change in the input signal Din is detected, thereby reducing power consumed by the insulating circuit 13 .

[0051] In the structure of Japanese Unexamined Patent Application Publication No. 2015-119434, the insulating circuit is periodically driven regardless of whether there is a change in the input signal; therefore, when the input signal is fixed at the power supply voltage level (H level), each time the insulating circuit is driven, current flows in the light-emitting diode. In contrast, in the structure of the semiconductor device 1 and the semiconductor system SYS1 according to the present embodiment, the insulating circuit is driven only when a change in the input signal is detected, thereby avoiding wasteful current flowing into the light-emitting diode. Further, a change in the input signal will never go undetected. Therefore, the power consumption of the optical coupler can be reduced.

[0052] The isolated signal transmission circuit 10 is not limited to Figure 2 Other specific configuration examples of the insulated signal transmission circuit 10 will be described below.

[0053] (Second Configuration Example of Insulated Signal Transmission Circuit 10)

[0054] Figure 5 1 is a diagram specifically showing a second configuration example of the insulating signal transmission circuit 10 as the insulating signal transmission circuit 10 b . Figure 6 is a timing chart showing the operation of the insulating signal transmission circuit 10b. Figure 5 In the example, the insulating circuit 13, the photocoupler control circuit 14 and the holding circuit 15 forming the insulating signal transmission circuit 10 are respectively shown as the insulating circuits 13b and 13c, the photocoupler control circuit 14b and the holding circuit 15b in the insulating signal transmission circuit 10b.

[0055] exist Figure 5 In the example of , not only the input signal Din but also the trigger signal TRG is provided from the external device 5 to the semiconductor device 1. The trigger signal TRG is a signal that becomes active for a predetermined period of time when the input signal Din changes, and the signal may be directly provided by the external device 5 having a trigger signal generating circuit or may be generated in the semiconductor device 1 based on the input signal Din.

[0056] The photocoupler control circuit 14b has a switch element SW1 provided between the power supply voltage terminal VDD1 and the light emitting diodes PD11 and PD12. The switch element SW1 is turned on when the trigger signal TRG is activated (when a pulse is generated), and otherwise, is turned off. In other words, when the input signal Din changes, the switch element SW1 is turned on for a predetermined period of time to supply the power supply voltage VDD1 to the insulating circuits 13b and 13c ( Figure 6 time t21 to t22, time t23 to t24, time t25 to t26).

[0057] The insulating circuit 13b has the same circuit structure as that of the insulating circuit 13. However, the on / off operation of the switching transistor ST11 is controlled according to the input signal Din.

[0058] For example, when the input signal Din rises, the switching transistor ST11 is turned on accordingly. At the same time as the input signal Din rises, the trigger signal TRG rises and turns on the switching element SW1 for a predetermined period of time. Therefore, current flows in the light emitting diode PD11. The light emitting diode PD11 emits light (time t21 to t22, time t25 to t26). On the contrary, at the rising moment of the input signal Din, the trigger signal TRG rises and turns on the switching element SW1 for a predetermined period of time; however, the switching transistor ST11 is turned off, so the current does not flow in the light emitting diode PD11. The light emitting diode PD11 does not emit light (time t23 to t24).

[0059] Since current flows in the photo transistor PT11 during the light emission period of the light emitting diode PD11, the voltage Dm of the node N13b between the photo transistor PT11 and the resistor R12 indicates an H level. On the contrary, during the non-light emission period of the light emitting diode PD11, current does not flow in the photo transistor PT11 and the voltage Dm indicates an L level. Therefore, the information (pulse signal) of the rise of the input signal Din is transmitted to the node N13b through the insulating circuit 13b (time t21 to t22, time t25 to t26). The voltage Dm of the node N13b is output as an output signal of the insulating circuit 13b.

[0060] The insulating circuit 13c includes a light emitting diode PD12, a photo transistor PT12, resistor elements R13 and R14, and a switch transistor ST12. The light emitting diode PD12, the photo transistor PT12, the resistor elements R13 and R14, and the switch transistor ST12 correspond to the light emitting diode PD11, the photo transistor PT11, the resistor elements R11 and R12, and the switch transistor ST11, respectively. However, the on / off operation of the switch transistor ST12 is controlled according to the trigger signal TRG.

[0061] For example, when a pulse is generated in the trigger signal TRG according to the change of the input signal Din, the switching transistor ST12 is turned on for a predetermined period and the switching element SW1 is turned on for a predetermined period; therefore, current flows in the light emitting diode PD12 for a predetermined period. As a result, the light emitting diode PD12 emits light (time t21 to t22, time t23 to t24, and time t25 to t26).

[0062] Since current flows in the photo transistor PT12 during the light emission of the light emitting diode PD12, the voltage of the node N13c between the photo transistor PT12 and the resistance element R14 indicates an H level. On the contrary, since current does not flow in the photo transistor PT12 during the period when the light emitting diode PD12 does not emit light, the voltage of the node N13c indicates an L level. Accordingly, the trigger signal TRG (i.e., information on the change of the input signal Din) is transmitted to the node N13c through the insulating circuit 13c (time t21 to t22, time t23 to t24, and time t25 to t26). The voltage of the node N13c is output as an output signal (also referred to as a trigger signal TRG') of the insulating circuit 13c.

[0063] The holding circuit 15b includes, for example, a flip-flop FF1. The input terminal D of the flip-flop FF1 is pulled high on the inside and is set to be at the power supply voltage VDD2 level (H level) when powered on. Then, the flip-flop FF1 receives and outputs the output signal (voltage of the node N13b) of the insulating circuit 13b in synchronization with the rise of the output signal (voltage of the node N13c) of the insulating circuit 13c. The holding circuit 15b outputs the output signal Q of the flip-flop FF1 to the internal circuit 11 as a reproduced signal Din' of the input signal Din.

[0064] exist Figure 5 In the structure of , the case where one trigger signal TRG is used for one input signal Din has been described; however, the present invention is not limited thereto. A structure in which a common trigger signal TRG is used for a plurality of bits of the input signal Din may be appropriately adopted. For example, when a common trigger signal TRG is used for each bit in the four-bit width of the input signal Din, in the components of the insulating signal transmission circuit 10b, an insulating circuit 13b and a holding circuit 15b are provided for each of the four bits, and at the same time, one optical coupler control circuit 14b and one insulating circuit 13c are provided.

[0065] (First Modification Example of Semiconductor System SYS1)

[0066] Figure 7 is a block diagram showing a first modification example of the semiconductor system SYS1 as the semiconductor system SYS1 a.

[0067] The semiconductor system SYS1a includes a semiconductor device 1a and an external device 5. The semiconductor device 1a uses a portion of a RAM 113 provided in an internal circuit 11, instead of the holding circuit 15 in the semiconductor device 1. The photocoupler control circuit 14 includes a trigger signal generating circuit (not shown) for generating a trigger signal TRG. The trigger signal TRG is provided to the internal circuit 11 through the insulating circuit 13 and the GPIO 114. For example, in synchronization with the rise of the trigger signal TRG, the input reproduction signal Din' is provided to the internal circuit 11 through the GPIO 114 and is received by the RAM 113. The other components of the semiconductor device 1a are the same as those of the semiconductor device 1, so their description is omitted.

[0068] The semiconductor device 1a and the semiconductor system SYS1a having the same can achieve the same effects as the semiconductor device 1 and the semiconductor system SYS1 having the same. Further, the semiconductor device 1a and the semiconductor system SYS1a having the same can reduce the circuit size because the holding circuit 15 does not have to be provided.

[0069] The structure of the insulating signal transmission circuit 10b can be used for the semiconductor system SYS1a. In this case, the input reproduction signal Din' is received by the RAM 113 in synchronization with the rise of the trigger signal TRG' generated in the insulating signal transmission circuit 10b.

[0070] (Second Modification Example of Semiconductor System SYS1)

[0071] Figure 8 2 is a block diagram showing a second modification of the semiconductor system SYS1 as the semiconductor system SYS1b. The semiconductor system SYS1 is provided with one external device 5. In contrast, the semiconductor system SYS1b is provided with two external devices 5 and 6.

[0072] The semiconductor system SYS1b includes a semiconductor device 1b and external devices 5 and 6. The external devices 5 and 6 are both provided outside the package of the semiconductor device 1b to transmit signals to and from the semiconductor device 1b. For the respective external devices 5 and 6, the same mechanism of the insulating circuit as that of the semiconductor device 1 is used.

[0073] The semiconductor device 1b includes an internal circuit 11, I / O connectors 12_1 and 12_2, insulating circuits 13_1 and 13_2, photocoupler control circuits 14_1 and 14_2, holding circuits 15_1, 15_2, and insulating circuits 17_1 and 17_2. The insulating circuit 13_1, the photocoupler control circuit 14_1, and the holding circuit 15_1 form an insulating signal transmission circuit 10_1. The insulating circuit 13_2, the photocoupler control circuit 14_2, and the holding circuit 15_2 form an insulating signal transmission circuit 10_2.

[0074] In the semiconductor device 1b, the I / O connector 12_1 is coupled to the I / O connector 51 of the external device 5 to interface signals transmitted between the semiconductor device 1b and the external device 5. The I / O connector 12_2 is coupled to the I / O connector 61 of the external device 6 to interface signals transmitted between the semiconductor device 1b and the external device 6.

[0075] The isolated signal transmission circuits 10_1 and 10_2 have the same circuit structure as the isolated signal transmission circuit 10b, for example, Figure 5 As shown. However, it is necessary to generate a trigger signal TRG (a pulse signal indicating the change of the input signals Din_1 and Din_2) in each circuit in the insulating signal transmission circuits 10_1 and 10_2. The insulating signal transmission circuit 10_1 sends the input signal Din_1 provided from the external device 5 to another signal path insulated from the signal path of the above-mentioned input signal Din_1 as the input reproduction signal Din_1'. The input reproduction signal Din_1' sent to another signal path through the insulating signal transmission circuit 10_1 enters the internal circuit 11. The insulating signal transmission circuit 10_2 sends the input signal Din_2 provided from the external device 6 to another signal path insulated from the signal path of the above-mentioned input signal Din_2 as the input reproduction signal Din_2'. The input reproduction signal Din_2' sent to another signal path through the insulating signal transmission circuit 10_2 enters the internal circuit 11.

[0076] Specifically, in the insulating signal transmission circuit 10_1, when a change in the logic level of the input signal Din_1 is detected, the optical coupler control circuit 14_1 provides the power supply voltage VDD1 to the insulating circuit 13_1 for a predetermined period of time. When the optical coupler control circuit 14_1 provides the power supply voltage VDD1, the insulating circuit 13_1 is driven to send the change of the input signal Din_1 (in short, a pulse signal indicating the change of the input signal Din_1) from the signal path providing the power supply voltage VDD1 to another signal path providing the power supply voltage VDD2. The holding circuit 15_1 generates the input reproduction signal Din_1' as a reproduction signal of the input signal Din_1 according to the change of the input signal Din_1 sent by the insulating circuit 13_1. The input reproduction signal Din_1' generated by the holding circuit 15_1 is made to enter the internal circuit 11. Here, the insulating signal transmission circuit 10_1 drives the insulating circuit 13_1 only when the change of the input signal Din_1 is detected, and therefore, the power consumed by the insulating circuit 13_1 can be reduced.

[0077] Further, in the insulating signal transmission circuit 10_2, when a change in the logic level of the input signal Din_2 is detected, the optical coupler control circuit 14_2 provides the power supply voltage VDD1 to the insulating circuit 13_2 for a predetermined period of time. When the optical coupler control circuit 14_2 provides the power supply voltage VDD1, the insulating circuit 13_2 is driven to send the change of the input signal Din_2 (in short, a pulse signal indicating the change of the input signal Din_2) from the signal path providing the power supply voltage VDD1 to another signal path providing the power supply voltage VDD2. The holding circuit 15_2 generates an input reproduction signal Din_2' as a reproduction signal of the input signal Din_2 according to the change of the input signal Din_2 sent by the insulating circuit 13_2. The input reproduction signal Din_2' generated by the holding circuit 15_2 is made to enter the internal circuit 11. Here, the insulating signal transmission circuit 10_2 drives the insulating circuit 13_2 only when a change in the input signal Din_2 is detected, and therefore, the power consumed by the insulating circuit 13_2 can be reduced.

[0078] exist Figure 8 In the example of , the case where two external devices 5 and 6 are provided has been described; however, the present invention is not limited to this case, and three or more external devices for transmitting signals to and from the semiconductor device 1b may be provided. Figure 8 In the example of , a case where a common connector is used for input and output (so-called I / O connector) has been described; however, the present invention is not limited to this case, and separate connectors may be used for input and output.

[0079] (Third Modification Example of Semiconductor System SYS1)

[0080] Fig. 9 is a block diagram showing a third modification example of the semiconductor system SYS1 as the semiconductor system SYS1c.

[0081] The semiconductor system SYS1c includes a semiconductor device 1c and external devices 5 and 6. The semiconductor device 1c includes one photocoupler control circuit 14 commonly used by two receiving paths, instead of two photocoupler control circuits 14_1 and 14_2 respectively provided in two receiving paths in the semiconductor device 1b. The other components of the semiconductor device 1c are the same as those of the semiconductor device 1b, and thus their description is omitted.

[0082] The semiconductor device 1c and the semiconductor system SYS1c having the same drive the insulating circuits 13_1 and 13_2 only when a change in the input signals Din_1 and Din_2 is detected; therefore, the power consumed by the insulating circuits 13_1 and 13_2 can be reduced. Although the semiconductor device 1c and the semiconductor system SYS1c having the same are not as good as the semiconductor device 1b and the semiconductor system SYS1b having the same in reducing power consumption, they can reduce the number of photocoupler control circuits, thereby suppressing an increase in circuit size.

[0083] Second embodiment

[0084] Fig.10 1 is a block diagram showing a configuration example of a semiconductor system SYS2 in which a semiconductor device 2 according to a second embodiment is installed. The semiconductor device 2 not only drives the insulating circuit on the receiving side when a change in an input signal provided from an external device is detected, but also drives the insulating circuit on the transmitting side when a change in an output signal generated by an internal circuit is detected. Accordingly, it is possible to reduce not only the power consumed by the insulating circuit on the receiving side but also the power consumed by the insulating circuit on the transmitting side. The details will be described below.

[0085] The semiconductor system SYS2 includes a semiconductor device 2 and an external device 5. Unlike the semiconductor device 1, the semiconductor device 2 has an insulating signal transmission circuit 20 instead of the insulating circuit 17 provided on the transmission path. The insulating signal transmission circuit 20 includes an insulating circuit 27, a photocoupler control circuit 28, and a holding circuit 29. The other components of the semiconductor device 2 are the same as those of the semiconductor device 1, so their description is omitted.

[0086] In the insulating signal transmission circuit 20, when a change in the logic level of the output signal Dout is detected, the photocoupler control circuit 28 supplies the power supply voltage VDD2 to the insulating circuit 27 for a predetermined period of time. When the photocoupler control circuit 28 supplies the power supply voltage VDD2, the insulating circuit 27 is driven to send the change of the output signal Dout generated by the internal circuit 11 (in short, the pulse signal indicating the change of the output signal Dout) from the signal path providing the power supply voltage VDD2 to another signal path providing the power supply voltage VDD1. Here, the predetermined period indicates a period sufficient for the insulating circuit 27 to send the change of the output signal Dout from one signal path to another signal path. The holding circuit 29 generates an output reproduction signal Dout' as a reproduction signal of the output signal Dout according to the change of the output signal Dout sent by the insulating circuit 27. The output reproduction signal Dout' generated by the holding circuit 29 is output to the outside through the I / O connector 12. Here, the insulating signal transmission circuit 20 drives the insulating circuit 27 only when the change of the output signal Dout is detected, and therefore, the power consumed by the insulating circuit 27 can be reduced.

[0087] (Configuration Example of Insulated Signal Transmission Circuit 20)

[0088] Fig.11 2 is a diagram specifically showing a configuration example of the insulating signal transmission circuit 20 as the insulating signal transmission circuit 20a. Fig.11 In the example of FIG. 2 , the insulating circuit 27 , the photocoupler control circuit 28 , and the holding circuit 29 forming the insulating signal transmission circuit are respectively shown as the insulating circuit 27 a , the photocoupler control circuit 28 a , and the holding circuit 29 a in the insulating signal transmission circuit 20 a .

[0089] The optocoupler control circuit 28a includes an inverter IV2, a resistor R2, a capacitor C2, and an exclusive-or-not circuit (referred to as an XNOR circuit) EX2. The inverter IV2 outputs an inverted signal of the output signal Dout. Here, the output signal of the inverter IV2 (the voltage level of the node N21) changes with a delay compared to the change of the output signal Dout with the time corresponding to the time constant determined by the resistance value of the resistor R2 and the capacitance value of the capacitor C2. The XNOR circuit EX2 outputs the exclusive-or-not of the output signal Dout and a signal (the voltage of the node N21) obtained by delaying the inverted signal of the output signal Dout. In short, when a change in the output signal Dout is detected, the optocoupler control circuit 28a activates its output signal (H level) for a predetermined period of time. In other words, the optocoupler control circuit 28a generates a pulse in its output signal when a change in the output signal Dout is detected.

[0090] The insulating circuit 27 a is, for example, a photocoupler, and includes a light emitting diode PD21 , a photo transistor PT21 , resistor elements R21 and R22 , and a switching transistor ST21 .

[0091] The light emitting diode PD21, the resistor element R21 and the switching transistor ST21 are arranged in series in a signal path (third signal path) between the power supply voltage terminal VDD2 and the ground voltage terminal GND. The current flowing between the collector and the emitter of the switching transistor ST21 is controlled by the output signal of the optocoupler control circuit 28a (the current of the node N22). Specifically, during the period when the output signal of the optocoupler control circuit 28a is activated (H level) after the change of the output signal Dout is detected, the current flows between the collector and the emitter of the switching transistor ST21, otherwise the current does not flow. The light emitting diode PD21 emits light during the period when the current flows in the switching transistor after the switching transistor ST21 is turned on.

[0092] The phototransistor PT21 and the resistor element R22 are arranged in series in another signal path (fourth signal path) insulated from the third signal path, and the other signal path is between the power supply voltage terminal VDD1 and the ground voltage terminal GND. When the light emitting diode PD21 emits light, the current flows between the collector and the emitter of the phototransistor PT21. Since the current also flows in the resistor element R22, the voltage of the node N23 between the phototransistor PT21 and the resistor element R22 indicates the power supply voltage VDD1 level (H level). On the contrary, when the light emitting diode PD21 does not emit light, the current does not flow between the collector and the emitter of the phototransistor PT21. Since the current does not flow to the resistor element R22, the voltage of the node N23 indicates the ground voltage level (L level). In short, the voltage of the node N22 is sent to the node N23 through the insulating circuit 27a. The voltage of the output node N23 is used as the output signal of the insulating circuit 27a.

[0093] The holding circuit 29a includes, for example, a flip-flop FF2. The input terminal D of the flip-flop FF2 is pulled high on the inside and is set to be at the power supply voltage VDD1 level (H level) when powered on. Then, the flip-flop FF2 receives and outputs the inverted signal QB of the output signal Q of the flip-flop FF2 in synchronization with the rise of the output signal (voltage of the node N23) of the insulating circuit 27a. In other words, the flip-flop FF2 inverts the output signal Q in synchronization with the rise of the output signal of the insulating circuit 27a. The holding circuit 29a outputs the output signal Q of the flip-flop FF2 to the outside as a reproduced signal Dout' of the output signal Dout.

[0094] The insulating signal transmission circuit 20 is not limited to Fig.11The structure of the insulating signal transmission circuit 20 a shown may be a circuit structure (insulated signal transmission circuit 20 b ) corresponding to the insulating signal transmission circuit 10 b as the second configuration example of the insulating signal transmission circuit 10 , for example.

[0095] (flow chart)

[0096] Next, use Fig.12 The transmission operation of the semiconductor device 2 will be described. Fig.12 2 is a flowchart indicating the transmission operation of the semiconductor device 2.

[0097] exist Fig.12 In the example of, first, the internal circuit 11 generates an output signal Dout (step S201). When the logic level of the output signal Dout does not change ("No" in step S202), the insulating signal transmission circuit 20 does not operate because the switching transistor ST21 is not turned on. On the contrary, when a change in the logic level of the output signal Dout is detected ("Yes" in step S202), the insulating signal transmission circuit 20 operates for a predetermined period of time because the switching transistor ST21 is turned on for the predetermined period of time (step S203). Accordingly, through the insulating circuit 27, the change of the output signal Dout (in short, the pulse signal indicating the change of the output signal Dout) is sent from the signal path providing the power supply voltage VDD2 to another signal path providing the power supply voltage VDD1 (step S204). The holding circuit 29 generates an output reproduction signal Dout' as a reproduction signal of the output signal Dout according to the change of the output signal Dout sent through the insulating circuit 27 (step S205). The output reproduction signal Dout' generated by the holding circuit 29 is output to the outside through the I / O connector 12.

[0098] As mentioned above, the semiconductor device 2 and the semiconductor system SYS2 having the semiconductor device 2 according to the present embodiment not only drive the insulating circuit 13 on the receiving side when a change in the input signal Din is detected, but also drive the insulating circuit 27 on the transmitting side when a change in the output signal Dout is detected. Therefore, not only the power consumed by the insulating circuit 13 on the receiving side but also the power consumed by the insulating circuit 27 on the transmitting side can be reduced.

[0099] Next, use Figures 13 to 15 A modified example of the semiconductor system SYS2 will be described.

[0100] (First Modification Example of Semiconductor System SYS2)

[0101] Fig.13 is a block diagram showing a first modification example of the semiconductor system SYS2 as a semiconductor system SYS2a.

[0102] The semiconductor system SYS2a includes a semiconductor device 2a and an external device 5a. The semiconductor device 2a uses a portion of a RAM 113 provided in an internal circuit 11, instead of the retention circuit 15 in the semiconductor device 2. Further, the semiconductor device 2a uses a retention circuit 52 provided in the external device 5a, instead of the retention circuit 29 in the semiconductor device 2. The retention circuit 52 provided in the external device 5a may be, for example, a RAM. The other components of the semiconductor device 2a are the same as those of the semiconductor device 2, and thus description thereof is omitted.

[0103] The semiconductor device 2a and the semiconductor system SYS2a having the same can achieve the same effects as the semiconductor device 2 and the semiconductor system SYS2 having the same. Further, the semiconductor device 2a and the semiconductor system SYS2a can reduce the circuit size because the holding circuits 15 and 29 do not have to be provided.

[0104] (Second Modification Example of Semiconductor System SYS2)

[0105] Fig.14 2 is a block diagram showing a second modification of the semiconductor system SYS2 as the semiconductor system SYS2b. The semiconductor system SYS2 is provided with one external device 5. In contrast, the semiconductor system SYS2c is provided with two external devices 5 and 6. The details will be described below.

[0106] The semiconductor system SYS2b includes a semiconductor device 2b and external devices 5 and 6. Compared with the semiconductor device 1b, the semiconductor device 2b includes insulating signal transmission circuits 20_1 and 20_2 instead of the insulating circuits 17_1 and 17_2, respectively.

[0107] The insulating signal transmission circuit 20_1 has, for example, the same circuit structure as the insulating signal transmission circuit 20b, and transmits the output signal Dout_1 generated by the internal circuit 11 to another signal path insulated from the signal path of the output signal Dout_1 as the output reproduction signal Dout_1', wherein the internal circuit 11 is insulated from the external device 5. The output reproduction signal Dout_1' transmitted to the other signal path by the insulating signal transmission circuit 20_1 is output to the external device 5. Here, it is necessary to generate a trigger signal TRG (a pulse signal indicating a change in the output signal Dout_1) in the insulating signal transmission circuit 20_1. The insulating signal transmission circuit 20_2 has, for example, the same circuit structure as the insulating signal transmission circuit 20b, and transmits the output signal Dout_2 generated by the internal circuit 11 to another signal path insulated from the signal path of the output signal Dout_2 as the output reproduction signal Dout_2', wherein the internal circuit 11 is insulated from the external device 6. The output reproduction signal Dout_2' transmitted to the other signal path by the insulating signal transmission circuit 20_2 is output to the external device 6. Here, it is necessary to generate a trigger signal TRG (a pulse signal indicating a change in the output signal Dout_2 ) in the insulating signal transmission circuit 20_2 .

[0108] The other components of the semiconductor device 2b are the same as those of the semiconductor device 1b, and thus their descriptions are omitted.

[0109] The semiconductor device 2b and the semiconductor system SYS2b having the semiconductor device 2b can achieve the same effects as the semiconductor device 1b and the semiconductor system SYS1b having the semiconductor device 1b. Further, in the semiconductor device 2b and the semiconductor system SYS2b having the semiconductor device 2b, the insulating signal transmission circuit 20_1 drives the insulating circuit 27_1 only when a change in the output signal Dout_1 is detected, thereby reducing the power consumed by the insulating circuit 27_1. Further, the insulating signal transmission circuit 20_2 drives the insulating circuit 27_2 only when a change in the output signal Dout_2 is detected, thereby reducing the power consumed by the insulating circuit 27_2.

[0110] exist Fig.14 In the example, the case where two external devices 5 and 6 are provided has been described; however, the present invention is not limited to this case, and three or more external devices for transmitting signals to and from the semiconductor device 2b may be provided.

[0111] (Third Modification Example of Semiconductor System SYS2)

[0112] Fig.15is a block diagram showing a third modification example of the semiconductor system SYS2 as a semiconductor system SYS2c.

[0113] The semiconductor system SYS2c includes a semiconductor device 2c and external devices 5 and 6. The semiconductor device 2c includes one photocoupler control circuit 14 shared by two receiving paths, instead of two photocoupler control circuits 14_1 and 14_2 respectively provided in two receiving paths in the semiconductor device 2b. Further, the semiconductor device 2c includes one photocoupler control circuit 28 shared by two transmitting paths, instead of two photocoupler control circuits 28_1 and 28_2 respectively provided in two transmitting paths in the semiconductor device 2b. The other components of the semiconductor device 2c are the same as those of the semiconductor device 2b, and thus their description is omitted.

[0114] The semiconductor device 2c and the semiconductor system SYS2c having the semiconductor device 2c can achieve the same effect as the semiconductor device 1c and the semiconductor system SYS1c having the semiconductor device 1c. Further, the semiconductor device 2c and the semiconductor system SYS2c having the semiconductor device 2c drive the insulating circuits 27_1 and 27_2 only when the changes in the output signals Dout_1 and Dout_2 are detected, thereby reducing the power consumed by the insulating circuits 27_1 and 27_2. The semiconductor device 2c and the semiconductor system SYS2c having the semiconductor device 2c are not as good as the semiconductor device 2b and the semiconductor system SYS2b having the semiconductor device 2b in reducing power consumption; however, they can reduce the number of optical coupler control circuits, thereby suppressing the increase in circuit size.

[0115] Third embodiment

[0116] Fig.16 : is a block diagram showing a configuration example of a semiconductor system SYS3 in which the semiconductor device 3 according to the third embodiment is mounted.

[0117] like Fig.16 As shown, the semiconductor system SYS3 includes a semiconductor device 3 and external devices 5 and 7. The external device 5 is, for example, various types of sensors or remote I / O. The external device 7 is a device on Ethernet (registered trademark), so that the semiconductor device 3 performs Ethernet communication with the external device 7 based on the input signal Din received from the external device 5 through the insulating circuit. Specifically, the semiconductor device 3 includes an internal circuit 31 instead of the internal circuit 11 in the semiconductor device 1. Compared with the internal circuit 11, the internal circuit 31 further includes an Ethernet controller 315.

[0118] The Ethernet controller 315 transmits the processing result of the CPU 111 to a device on Ethernet through Ethernet communication and receives data from a device on Ethernet through Ethernet communication.

[0119] The external device 7 is, for example, a host device, which has a function of determining whether the internal circuit 31 must receive the input signal Din. Upon receiving an instruction to achieve the effect that the internal circuit 31 does not need to receive the input signal Din from the internal circuit 31 as the host device, the Ethernet controller 315 sends the above instruction to the CPU 111. Regardless of whether the input signal Din changes, the CPU 111 stops the driving of the insulating circuit 13 by the photocoupler control circuit 14. Therefore, the input signal Din is not sent from the external device 5 to the internal circuit 31 through the insulating circuit 13.

[0120] In the case of obtaining an instruction to achieve an effect that does not require the input signal Din to be entered from the host device, the other components of the semiconductor device 3 and the operation of the semiconductor device 3 are the same as those of the semiconductor device 1; their description is omitted.

[0121] As mentioned above, the semiconductor device 3 and the semiconductor system SYS3 according to the present invention obtain information to achieve the effect that the input signal Din does not need to be sent from the host device through Ethernet communication. Based on the obtained information, they control whether to drive the insulating circuit 13. The semiconductor device 3 and the semiconductor system SYS3 according to the present invention can avoid driving the insulating circuit 13 when the input signal Din is not required, thereby reducing the power consumed by the insulating circuit 13.

[0122] The external device that performs Ethernet communication with the semiconductor device 3 is not limited to the host device, and may be any other device than the host device.

[0123] As mentioned above, the semiconductor device and the semiconductor system having the same according to the first to third embodiments drive the insulating circuit only when a change in the input signal Din is detected, thereby reducing power consumed by the insulating circuit.

[0124] As mentioned above, the present invention proposed by the inventors has been specifically described based on the embodiments; however, it goes without saying that the present invention is not limited to the above-mentioned embodiments, and various modifications are possible without departing from the spirit of the present invention.

[0125] For example, the conductivity type (p-type or n-type) of a semiconductor substrate, a semiconductor layer, a diffusion layer (diffusion region), etc. may be changed in the structure of the semiconductor device according to the embodiment. Therefore, when one conductivity type of the n-type and the p-type is defined as a first conductivity type and the other conductivity type is defined as a second conductivity type, the first conductivity type may be the p-type and the second conductivity type may be the n-type, or the first conductivity type may be the n-type and the second conductivity type may be the p-type.

Claims

1. A semiconductor device comprising: a first control circuit that delivers current to a first signal path of a first power system for a predetermined period of time upon detecting a change in a first input signal provided externally; a first insulating unit that transmits a first pulse signal indicating a change of the first input signal from the first signal path to a second signal path of a second power system insulated from the first signal path according to a current flowing to the first signal path; a first holding circuit that reproduces the first input signal from the first pulse signal sent by the first insulating unit to the second signal path; a first internal circuit that receives the first input signal reproduced by the first holding circuit; a second control circuit that delivers current to a third signal path of the first power system for a predetermined period of time upon detecting a change in a second input signal provided externally; a second insulating unit that transmits a second pulse signal indicating a change of the second input signal from the third signal path to a fourth signal path of the second power system insulated from the third signal path according to a current flowing to the third signal path; as well as a second holding circuit that reproduces the second input signal from the second pulse signal sent by the second insulating unit to the fourth signal path, The first internal circuit further receives the second input signal reproduced by the second holding circuit.

2. The device according to claim 1, in, The first insulating unit is an optical coupler.

3. The device according to claim 1, in, The first internal circuit includes Writable memory circuits, and The writable memory circuit is used as the first holding circuit.

4. The device according to claim 1, in, The first control circuit is designed to deliver current to the first signal path and the third signal path of the first power system for a predetermined period when a change of the second input signal provided externally is detected in addition to when a change of the first input signal is detected.

5. A semiconductor system comprising: The semiconductor device according to claim 1; as well as An external device generates the first input signal and outputs the first input signal to the semiconductor device.

6. A semiconductor system comprising: The semiconductor device according to claim 1; an external device that generates the first input signal and outputs the first input signal to the semiconductor device; as well as a host device, the host device communicating with the semiconductor device via Ethernet, Wherein, the semiconductor device When a command to eliminate the need to input the first input signal is received from the host device, the first control circuit stops supplying current to the first insulating unit regardless of whether the first input signal changes.

7. The device according to claim 1, in, The first insulating unit includes a switch, the switch being disposed on the first signal path and being turned on for a predetermined period of time when the first control circuit detects a change in the first input signal, a light emitting diode that is provided in series with the switch on the first signal path and converts the current into light when the current flows to the first signal path by turning on the switch, a phototransistor disposed on the second signal path and turned on when receiving light from the light emitting diode, and A resistance element converts the current flowing to the phototransistor into a voltage and outputs the voltage as the first pulse signal.

8. The device according to claim 1, in, The first insulating unit includes a first switch, which is disposed on the first signal path and is turned on for a predetermined period of time when a change in the first input signal is detected, a first light emitting diode that is disposed in series with the first switch on the first signal path and converts the current into light when the first switch is turned on and the first control circuit provides the current to the first signal path for a predetermined period of time, a first phototransistor disposed on the second signal path and turned on when receiving light from the first light emitting diode, and a first resistance element that converts a current flowing to the first phototransistor into a voltage and outputs the voltage as the first pulse signal, Wherein, the second insulating unit includes a second switch which is provided on the third signal path provided in parallel with the first signal path and is turned on during a period when the first input signal indicates an H level, a second light emitting diode that is disposed in series with the second switch on the third signal path and converts the current into light when the second switch is turned on and the first control circuit provides the current to the third signal path for a predetermined period of time, a second phototransistor which is provided on the fourth signal path of the second power system and is turned on when receiving the light of the second light emitting diode, and a second resistance element that converts the current flowing to the second phototransistor into a voltage and outputs the voltage as a second pulse signal, and The first holding circuit reproduces the first input signal by receiving the second pulse signal in synchronization with the rising edge of the first pulse signal.

9. A method for controlling a semiconductor device, comprising the steps of: upon detecting a change in a first input signal provided externally, delivering current to a first signal path of a first power system for a predetermined period of time; transmitting a first pulse signal indicating a change in the first input signal from the first signal path to a second signal path of a second power system insulated from the first signal path according to a current flowing to the first signal path; reproducing the first input signal from the first pulse signal sent to the second signal path; providing the reproduced first input signal to a first internal circuit; upon detecting a change in the output signal generated by the first internal circuit, passing current to a third signal path of the second power system for a predetermined period of time; sending a second pulse signal indicating a change in the output signal from the third signal path to a fourth signal path of the first power system insulated from the third signal path, according to a current flowing to the third signal path; reproducing the output signal from the second pulse signal sent to the fourth signal path, and The reproduced output signal is output.

10. A semiconductor device comprising: a first control circuit that delivers current to a first signal path of a first power system for a predetermined period of time upon detecting a change in a first input signal provided externally; a first insulating unit that transmits a first pulse signal indicating a change of the first input signal from the first signal path to a second signal path of a second power system insulated from the first signal path according to a current flowing to the first signal path; a first holding circuit that reproduces the first input signal from the first pulse signal sent by the first insulating unit to the second signal path; a first internal circuit that receives the first input signal reproduced by the first holding circuit; a second control circuit that, upon detecting a change in the output signal generated by the first internal circuit, delivers current to a third signal path of a second power system for a predetermined period of time; as well as a second insulating unit that transmits a second pulse signal indicating a change in the output signal from the third signal path to a fourth signal path of the first power system that is insulated from the third signal path, according to a current flowing to the third signal path; wherein the output signal is reproduced from the second pulse signal transmitted by the second insulating unit by using a holding circuit provided in an external device.

11. A semiconductor system comprising: The device according to claim 10, and the external device.

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