Active mixer-based microwave downconverter with high isolation, low power and high dynamic range
By adopting an active mixer-based design in the RF downconverter and using the combination of transformers and filters, the dynamic range and power consumption of the RF downconverter are solved, and the simultaneous high dynamic range and low power consumption are achieved. Improves signal-to-noise ratio and isolation effect.
Patent Information
- Application Number
- CN201910481032.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2018-06-06
- Filing Date
- 2019-06-04
- Publication Date
- 2024-12-31
- Estimated Expiration
- 2039-06-04
AI Technical Summary
Existing RF downconverters are affected by low dynamic range, high power consumption and poor local oscillator port-to-RF port isolation, making it difficult to achieve good dynamic range while maintaining low power consumption and local oscillator port-to-RF port isolation.
Using an active mixer-based design, including a low noise amplifier, a transformer and two bias circuits, the bias of the mixer is increased through transformer magnetic coupling and isolates the LNA and mixer domain signal current, and uses a filter to reduce tail The noise of the current source improves the signal-to-noise ratio and attenuates the noise through a low-pass filter.
A relatively low power consumption is achieved while providing relatively high dynamic range, and improves isolation between the LNA and the mixer, reducing overall system noise.
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Figure CN110572131B_ABST
Abstract
Description
Background Art
[0001] RF downconverters typically suffer from low dynamic range, high power consumption, and poor local oscillator port to RF port isolation. Current-commutated Gilbert cell mixers are driven with low amplitude local oscillator signals to provide excellent switching speeds, which makes them attractive for microwave or millimeter wave operation. However, these mixers are noisy and are therefore accompanied by a low noise amplifier (LNA) to keep the overall noise within the system budget. Conventional solutions have difficulty achieving good dynamic range, characterized by the input-referred third-order intercept point minus the noise figure (IIP3-NF), while maintaining low power consumption and local oscillator (LO) port to RF port isolation. Summary of the invention
[0002] In some examples, a downconverter includes an amplifier, a mixer, a first bias circuit, a second bias circuit, and a transformer. The amplifier is configured to receive a radio frequency input. The transformer includes a primary winding and a secondary winding. The primary winding is coupled to receive an amplifier output signal and is coupled to a power supply voltage. The secondary winding is coupled to the mixer and the first bias circuit at a first node, and is coupled to the mixer and the second bias circuit at a second node. The first bias circuit includes a first bias transistor and a first node configured to be coupled to the mixer. In some examples, the first bias circuit also includes a first filter. The second bias circuit includes a second bias transistor and a second node configured to be coupled to the mixer. In some examples, the second bias circuit also includes a second filter. The mixer includes: a first transistor and a second transistor, which are coupled to the first bias circuit at the first node; a third transistor and a fourth transistor, which are coupled to the second bias circuit at the second node; and a first resistor and a second resistor. The second transistor and the fourth transistor are coupled to the third node. The first transistor and the third transistor are coupled to the fourth node. The first resistor is coupled to the fourth node and the power supply voltage node, and the second resistor is coupled to the third node and the power supply voltage node. BRIEF DESCRIPTION OF THE DRAWINGS
[0003] For a detailed description of various examples, reference will now be made to the accompanying drawings, in which:
[0004] Figure 1 An exemplary active mixer-based microwave downconverter is shown according to one embodiment.
[0005] Figure 2 An example configuration of an active mixer based microwave down converter according to one embodiment is shown.
[0006] Figure 3 Additional example configurations of active mixer-based microwave downconverters according to one embodiment are shown.
[0007] Figure 4 Another example configuration of an active mixer based microwave down converter according to one embodiment is shown.
[0008] Figure 5 Another example configuration of an active mixer based microwave down converter according to one embodiment is shown. DETAILED DESCRIPTION
[0009] Described herein is an example of a microwave downconverter based on an active mixer. In the disclosed example, the downconverter includes a mixer, a low noise amplifier (LNA), a transformer, and two bias circuits. The disclosed mixer is a derivative of a Gilbert cell mixer and is used as an active mixer. The disclosed mixer is magnetically coupled to the LNA via a transformer. Each bias circuit includes a transistor biased to operate as a current source in a saturation region and a filter for reducing the noise of the transistor acting as a current source. Some downconverters include an isolation transformer in which a secondary winding is coupled to the gate of an input transistor in a switching core that feeds the mixer. However, in the disclosed example, the isolation transformer is coupled so that the secondary winding is coupled to the emitter of the switching port transistor of the mixer.
[0010] The arrangement of transformers in the disclosed downconverter allows for improved biasing of the mixer and isolation of the LNA and mixer domain signal currents. The noise of each tail current source (bias transistor) is attenuated by a low pass filter without compromising signal bandwidth. The current gain from the interstage transformer improves the signal-to-noise ratio (SNR) of the input signal to be mixed with the associated input signal from the oscillator. As a result, the disclosed downconverter provides a relatively high dynamic range while achieving relatively low power consumption, and also provides improved isolation between the LNA and the mixer.
[0011] Figure 1An example of an active mixer-based microwave downconverter 100 is shown, which downconverts a radio frequency (RF) signal 115. In this example, the downconverter 100 includes a mixer 120 as an active mixer. The disclosed mixer 120 is magnetically coupled to a low noise amplifier (LNA) 130 through a transformer 150 and includes transistors M2, M3, M5 and M6 and resistors R1 and R2. The downconverter 100 also includes two bias circuits 145A and 145B. The first bias circuit 145A includes M1 coupled to a filter 140A. The second bias circuit 145B includes M4 and a filter 140B. Transistors M1 and M4 are used as bias transistors and operate in a saturation region to act as current sources. Filters 140A and 140B attenuate noise from tail current sources M1 and M4. In some implementations, bias circuits 145A and 145B introduce relatively little noise to down converter 100. LNA 130 amplifies RF signal 115. Mixer 120 mixes or multiplies the output of LNA 130 with an oscillator signal (eg, local oscillator (LO) signal 118).
[0012] As described above, LNA 130 receives RF input signal 115. Transformer 150 magnetically couples LNA 130 to mixer 120 and amplifies current from LNA 130 based on a comparison of the number of windings in primary winding 154 and the number of windings in secondary winding 156. Magnetic coupling through transformer 150 isolates LNA 130 from mixer 120 and provides independent current paths through each of LNA 130 and mixer 120. This isolation reduces LO coupling through the system. Transformer 150 is powered by supply voltage VDD provided on supply voltage node 105. In some examples, transformer 150 is a balun, which is a type of transformer used to connect a balanced line having two conductors and equal currents in opposite directions to an unbalanced line having a single conductor and ground.
[0013] As shown, one terminal of the secondary winding 156 of the transformer 150 is connected to the inductor L1 of the filter 140A of the bias circuit 145A and to the emitters of M2 and M3 from the mixer 120 at a node 111. Similarly, the other terminal of the secondary winding 156 is connected to the inductor L2 of the filter 140B of the bias circuit 145B and to the emitters of M5 and M6 from the mixer 120 at a node 121. Figure 1The transistors M2, M3, M5 and M6 in the example include bipolar junction transistors (BJT). Each transistor includes a control input terminal (base) and a pair of current terminals (collector and emitter). In other examples, the transistors M2, M3, M5 and M6 are implemented as n-type metal oxide semiconductor field effect transistors (NMOS) or p-type metal oxide semiconductor field effect transistors (PMOS). As field effect transistors, the control input terminal is the gate terminal, and the current terminals are the source terminal and the drain terminal.
[0014] As previously discussed, transistors M1 and M4 from bias circuits 145A and 145B are used as bias transistors and operate in the saturation region to act as tail current sources. In this example, transistors M1 and M4 include NMOS transistors and include a control input and a pair of current terminals. As field effect transistors, the control input includes a gate terminal, and the current terminal includes a source terminal and a drain terminal. In other examples, transistors M1 and M4 can be implemented as bipolar junction transistors (BJTs), and in these examples, the control input includes a base terminal, and the current terminal includes an emitter terminal and a collector terminal. The source terminals of M1 and M4 are connected to ground node 110, and the gates of M1 and M4 are connected to bias voltage Vb. The bias voltage Vb is selected so that transistors M1 and M4 operate in the saturation region. The drain terminals of bias transistors M1 and M4 are connected to filters 140A and 140B, respectively.
[0015] As previously discussed, filters 140A and 140B reduce the noise of tail bias current Itail. In this example, filters 140A and 140B include inductors and capacitors. Filter 140A includes inductor L1 and capacitor C1. Filter 140B includes inductor L2 and capacitor C2. In other examples, filters 140A and 140B include resistors and capacitors. The architecture of the filter and the values of the filter components enable the filter to achieve a frequency response that reduces noise without affecting the RF input signal 115. Inductor L1 and capacitor C1 are connected together and connected to the drain of M1. Capacitor C1 is connected to ground node 110. Inductor L2 and capacitor C2 are connected together and connected to the drain of M4. Capacitor C2 is connected to ground node 110.
[0016] As previously discussed, the emitters of M2 and M3 are connected together at node 111, while the emitters of M5 and M6 are connected together at node 121. The base terminals of M2 and M6 are connected to an oscillator and receive LO signal 118. The oscillator can be on the same chip as mixer 120, or separate from mixer 120 on a different chip. The base terminals of M3 and M5 are connected to each other and receive LO signal 118. Signal 116. represents the local oscillator signal and is reciprocal with respect to the LO signal 118. The collectors of M2 and M5 are connected to resistor R1 at node 141. The collectors of M3 and M6 are connected to resistor R2 at node 131. Resistors R1 and R2 are connected to the power supply voltage node 105 (VDD). The voltage of the intermediate frequency signal IF is VIF + and VIF - Output. The intermediate frequency signal represents the mixed LO signal 118, signal 116 and RF input signal 115.
[0017] In some examples, downconverter 100 is fabricated on a single semiconductor die ("chip"). For example, Figure 1 The mixer 120, LNA 130, transformer 150, and bias circuits 145A and 145B are shown as being fabricated on a single semiconductor die 125. In other examples, such as in Figure 2-Figure 5 In , downconverter 100 includes components provided on different semiconductor dies. Figure 2 In the example of FIG. 1 , the mixer 120 , the bias circuits 145A and 145B, and the transformer 150 are arranged on a common semiconductor die 202 , while the LNA 130 is provided on a separate semiconductor die 204 . Figure 3 In the example of FIG. 3 , LNA 130 , transformer 150 , bias circuits 145A and 145B are disposed on die 304 , while mixer 120 is disposed on a separate die 302 . Figure 4 In the example of FIG. 4 , LNA 130 , transformer 150 , mixer 120 , and bias transistors M1 and M4 are disposed on die 402 , while filters 140A and 140B are disposed on a different die 404 . Figure 5 In the example of , the transformer coupling 150 and bias transistors M1 and M4 are arranged on a single semiconductor die 502 , while the LNA 130 , filters 140A and 140B, and mixer 120 are provided on one or more separate dies 504 .
[0018] As previously mentioned, the example downconverter 100 provides a relatively high dynamic range. For readability purposes, the dynamic range will be discussed in terms of the dynamic range inverse (DRI): DRI can be expressed by , where XGM represents the amplitude of the LNA 130 referenced to the input referenced third order intercept point of the input of the LNA, XM represents the amplitude of the mixer 120 referenced to the input referenced third order intercept point of the input of the mixer 120, IGM represents the noise current of the input transistor of the LNA 130, and IM represents the noise current of the mixer 120 referenced to the input of the mixer 120. Due to the reduced noise of the entire downconverter, the increased input referenced third order intercept point, and the low current operation, the example downconverter 100 provides a relatively high dynamic range. The noise in the downconverter is relatively low because the LNA 130 operates at a lower current, the mixer 120 operates at an improved current, the transformer coupling 150 provides current gain, and the noise from the tail current Itail is filtered by the filters 140A and 140B. Due to the reduced number of active devices in the path of the RF signal 115, the input referenced third order intercept point is higher, thereby reducing intermodulation generation. As previously discussed with respect to noise, the LNA 130 and mixer 120 operate at improved currents. This in turn allows the example downconverter 100 to operate at lower currents.
[0019] Certain terms have been used in this specification and claims to refer to specific system components. As will be appreciated by those skilled in the art, different parties may refer to components by different names. This document is not intended to distinguish between components that differ in name but not in function. In this disclosure and claims, the terms "include" and "comprise" are used in an open manner and should be interpreted to mean "including but not limited to". In addition, the term "coupled" means an indirect or direct wired or wireless connection. Thus, if a first device is coupled to a second device, that connection may be achieved through a direct connection or through an indirect connection via other devices and connections.
[0020] The above discussion is intended to illustrate the principles and various embodiments of the present invention. Once the above disclosure is fully understood, many changes and modifications will become apparent to those skilled in the art. The appended claims are intended to be interpreted as including all such changes and modifications.
Claims
1. A down converter, comprising: a first bias circuit comprising a first bias transistor and a first node; a second bias circuit comprising a second bias transistor and a second node; A mixer comprising: The first resistor, The second resistor, a first transistor and a second transistor coupled together at the first node and coupled to the first bias circuit, a third transistor and a fourth transistor coupled together at the second node and coupled to the second bias circuit, wherein the second transistor and the fourth transistor are coupled together at a third node, the first transistor and the third transistor are coupled together at a fourth node, the first resistor is coupled to the fourth node and to a power supply voltage node, and the second resistor is coupled to the third node and to the power supply voltage node; and a transformer coupled to receive the amplifier output signal and to the mixer, the transformer comprising a primary winding and a secondary winding, wherein the primary winding is coupled to receive the amplifier output signal and to a power supply voltage, and the secondary winding is coupled to the mixer and the first bias circuit at the first node, and is coupled to the mixer and the second bias circuit at the second node.
2. The downconverter of claim 1, wherein the first bias circuit further comprises a first filter coupled to the first bias transistor and the first node, and the second bias circuit further comprises a second filter coupled to the second bias transistor and the second node.
3. The downconverter of claim 2, wherein the first filter comprises a first inductor coupled to the first node and a first capacitor, and the first capacitor is also coupled to a ground node, and the second filter comprises a second inductor coupled to the second node and a second capacitor, and the second capacitor is also coupled to the ground node.
4. The downconverter of claim 2, wherein the first filter and the second filter are located on the same semiconductor die as the mixer.
5. The downconverter of claim 1, wherein the base terminal of the first transistor and the base terminal of the fourth transistor are coupled to receive a first signal from an oscillator, and the base terminal of the second transistor and the base terminal of the third transistor are coupled to receive a second signal from the oscillator.
6. The downconverter of claim 1 , further comprising an oscillator for providing a first oscillator signal to base terminals of the first and fourth transistors and a second oscillator signal to base terminals of the second and third transistors, wherein the oscillator is located on the same semiconductor die as the downconverter. 7 . The down converter according to claim 1 , wherein a voltage of an intermediate frequency signal is output at the third node and the fourth node.
8. A down converter, comprising: an amplifier coupled to receive a radio frequency input signal and to produce an amplified output signal; a first bias circuit comprising a first bias transistor and a first node configured to be coupled to a mixer; a second bias circuit comprising a second bias transistor and a second node, the second node configured to be coupled to the mixer; as well as A transformer comprising a primary winding and a secondary winding, wherein the primary winding is coupled to the amplifier and to a supply voltage node, and the secondary winding is coupled to the first bias circuit at the first node and to the second bias circuit at the second node.
9. The down converter according to claim 8, further comprising the mixer, wherein the mixer comprises: a first resistor; a second resistor; a first transistor and a second transistor coupled to the first bias circuit at the first node; as well as a third transistor and a fourth transistor coupled to the second bias circuit at the second node; and wherein the second transistor and the fourth transistor are coupled together at a third node, The first transistor and the third transistor are coupled together at a fourth node, The first resistor is coupled to the fourth node and to a supply voltage node, and The second resistor is coupled to the third node and to the supply voltage node.
10. The downconverter of claim 9, wherein the base terminal of the first transistor and the base terminal of the fourth transistor are coupled to receive a first signal from an oscillator, and the base terminal of the second transistor and the base terminal of the third transistor are coupled to receive a second signal from the oscillator.
11. The downconverter of claim 10, wherein the oscillator and the transformer are located on the same semiconductor die. 12 . The down converter of claim 9 , wherein a voltage of an intermediate frequency signal is output at the third node and the fourth node.
13. The downconverter of claim 8, wherein the first bias circuit further comprises a first filter coupled to the first bias transistor and the first node, and the second bias circuit further comprises a second filter coupled to the second bias transistor and the second node.
14. The downconverter of claim 13, wherein the first filter comprises a first inductor coupled to the first node and a first capacitor, and the first capacitor is further coupled to a ground node, and the second filter comprises a second inductor coupled to the second node and a second capacitor, and the second capacitor is further coupled to the ground node.
15. The downconverter of claim 13, wherein the first filter and the second filter are located on the same semiconductor die as the amplifier.
16. A down converter, comprising: an amplifier coupled to receive an input signal and to produce an amplified output signal; a first bias circuit comprising a first bias transistor coupled to the first inductor; a second bias circuit comprising a second bias transistor coupled to the second inductor; a mixer including a first resistor and a second resistor and first, second, third and fourth transistors, wherein the first and second transistors are coupled to the first inductor of the first bias circuit at a first node, the third and fourth transistors are coupled to the second inductor of the second bias circuit at a second node, the first resistor is coupled to the first and third transistors and to a power supply voltage node, and the second resistor is coupled to the second and fourth transistors and to the power supply voltage node; as well as A transformer includes a primary winding and a secondary winding, wherein the primary winding is coupled to receive the amplified output signal, and the secondary winding is coupled to the first node and to the second node to output the amplified output signal to the mixer.
17. The downconverter of claim 16, wherein the base terminal of the first transistor and the base terminal of the fourth transistor are coupled to receive a first signal from an oscillator, and the base terminal of the second transistor and the base terminal of the third transistor are coupled to receive a second signal from the oscillator.
18. The downconverter of claim 17, wherein the oscillator and the mixer are located on the same semiconductor die.
19. The down converter of claim 17, wherein a third node interconnecting the first resistor to the first transistor and the third transistor provides an intermediate frequency signal referenced to a voltage at a fourth node interconnecting the second resistor to the second transistor and the fourth transistor.
20. The downconverter of claim 16, wherein the first bias circuit further comprises a first capacitor coupled to the first inductor and to a ground node, and the second bias circuit further comprises a second capacitor coupled to the second inductor and to the ground node.