Flip chip bonding method
Through heating and pressure control in flip chip bonding method, the problems of void and chamfer defects in flip chip bonding are solved, and high-density and miniaturization of semiconductor package assembly are realized.
Patent Information
- Application Number
- CN201910752106.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2018-08-20
- Filing Date
- 2019-08-15
- Publication Date
- 2025-01-03
- Estimated Expiration
- 2039-08-15
AI Technical Summary
The prior art is difficult to effectively reduce defects such as gaps and chamfers during flip chip bonding, affecting the density and thickness of semiconductor packages, and it is difficult to achieve high-speed assembly while miniaturizing the installation area and thickness.
By obtaining a bare chip and bonding it to the second substrate, the voids in the adhesive layer are removed with heating and pressure-forced air above the atmosphere, the curing process of the adhesive layer is controlled, the bonding quality is ensured, and by adjusting the temperature and air pressure Remove defects.
The defects of voids and chamfers are significantly reduced, the density and thickness of semiconductor packages are improved, high-speed assembly and miniaturized installation are achieved, while improving bonding quality.
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Figure CN110854028B_ABST
Abstract
Description
[0001] CROSS-REFERENCE TO RELATED APPLICATIONS
[0002] This application claims the benefit of Korean Patent Application No. 10-2018-0096743 filed on August 20, 2018 in the Korean Intellectual Property Office, the entire contents of which are incorporated herein by reference. Technical Field
[0003] The inventive concepts herein relate to methods of manufacturing semiconductor devices, and more particularly, to flip-chip bonding methods. Background Art
[0004] In semiconductor packages used in electronic products, the current trend is toward smaller size and thickness. Therefore, there is interest in methods of interconnecting semiconductor chips to a package substrate by flip chip bonding in order to provide high-density and high-capacity semiconductor packages, and to assemble semiconductor packages at high speed while minimizing the mounting area and thickness of the semiconductor packages. Summary of the invention
[0005] Embodiments of the inventive concept provide a flip chip bonding method capable of reducing defects such as voids and fillets.
[0006] An embodiment of the inventive concept provides a flip chip bonding method, comprising: obtaining a die, the die comprising a first substrate and an adhesive layer on the first substrate; bonding the die to a second substrate different from the first substrate; and curing the adhesive layer. Curing the adhesive layer comprises: heating the second substrate to melt the adhesive layer, and providing air having a pressure greater than atmospheric pressure to the adhesive layer and the second substrate.
[0007] An embodiment of the present invention also provides a flip chip bonding method, comprising: obtaining a plurality of bare chips, each of the plurality of bare chips comprising a first substrate and an adhesive layer located on the first substrate; providing the plurality of bare chips onto a second substrate; heating the plurality of bare chips and the adhesive layer to a first temperature to melt the bumps and the adhesive layer of the plurality of bare chips; pressing the plurality of bare chips against the second substrate; determining whether the number of bare chips among the plurality of bare chips that are bonded to the second substrate in response to the pressing is greater than a reference number; when it is determined that the number of bare chips bonded to the second substrate is greater than a reference number, heating the second substrate to a second temperature to re-melt the adhesive layer, the second temperature being less than the first temperature; and removing voids from the adhesive layer by providing air having a pressure equal to or greater than atmospheric pressure to the adhesive layer and the second substrate.
[0008] An embodiment of the present invention also provides a flip chip bonding method, comprising: placing a bare die on a second substrate, the bare die comprising a first substrate having metal bumps and an adhesive layer located on the first substrate; heating the bare die to a first temperature; pressing the bare die against the second substrate after heating to bond the bare die to the second substrate; heating the second substrate to a second temperature in an oven after pressing to melt the adhesive layer; and removing voids in the melted adhesive layer by increasing the air pressure in the oven to greater than the atmospheric pressure. BRIEF DESCRIPTION OF THE DRAWINGS
[0009] Figure 1 A flowchart of a flip chip bonding method according to an example embodiment of the inventive concepts is shown.
[0010] Figure 2 , Figure 3 , Figure 4 , Figure 5 , Figure 6 , Figure 7 , Figure 8 , Fig. 9 and Fig.10 Shows the description Figure 1 A cross-sectional view of a flip chip bonding method.
[0011] Fig.11 Shows Figure 1 Flowchart of the steps of obtaining a die in a flowchart of .
[0012] Fig.12 Shows Figure 1 Flowchart of the steps of bonding dies in a flowchart of FIG.
[0013] Fig.13 Shows Figure 1 Flow chart of the steps of curing the adhesive layer.
[0014] Fig.14 shows how the void removal rate depends on Fig. 9 Graph of the air pressure in the housing shown in .
[0015] Fig.15 A cross-sectional view of the chamfer of the bonding layer under typical vacuum pressure is shown. DETAILED DESCRIPTION
[0016] Figure 1 A flowchart of a flip chip bonding method according to an example embodiment of the inventive concepts is shown. Figure 2 , Figure 3 , Figure 4 , Figure 5 , Figure 6 , Figure 7 , Figure 8 , Fig. 9 and Fig.10 Shows the description Figure 1 A cross-sectional view of a flip chip bonding method.
[0017] Reference Figures 1 to 10 , the flip chip bonding method according to the present invention includes: a step S10 of obtaining a die 40; a step S20 of bonding the die 40; a step S30 of determining whether a given number of die (i.e., multiple die) 40 are bonded; and a step S40 of curing the adhesive layer 30. Hereinafter, the die 40 may refer to both a single die or multiple die. In step S10, the die 40 may be prepared from a first substrate 10. In step S20, the adhesive layer 30 may be used to attach the die 40 to a second substrate 50 (i.e., the die 40 is bonded to a second substrate 50 different from the first substrate 10). In step S30, a determination is made as to whether a given number of die 40 are bonded to the second substrate 50. In step S40, defects may be removed from the adhesive layer 30.
[0018] Fig.11 It shows that Figure 1 An example of step S10 of obtaining the die 40 is shown in the flowchart of FIG.
[0019] Reference Figures 2 to 4 and Fig.11 The step S10 of obtaining the die 40 may include a step S12 of forming the bumps 20 , a step S14 of forming the adhesive layer 30 , and a step S16 of cutting the adhesive layer 30 and the first substrate 10 .
[0020] Reference Figure 2 and Fig.11 , a ball attach device (not shown) may form bumps 20 on or over first substrate 10 (S12). For example, first substrate 10 may include a silicon wafer. First substrate 10 may have a plurality of first pads 12 on or over its upper main surface. First pads 12 may be conductive. Bumps 20 may be formed on first pads 12. Each of bumps 20 may include a solder ball. Each of bumps 20 may be metallic.
[0021] Reference Figure 3 and Fig.11, an adhesive coating device (not shown) may form an adhesive layer 30 on or above the first substrate and the bump 20 (S14). The adhesive layer 30 may be coated on the entire main surface of the first substrate 10. The adhesive layer 30 may include a non-conductive film (NCF) or a non-conductive paste (NCP). For example, the adhesive layer 30 may include a thermosetting resin, a hardener, and a reducing agent. The thermosetting resin may include, for example, bisphenol A epoxy resin, bisphenol F epoxy resin, novolac epoxy resin, aliphatic epoxy resin, or glycidylamine epoxy resin. The hardener may cure the thermosetting resin. The hardener may include, for example, an amine or a polyimide. The thermosetting resin and the hardener may have an equivalent ratio of, for example, a calorie value per unit mass of about 100 joules / gram (J / g) to about 150 J / g. The thermosetting resin and the hardener may have, for example, a mixing ratio of about 10:1 to about 15:1. The reducing agent may react at a temperature of about 100° C. to about 150° C. or higher to remove native oxide from the first pad 12 and the bump 20. For example, one or more alcohol hydroxyl groups (e.g., dimethanol, diethylene glycol, butanetriol, or triethanolamine), one or more phenolic hydroxyl groups (e.g., naphthol, hydroxyhydroquinone, or trihydroxybenzophenone), one or more carboxylic acids (e.g., oxalic acid, succinic acid, malonic acid, an oxygen-containing acid, or a carboxylic acid derivative), a nitrogen-containing compound having an unshared electron pair (e.g., imidazole or amine), or a combination thereof may be included in one molecule of the reducing agent.
[0022] The adhesive layer 30 may further include a flux such as carboxylic acid hydrate, hydroxyl hydrate, or phenol hydrate, etc. The reducing agent may react with the native oxide at about 150°C.
[0023] Reference Figure 4 and Fig.11 , the cutting device 42 can cut the adhesive layer 30 and the first substrate 10 into a plurality of dies 40 (S16). The cutting device 42 can be, for example, a wafer saw or a laser saw. The die 40 can include, for example, a memory chip, a logic chip, or an application processor (AP). When viewed from a plan view, the die 40 can have a rectangular shape.
[0024] Fig.12 It shows that Figure 1 An example of step S20 of bonding the die 40 is shown in the flowchart of FIG.
[0025] Reference Figures 5 to 7 and Fig.12 In step S20, a thermal compression process is performed on the die 40 and the adhesive layer 30. For example, the step S20 of bonding the die 40 may include the step S22 of providing the die 40, the step S24 of heating the die 40, and the step S26 of pressing the die 40.
[0026] Reference Figure 5 and Fig.12, the bonding head 60 may provide (i.e., place) the die 40 on the second substrate 50 (S22). The second substrate 50 may have a plurality of second pads 52 on the upper main surface. The second pads 52 may be conductive. The bump 20 may be aligned with the second pads 52. The first pad 12 may also be aligned with the second pad 52. The bonding head 60 may align the first pad 12 with the second pad 52 in about 0.5 seconds or less. The bonding head 60 may have a first heater 62. The first heater 62 may be connected in series with a first power supply 64 and a first switch 66. The first power supply 64 may supply a first heating power to the first heater 62. The first switch 66 may control the first heating power.
[0027] Reference Figure 6 and Fig.12 When the first switch 66 is closed, the first heater 62 powered by the first heating power may heat the die 40 and melt the bumps 20 and the adhesive layer 30 of the die 40 (S24). The first heater 62 may, for example, heat the die 40 to a temperature of about 150° C. to about 300° C. (i.e., a first temperature).
[0028] Reference Figure 7 and Fig.12 , as indicated by the arrow, the bonding head 60 may press the die 40 against the second substrate 50 (S26). The bump 20 may connect the first pad 12 to the second pad 52. The bonding head 60 may bond the die 40 to the second substrate 50 at a high speed. For example, the bonding head 60 may press the die 40 against the second substrate 50 for about 3 seconds to about 4 seconds to bond the die 40 to the second substrate 50. However, if the die 40 is quickly pressed for a specific time or duration for bonding as described above, the curing reaction between the thermosetting resin and the hardener of the bonding layer 30 may not be strong or complete. In addition, quickly bonding the die 40 as described may generate a large number of voids 32 in the bonding layer 30. The voids 32 may be defects of the bonding layer 30. The voids 32 may be generated near the top surface of the second substrate 50 and may occupy about 4% of the total volume of the bonding layer 30.
[0029] When the first switch 66 is subsequently turned off, the bump 20 and the adhesive layer 30 may cool. Subsequently, the bump 20 and the adhesive layer 30 may solidify.
[0030] Alternatively, the adhesive layer 30 may be formed on the second substrate 50, and the die 40 may be subsequently provided on the adhesive layer 30. However, in this case, the adhesive layer 30 may contaminate the side and bottom surfaces of the second substrate 50, and there may also be an alignment error of the die 40. In contrast, when the adhesive layer 30 is formed on the die 40, and the die 40 having the adhesive layer 30 thereon is subsequently bonded to the second substrate 50, an alignment error of the die 40 may be prevented.
[0031] Reference Figure 1 and Figure 8 In step S30, the controller 100 may determine whether a given number of dies 40 are bonded to the second substrate 50. The controller 100 may, for example, perform a known test and / or inspection of the dies 40 to determine whether the dies 40 are successfully bonded to the second substrate 50. For example, the controller 100 may determine whether the number of dies successfully bonded to the second substrate 50 in step S20 is greater than a reference number. In the case where a given number of dies 40 are not bonded to the second substrate 50 (or in other words, the number of dies 40 successfully bonded to the second substrate 50 is not greater than the reference number (No in S30)), the flip chip bonding method returns to step S20, and the bonding head 60 may additionally and / or repeatedly perform bonding of at least one die 40 to the second substrate 50 (S20). As a result, a given number of dies 40 may be bonded to the second substrate 50 (or in other words, the number of dies 40 successfully bonded to the second substrate 50 is greater than the reference number (Yes in S30)), and the flip chip bonding method may proceed to step S40.
[0032] In the case where the second substrate 50 is a printed circuit board, about 200 to about 500 dies 40 may be bonded to the second substrate 50, and the duration of the bonding (S20) of the dies 40 may be, for example, about 6 minutes to about 25 minutes. In the case where the second substrate 50 is a silicon wafer, about 1000 dies 40 may be bonded to the second substrate 50, and the duration of the bonding (S20) of the dies 40 may be, for example, about 50 minutes to about 1 hour.
[0033] Fig.13 It shows that Figure 1 An example of step S40 of curing the adhesive layer 30 is shown in the flowchart.
[0034] Reference Fig. 9 , Fig.10 and Fig.13 , a reflow soldering process may be performed on the adhesive layer 30 at step S40 of curing the adhesive layer 30. For example, the adhesive layer 30 may be successfully cured within about 10 minutes to about 60 minutes. Step S40 of curing the adhesive layer 30 may include step S42 of heating the second substrate 50 and step S44 of providing air 82.
[0035] Reference Fig. 9 and Fig.13 , when a given number of dies 40 are bonded to the second substrate 50 (or in other words, the number of dies 40 successfully bonded to the second substrate 50 is greater than the reference number ( Figure 1In S30 of S42), the second substrate 50 may be heated in the oven 70 (S42). In the oven 70, the second substrate 50 may be heated to re-melt the adhesive layer 30 and / or the bump 20. For example, the oven 70 may include a housing 72, a plate 74, a second heater 76, and a second power source 78. The housing 72 in which the second substrate 50 is placed may provide an airtight and enclosed space. The plate 74 may belong to the floor side of the housing 72 or may exist on the floor side of the housing 72. The second substrate 50 may be loaded or held on the plate 74. The second heater 76 may be installed or arranged in the plate 74. When the second power source 78 supplies a second heating power to the second heater 76, the second heater 76 may heat the second substrate 50. The second heater 76 may heat the second substrate 50 to a temperature (i.e., a second temperature) of, for example, about 100°C to about 150°C. The second temperature may be lower than the first temperature. When the second substrate 50 is heated to a temperature of about 100° C. to about 150° C., the adhesive layer 30 and / or the bump 20 may be melted, and the melted adhesive layer 30 may have a viscosity of about 2000 Pascal-seconds (Pa·s) to about 3000 Pa·s. Alternatively, the second substrate 50 may be heated to a temperature of about 50° C. to about 200° C. to melt the adhesive layer 30, and the melted adhesive layer 30 may have a viscosity of about 500 Pa·s to about 4000 Pa·s. The housing 72 may be coupled to the air supply portion 80.
[0036] Reference Fig.10 and Fig.13 , the air supply unit 80 can provide air 82 to the bonding layer 30 and the second substrate 50 in the housing 72, thereby removing the gap 32 from the bonding layer 30 (S44). The air 82 may include, for example, nitrogen, helium, oxygen, carbon dioxide gas, or argon gas, or a combination thereof. The air supply unit 80 may include an air pump. When the air supply unit 80 provides air 82 to the housing 72, the pressure of the air 82 in the housing 72 may be increased. When the pressure of the air 82 in the housing 72 increases, the cohesion and / or surface tension of the bonding layer 30 may increase. When the cohesion and / or surface tension of the bonding layer 30 increases, the gap 32 may be discharged or removed from the bonding layer 30.
[0037] Fig.14 Shown is a graph showing how the removal rate of voids 32 depends on the pressure of air 82 in housing 72. The horizontal axis shows air pressure (MPa), and the vertical axis shows the void removal rate.
[0038] Reference Fig.14, when the pressure of the air 82 in the housing 72 is equal to or greater than about 3 bar (or 0.3 MPa), the removal rate of the voids 32 can be equal to or greater than about 97%. When the pressure of the air 82 in the housing 72 is about 7 bar (or 0.7 MPa) to about 10 bar (or 1.0 MPa), the removal rate of the voids 32 can be almost about 100%. When the pressure of the air 82 in the housing 72 is equal to or greater than about 4 bar (or 0.4 MPa), the removal rate of the voids 32 can be almost about 98%. When the pressure of the air 82 in the housing 72 is about 1 bar (or 0.1 MPa) to about 2 bar (or 0.2 MPa), the removal rate of the voids 32 can be equal to or less than about 95%.
[0039] Fig.15 A cross-sectional view of the chamfer 34 of the adhesive layer 30 under typical vacuum pressure is shown.
[0040] Reference Fig.15 , when the pressure of the air 82 in the housing 72 is reduced to the vacuum pressure, the voids 32 in the adhesive layer 30 can be quickly removed or reduced. The housing 72 can be engaged with the exhaust portion 90 to extract or pump the air 82 out of the housing 72. The exhaust portion 90 can include an air pump. The pressure of the air 82 in the housing 72 can be reduced to the vacuum pressure. However, when the pressure of the air 82 is reduced to the vacuum pressure, the chamfer 34 of the adhesive layer 30 can be generated and / or increased. The chamfer 34 is a defect formed when a portion of the adhesive layer 30 protrudes outward to the outside of the die 40. In other words, the chamfer 34 of the adhesive layer 30 protrudes above the upper main surface of the die 40.
[0041] It may be desirable to arrange the package on die 40. When chamfer 34 is higher or thicker than die 40 (or in other words, when chamfer 34 protrudes above the upper major surface of die 40), the package may be poorly stacked on die 40.
[0042] Return to reference Fig. 9 and Fig.10 The air supply part 80 can provide the air 82 in the housing 72 to have a pressure equal to or greater than the atmospheric pressure (or 1 bar). Therefore, defects such as the gap 32 and the chamfer 34 can be reduced or removed from the adhesive layer 30.
[0043] In the flip chip bonding method according to the inventive concept, air having a pressure greater than atmospheric pressure may be supplied to an adhesive layer between a substrate and a die, which may reduce defects of the adhesive layer such as voids and chamfers.
[0044] Although the present invention has been described with reference to exemplary embodiments, it will be appreciated by those skilled in the art that various changes and modifications may be made without departing from the technical spirit and features of the present invention. Therefore, it should be understood that the above embodiments are illustrative rather than restrictive.
Claims
1. A flip chip bonding method, comprising: Obtaining a die, the die comprising a first substrate having a plurality of bumps and an adhesive layer located on the first substrate; bonding the die to a second substrate different from the first substrate; as well as curing the adhesive layer, The step of bonding the die to the second substrate different from the first substrate comprises: providing the die on the second substrate, heating the die to a first temperature to melt the plurality of bumps and the adhesive layer, and pressing the die against the second substrate, The curing of the adhesive layer comprises: heating the second substrate to a second temperature to selectively re-melt the adhesive layer, the second temperature being lower than the first temperature, and Air having a pressure stronger than atmospheric pressure is supplied to the adhesive layer and the second substrate to remove voids in the adhesive layer.
2. The method according to claim 1, wherein: The air is provided at a pressure equal to or greater than 3 bar.
3. The method according to claim 1, wherein: The adhesive layer comprises: Epoxy resin; and a hardener for curing the epoxy resin, The epoxy resin and the hardener have an equivalent ratio of calorie value per unit mass of 100 joules / gram to 150 joules / gram.
4. The method according to claim 3, wherein: The adhesive layer also includes a reducing agent.
5. The method according to claim 4, wherein: The reducing agent includes one or more of alcoholic hydroxyl groups, phenolic hydroxyl groups, carboxylic acids and nitrogen-containing compounds, wherein The alcohol hydroxyl group includes dimethylol, diethylene glycol, butanetriol or triethanolamine, The phenolic hydroxyl group includes naphthol, hydroxyhydroquinone, or trihydroxybenzophenanthrone. The carboxylic acid includes oxalic acid, succinic acid, malonic acid, an oxoacid or a carboxylic acid derivative, and The nitrogen-containing compound includes imidazole or amine.
6. The method according to claim 1, wherein: Heating the second substrate includes heating the second substrate to 50° C. to 200° C. so that the adhesive layer has a viscosity of 500 Pa·s to 4000 Pa·s.
7. The method according to claim 1, wherein: Curing the adhesive layer includes performing a solder reflow process.
8. The method according to claim 1, wherein: Pressing the die against the second substrate includes performing a thermocompression process.
9. The method according to claim 1, wherein: The heating the die includes heating the die to 150°C to 300°C.
10. A flip chip bonding method, comprising: obtaining a plurality of dies, each of the plurality of dies comprising a first substrate and an adhesive layer on the first substrate; providing the plurality of dies onto a second substrate; heating the plurality of dies and the adhesive layer to a first temperature to melt the bumps of the plurality of dies and the adhesive layer; pressing the plurality of dies against the second substrate; determining whether a number of dies among the plurality of dies bonded to the second substrate in response to the pressing is greater than a reference number; When it is determined that the number of the dies bonded to the second substrate is greater than the reference number, heating the second substrate to a second temperature to re-melt the adhesive layer, the second temperature being less than the first temperature; as well as The voids are removed from the adhesive layer by supplying air having a pressure equal to or greater than atmospheric pressure to the adhesive layer and the second substrate.
11. The method according to claim 10, wherein: The first temperature is 150°C to 300°C, and The second temperature is 100°C to 150°C.
12. The method according to claim 10, wherein: heating the second substrate in an oven, and The air is provided by an air supply engaged with the oven.
13. The method according to claim 12, wherein: The oven comprises: case; a plate disposed in the housing and configured to hold the second substrate; and A heater is disposed in the plate and configured to heat the second substrate.
14. The method according to claim 10, wherein: The obtaining of a plurality of bare chips comprises: forming the bumps on a plurality of first pads of the substrate; forming an adhesive on the bump and the substrate; and The adhesive and the substrate are cut to provide the plurality of dies, each of which includes the cut adhesive and the cut substrate as the first substrate and the adhesive layer, respectively.
15. The method according to claim 10, wherein: The air is provided at a pressure equal to or greater than 3 bar.
16. The method according to claim 10, wherein: The adhesive layer comprises: Epoxy resin; and a hardener for curing the epoxy resin, Wherein, the epoxy resin and the hardener have a mixing ratio of 10:1 to 15:
1.
17. The method according to claim 16, wherein: The epoxy resin includes bisphenol A epoxy resin, bisphenol F epoxy resin, novolac epoxy resin, aliphatic epoxy resin, or glycidylamine epoxy resin.
18. The method according to claim 16, wherein: The hardener includes an amine or a polyimide.
19. The method according to claim 16, wherein: The adhesive layer further comprises a reducing agent, The reducing agent reacts with the native oxide on the bump at the second temperature or higher.
