A crystal oscillator circuit with an oscillation limiting function

Abstract

The present invention discloses a crystal oscillator circuit with an oscillation limiting function, which includes a current source, a crystal oscillator core circuit and an oscillation limiting control circuit. The crystal oscillator core circuit includes an inverter, a feedback resistor, a crystal oscillator, a comparator, a buffer, a first capacitor and a second capacitor; the oscillation limiting control circuit includes a third capacitor, a fourth P-channel MOS transistor and a transconductance operational amplifier; the source of the fourth P-channel MOS transistor, one end of the third capacitor and the inverting input terminal of the transconductance operational amplifier are connected to the driving terminal of the inverter; the gate of the fourth P-channel MOS transistor is connected to the other end of the third capacitor and the output terminal of the transconductance operational amplifier, and the drain is grounded; the non-inverting input terminal of the transconductance operational amplifier receives a reference voltage; the present invention clamps and limits the crystal oscillator core circuit with a large oscillation amplitude through the oscillation limiting control circuit, and limits the oscillation amplitude of the output signal of the crystal oscillator core circuit.

Description

〖Technical Field〗

[0001] The present invention relates to the technical field of crystal oscillators, and particularly to a crystal oscillator circuit with an oscillation limiting function. 〖Background Art〗

[0002] Crystal oscillators have good frequency accuracy and stability, small volume and low power consumption, and are often used as time-frequency references, widely applied in systems such as communication, radar, navigation, and guidance. Crystal oscillators can provide high-precision clock signals for various electronic systems. In some applications with relatively high requirements for the performance of the crystal oscillator clock, an excessive amplitude of the crystal oscillator means that the crystal oscillator is overdriven, which will increase the radiation interference of the crystal oscillator and affect the phase noise characteristics of the crystal oscillator clock. Therefore, controlling the crystal oscillation amplitude has become a technical problem that needs to be solved by those skilled in the art. 〖Summary of the Invention〗

[0003] The purpose of the present invention is to provide a crystal oscillator circuit with an oscillation limiting function to control the amplitude of the output signal of the crystal oscillator circuit and improve the reliability of the crystal oscillator circuit.

[0004] To achieve the purpose of the present invention, the technical solution adopted by the present invention is as follows:

[0005] A crystal oscillator circuit with an oscillation limiting function includes a current source and a crystal oscillator core circuit. The crystal oscillator core circuit includes an inverter, a feedback resistor, a crystal oscillator, a comparator, a buffer, a first capacitor, and a second capacitor; the current output terminal of the current source is connected to the driving terminal of the inverter; the input terminal and the output terminal of the inverter are respectively connected to both ends of the feedback resistor, the input terminal and the output terminal of the crystal oscillator, two input terminals of the comparator, one end of the first capacitor, and one end of the second capacitor, and the grounding terminal is grounded; the output terminal of the comparator is connected to the input terminal of the buffer, and the output terminal of the buffer outputs a clock signal;

[0006] The crystal oscillator circuit with an oscillation limiting function further includes an oscillation limiting control circuit; the oscillation limiting control circuit includes a third capacitor, a fourth P-channel MOS transistor, and a transconductance operational amplifier; the source terminal of the fourth P-channel MOS transistor, one end of the third capacitor, and the inverting input terminal of the transconductance operational amplifier are connected to the driving terminal of the inverter; the gate terminal of the fourth P-channel MOS transistor is connected to the other end of the third capacitor and the output terminal of the transconductance operational amplifier, and the drain terminal is grounded; the non-inverting input terminal of the transconductance operational amplifier receives a reference voltage.

[0007] As a specific implementation manner, the current source includes a zero-th independent current source, a first independent current source, a second independent current source... an N-th independent current source, a second switch to an N-th switch, where N is a positive integer and N≥2; the input end of the zero-th independent current source receives a reference current, and the output end is connected to the input ends of the first independent current source, the second independent current source... the N-th independent current source; the output end of the first independent current source is connected to the driving end of the inverter, and the output ends of the second independent current source to the N-th independent current source are respectively connected to one ends of the second switch to the N-th switch, and the other ends of the second switch to the N-th switch are all connected to the driving end of the inverter.

[0008] As a specific implementation manner, the zero-th independent current source includes a zero-th P-channel MOS transistor. The drain of the zero-th P-channel MOS transistor receives the reference current, and the gate is connected to the drain and is also connected to the input ends of the first independent current source, the second independent current source... the N-th independent current source.

[0009] As a specific implementation manner, the n-th independent current source includes an n-th P-channel MOS transistor. The gate of the n-th P-channel MOS transistor is connected to the output end of the zero-th independent current source, where n is a positive integer and 2≤n≤N; the source of the n-th P-channel MOS transistor is connected to the power supply, and the drain is connected to one end of the n-th switch.

[0010] As a specific implementation manner, the inverter includes a first P-channel MOS transistor, a second P-channel MOS transistor, a third P-channel MOS transistor, a first N-channel MOS transistor, a second N-channel MOS transistor, and a third N-channel MOS transistor; the sources of the first P-channel MOS transistor, the second P-channel MOS transistor, and the third P-channel MOS transistor are connected to each other, and the connection point is the driving end of the inverter; the gate of the first P-channel MOS transistor is connected to the gate of the first N-channel MOS transistor, and the connection point is the input end of the inverter. The gate of the first P-channel MOS transistor is connected to the gates of the second P-channel MOS transistor and the third P-channel MOS transistor, and the gate of the first N-channel MOS transistor is connected to the gates of the second N-channel MOS transistor and the third N-channel MOS transistor; the drain of the third P-channel MOS transistor is connected to the drain of the third N-channel MOS transistor, and the connection point is the output end of the inverter. The drains of the first P-channel MOS transistor and the second P-channel MOS transistor MP2 are respectively connected to the drains of the first N-channel MOS transistor MN1 and the second N-channel MOS transistor MN2, and are also connected to the drains of the third P-channel MOS transistor MP3 and the third N-channel MOS transistor MN3; the sources of the first N-channel MOS transistor, the second N-channel MOS transistor, and the third N-channel MOS transistor are connected, and the connection point is the ground end of the inverter.

[0011] Furthermore, the crystal oscillator circuit with oscillation limiting function further includes a fourth N-channel MOS transistor; the gate of the fourth N-channel MOS transistor is connected to the driving end of the inverter, and the source and drain are grounded.

[0012] Advantages of the present invention:

[0013] As can be seen from the above technical solutions, the present invention clamps and limits the core circuit of the crystal oscillator when the oscillation amplitude is large through the oscillation limiting control circuit, and limits the oscillation amplitude of the output signal of the core circuit of the crystal oscillator. Further, the present invention controls the number of independent current sources that supply current to the core circuit of the crystal oscillator by closing / opening the switch, and further controls the magnitude of the current output by the current source to the core circuit of the crystal oscillator. 〖BRIEF DESCRIPTION OF THE DRAWINGS〗

[0014] In order to more clearly illustrate the embodiments of the present invention, the drawings required for use in the embodiments will be briefly introduced below. The drawings in the following description are only the embodiments in the present invention. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0015] Figure 1 is a block diagram of the crystal oscillator circuit with oscillation limiting function provided in Embodiment 1 of the present invention;

[0016] Figure 2 is a circuit schematic diagram of the crystal oscillator circuit with oscillation limiting function provided in Embodiment 1 of the present invention;

[0017] Figure 3 is a circuit schematic diagram of the crystal oscillator circuit with oscillation limiting function provided in Embodiment 2 of the present invention. 〖DETAILED DESCRIPTION OF THE EMBODIMENTS〗

[0018] The present invention will be described in detail below with reference to the drawings.

[0019] In order to make the purpose, technical solution, and advantages of the present invention clearer, the present invention will be further described in detail below with reference to the drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.

[0020] Embodiment 1

[0021] As Figure 1As shown in the figure, a crystal oscillator circuit with an oscillation limiting function includes a current source 100, a crystal oscillator core circuit 200, an oscillation limiting control circuit 300, and a fourth N-channel MOS transistor MN4; the crystal oscillator core circuit includes an inverter INV, a feedback resistor RF, a crystal oscillator XTAL, a comparator CMP, a buffer BUF, a first capacitor C1, and a second capacitor C2; the oscillation limiting control circuit includes a third capacitor C3, a fourth P-channel MOS transistor MP4, and a transconductance operational amplifier OTA; the power supply terminal of the current source 100 is connected to the power supply VDD, and the current input terminal receives a reference current I REF , the current output terminal is connected to the driving terminal of the inverter INV, the source electrode of the fourth P-channel MOS transistor MP4, the gate electrode of the fourth N-channel MOS transistor MN4, one end of the third capacitor C3, and the inverting input terminal of the transconductance operational amplifier OTA; the input terminal of the inverter INV is connected to one end of the feedback resistor RF, the input terminal XI of the crystal oscillator XTAL, the non-inverting input terminal of the comparator CMP, and one end of the first capacitor C1, and the output terminal is connected to the other end of the feedback resistor RF, the output terminal X0 of the crystal oscillator XTAL, the inverting input terminal of the comparator CMP, and one end of the second capacitor C2; the other end of the third capacitor C3 is connected to the gate electrode of the fourth P-channel MOS transistor MP4 and the output terminal of the transconductance operational amplifier OTA; the non-inverting input terminal of the transconductance operational amplifier OTA receives a reference voltage V REF ; the output terminal of the comparator CMP is connected to the input terminal of the buffer BUF, and the output terminal of the buffer BUF outputs a clock signal CLKO; the ground terminal of the inverter INV, the ground terminal of the transconductance operational amplifier OTA, the drain electrode of the fourth P-channel MOS transistor MP4, the source and drain electrodes of the fourth N-channel MOS transistor MN4, and the other ends of the first capacitor C1 and the second capacitor C2 are grounded to GND.

[0022] In this embodiment, the crystal oscillator XTAL and the first capacitor C1 and the second capacitor C2 form a resonant network, and the center frequency of the resonant network is the natural oscillation frequency of the crystal oscillator XTAL; the inverter INV and the resonant network form a negative resistance oscillator, and the current source 100 receives a reference current I REF , and outputs an excitation to the inverter INV; the feedback resistor RF is used to reduce the risk of the crystal oscillator XTAL being damaged due to over-excitation; the input terminal XI and the output terminal XO of the crystal oscillator XTAL oscillate, and output a sine wave signal to the comparator CMP, and the comparator CMP shapes the sine wave signal and outputs a square wave signal to the buffer BUF, and the buffer BUF is used to improve the output load driving ability of the crystal oscillator core circuit.

[0023] In this embodiment, the working principle of the crystal oscillator circuit with an oscillation limiting function for controlling the clock signal output by the crystal oscillator core circuit is as follows:

[0024] When the crystal oscillator XTAL just starts to oscillate, the oscillation amplitudes of the signals output from the input terminal XI and the output terminal XO of the crystal oscillator XTAL are relatively small, and the driving voltage V of the driving terminal of the inverter INV OSC is also relatively small (because the oscillation amplitude of the crystal oscillator XTAL and the driving circuit, that is, the driving energy of the inverter INV, are proportional within a certain range), and the driving voltage V OSC is less than the reference voltage V REF ; the transconductance operational amplifier OTA outputs an amplified voltage to the gate of the fourth P-channel MOS transistor MP4. This amplified voltage is close to the power supply voltage VDD, and the fourth P-channel MOS transistor MP4 is turned off. The driving voltage V of the driving terminal of the inverter INV OSC will not be pulled down. That is, when the oscillation amplitude of the signal output from the output terminal XO of the crystal oscillator XTAL is small, the oscillation limiting control circuit 300 will not turn on the clamping and limiting function;

[0025] As the oscillation time goes by, the oscillation amplitudes of the signals output from the input terminal XI and the output terminal XO of the crystal oscillator XTAL become larger and larger, and the driving voltage V of the driving terminal of the inverter INV OSC also becomes larger and larger until the driving voltage V OSC is greater than the reference voltage V REF , the transconductance operational amplifier OTA outputs an amplified voltage to the gate of the fourth P-channel MOS transistor MP4. This amplified voltage is pulled down to the ground voltage GND, the fourth P-channel MOS transistor MP4 is turned on, and the driving voltage V of the driving terminal of the fourth P-channel MOS transistor MP4 OSC is pulled down, and the oscillation limiting control circuit 300 turns on the clamping and limiting function, which is equivalent to reducing the current flowing into the crystal oscillator core circuit. The oscillation amplitude of the signal output by the crystal oscillator core circuit will thus decrease. Through continuous feedback control, the oscillation amplitude of the signal output by the crystal oscillator core circuit is finally accurately controlled.

[0026] As Figure 2 shown, in this embodiment, the current source 100 includes a zero-th independent current source 110, a first independent current source 111, a second independent current source 112, a third independent current source 113, a fourth independent current source 114, a second switch S2, a third switch S3, and a fourth switch S4; the input terminal of the zero-th independent current source 110 receives a reference current I REF, the output terminal is connected to the input terminals of the first independent current source 111, the second independent current source 112, the third independent current source 113, and the fourth independent current source 114, and outputs current to the first independent current source 111, the second independent current source 112, the third independent current source 113, and the fourth independent current source 114; the output terminal of the first independent current source 111 is connected to the driving terminal of the inverter INV, and the output terminals of the second independent current source 112, the third independent current source 113, and the fourth independent current source 114 are respectively connected to one end of the second switch S2, one end of the third switch S3, and one end of the fourth switch S4, and the other ends of the second switch S2, the third switch S3, and the fourth switch S4 are connected to the driving terminal of the inverter INV. The second switch S2, the third switch S3, and the fourth switch S4 control the second independent current source 112, the third independent current source 113, and the fourth independent current source 114 to output current / stop outputting current to the crystal oscillator core circuit by closing / opening, thereby controlling the magnitude of the current output by the current source 100 to the crystal oscillator core circuit.

[0027] As Figure 2 shown, in this embodiment, the zero - th independent current source 110 includes a zero - th P - channel MOS transistor MP_0, the first independent current source 111 includes a first P - channel MOS transistor MP_1, the second independent current source 112 includes a second P - channel MOS transistor MP_2, the third independent current source 113 includes a third P - channel MOS transistor MP_3, and the fourth independent current source 114 includes a fourth P - channel MOS transistor MP_4; the drain of the zero - th P - channel MOS transistor MP_0 receives the reference current I REF , the gate is connected to the drain and is connected to the gates of the first P - channel MOS transistor MP_1, the second P - channel MOS transistor MP_2, the third P - channel MOS transistor MP_3, and the fourth P - channel MOS transistor MP_4; the sources of the zero - th P - channel MOS transistor MP_0, the first P - channel MOS transistor MP_1, the second P - channel MOS transistor MP_2, the third P - channel MOS transistor MP_3, and the fourth P - channel MOS transistor MP_4 are connected to the power supply VDD; the drain of the first P - channel MOS transistor MP_1 is connected to the driving terminal of the inverter INV; the drains of the second P - channel MOS transistor MP_2, the third P - channel MOS transistor MP_3, and the fourth P - channel MOS transistor MP_4 are respectively connected to one end of the second switch S2, one end of the third switch S3, and one end of the fourth switch S4, and the other ends of the second switch S2, the third switch S3, and the fourth switch S4 are connected to the driving terminal of the inverter INV.

[0028] As Figure 2As shown, in this embodiment, the inverter INV includes a first P-channel MOS transistor MP1, a second P-channel MOS transistor MP2, a third P-channel MOS transistor MP3, a first N-channel MOS transistor MN1, a second N-channel MOS transistor MN2, and a third N-channel MOS transistor MN3; the sources of the first P-channel MOS transistor MP1, the second P-channel MOS transistor MP2, and the third P-channel MOS transistor MP3 are connected to each other, and the connection point is the driving end of the inverter INV, which is connected to the current output end of the current source 100, the source of the fourth P-channel MOS transistor MP4, the gate of the fourth N-channel MOS transistor MN4, one end of the third capacitor C3, and the inverting input terminal of the transconductance operational amplifier OTA; the gates of the first P-channel MOS transistor MP1 and the first N-channel MOS transistor MN1 are connected, and the connection point is the input terminal of the inverter INV, which is connected to one end of the feedback resistor RF, the input terminal XI of the crystal oscillator XTAL, one end of the first capacitor C1, and the non-inverting input terminal of the comparator CMP, and the gate of the first P-channel MOS transistor MP1 is connected to the gates of the second P-channel MOS transistor MP2 and the third P-channel MOS transistor MP3, and the gate of the first N-channel MOS transistor MN1 is connected to the gates of the second N-channel MOS transistor MN2 and the third N-channel MOS transistor MN3; the drain of the third P-channel MOS transistor MP3 is connected to the drain of the third N-channel MOS transistor MN3, and the connection point is the output terminal of the inverter INV. The drains of the first P-channel MOS transistor MP1 and the second P-channel MOS transistor MP2 are respectively connected to the drains of the first N-channel MOS transistor MN1 and the second N-channel MOS transistor MN2, and are connected to the drains of the third P-channel MOS transistor MP3 and the third N-channel MOS transistor MN3; the sources of the first N-channel MOS transistor MN1, the second N-channel MOS transistor MN2, and the third N-channel MOS transistor MN3 are connected to each other, and the connection point is the ground terminal of the inverter INV.

[0029] In this embodiment, the maximum value of the oscillation amplitude of the output signal of the crystal oscillator core circuit depends on the reference voltage V REF , and the maximum amplitude of the voltage at the output terminal XO of the crystal oscillator XTAL is approximately V REF - 0.1V, where 0.1V is approximately the conduction voltage V DS of the first P-channel MOS transistor MP1, the second P-channel MOS transistor MP1, and the third P-channel MOS transistor MP1.

[0030] In this embodiment, the reference voltage V REF is a voltage signal generated by a reference voltage generator, and the reference current I REF is a current signal generated by a reference current generator.

[0031] Embodiment 2

[0032] The difference between this embodiment and the first embodiment is as follows: The current source 100 includes a zeroth independent current source 110, a first independent current source 111, a second independent current source 112... an Nth independent current source 11N, a second switch S2 to an Nth switch SN, where N is a positive integer and N≥2; the input terminal of the zeroth independent current source 110 receives a reference current I REF , and the output terminal is connected to the input terminals of the first independent current source 111, the second independent current source 112... the Nth independent current source 11N, and outputs current to the first independent current source 111, the second independent current source 112... the Nth independent current source 11N; the output terminal of the first independent current source 111 is connected to the driving terminal of the inverter INV, and the output terminals of the second independent current source 112 to the Nth independent current source 11N are respectively connected to one ends of the second switch S2 to the Nth switch SN, and the other ends of the second switch S2 to the Nth switch SN are all connected to the driving terminal of the inverter INV. The second switch S2 to the Nth switch SN respectively control the second independent current source 112 to the Nth independent current source 11N to output current / stop outputting current to the crystal oscillator core circuit by closing / opening, thereby controlling the magnitude of the current output by the current source 100 to the crystal oscillator core circuit.

[0033] The above are only the preferred embodiments of the present invention, and the protection scope of the present invention is not limited to the above embodiments. All technical solutions falling within the concept of the present invention belong to the protection scope of the present invention. It should be noted that for those of ordinary skill in the art, several improvements and refinements made without departing from the principle of the present invention should also be regarded as within the protection scope of the present invention.

Claims

1. A crystal oscillator circuit with an oscillation limiting function, comprising a current source and a crystal oscillator core circuit. The crystal oscillator core circuit includes an inverter, a feedback resistor, a crystal oscillator, a comparator, a buffer, a first capacitor, and a second capacitor. The current output terminal of the current source is connected to the driving terminal of the inverter. The input terminal and the output terminal of the inverter are respectively connected to both ends of the feedback resistor, the input terminal and the output terminal of the crystal oscillator, the two input terminals of the comparator, one end of the first capacitor, and one end of the second capacitor, and the grounding terminal is grounded. The output terminal of the comparator is connected to the input terminal of the buffer, and the output terminal of the buffer outputs a clock signal. It is characterized in that: It further includes an oscillation limiting control circuit; the oscillation limiting control circuit includes a third capacitor, a fourth P-channel MOS transistor, and a transconductance operational amplifier; the source of the fourth P-channel MOS transistor, one end of the third capacitor, and the inverting input terminal of the transconductance operational amplifier are connected to the driving terminal of the inverter; the gate of the fourth P-channel MOS transistor is connected to the other end of the third capacitor and the output terminal of the transconductance operational amplifier, and the drain is grounded; the non-inverting input terminal of the transconductance operational amplifier receives a reference voltage V REF ; When the driving voltage V at the driving end of the inverter INV OSC is less than the reference voltage V REF ; the fourth P-channel MOS transistor MP4 is turned off, and the driving voltage V at the driving end of the inverter INV OSC will not be pulled down, and the oscillation limit control circuit will not turn on the clamping limit function; when the driving voltage V at the driving end of the inverter INV OSC is greater than the reference voltage V REF , the fourth P-channel MOS transistor MP4 is turned on, and the driving voltage V at the driving end of the fourth P-channel MOS transistor MP4 OSC is pulled down, and the oscillation limit control circuit turns on the clamping limit function.

2. The crystal oscillator circuit with an oscillation limiting function according to claim 1, characterized in that: The current source includes a zeroth independent current source, a first independent current source, a second independent current source... an Nth independent current source, a second switch to an Nth switch, where N is a positive integer and N≥2. The input terminal of the zeroth independent current source receives a reference current, and the output terminal is connected to the input terminals of the first independent current source, the second independent current source... the Nth independent current source. The output terminal of the first independent current source is connected to the driving terminal of the inverter, and the output terminals of the second independent current source to the Nth independent current source are respectively connected to one end of the second switch to one end of the Nth switch, and the other ends of the second switch to the Nth switch are all connected to the driving terminal of the inverter.

3. The crystal oscillator circuit with an oscillation limiting function according to claim 2, characterized in that: The zeroth independent current source includes a zeroth P-channel MOS transistor. The drain of the zeroth P-channel MOS transistor receives the reference current, and the gate is connected to the drain and is also connected to the input terminals of the first independent current source, the second independent current source... the Nth independent current source.

4. The crystal oscillator circuit with an oscillation limiting function according to claim 2, characterized in that: The nth independent current source includes an nth P-channel MOS transistor. The gate of the nth P-channel MOS transistor is connected to the output terminal of the zeroth independent current source, where n is a positive integer and 2≤n≤N. The source of the nth P-channel MOS transistor is connected to the power supply, and the drain is connected to one end of the nth switch.

5. The crystal oscillator circuit with an oscillation limiting function according to any one of claims 1 to 4, characterized in that: The inverter includes a first P-channel MOS transistor, a second P-channel MOS transistor, a third P-channel MOS transistor, a first N-channel MOS transistor, a second N-channel MOS transistor, and a third N-channel MOS transistor; the sources of the first P-channel MOS transistor, the second P-channel MOS transistor, and the third P-channel MOS transistor are connected to each other, and the connection point is the driving end of the inverter; the gate of the first P-channel MOS transistor is connected to the gate of the first N-channel MOS transistor, and the connection point is the input end of the inverter. The gate of the first P-channel MOS transistor is connected to the gates of the second P-channel MOS transistor and the third P-channel MOS transistor. The gate of the first N-channel MOS transistor is connected to the gates of the second N-channel MOS transistor and the third N-channel MOS transistor; the drain of the third P-channel MOS transistor is connected to the drain of the third N-channel MOS transistor, and the connection point is the output end of the inverter. The drains of the first P-channel MOS transistor and the second P-channel MOS transistor MP2 are respectively connected to the drains of the first N-channel MOS transistor MN1 and the second N-channel MOS transistor MN2, and are connected to the drains of the third P-channel MOS transistor MP3 and the third N-channel MOS transistor MN3; the sources of the first N-channel MOS transistor, the second N-channel MOS transistor, and the third N-channel MOS transistor are connected, and the connection point is the ground end of the inverter.

6. The crystal oscillator circuit with an oscillation limiting function according to claim 5, characterized in that: It further includes a fourth N-channel MOS transistor; the gate of the fourth N-channel MOS transistor is connected to the driving end of the inverter, and the source and the drain are grounded.

Images