Overcurrent Protection Circuit for Gallium Nitride Power Devices and Method for Improving Response Speed

Abstract

The present invention relates to an overcurrent protection circuit for a gallium nitride power device and a method for improving the reaction speed. The overcurrent protection circuit based on an integrated gallium nitride power device includes a monitoring circuit, a shielding signal generation circuit, and a logic control module. The monitoring circuit is electrically connected to the shielding signal generation circuit and the gate driver respectively through the logic control module. The gate driver is electrically connected to a high electron mobility power transistor, and the high electron mobility power transistor is sequentially connected to the monitoring circuit and the load.

Description

Technical Field

[0001] The present invention relates to a protection circuit in a power conversion system, and more particularly to an overcurrent protection circuit based on an integrated gallium nitride power device, and a method for improving the reaction speed of the overcurrent protection circuit and reducing the probability of false triggering. For example, similar protection circuits are required in power conversion devices such as chargers. Background Art

[0002] FIG1 is a schematic diagram of three common overcurrent protections in traditional silicon power devices.

[0003] See also Figure 1a As shown, Figure 1a For the precision resistance test method, a precision resistor needs to be placed in the power circuit, and the voltage value on the resistor is monitored to monitor whether the current in the main circuit exceeds the limit value in real time. However, this method will add some additional parasitic parameters to the main circuit, limit the high-frequency characteristics of the circuit and increase power consumption. Therefore, it is not suitable for high-speed and high-power circuits.

[0004] See also Figure 1b As shown, Figure 1b The current mirror monitoring method integrates an auxiliary device near the power device. Under the same voltage bias conditions, the current in the power device will be proportional to the circuit in the auxiliary device. In this way, the main loop current can be monitored without increasing parasitic parameters. However, when the accuracy requirement is high, the size of the auxiliary device will also become larger, resulting in a larger chip area and power loss.

[0005] See also Figure 1c As shown, Figure 1c It is a "desaturation" circuit that monitors the drain voltage value of the power device through a diode to monitor the current in the on state in real time. Considering the on-resistance in the on state, when the current is too high, the drain voltage will increase and trigger the protection mechanism. This method does not introduce parasitic inductance into the main circuit and has very low power consumption. However, when the power device is in the off state, the drain voltage will also be very high. This method requires a shielding signal to normally turn on the power device. The conventional method is to bind the shielding signal to the monitoring signal at the drain end. This reduces the reaction speed of the protection circuit and is not suitable for direct application to high-speed gallium nitride power devices. Summary of the invention

[0006] The object of the present invention is to provide a gallium nitride device with a smaller volume and current density under the same on-resistance. However, it is also more likely to be damaged due to excessive current. Therefore, in a gallium nitride power system, the overcurrent protection circuit should have an extremely high reaction speed and be able to turn off the device within an extremely short time to prevent circuit damage. At the same time, in order not to affect the excellent high-frequency characteristics of gallium nitride, the protection circuit should minimize the impact on the main circuit and affect the overcurrent protection circuit based on an integrated gallium nitride power device. Another object of the present invention is to provide a method that when the current in the power switch exceeds the limit, the monitoring signal can be directly transmitted to the control circuit without passing through the capacitor in the shielding circuit, thereby turning off the power switch to improve the reaction speed. Since the logic of the monitoring circuit and the control loop is simpler and does not require modules such as comparators and operational amplifiers, the reaction speed of the overcurrent protection circuit is improved and the probability of false triggering is reduced.

[0007] The first technical solution of the present invention is the overcurrent protection circuit based on an integrated gallium nitride power device, which is characterized in that it includes a monitoring circuit (1), a shielding signal generation circuit (2) and a logic control module (3). The monitoring circuit (1) is electrically connected to the shielding signal generation circuit (2) and the gate driver respectively through the logic control module (3), and the gate driver is electrically connected to a high electron mobility power transistor M 1 , the high electron mobility power transistor M 1 sequentially connects the monitoring circuit (1) and the load; under normal circumstances, at time t 0 , the control signal V DR is at a low level, the power device is in the off state, V DS is at a high level, and the monitoring circuit (1) feeds back a high level V S . Due to the shielding effect of the shielding branch V blank , the logic control module (3) generates a low level and does not trigger protection; at time t 1 , the control signal V DR changes from low to high, but due to the delay effect of the RC circuit, the V blank of the shielding branch is still at a low level, so that the V 1 to t 2 of the logic control module (3) is at a low level during the time period, the power device will be normally turned on, and the V OCE at the load end will drop to a stable value; when reaching t DS to t 2 , the V DS at the load end has dropped to a stable value, and the V blank of the shielding branch has also become a high level. At this time, if the current in the power device is lower than the limit value, the V DS at the load end does not exceed the threshold, so that V SChanges from high level to low level, enabling the power device to operate normally; conversely, if the current in the power device is higher than the limit value at this time, the V at the load end DS will exceed the threshold, causing V S to be maintained at a high level. After the shielding time ends, the V of the shielding branch blank becomes high level, and the device will be forced to turn off.

[0008] Preferably, the monitoring circuit (1) includes a first inverter, a second inverter, and a diode D connected in series S , and a diode D S The connection between the diode D and the second inverter is electrically connected to the working voltage VDD of the unipolar device through a resistor R 1 , and the first inverter and the second inverter are respectively connected to the working voltage VDD of the unipolar device and the ground terminal; when the power switch is in a normal working state, due to the existence of an inductive load, the current in the power device will gradually increase; as the current increases, the drain voltage will increase until it reaches the set threshold. At this time, the monitoring signal will transmit a high level to the logic control module to trigger overcurrent protection.

[0009] Preferably, the logic control module (3) is composed of a first AND gate and a second AND gate connected in series.

[0010] Preferably, the shielding signal generation circuit (2) includes a resistor R 2 and a capacitor C. One end of the resistor R 2 is connected to the common terminal of V DR (PWM) and the gate driver. The other end of the resistor R 2 is connected to the input terminal of the first AND gate and the capacitor C, and the capacitor C is grounded.

[0011] Preferably, the gate of the high electron mobility power transistor is electrically coupled to the output terminal of the gate driver. The source of the high electron mobility power transistor is grounded, and the drain of the high electron mobility power transistor is respectively connected to the cathode of the diode D S and the load Load.

[0012] The second technical solution of the present invention is the monitoring circuit based on the integrated gallium nitride power device, which is characterized in that it includes a first inverter, a second inverter, and a diode D connected in series S , and a diode D S The connection between the diode D and the second inverter is electrically connected to the working voltage VDD of the unipolar device through a resistor R 1 , and the first inverter and the second inverter are respectively connected to the working voltage VDD of the unipolar device and the ground terminal.

[0013] The third technical solution of the present invention is the shielding signal generation circuit based on the integrated gallium nitride power device, which is characterized in that it includes a resistor R 2 and a capacitor C. One end of the resistor R 2 is connected to the common end of V DR (PWM) and the gate driver. The other end of the resistor R 2 is connected to the input end of the first AND gate and the capacitor C, and the capacitor C is grounded.

[0014] The fourth technical solution of the present invention is the method for improving the response speed of the overcurrent protection circuit and reducing the probability of false triggering, which is characterized in that it includes the following steps:

[0015] ⑴ Under normal circumstances, at time t 0 , the control signal V DR is at a low level, the power device is in the off state, V DS is at a high level, and the monitoring circuit ⑴ feeds back a high level V S . Due to the shielding effect of the shielding branch V blank , the logic control module ⑶ generates a low level and will not trigger protection;

[0016] ⑵ At time t 1 , the control signal V DR changes from low to high. However, due to the delay effect of the RC circuit, the V blank of the shielding branch is still at a low level, so that the V 1 to V 2 of the logic control module ⑶ is at a low level during the time period, the power device will be normally turned on, and the V OCE at the load end will drop to a stable value; DS will drop to a stable value;

[0017] ⑶ When reaching t 2 , the V DS at the load end has dropped to a stable value, and the V blank of the shielding branch has also become high. At this time, if the current in the power device is lower than the limit value, the V DS at the load end will not exceed the threshold, so that V S changes from high level to low level, so that the power device works normally;

[0018] ⑷ On the contrary, at this time, if the current in the power device is higher than the limit value, the V DS at the load end will exceed the threshold, so that V S remains at a high level. When the shielding time ends, the V blank of the shielding branch becomes high, and the device will be forced to turn off.

[0019] Compared with the prior art, the beneficial effects of the present invention:

[0020] (1) The present invention is based on a "desaturation" overcurrent protection circuit, integrating a new circuit, a gallium nitride power device, and a drive circuit all on a single chip.

[0021] (2) The present invention reduces the oscillations and delays introduced by parasitic parameters. At the same time, the new protection circuit separates the required shielding signal from the voltage monitoring signal.

[0022] (3) By dividing the monitoring loop and the shielding signal generation loop, on the one hand, the monitoring signal does not need to pass through the capacitor in the shielding loop and can be directly connected to the control loop, increasing the overall response speed of the circuit. On the other hand, the length of the shielding signal can be adjusted by changing the capacitance and resistance according to the specific requirements of the circuit, without having to consider the problem of the circuit response speed.

[0023] (4) By optimizing the logic circuits of the monitoring loop and the control loop, the use of relatively complex circuits such as comparators, amplifiers, and reference voltages is avoided, thereby reducing the area of the entire integrated circuit and improving the response speed of the circuit.

[0024] (5) When the current in the power switch exceeds the limit, the monitoring signal can be directly transmitted to the control circuit without passing through the capacitor in the shielding circuit, thereby turning off the power switch to improve the response speed. Since the logics of both the monitoring circuit and the control loop are simpler and do not require modules such as comparators and operational amplifiers, the response speed is also improved. Description of the Drawings

[0025] Figure 1a is the resistance monitoring circuit diagram of a traditional overcurrent protection circuit;

[0026] Figure 1b is the current mirror circuit diagram of a traditional overcurrent protection circuit;

[0027] Figure 1c is the circuit diagram of a traditional "desaturation" protection circuit;

[0028] Figure 2A is the overcurrent protection circuit diagram of the present invention;

[0029] Figure 2B is the schematic diagram of the working principle of the monitoring circuit of the present invention;

[0030] Figure 3A is the waveform schematic diagram of the normal working state of the overcurrent protection circuit of the present invention;

[0031] Figure 3B is the waveform schematic diagram of the overcurrent protection trigger situation of the overcurrent protection circuit of the present invention;

[0032] Figure 4AIt is a chip photo of the basic function verification integration of the circuit protected by the present invention;

[0033] Figure 4B It is an equivalent circuit diagram of the chip for the basic function verification integration of the circuit protected by the present invention;

[0034] Figure 5A It is a coordinate graph of the drain-source saturation voltage of the drive circuit and the feedback result when the drive voltage of 6V is provided for the basic function verification of the circuit protected by the present invention;

[0035] Figure 5B It is a coordinate graph of time and feedback result for the basic function verification of the circuit protected by the present invention;

[0036] Figure 6A It is a schematic diagram of the fully integrated chip for the circuit verification of the circuit protected by the present invention;

[0037] Figure 6B It is a photo of the chip for the circuit verification of the circuit protected by the present invention mounted on a PCB board;

[0038] Figure 6C It is a test circuit diagram of the double-pulse test for the circuit verification of the circuit protected by the present invention;

[0039] Figure 7A It is a waveform diagram of the normal situation of the switch under the resistive load of the present invention;

[0040] Figure 7B It is a waveform diagram of the overcurrent situation of the switch under the resistive load of the present invention;

[0041] Figure 8A It is a waveform diagram of the normal situation of the amplified turn-on transient of the present invention

[0042] Figure 8B It is a waveform diagram of the overcurrent situation of the amplified turn-on transient of the present invention;

[0043] Figure 9A It is for the present invention under inductive load, at a lower V DS In the case, as the number of waveforms increases, the multi-pulse waveform test diagram in which the current gradually increases;

[0044] Figure 9B It is for the present invention under inductive load, when V DS Is higher, the multi-pulse waveform test diagram in which the protection mechanism can also be triggered in the device-on state. Detailed implementation manners

[0045] The present invention will be further described in detail below with reference to the accompanying drawings:

[0046] Please refer to Figure 2AAs shown, the overcurrent protection circuit based on an integrated gallium nitride power device includes a monitoring circuit (1), a shielding signal generation circuit (2), and a logic control module (3). The monitoring circuit (1) is electrically connected to the shielding signal generation circuit (2) and the gate driver respectively through the logic control module (3), and the gate driver is electrically connected to a high electron mobility power transistor M 1 , and the high electron mobility power transistor M 1 sequentially connects the monitoring circuit (1) and the load.

[0047] Please refer to Figure 2A As shown, the monitoring circuit (1) includes a first inverter, a second inverter, and a diode D connected in series S , and a resistor R electrically connected between the connection line of the diode D S and the second inverter and the operating voltage VDD of the unipolar device 1 . The first inverter and the second inverter are respectively connected to the operating voltage VDD of the unipolar device and the ground terminal.

[0048] Please refer to Figure 2A As shown, the logic control module (3) is composed of a first AND gate and a second AND gate connected in series.

[0049] Please refer to Figure 2A As shown, the shielding signal generation circuit (2) includes a resistor R 2 and a capacitor C. One end of the resistor R 2 is connected to the common terminal of V DR (PWM) and the gate driver. The other end of the resistor R 2 is connected to the input terminal of the first AND gate and the capacitor C, and the capacitor C is grounded.

[0050] Please refer to Figure 2A As shown, the gate of the high electron mobility power transistor is electrically coupled to the output terminal of the gate driver. The source of the high electron mobility power transistor is grounded, and the drain of the high electron mobility power transistor is respectively connected to the cathode of the diode D S and the load Load.

[0051] Please refer to Figure 2A As shown, the monitoring circuit based on the integrated gallium nitride power device includes a first inverter, a second inverter, and a diode D connected in series S , and a resistor R electrically connected between the connection line of the diode D S and the second inverter and the operating voltage VDD of the unipolar device 1 . The first inverter and the second inverter are respectively connected to the operating voltage VDD of the unipolar device and the ground terminal.

[0052] Please refer to Figure 2AAs shown, the shielded signal generation circuit based on the integrated gallium nitride power device includes a resistor R 2 and a capacitor C. One end of the resistor R 2 is connected to the common terminal of V DR (PWM) and the gate driver. The other end of the resistor R 2 is connected to the input terminal of the first AND gate and the capacitor C, and the capacitor C is grounded.

[0053] Figure 3A and Figure 3B are voltage schematic diagrams of all important nodes in the entire circuit. The method for improving the response speed of the overcurrent protection circuit and reducing the probability of false triggering includes the following steps:

[0054] ⑴ Under normal circumstances, at time t 0 , the control signal V DR is at a low level, the power device is in the off state, V DS is at a high level, and the monitoring circuit ⑴ feeds back a high level V S . Due to the shielding effect of the shielding branch V blank , the logic control module ⑶ generates a low level and will not trigger protection;

[0055] ⑵ At time t 1 , the control signal V DR changes from low to high. However, due to the delay effect of the RC circuit, the V blank of the shielding branch is still at a low level, making the V 1 to V 2 of the logic control module ⑶ at a low level during the time period. The power device will be normally turned on, and the V OCE at the load end will drop to a stable value; DS will drop to a stable value;

[0056] ⑶ When reaching t 2 , the V DS at the load end has dropped to a stable value, and the V blank of the shielding branch has also become high. At this time, if the current in the power device is lower than the limit value, the V DS at the load end will not exceed the threshold, causing V S to change from high level to low level, so that the power device works normally;

[0057] ⑷ Conversely, at this time, if the current in the power device is higher than the limit value, the V DS at the load end will exceed the threshold, causing V S to remain at a high level. When the shielding time ends, the V blank of the shielding branch becomes high, and the device will be forced to turn off.

[0058] Please refer to Figure 2BAs shown, the basic working principle of the monitoring circuit is as follows: when the power switch is in the normal working state, due to the presence of the inductive load, the current in the device will gradually increase. As the current increases, the drain voltage will increase until it reaches the set threshold (for VA, it is the threshold of the inverter). At this time, the monitoring signal will transmit a high level to the logic control module to trigger overcurrent protection.

[0059] Please refer to Figures 4A to 4B as shown Figure 4A is a chip screenshot of the overcurrent protection circuit of the present invention, which includes a monitoring module (1), a shielding signal generation module (2), a control logic module (3), and a switch driving module (the chip does not include a power switch). The equivalent circuit diagram of the illustrated chip is as Figure 4B shown.

[0060] Figure 5 shows the test results of the module protection circuit shown in Figure 4. Please refer to Figure 5A as shown, when V DD and V DR are fixed at a high level, a scanning signal is added to the V DS port. When V DS reaches the threshold voltage of 1V, the voltage of the gate will be forced to drop to 0V. Please refer to Figure 5B as shown, when V DD remains at a high level and the control signal V DR is a PWM wave, similarly, when V DS increases to about 1V, the gate signal will no longer follow the control signal.

[0061] Compared with the protection circuit in Figure 4, Figure 6 shows a complete overcurrent protection circuit (including a power switch). Figure 6A is a photo of the overall circuit chip, Figure 6B is a photo of the chip mounted on the PCB. Figure 6C is the circuit schematic diagram after mounting the chip.

[0062] Figure 7 shows the waveform diagram of the single-pulse test under a resistive load. The magnitude of the current of the power device is adjusted by the size of the resistive load, and its circuit diagram can be referred to Figure 6. Please refer to Figure 7A as shown, when the current is small (1A - 3A), the power device can be normally switched, and it can be seen that V DS increases as the current increases. Please refer to Figure 7B as shown, when the current reaches more than 4A, the power device will quickly turn off after the shielding time ends.

[0063] Figure 8 is a waveform zoom-in during the process of Figure 7, which more directly shows the role of the shielding time and also shows that the overall response speed of the device is about 40ns. Please refer to Figure 8AAs shown, during the shielding time, even if the parameters generated due to oscillation exceed the threshold, the device can still switch normally. Please refer to Figure 8B As shown, after the shielding time ends, the overall response time (including the shielding time) is approximately 40 ns.

[0064] Figure 9 is a waveform test diagram of multiple pulses under an inductive load. Please refer to Figure 9A As shown, at a lower V DS condition, as the number of waveforms increases, the current gradually increases. It can be seen that when V DS is close to the threshold, the next pulse only turns on the device for an instant, and the protection is triggered. Please refer to Figure 9B As shown, similarly, when V DS is high, the protection mechanism can also be triggered when the device is in the open state.

[0065] The above are only the preferred embodiments of the present invention. All equivalent changes and modifications made within the scope of the claims of the present invention shall fall within the scope covered by the claims of the present invention.

Claims

1. An overcurrent protection circuit based on an integrated gallium nitride power device, characterized in that, The invention comprises a monitoring circuit (1), a shielding signal generating circuit (2) and a logic control module (3), wherein the monitoring circuit (1) is electrically connected to the shielding signal generating circuit (2) and a gate driver through the logic control module (3), and the gate driver is electrically connected to the high electron mobility power transistor M 1 , the high electron mobility power transistor M 1 Connect the monitoring circuit ⑴ and the load in sequence; under normal circumstances, t 0 Time control signal V DR is low level, the power device is in the off state, V DS is high level, the monitoring circuit (1) feeds back a high level V S , due to the shielding branch V blank The shielding effect of the logic control module ⑶ generates a low level and will not trigger the protection; at t 1 At this moment, the control signal V DR From low to high, but due to the delay effect of the RC loop, the V blank Still low level, so that at t 1 to 2 The V of the logic control module ⑶ during the time period OCE is low, the power device will turn on normally, and the V DS will drop to a stable value; when it reaches t 2 When V at the load end DS has dropped to a stable value, and the V blank It also becomes a high level. At this time, if the current in the power device is lower than the limit value, V DS If the threshold is not exceeded, V S From high level to low level, so that the power device can work normally; on the contrary, if the current in the power device is higher than the limit value, V DS The threshold will be exceeded so that V S Maintained at a high level, when the shielding time is over, the V blank Going high will force the device to shut down.

2. The overcurrent protection circuit based on an integrated gallium nitride power device according to claim 1, characterized in that, The monitoring circuit (1) includes a first inverter, a second inverter, and a diode DS. The input terminal of the first inverter is connected in series with the output terminal of the second inverter, and the input terminal of the second inverter is connected in series with the diode D S positive electrode; and the diode D S A resistor R electrically connected between the connection line of the positive electrode and the input terminal of the second inverter and the operating voltage VDD of the unipolar device 1 The first inverter and the second inverter are respectively connected to the operating voltage VDD of the unipolar device and the ground terminal.

3. The overcurrent protection circuit based on an integrated gallium nitride power device according to claim 1, characterized in that, The logic control module ⑶ includes a first AND gate and a second AND gate. One end of the resistor R 2 is respectively connected to the input terminal of the first AND gate and the output terminal of the first inverter. The output terminal of the first AND gate is connected to the other end of the resistor R 2 and the common terminal of V DR (PWM) are respectively connected to the input terminal of the second AND gate, and the output terminal of the second AND gate is connected to the gate driver.

4. The overcurrent protection circuit based on an integrated gallium nitride power device according to claim 1, characterized in that, The shielding signal generation circuit (2) includes a resistor R 2 and a capacitor C. One end of the resistor R 2 is connected to one input terminal of the first AND gate and one end of the capacitor C, and the capacitor C is grounded; the output terminal of the first inverter is connected to the other input terminal of the first AND gate. The other end of the resistor R 2 is connected to the common terminal of V DR (PWM) and the output terminal of the first AND gate are respectively connected to the input terminals of the second AND gate, and the output terminal of the second AND gate is connected to the common terminal of the gate driver.

5. The overcurrent protection circuit based on an integrated gallium nitride power device according to claim 1, characterized in that, The gate of the high electron mobility power transistor is electrically coupled to the output terminal of the gate driver. The source of the high electron mobility power transistor is grounded, and the drain of the high electron mobility power transistor is connected to the cathode of diode D S and the load Load, respectively.

6. A monitoring circuit of the overcurrent protection circuit based on an integrated gallium nitride power device according to claim 1, characterized in that, Including a first inverter, a second inverter, a diode D S and a power switch M1. The input terminal of the first inverter is connected in series with the output terminal of the second inverter, and the input terminal of the second inverter is connected in series with the positive electrode of the diode D S ; and the connection line between the positive electrode of the diode D S and the input terminal of the second inverter is electrically connected to a resistor R DD between the working voltage V of the unipolar device 1 . The negative electrode of the diode D S is connected to the drain of the power switch M1, and the drain of the power switch M1 is the point monitored by the monitoring circuit. The gate of the power switch M1 is connected to the gate driver; the first inverter and the second inverter are respectively connected to the working voltage V of the unipolar device DD and the ground terminal; when the power switch is in the normal working state, due to the existence of the inductive load, the current in the power switch M1 will gradually increase; and as the current increases, the drain voltage will increase until it reaches the set threshold value. At this time, the monitoring signal will transmit a high level to the logic control module to trigger overcurrent protection.

7. A shielding signal generation circuit of the overcurrent protection circuit based on an integrated gallium nitride power device according to claim 1, characterized in that, including resistor R 2 and capacitor C, one end of the resistor R 2 is respectively connected to two input terminals of a first AND gate with the output terminal of a first inverter, one end of the resistor R 2 is further connected to the capacitor C, and the capacitor C is grounded; the other end of the resistor R 2 is connected to the common terminal of V DR (PWM), and the output terminal of the first AND gate are respectively connected to the input terminals of a second AND gate, and the output terminal of the second AND gate is connected to the common terminal of the gate driver.

8. A method for improving the response speed of an overcurrent protection circuit and reducing the probability of false triggering, characterized in that, comprising the following steps: ⑴ Under normal circumstances, at time t 0 the control signal V DR is at a low level, the power device is in the off state, V DS is at a high level, and the monitoring circuit ⑴ feeds back a high level V S . Due to the shielding effect of the shielding branch V blank , the logic control module ⑶ generates a low level and does not trigger protection; ⑵ At time t 1 , the control signal V DR changes from low to high. However, due to the delay effect of the RC circuit, V blank of the shielding branch is still at a low level, causing V 1 of the logic control module ⑶ to be at a low level during the time period from t 2 to t OCE . The power device will be normally turned on, and V DS at the load end will drop to a stable value; ⑶ When reaching t 2 the V at the load end DS has already dropped to a stable value, and the V of the shielding branch blank also becomes high level. At this time, if the current in the power device is lower than the limit value, the V at the load end DS will not exceed the threshold, causing V S to change from high level to low level, so that the power device works normally; ⑷ On the contrary, if the current in the power device is higher than the limit value at this time, the V at the load end DS will exceed the threshold, causing V S to be maintained at a high level. After the shielding time ends, the V of the shielding branch blank becomes high level, and the device will be forced to turn off.

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