A fast power supply modulation circuit for an amplifier

Abstract

The present invention relates to an amplifier fast power modulation circuit, comprising a common-source transistor, wherein the source of the common-source transistor is grounded, the gate of the common-source transistor is connected to a bias voltage via a bias resistor, the drain of the common-source transistor is connected to a power supply terminal, and the gate of the common-source transistor is coupled to a radio frequency signal input terminal. The amplifier circuit according to the present invention also includes a power modulation switch, wherein a control port of the power modulation switch is connected to the modulation circuit, an output lower port of the power modulation switch is connected to the bias voltage, and an output upper port of the power modulation switch is coupled to the radio frequency signal input terminal.

Description

Technical Field

[0001] The present invention relates to the field of radio frequency microwave communications, and in particular to a fast power supply modulation circuit for an amplifier. Background Art

[0002] In radio frequency microwave systems such as wireless communications and radar, amplifiers are widely used in various transceiver links to amplify weak signals. However, in time-division communication systems, the receive and transmit modes must be constantly switched, requiring fast switching times in the transceiver link. As a crucial active component in this link, the amplifier's switching time directly determines the link's switching time. Therefore, an amplifier circuit with fast power supply modulation is needed.

[0003] Drain power modulation is a common fast power modulation implementation method and is widely used in III-V amplifiers. Its principle block diagram is shown in the following figure. Figure 1 As shown, the power modulator P1 is placed below the power supply. The main problem with this structure is that it is not suitable for use in high-voltage systems. This is because, when the switch P1 is turned on, the gate-source voltage of P1 will be too large, which will affect the life of P1 and may even directly cause gate-source breakdown of P1.

[0004] Traditional gate power modulation is another common power modulation implementation method. Its principle block diagram is as follows Figure 2 As shown in Figure 1, the amplifier is turned on and off by controlling the gate bias voltage VBIAS_N1 of the amplifier tube N1. The switching time depends on Rg*Cpar, where Cpar is the parasitic capacitance on the gate node of the common source MOS tube. However, since the system often requires the amplifier to have low noise, the value of Rg is large. Therefore, the switching time of this traditional gate power supply modulation amplifier will be very long. Its switching time is as follows: Figure 3 shown. Summary of the Invention

[0005] In order to meet the requirements of various time-division communication systems for the switching time of the transmit and receive links without affecting the performance of existing amplifiers and being able to adapt to high power supply voltage requirements, it is necessary to propose a new type of fast power supply modulation circuit structure for amplifiers.

[0006] According to one aspect of the present invention, there is provided an amplifier fast power modulation circuit, comprising a common-source transistor, wherein the source of the common-source transistor is grounded, the gate of the common-source transistor is connected to a bias voltage via a bias resistor, the drain of the common-source transistor is connected to a power supply terminal, and the gate of the common-source transistor is coupled to a radio frequency signal input terminal. The circuit also comprises a power modulation switch, wherein a control port of the power modulation switch is connected to a modulation circuit, an output upper port of the power modulation switch is coupled to the radio frequency signal input terminal, and an output lower port of the power modulation switch is connected to a bias voltage, so that two output ports of the power modulation switch are connected in parallel with the bias resistor.

[0007] According to another aspect of the fast power modulation circuit of the present invention, the power modulation switch is an NMOS transistor or a PMOS transistor.

[0008] The fast power modulation circuit according to another aspect of the present invention further includes a load circuit, wherein the drain of the common-source transistor is connected to the power supply terminal through the load circuit.

[0009] The fast power modulation circuit according to another aspect of the present invention further includes a feedback circuit, and the source of the common-source transistor is grounded through the feedback circuit.

[0010] According to another aspect of the present invention, the fast power modulation circuit further includes a bias capacitor. The bias resistor and the bias capacitor are connected in series and then grounded.

[0011] According to another aspect of the present invention, the fast power modulation circuit comprises a first inverter, an RC delay circuit, a NOR gate circuit and an odd number of second inverters connected in series.

[0012] According to another aspect of the present invention, the fast power modulation circuit further comprises an odd number of third inverters connected in series, for generating an enable signal of the first bias voltage.

[0013] Compared with the gate voltage establishment and release time of a traditional gate power supply modulation amplifier, the fast power supply modulation circuit according to the present invention has faster gate voltage establishment and release time, is not limited by the amplifier power supply voltage, and can be applied to high power supply voltage systems. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 This is a schematic diagram of the principle of common drain power supply modulation.

[0015] Figure 2 This is a schematic diagram of the principle of traditional gate power supply modulation.

[0016] Figure 3 yes Figure 2 Schematic diagram of the switching time of traditional gate power modulation.

[0017] FIG4(A) is a schematic diagram of a fast power supply modulation circuit for an amplifier according to an embodiment of the invention.

[0018] 4(B) and (C) are schematic diagrams of specific embodiments of a power modulation switch.

[0019] Figure 5 4(A) is a schematic diagram of the control timing of the circuit structure.

[0020] Figure 6 is realized Figure 5 Schematic diagram of the logic circuit structure of the control timing circuit structure.

[0021] Figure 7 yes Figure 6 Timing diagram of the logic circuit structure.

[0022] Figure 8 This is a specific implementation of a bias voltage enabling circuit according to an embodiment of the invention.

[0023] Figure 9 FIG. 1 is a timing diagram of enabling the bias voltage according to an embodiment of the present invention.

[0024] Figure 10 It is a schematic diagram comparing the bias voltage build-up and release time of the circuit of the present invention and a traditional gate power supply modulation amplifier. DETAILED DESCRIPTION

[0025] The present invention will be further described below with reference to specific embodiments and accompanying drawings.

[0026] FIG4(A) is a schematic diagram of a fast power modulation circuit for an amplifier according to an embodiment of the present invention. As shown in FIG4 , the power modulation circuit according to the present invention includes a common-source transistor N1, wherein the source of the common-source transistor N1 is grounded, the gate is connected to a bias voltage VBIAS_N1 via a bias resistor Rg, the drain is connected to a power supply terminal, and the gate of the common-source transistor N1 is coupled to a radio frequency signal input terminal RFIN.

[0027] exist Figure 2Based on the traditional gate power supply modulation structure shown in FIG, the present invention adds a power supply modulation switch SW to achieve fast power supply modulation of the amplifier. In circuit implementation, the control port of the power supply modulation switch SW is connected to the modulation circuit, the lower output port is connected to the bias voltage VBIAS_N1, and the upper output port is coupled to the RF signal input terminal, so that the upper and lower output ports of the power supply modulation switch SW are connected in parallel with the bias resistor Rg. As shown in FIG4 , when the power supply modulation switch SW is closed, the power supply modulation switch SW is equivalent to a low-value resistor, thus forming a low-resistance channel from the bias voltage VBIAS_N1 to the gate voltage Vg1 of the common-source transistor N1. When the amplifier switches between on and off, the gate voltage Vg1 of the common-source transistor N1 can be quickly established or released through this low-resistance path, thereby achieving fast switching of the amplifier.

[0028] According to one embodiment of the present invention, the power modulation switch SW may be an NMOS transistor as shown in FIG4(B) or a PMOS transistor as shown in FIG4(C). Those skilled in the art will appreciate that the power modulation switch SW is not limited to the specific embodiments of FIG4(B) and FIG4(C).

[0029] Furthermore, the fast power modulation function proposed by the present invention needs to be Figure 5 The specific working principle is as follows: when the amplifier enable signal EN_AMP changes from low to high, the control signal SW_CTR of the power modulation switch will remain at a high level for a period of time. During this period, the power modulation switch is always closed, thereby providing a low-resistance channel. The bias voltage VBIAS_N1 can quickly charge the gate parasitic capacitance Cpar of the transistor N1 through this low-resistance channel, thereby quickly establishing the gate voltage Vg1 of the transistor N1. After the gate voltage Vg1 is established, the control signal SW_CTR of the power modulation switch changes to a low level, and the power modulation switch is turned off. At this time, the gate voltage Vg1 of the transistor N1 is maintained through the high-resistance channel Rg, and the amplifier returns to normal operating mode. When the amplifier enable signal EN_AMP changes from high to low, the control signal SW_CTR of the power modulation switch SW will change from low to high, thereby closing the power modulation switch SW, establishing a low-resistance channel, and then quickly releasing the gate voltage Vg1 of the transistor N1. Then, the gate control signal SW_CTR of the power modulation switch SW will continue to remain high until the next switching cycle. Therefore, the fast power supply modulation circuit applied to the amplifier of the present invention is realized.

[0030] The power supply modulation circuit according to the above embodiment of the present invention has a fast gate voltage establishment and release time, which is much faster than the gate voltage establishment and release time of the traditional gate power supply modulation amplifier. Figure 10In addition, the power modulation circuit according to the embodiment of the present invention is not limited by the power supply voltage of the amplifier and can be applied to high power supply voltage systems.

[0031] Another aspect of the present invention provides a method for implementing Figure 5 The circuit structure of the control timing shown in Figure 6 As shown, 601, 604, 605, and 606 are inverters, 602 is an RC delay circuit, and 603 is a NOR gate circuit.

[0032] Furthermore, Figure 6 The logic circuit shown also includes inverters 607, 608, and 609. Figure 6 The logic circuit shown can also generate an EN_VBIAS_N1 signal for generating a gate bias voltage VBIAS_N1 of the common-source transistor N1. Figure 6 The logic circuit shown will produce Figure 7 The waveform shown.

[0033] Furthermore, a specific implementation form of the enabling circuit of the gate bias voltage VBIAS_N1 of the common source transistor N1 is as follows: Figure 8 As shown, the control signal EN_VBIAS_N1 comes from Figure 6 The logic circuit shown, Figure 8 The enabling circuit shown will produce Figure 9 Timing shown.

[0034] The embodiments of the present invention are described in detail above with reference to the accompanying drawings, but the present invention is not limited to the above embodiments. Various changes made within the scope of knowledge possessed by ordinary technicians in this field without departing from the purpose and spirit of the present invention should fall within the scope of the patent of the present invention.

[0035] For example, in some embodiments, the transistor can be implemented by a field effect transistor (FET), specifically including a junction field effect transistor (JFET), a high electron mobility transistor (HEMT), a metal semiconductor field effect transistor (MESFET), a metal-oxide-semiconductor field-effect transistor (MOSFET), etc.

[0036] In some embodiments, the transistors are implemented using N-type field effect transistors (N Metal-Oxide-Semiconductor Field-Effect Transistor, NMOS FET) or P-type field effect transistors (P Metal-Oxide-Semiconductor Field-Effect Transistor, PMOS FET).

[0037] In the accompanying drawings, some structural or method features may be shown in a particular arrangement and / or order. However, it should be understood that such a particular arrangement and / or order may not be required. Rather, in some embodiments, these features may be arranged in a manner and / or order different from that shown in the illustrative drawings. In addition, the inclusion of a structural or method feature in a particular figure does not imply that such feature is required in all embodiments, and in some embodiments, such features may not be included or may be combined with other features.

[0038] It should be noted that, in the examples and description of the present invention, relational terms such as first and second, etc., are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "comprises," "comprising," or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article, or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or device. In the absence of further limitations, an element defined by the phrase "comprising a" does not exclude the presence of additional identical elements in the process, method, article, or device comprising the element.

[0039] Although the present application has been shown and described with reference to certain preferred embodiments thereof, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the application.

Claims

1. An amplifier fast power modulation circuit, comprising a common source transistor, wherein the source of the common source transistor is grounded, the gate of the common source transistor is connected to a bias voltage via a bias resistor, the drain of the common source transistor is connected to a power supply terminal, and the gate of the common source transistor is coupled to a radio frequency signal input terminal, characterized in that: Also includes, a power modulation switch, wherein a control port of the power modulation switch is connected to the modulation circuit, a lower output port of the power modulation switch is connected to the bias voltage, and an upper output port of the power modulation switch is coupled to the RF signal input terminal, so that the upper and lower output ports of the power modulation switch are connected in parallel with the bias resistor; When the amplifier is switched between on and off, the bias voltage output by the modulation circuit controls the power modulation switch to be closed for a period of time.

2. The amplifier fast power supply modulation circuit according to claim 1, characterized in that: The power modulation switch is an NMOS tube or a PMOS tube.

3. The amplifier fast power supply modulation circuit according to claim 1, characterized in that: A load circuit is also included, and the drain of the common-source transistor is connected to the power supply terminal through the load circuit.

4. The amplifier fast power supply modulation circuit according to claim 1, characterized in that: A feedback circuit is further included, and the source of the common-source transistor is grounded through the feedback circuit.

5. The amplifier fast power supply modulation circuit according to claim 1, characterized in that: It also includes a bias capacitor, and the bias resistor and the bias capacitor are connected in series and then grounded.

6. The amplifier fast power modulation circuit according to any one of claims 1 to 5, characterized in that: The modulation circuit includes a first inverter, an RC delay circuit, a NOR gate circuit and an odd number of second inverters connected in series.

7. The amplifier fast power supply modulation circuit according to claim 6, characterized in that: The modulation circuit further includes an odd number of third inverters connected in series, configured to generate an enable signal of the first bias voltage.

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