Printed circuit board and method for manufacturing the same

Abstract

The present invention provides a printed circuit board, which includes: an insulating layer having a via hole formed in the insulating layer; a single-layer metal pad, which is arranged in the insulating layer and has a central portion exposed through the via hole, the central portion of the pad having a higher roughness than a peripheral portion of the pad; and a via hole, which is formed in the via hole and connected to the central portion of the pad.

Description

[0001] This application claims the benefit of priority from Korean Patent Application No. 10-2018-0154324, filed on Dec. 4, 2018, the disclosure of which is incorporated herein by reference in its entirety for all purposes. Technical Field

[0002] The following description relates to a printed circuit board and a method of manufacturing the printed circuit board. Background Art

[0003] As electronic devices such as mobile devices and notebook computers become smaller and thinner, there is an increasing demand for small and thin printed circuit boards.

[0004] In order to form vias for connecting layers in a thin printed circuit board, an efficient processing technology for via holes is required. In addition, vias having excellent electrical and mechanical properties are required. Summary of the invention

[0005] This Summary is provided to introduce a selection of concepts in a simplified form that are further described below in the Detailed Description. This Summary is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to be used as an aid in determining the scope of the claimed subject matter.

[0006] In one general aspect, a printed circuit board includes: an insulating layer having a via hole formed in the insulating layer; a single-layer metal pad disposed in the insulating layer and having a central portion exposed through the via hole, the central portion of the pad having a higher roughness than a peripheral portion of the pad; and a via formed in the via hole and connected to the central portion of the pad.

[0007] The central portion of the pad may be concave on one surface.

[0008] The via hole may include a pair of via holes formed in the insulating layer to face each other to expose both surfaces of the central portion of the pad, both surfaces of the central portion of the pad may be recessed, and the via hole may include a pair of via holes connected to the central portion of the pad to face each other.

[0009] The via hole may include a pair of via holes formed in the insulating layer to face each other to expose two surfaces of the central portion of the pad, the central portion of the pad may have a flat surface opposite to the one surface, and the via hole may include a pair of via holes connected to the central portion of the pad to face each other.

[0010] The via hole may include a pair of via holes formed in the insulating layer to face each other to expose two surfaces of the central portion of the pad, the central portion of the pad may have a protruding surface opposite to the one surface, and the via hole may include a pair of via holes connected to the central portion of the pad to face each other.

[0011] In another general aspect, a method for manufacturing a printed circuit board includes: preparing an insulating layer in which a pad is buried; selectively removing the insulating layer using a sandblasting process to form a via hole that exposes a central portion of the pad, so that the central portion of the pad has a higher roughness than a peripheral portion of the pad; and filling the via hole with a metal material to form a via.

[0012] The forming of the via hole may include: stacking a sandblasting mask on the insulating layer, the sandblasting mask having a through hole corresponding to a position of the via hole; and performing the sandblasting process on the insulating layer on which the sandblasting mask is stacked.

[0013] Forming the via hole may include: performing the sandblasting process on both surfaces of the insulating layer, and forming a pair of via holes facing each other to expose both surfaces of the central portion of the pad, and forming the via hole may include forming a pair of via holes connected to the central portion of the pad to face each other.

[0014] The sandblasting process may be performed on both surfaces of the insulating layer at the same time.

[0015] The sandblasting process may be sequentially performed on the first surface and the second surface of the insulating layer.

[0016] In another general aspect, a printed circuit board includes: an insulating layer; a pad disposed in the insulating layer and including a first surface and a second surface, the first surface having a first central portion that is rougher than a peripheral portion of the first surface, and the second surface having a second central portion that is rougher than a peripheral portion of the second surface; a first via that penetrates the insulating layer and is connected to the first central portion of the pad; and a second via that penetrates the insulating layer and is connected to the second central portion of the pad.

[0017] The first central portion of the pad may be recessed toward the second central portion of the pad, and the second central portion of the pad may be recessed toward the first central portion of the pad.

[0018] The first central portion of the pad may be recessed toward the second central portion of the pad, and the second central portion of the pad may be relatively flat.

[0019] The first central portion of the pad may be concave toward the second central portion of the pad, and the second central portion of the pad may be convex away from the first central portion of the pad.

[0020] The concave shape of the first central portion may correspond to the convex shape of the second central portion.

[0021] Other features and aspects will be apparent from the following detailed description, drawings, and claims. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 is a diagram illustrating a printed circuit board according to an example.

[0023] Figure 2 and Figure 3 is a diagram illustrating a pad of a printed circuit board according to an example.

[0024] Figure 4 is a photograph showing a via hole of a printed circuit board according to an example.

[0025] Figure 5 is a photograph showing a via hole of a printed circuit board according to an example.

[0026] Figure 6 is a photograph showing a via hole of a printed circuit board according to an example.

[0027] Figure 7 is a flowchart illustrating a method of manufacturing a printed circuit board according to an example.

[0028] Figure 8 , Fig. 9 , Fig.10 and Fig.11 is a diagram illustrating a method of manufacturing a printed circuit board according to an example.

[0029] Throughout the drawings and detailed description, like reference numerals refer to like elements. The drawings may not be drawn to scale, and the relative sizes, proportions, and depictions of elements in the drawings may be exaggerated for clarity, illustration, and convenience. DETAILED DESCRIPTION

[0030] The following specific embodiments are provided to help the reader gain a comprehensive understanding of the methods, devices and / or systems described herein. However, after understanding the disclosure of the present application, various changes, modifications and equivalents of the methods, devices and / or systems described herein will be apparent. For example, the order of operations described herein is merely an example and is not limited to the order set forth herein, but in addition to the operations that must be performed in a particular order, changes that will be apparent after understanding the disclosure of the present application may be made. In addition, for greater clarity and brevity, descriptions of features known in the art may be omitted.

[0031] The features described herein may be implemented in different forms and should not be construed as being limited to the examples described herein. Rather, the examples described herein have been provided only to illustrate some of the many possible ways to implement the methods, devices, and / or systems described herein that will be apparent after understanding the disclosure of the present application.

[0032] Here, it should be noted that the use of the term "may" in relation to examples or embodiments, for example, regarding what an example or embodiment may include or implement, means that there is at least one example or embodiment that includes or implements such features, and all examples and embodiments are not limited to this.

[0033] Throughout the specification, when an element (such as a layer, a region, or a substrate) is described as being “on”, “connected to”, or “coupled to” another element, the element may be directly “on”, “connected to”, or “coupled to” another element, or one or more other elements may be present between them. In contrast, when an element is described as being “directly on”, “directly connected to”, or “directly coupled to” another element, there may be no other elements present between them.

[0034] As used herein, the term "and / or" includes any one of the associated listed items or any combination of any two or more items.

[0035] Although terms such as "first", "second", and "third" may be used herein to describe various members, components, regions, layers, or portions, these members, components, regions, layers, or portions are not limited by these terms. Rather, these terms are only used to distinguish one member, component, region, layer, or portion from another member, component, region, layer, or portion. Therefore, without departing from the teachings of the examples described herein, the first member, first component, first region, first layer, or first portion referred to in the examples may also be referred to as the second member, second component, second region, second layer, or second portion.

[0036] For ease of description, spatially related terms such as "above", "above", "below", and "below" may be used herein to describe the relationship of one element to another element as shown in the accompanying drawings. Such spatially related terms are intended to include different orientations of the device in use or operation in addition to the orientations depicted in the accompanying drawings. For example, if the device in the accompanying drawings is turned over, an element described as being "above" or "above" relative to another element will subsequently be located "below" or "below" relative to the other element. Therefore, the term "above" includes both "above" and "below" orientations depending on the spatial orientation of the device. The device may also be positioned in other ways (e.g., rotated 90 degrees or in other orientations), and the spatially related terms used herein will be interpreted accordingly.

[0037] The terms used herein are only used to describe various examples and are not used to limit the present disclosure. Unless the context clearly indicates otherwise, the singular form is also intended to include the plural form. The terms "comprise", "include" and "have" list the existence of the stated features, quantities, operations, components, elements and / or their combinations, but do not exclude the existence or addition of one or more other features, quantities, operations, components, elements and / or their combinations.

[0038] Variations in the shapes shown in the drawings may occur due to manufacturing techniques and / or tolerances. Therefore, the examples described herein are not limited to the specific shapes shown in the drawings but include variations in shapes that occur during manufacturing.

[0039] The features of the examples described herein may be combined in various ways that will be apparent after understanding the disclosure of the present application. In addition, although the examples described herein have various configurations, other configurations that will be apparent after understanding the disclosure of the present application are feasible.

[0040] Figure 1 is a diagram showing a printed circuit board (PCB) according to an example, Figure 2 and Figure 3 is a diagram showing a pad of a PCB, and Figure 4 is a photograph showing via holes of a PCB.

[0041] Reference Figure 1 , the PCB includes an insulating layer 10 , a pad 20 and a via 30 .

[0042] The insulating layer 10 is formed by stacking insulating materials, and a circuit pattern including a pad 20 may be formed in the insulating layer 10. A via hole 12 to be filled with a via hole 30 may be formed in the insulating layer 10 for interlayer connection of the circuit pattern.

[0043] Reference Figure 1, the pad 20 may be disposed inside the insulating layer 10 . The via hole 12 may be formed on both surfaces of the insulating layer 10 , and both surfaces of the pad 20 may be exposed through the via hole 12 formed on both surfaces of the insulating layer 10 .

[0044] The insulating layer 10 may include various insulating materials such as thermosetting resin, photosensitive resin, etc. In order to improve mechanical and electrical characteristics such as strength, thermal expansion rate, etc., the insulating layer 10 may include various reinforcing materials such as fibers, fillers, etc.

[0045] The insulating layer 10 may be formed on another insulating layer, or may be formed as a part of a built-up layer including several insulating layers.

[0046] The pad 20 is a part of the circuit pattern and is provided in the insulating layer 10 and connected to the via 30. The pad 20 may be formed by various circuit pattern forming methods such as plating. The pad 20 may be formed as a single metal layer and have a central portion 22 exposed through the via hole 12 of the insulating layer 10. The pad 20 may have a structure in which the central portion 22 has a greater roughness than the peripheral portion.

[0047] Reference Figures 2 to 4 , the pad 20 may be disposed in the central portion of the insulating layer 10. The central portion 22 of the pad 20 may be exposed through the via hole 12 when the via hole 12 is not filled by the via 30. The central portion 22 exposed through the via hole 12 may have a greater roughness than the buried peripheral portion of the pad 20. The via 30 is connected to the central portion 22 of the pad 20 in the axial direction of the pad 20, and thus the high roughness of the central portion 22 may be used to increase the bonding strength of the via 30 to the pad 20.

[0048] The central portion 22 may have a surface formed to be concave, and the concave surface may be formed to have high roughness. That is, the concave surface of the central portion 22 may have a higher roughness than a portion other than the concave surface. Figure 2 , a thickness (CD distance) of the central portion 22 of the pad 20 is formed to be smaller than a thickness (AB distance) of a peripheral portion of the pad 20 , and thus a concave surface may be formed in the central portion 22 of the pad 20 .

[0049] The concave surface of the central portion 22 widens the surface area to be bonded to the via 30 and also allows the via 30 to be inserted and bonded to the pad 20, and thus can be used to increase the bonding strength of the via 30 to the pad 20. The concave surface may be formed on one or both surfaces of the pad 20.

[0050] The via hole 30 is formed in the via hole 12 of the insulating layer 10, and is connected to the pad 20. The via hole 30 may be formed by plating the via hole 12 with a metal or by filling the via hole 12 with a conductive paste.

[0051] Reference Figure 1 , one end of the via 30 may be bonded to the concave central portion 22 of the pad 20. The central portion 22 has high roughness, and thus the metal constituting the via 30 may be inserted and bonded to the valley formed on the surface of the central portion 22 of the pad 20. Therefore, this structure increases the bonding strength of the via 30 to the pad 20.

[0052] Specifically, both surfaces of the central portion 22 of the pad 20 are formed to be concave, and both concave surfaces of the central portion 22 are exposed through the via hole 12. A pair of vias 30 may be connected to both surfaces of the central portion 22 to face each other. Therefore, the circuit patterns provided on both surfaces of the insulating layer 10 may be reliably connected to each other through the pad 20 and the pair of vias 30.

[0053] Figure 5 is a photograph showing a via hole of a PCB according to another example.

[0054] Reference Figure 5 , the concave surface may be formed only on one surface of the pad 20'. In the pad 20', the central portion 22' may have one surface formed to be concave and another surface formed to be relatively flat (e.g., relatively flat compared to the one surface). Even in this case, a pair of vias may be connected to both surfaces of the central portion 22' to face each other.

[0055] Figure 6 is a photograph showing a via hole of a PCB according to another example.

[0056] Reference Figure 6 , the pad 20" may have one surface formed to be concave and another surface formed to be convex. In the pad 20", the central portion 22" may have one surface formed to have a concave shape and another surface formed to have a convex shape corresponding to the concave shape. That is, the central portion 22" of the pad 20" may be formed as an arch structure as a whole. In this case, a via is connected to each of the concave surface and the convex surface, that is, a pair of vias may be connected to the central portion 22" to face each other. The convex surface widens the surface area to be bonded to the via, and also enables the via to be inserted and bonded to the pad 20", and thus can be used to increase the bonding strength of the via to the pad 20".

[0057] Figure 7 is a flowchart illustrating a method of manufacturing a PCB according to an example, and Figures 8 to 11 is a diagram illustrating a method of manufacturing a PCB according to an example.

[0058] Reference Figures 7 to 11, the method of manufacturing a PCB includes preparing an insulating layer 110 ( S110 ), forming a via hole 112 ( S120 ), and forming a via hole 130 ( S130 ).

[0059] Preparing the insulating layer 110 ( S110 ) includes preparing the insulating layer 110 in which the pad 120 is buried.

[0060] Reference Figure 8 , an insulating layer 110 having a pad 120 disposed at a central portion thereof may be formed. The insulating layer 110 may be formed by stacking various insulating materials such as thermosetting resin, photosensitive resin, etc. In order to improve mechanical characteristics and electrical characteristics such as strength, thermal expansion rate, etc., the insulating layer 110 may include various reinforcing materials 111 such as fibers, fillers, etc.

[0061] After forming the insulating layer 110 by stacking an insulating material, the pad 120 is buried in the insulating layer 110. The metal layer 115 may be stacked on both surfaces of the insulating layer 110. Subsequently, the metal layer 115 may be selectively etched to form a circuit pattern.

[0062] In this example, a method of preparing the insulating layer 110 by forming the pad 120 on the insulating material and then stacking the insulating material again on the pad 120 is shown, but the method is not limited thereto and includes various methods of forming the pad 120 on / in the insulating layer 110. The pad 120 may be formed using plating as well as various circuit pattern forming methods (e.g., metal paste sintering).

[0063] Forming via hole 112 (S120) includes selectively removing insulating layer 110 using a sandblasting process and forming via hole 112 exposing pad 120. In addition, the sandblasting process is performed on pad 120 to have a higher roughness in central portion 122 of pad 120 than in a peripheral portion of pad 120.

[0064] The sandblasting process is a process of ejecting an abrasive material from a nozzle to grind or cut a material surface. In the conventional method, since sand is ejected as an abrasive material, the process is called "sandblasting". However, currently, various particles such as ceramic powder (including alumina (aluminum oxide) or silicon carbide), glass beads, plastic powder, etc. can be used as an abrasive material. There are two types of sandblasting: wet sandblasting, in which the abrasive material and water are mixed and then the mixture is ejected from a nozzle; and air sandblasting, in which only the abrasive material is ejected from a nozzle using air.

[0065] For example, in this example, particles 155 such as silicon carbide (see Fig. 9) may be used as an abrasive material for the sandblasting process. The via hole 112 exposing the pad 120 may be formed by spraying particles 155 on a portion of the insulating layer 110 in which the pad 120 is buried to form a hole in the insulating layer 110 .

[0066] When the via hole 112 is formed in the insulating layer 110 by performing the sandblasting process, a wall surface having low surface roughness may be formed in the via hole 112, and the reinforcing material 111 of the insulating layer 110 may be smoothly processed without protruding from the wall surface of the via hole 112. Therefore, since the outer surface of the via hole 130 formed in the via hole 112 has low roughness, the loss of a signal transmitted through the via hole 130 may be reduced, and thus a radio frequency (RF) characteristic may be enhanced.

[0067] Reference Figure 8 and Fig. 9 , the via hole 112 may be formed by stacking a sandblasting mask 150 having a through hole 152 formed to correspond to the position of the via hole 112 on the insulating layer 110 (and the metal layer 115), and then performing a sandblasting process on the insulating layer 110 on which the sandblasting mask 150 is stacked. The portion of the insulating layer 110 covered by the sandblasting mask 150 remains intact when the via hole 112 is processed. After the sandblasting process, the sandblasting mask 150 may be removed.

[0068] By performing a sandblasting process on both surfaces of the insulating layer 110 to expose both surfaces of the central portion 122 , a pair of via holes 112 facing each other with respect to the pad 120 may be formed.

[0069] Reference Fig.10 , a sandblasting process may also be performed on the pad 120 to have a higher roughness in the central portion 122 of the pad 120 than in the peripheral portion while or after forming the via hole 112. When the sandblasting process is performed on the pad 120, a plurality of valleys and concave structures may be formed on the surface to increase the roughness. That is, the central portion 122 exposed by the via hole 112 may have a higher roughness than the peripheral portion of the pad 120 buried in the insulating layer 110. The concave and highly rough surface of the central portion 122 that is sandblasted widens the surface area to be bonded to the via 130 and allows the via 130 to be inserted and bonded to the pad 120, and thus may be used to increase the bonding strength of the via 130 to the pad 120.

[0070] The sandblasting process may be performed simultaneously on both surfaces of the insulating layer 110, or the sandblasting process may be sequentially performed on one surface and the other surface of the insulating layer 110. One or both surfaces of the central portion 122 of the pad 120 may be formed to be concave according to the intensity or sequence of the sandblasting process performed on both surfaces of the insulating layer 110. In addition, the pad 120 may have one surface formed to be concave and the other surface formed to be convex.

[0071] Forming the via hole 130 ( S130 ) includes filling the via hole 112 with a metal material and forming the via hole 130 .

[0072] Reference Fig.11 , a pair of via holes 130 may be connected to the central portion 122 of the pad 120 to face each other. Therefore, the circuit patterns provided on both surfaces of the insulating layer 110 may be reliably connected to each other through the pad 120 and the pair of via holes 130.

[0073] In addition, one end of the via 130 may be bonded to the concave central portion 122 of the pad 120. In this case, the central portion 122 has high roughness, and thus the metal constituting the via 130 may be inserted and bonded to the valley formed on the surface of the central portion 122 of the pad 120. Therefore, this structure increases the bonding strength of the via 130 to the pad 120.

[0074] Although the present disclosure includes specific examples, it will be apparent after understanding the disclosure of the present application that various changes in form and detail can be made in these examples without departing from the spirit and scope of the claims and their equivalents. The examples described herein will be considered to be descriptive only, not for the purpose of limitation. The description of the features or aspects in each example will be considered to be applicable to similar features or aspects in other examples. If the described techniques are performed in a different order, and / or if the components in the described system, architecture, device or circuit are combined in a different manner and / or the components in the described system, architecture, device or circuit are replaced or supplemented with other components or their equivalents, suitable results can be obtained. Therefore, the scope of the present disclosure is not limited by specific embodiments, but by the claims and their equivalents, and all variations within the scope of the claims and their equivalents will be interpreted as included in the present disclosure.

Claims

1. A printed circuit board, comprising: an insulating layer, comprising a via hole formed in the insulating layer; a pad disposed in the insulating layer and including a single metal layer, the pad having a central portion exposed through the via hole, the central portion of the pad having a higher roughness than a peripheral portion of the pad; as well as a via hole formed in the via hole and connected to the central portion of the pad, wherein the two surfaces of the central portion of the pad respectively have a concave surface and a convex surface, The central portion of the pad does not have a through hole penetrating the two surfaces.

2. The printed circuit board according to claim 1, wherein: The concave surface has a corresponding shape to the convex surface so that the central portion has an arched structure.

3. The printed circuit board according to claim 1, wherein: The via hole includes a pair of via holes formed in the insulating layer to face each other so that the two surfaces of the central portion of the pad are exposed, and The via hole includes a pair of via holes connected to the central portion of the pad to face each other.

4. The printed circuit board according to claim 1, wherein: The thickness of the central portion of the pad is smaller than the thickness of the peripheral portion of the pad.

5. A method for manufacturing a printed circuit board, the method comprising: preparing an insulating layer, wherein a solder pad is buried in the insulating layer; selectively removing the insulating layer using a sandblasting process to form a via hole exposing a central portion of the pad, so that the central portion of the pad has a higher roughness than a peripheral portion of the pad and two surfaces of the central portion of the pad have a concave surface and a convex surface, respectively, wherein the central portion of the pad does not have a through hole penetrating the two surfaces; as well as The via hole is filled with a metal material to form a via hole.

6. The method according to claim 5, wherein: The concave surface has a corresponding shape to the convex surface so that the central portion has an arched structure; and / or The thickness of the central portion of the pad is smaller than the thickness of the peripheral portion of the pad.

7. The method according to claim 5, wherein: Forming the via hole comprises: stacking a sandblasting mask on the insulating layer, the sandblasting mask having through holes corresponding to positions of the via holes; and The sand blasting process is performed on the insulating layer on which the sand blasting mask is stacked.

8. The method according to claim 5, wherein: forming the via hole includes: performing the sandblasting process on both surfaces of the insulating layer, and forming a pair of via holes facing each other to expose the both surfaces of the central portion of the pad, and Forming the via hole includes forming a pair of via holes connected to the central portion of the pad to face each other.

9. The method according to claim 8, wherein: The sandblasting process is performed on both surfaces of the insulating layer at the same time.

10. The method according to claim 8, wherein: The sandblasting process is sequentially performed on the first surface and the second surface of the insulating layer.

11. A printed circuit board, comprising: Insulation layer; a pad disposed in the insulating layer and including a first surface and a second surface, the first surface having a first central portion that is rougher than a first peripheral portion of the first surface, and the second surface having a second central portion that is rougher than a second peripheral portion of the second surface; a first via hole penetrating the insulating layer and connected to the first central portion of the pad; as well as a second via hole penetrating the insulating layer and connected to the second central portion of the pad, wherein the first central portion of the pad is concave toward the second central portion of the pad, and the second central portion of the pad is convex away from the first central portion of the pad, The pad does not have a through hole penetrating the first surface and the second surface.

12. The printed circuit board according to claim 11, wherein A thickness between the first central portion and the second central portion is smaller than a thickness between the first peripheral portion and the second peripheral portion.

13. The printed circuit board according to claim 11, wherein The concave shape of the first central portion corresponds to the convex shape of the second central portion.

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