Printed circuit board and method for manufacturing the same

Abstract

A printed circuit board and a method for manufacturing the printed circuit board are provided, wherein the printed circuit board includes an insulating layer, a pad and a via filler. The insulating layer includes a via hole. The pad is formed in the insulating layer so that a middle portion of the pad is exposed through the via hole. The pad includes a through hole formed in the middle portion. The via filler is formed in the via hole, is configured to fill the through hole and is bonded to the middle portion.

Description

[0001] This application claims the benefit of priority from Korean Patent Application No. 10-2018-0154334 filed on December 4, 2018, in the Korean Intellectual Property Office, the disclosure of which is incorporated herein in its entirety for all purposes by reference. Technical Field

[0002] The following description relates to a printed circuit board and a method of manufacturing the printed circuit board. Background Art

[0003] As electronic devices such as mobile devices and notebook computers become smaller and thinner, there is an increasing demand for small and thin printed circuit boards.

[0004] In order to form vias that connect layers in thin printed circuit boards, efficient processing techniques for via holes are required. In addition, vias with excellent electrical and mechanical properties are required. Summary of the invention

[0005] This Summary is provided to introduce a selection of concepts in a simplified form that are further described below in the Detailed Description. This Summary is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to be used as an aid in determining the scope of the claimed subject matter.

[0006] In one general aspect, a printed circuit board includes an insulating layer, a pad, and a via filler. The insulating layer includes a via hole. The pad is formed in the insulating layer so that a middle portion of the pad is exposed through the via hole. The pad includes a through hole formed in the middle portion. The via filler is formed in the via hole, is configured to fill the through hole, and is bonded to the middle portion.

[0007] The middle portion of the pad may taper toward the through hole.

[0008] The via hole may include opposing via holes formed to expose opposing surfaces of the middle portion. A pair of via fillers may be connected to each other through the via hole.

[0009] The opposite surface of the middle portion may be formed to be inclined upward toward the through hole.

[0010] The middle portion may taper toward the through hole and slope upward.

[0011] In another general aspect, a method of manufacturing a printed circuit board includes: forming an insulating layer having a pad embedded therein; selectively removing the insulating layer using an abrasive material to form a via hole exposing a middle portion of the pad; and filling the via hole with a conductive material to form a via filler. Forming the via hole includes forming a through hole in the middle portion of the pad using the abrasive material.

[0012] Forming the via hole may further include: disposing a mask on the insulating layer, the mask having a through hole corresponding to a position of the via hole; and performing a sandblasting process on the insulating layer using the abrasive material.

[0013] Forming the via filler may include: performing a sandblasting process on the relative surfaces of the insulating layer using the abrasive material to form a pair of via holes connected to each other through the through hole, thereby exposing the relative surfaces of the middle portion; and forming a pair of via fillers connected to each other through the through hole of the middle portion.

[0014] The sandblasting process may be performed on the opposite surfaces of the insulating layer at the same time.

[0015] The sandblasting process may be sequentially performed on one surface and the other surface of the insulating layer.

[0016] In yet another general aspect, a printed circuit board includes an insulating layer, a pad, and a via filler. The insulating layer includes a via hole. The pad is disposed in the insulating layer and is configured so that a portion of the pad protrudes from a side surface of the via hole. The pad includes a through hole located in the portion of the pad. The via filler is configured to fill the via hole and the through hole and is bonded to the portion of the pad.

[0017] The portion of the pad may taper toward the through hole.

[0018] The via hole may include opposing via holes formed on opposing surfaces of the portion, and the via filler may include a pair of via fillers that may be connected to each other through the via hole.

[0019] The portion of the pad may be tilted upward toward the through hole.

[0020] The portion of the pad may be inclined downward toward the through hole.

[0021] Other features and aspects will be apparent from the following detailed description, drawings, and claims. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1is a diagram showing an example of a printed circuit board.

[0023] Figure 2 is a diagram showing an example of a pad of a printed circuit board.

[0024] Figure 3 is a photograph showing an example of a via hole of a printed circuit board.

[0025] Figure 4 is a diagram showing an example of a printed circuit board.

[0026] Figure 5 is a photograph showing an example of a via hole of a printed circuit board.

[0027] Figure 6 is a diagram showing an example of a printed circuit board.

[0028] Figure 7 is a flowchart illustrating an example of a method of manufacturing a printed circuit board.

[0029] Figures 8 to 11 is a diagram illustrating an example of a method of manufacturing a printed circuit board.

[0030] Throughout the drawings and detailed description, like reference numerals refer to like elements. The drawings may not be drawn to scale, and the relative sizes, proportions, and depictions of elements in the drawings may be exaggerated for clarity, illustration, and convenience. DETAILED DESCRIPTION

[0031] The following specific embodiments are provided to help the reader gain a comprehensive understanding of the methods, devices and / or systems described herein. However, after understanding the disclosure of the present application, various changes, modifications and equivalents of the methods, devices and / or systems described herein will be apparent. For example, the order of operations described herein is merely an example and is not limited to the order set forth herein, but in addition to the operations that must be performed in a particular order, changes that will be apparent after understanding the disclosure of the present application may be made. In addition, for greater clarity and brevity, descriptions of features known in the art may be omitted.

[0032] The features described herein may be implemented in different forms and should not be construed as being limited to the examples described herein. Rather, the examples described herein have been provided only to illustrate some of the many possible ways to implement the methods, devices, and / or systems described herein that will be apparent after understanding the disclosure of the present application.

[0033] Throughout the specification, when an element (such as a layer, a region, or a substrate) is described as being “on”, “connected to”, or “coupled to” another element, the element may be directly “on”, “connected to”, or “coupled to” another element, or one or more other elements may be present between them. In contrast, when an element is described as being “directly on”, “directly connected to”, or “directly coupled to” another element, there may be no other elements present between them.

[0034] As used herein, the term "and / or" includes any one of the associated listed items and any combination of any two or more items.

[0035] The terms used herein are only used to describe various examples and are not used to limit the present disclosure. Unless the context clearly indicates otherwise, the singular form is also intended to include the plural form. The terms "comprise", "include" and "have" list the existence of the stated features, quantities, operations, components, elements and / or their combinations, but do not exclude the existence or addition of one or more other features, quantities, operations, components, elements and / or their combinations.

[0036] The features of the examples described herein can be combined in various ways that will be apparent after understanding the disclosure of the present application. In addition, although the examples described herein have various configurations, other configurations that will be apparent after understanding the disclosure of the present application are feasible.

[0037] Figure 1 is a diagram showing an example of a printed circuit board (PCB), Figure 2 is a diagram showing an example of a pad of a PCB, and Figure 3 is a photograph showing an example of a via hole of a PCB.

[0038] Reference Figure 1 , the PCB includes an insulating layer 10 , a pad 20 and a via filler 30 .

[0039] The insulating layer 10 may be formed by stacking insulating materials, and a circuit pattern including a pad 20 may be formed in the insulating layer 10. A via hole 12 to be filled with a via filler 30 may be formed in the insulating layer 10 for interlayer connection of the circuit pattern.

[0040] Reference Figure 1 In an example, the pad 20 may be disposed inside the insulating layer 10. In this example, the via hole 12 may be formed on the opposite surface of the insulating layer 10, and the surface of the pad 20 may be exposed through the via hole 12 formed on the opposite surface of the insulating layer 10.

[0041] The insulating layer 10 may include various insulating materials such as thermosetting resin, photosensitive resin, etc. In order to improve mechanical and electrical characteristics such as strength, thermal expansion rate, etc., the insulating layer 10 may include various reinforcing materials such as fibers, fillers, etc.

[0042] Furthermore, the insulating layer 10 may be formed on another insulating layer, or may be formed as a part of a built-up layer including several insulating layers.

[0043] The pad 20 may be a part of the circuit pattern and may be provided in the insulating layer 10 and connected to the via filler 30. The pad 20 may be formed by different circuit pattern forming methods including plating. According to this example, the pad 20 has a central portion 22 exposed through the via hole 12 of the insulating layer 10. The pad 20 has a structure in which a through hole 24 is formed in the central portion 22. The central portion 22 of the pad 20 may be the middle portion of the pad 20.

[0044] Reference Figure 2 and Figure 3 , the pad 20 may be disposed in the central portion of the insulating layer 10. When the via hole 12 is not filled with the via filler 30, the central portion 22 of the pad 20 may be exposed through the via hole 12. The via hole 12 may be formed on opposite surfaces of the insulating layer 10 to expose both surfaces of the pad 20.

[0045] In this example, the through hole 24 is formed in the central portion 22 so that the via holes 12 formed on opposite sides of the central portion 22 of the pad 20 can communicate with each other.

[0046] For example, the central portion 22 may have a through hole 24 formed at the center, and have a thickness tapered toward the through hole 24. That is, the pad 20 may have a thickness that decreases from a peripheral portion of the pad 20 to a center where the through hole 24 is formed. In an example, the central portion 22 may have opposing surfaces formed with a concave shape that is inclined downward toward the through hole 24. The concave structure of the central portion 22 widens the surface area to be bonded to the via filler 30, allowing the via filler 30 to be inserted and bonded to the pad 20, and thus may be used to increase the bonding strength of the via filler 30 to the pad 20.

[0047] The via filler 30 is formed in the via hole 12 of the insulating layer 10 and is bonded to the pad 20. The via filler 30 is also formed to fill the through hole 24 formed in the central portion 22 of the pad 20. The via filler 30 may be formed by plating the via hole 12 with a metal or by filling the via hole 12 with a conductive paste.

[0048] Reference Figure 1According to this example, the end of the via filler 30 may be inserted into and bonded to the through hole 24 of the central portion 22 of the pad 20. That is, the metal or conductor constituting the via filler 30 may be inserted into and bonded to the through hole 24 of the central portion 22 of the pad 20. Such a structure may increase the bonding strength of the via filler 30 to the pad 20.

[0049] Specifically, according to this example, the through hole 24 is formed in the central portion 22 of the pad 20, and the via hole 12 located at the opposite side of the pad 20 is connected through the through hole 24 of the central portion 22. In addition, a pair of via fillers 30 facing opposite surfaces of the central portion 22 may be combined with each other, and the pair of via fillers 30 may be directly connected through the through hole 24. Therefore, the circuit patterns provided on the opposite surfaces of the insulating layer 10 may be reliably connected through the pad 20 and the pair of via fillers 30.

[0050] Figure 4 is a diagram showing an example of a PCB, and Figure 5 is a photograph showing an example of the via hole 12 of the PCB.

[0051] Reference Figure 4 and Figure 5 , the central portion 22' has one surface formed to be convex toward the through hole 24' and the other surface formed to be concave toward the through hole 24'. In the pad 20', one surface of the central portion 22' may be formed to have a convex shape, and the other surface of the central portion 22' may be formed to have a concave shape corresponding to the convex shape. That is, the pad 20' may be formed as a trumpet-shaped structure in which the central portion 22' of the pad 20' protrudes to one surface of the pad 20'. The concave surface and the convex surface of the pad 20' widen the surface area to be bonded to the via filler 30, and thus can be used to increase the bonding strength of the via filler 30 to the pad 20'.

[0052] Figure 6 is a diagram showing an example of a PCB. Figure 6 ,and Figure 4 and Figure 5 Unlike the example of , the pad 20 ″ may have a trumpet-shaped structure in which the central portion 22 ″ protrudes to the other surface of the pad 20 ″. The central portion 22 ″ may have one surface formed to be concave toward the through hole 24 ″ and another surface formed to be convex toward the through hole 24 ″.

[0053] Figure 7 is a flowchart showing an example of a method of manufacturing a PCB, and Figures 8 to 11 is a diagram showing an example of a method of manufacturing a PCB.

[0054] Reference Figures 7 to 11, the method of manufacturing a PCB includes preparing or forming an insulating layer 110 (S110), forming a via hole 112 (S120), and forming a via hole (ie, a via filler) 130 (S130).

[0055] Preparing or forming the insulating layer 110 ( S110 ) includes forming the insulating layer 110 in which the pad 120 is buried.

[0056] Reference Figure 8 , the insulating layer 110 may be formed to have a pad 120 disposed at a central portion thereof. The insulating layer 110 may be formed by stacking one or more insulating materials such as a thermosetting resin, a photosensitive resin, etc. In order to improve mechanical and electrical properties such as strength, thermal expansion rate, etc., the insulating layer 110 may include various reinforcing materials 111 such as fibers, fillers, etc.

[0057] Furthermore, after forming the pad 120 on the insulating material, the pad 120 buried in the insulating layer 110 may be formed by stacking the insulating material again on the pad 120. In this example, a metal layer 115 may be stacked on the opposite surface of the insulating layer 110. Subsequently, the metal layer 115 may be selectively etched to form a circuit pattern.

[0058] In this example, a method of preparing the insulating layer 110 by forming the pad 120 on the insulating material and then stacking the insulating material again on the pad 120 is shown, but the present example is not limited thereto, and various methods of forming the pad 120 on the insulating layer 110 may be used. The pad 120 may be formed using a plating method and / or other known circuit pattern forming methods (e.g., metal paste sintering).

[0059] The via hole 112 (S120) may be formed by selectively removing the insulating layer 110 using a sandblasting process to form the via hole 112 exposing the pad 120. In addition, the sandblasting process may be performed on the pad to form a through hole 124 in a central portion 122 of the pad 120.

[0060] The sandblasting process may involve a process in which an abrasive material is ejected from a nozzle to grind or cut a surface of a material. While in the past sand was ejected as the abrasive material (hence the name "sandblasting"), the process now includes ejecting various particles such as ceramic powders (including alumina, aluminum oxide or silicon carbide), glass beads, plastic powders, etc. as abrasive materials. There are two types of sandblasting: wet sandblasting, where the abrasive material and water are mixed and then the mixture is ejected from a nozzle; and air sandblasting, where only the abrasive material is ejected from a nozzle using air.

[0061] For example, in this example, particles 155 such as silicon carbide may be used as an abrasive material for the sandblasting process. Via hole 112 exposing pad 120 may be formed by spraying particles 155 on a portion of insulating layer 110 in which pad 120 is buried to form a hole in insulating layer 110 .

[0062] When the via hole 112 is formed by sandblasting the insulating layer 110, a wall surface having a low surface roughness may be formed in the via hole 112 so that the reinforcing material 111 of the insulating layer 110 is more smoothly processed without protruding from the wall surface of the via hole 112. Therefore, since the outer surface of the via hole 130 formed in the via hole 112 has a low surface roughness, the loss of a signal transmitted through the via hole 130 may be reduced, and thus a radio frequency (RF) characteristic may be enhanced.

[0063] Reference Figure 8 and Fig. 9 , the via hole 112 may be formed by stacking a sandblasting mask 150 having a through hole 152 formed to correspond to the position of the via hole 112 on the insulating layer 110, and then performing a sandblasting process on the insulating layer 110 on which the sandblasting mask 150 is stacked. The portion of the insulating layer 110 covered by the sandblasting mask 150 remains intact when the via hole 112 is generated at the through hole 152. After the sandblasting process, the sandblasting mask 150 may be removed.

[0064] In this example, a pair of via holes 112 facing each other with respect to the pad 120 may be formed by performing a sandblasting process on opposite surfaces of the insulating layer 110 to expose opposite surfaces of the central portion 122 .

[0065] Reference Fig.10 , a sandblasting process may also be performed on the pad 120 to form a through hole 124 in the central portion 122 of the pad 120 at the same time as or after forming the via hole 112. When the sandblasting process is performed on the pad 120, the through hole 124 and the recessed structure may be formed. The recessed structure of the sandblasted central portion 122 in which the through hole 124 is formed widens the surface area to be bonded to the via 130, and allows the via 130 to be inserted and bonded to the pad 120, and thus may be used to increase the bonding strength of the via 130 to the pad 120.

[0066] In this example, the sandblasting process may be simultaneously performed on the opposite surfaces of the insulating layer 110, or the sandblasting process may be sequentially performed on the surfaces of the insulating layer 110. One or both surfaces of the central portion 122 of the pad 120 may be formed to be concave according to the intensity or sequence of the sandblasting process performed on the opposite surfaces of the insulating layer 110. In addition, the pad 120 may have one surface formed to be concave and the other surface formed to be convex.

[0067] Forming the via hole 130 ( S130 ) includes filling the via hole 112 with a metal material to form a via filler 130 .

[0068] Reference Fig.11 According to this example, a pair of vias 130 connected to the central portion 122 of the pad 120 and facing each other may be formed. In this example, the through hole 124 is formed in the central portion 122 so that the pair of vias 130 facing each other may be directly connected to each other through the through hole 124. Therefore, the circuit patterns provided on the opposite surfaces of the insulating layer 110 may be reliably connected to each other through the pad 120 and the pair of vias 130.

[0069] Although the present disclosure includes specific examples, it will be apparent after understanding the disclosure of the present application that various changes in form and detail can be made in these examples without departing from the spirit and scope of the claims and their equivalents. The examples described herein will be considered to be descriptive only, not for the purpose of limitation. The description of the features or aspects in each example will be considered to be applicable to similar features or aspects in other examples. If the described techniques are performed in a different order, and / or if the components in the described system, architecture, device or circuit are combined in a different manner and / or the components in the described system, architecture, device or circuit are replaced or supplemented with other components or their equivalents, suitable results can be obtained. Therefore, the scope of the present disclosure is not limited by specific embodiments, but by the claims and their equivalents, and all changes within the scope of the claims and their equivalents will be interpreted as included in the present disclosure.

Claims

1. A printed circuit board, comprising: an insulating layer, comprising a via hole, wherein the via hole has an hourglass shape; a pad formed in the insulating layer such that a middle portion of the pad is exposed through the via hole and is located at a position where a radius of the via hole is minimum, the pad including a through hole formed in the middle portion; as well as a via filler formed in the via hole, configured to fill the via hole, and bonded to the middle portion, One surface of the middle portion of the pad has a convex shape, and the other surface of the middle portion opposite to the one surface has a concave shape.

2. The printed circuit board according to claim 1, wherein: The middle portion of the pad tapers toward the through hole.

3. The printed circuit board according to claim 1, wherein: The via hole includes opposing via holes formed to expose opposing surfaces of the middle portion, and the via filler includes a pair of via fillers connected to each other through the via hole.

4. The printed circuit board according to claim 3, wherein: The opposing surfaces of the middle portion are formed to be inclined upward toward the through hole.

5. The printed circuit board according to claim 3, wherein: The middle portion tapers toward the through hole and slopes upward.

6. The printed circuit board according to claim 1, wherein The insulating layer includes a reinforcement material, and the reinforcement material includes fibers or fillers.

7. A method for manufacturing a printed circuit board, the method comprising: forming an insulating layer, wherein the pad is embedded in the insulating layer; selectively removing the insulating layer using an abrasive material to form a via hole exposing a middle portion of the pad; as well as filling the via hole with a conductive material to form a via fill, wherein forming the via hole comprises forming a through hole in the middle portion of the pad using the abrasive material, In the step of forming the via hole, one surface of the middle portion of the pad is formed to have a convex shape and the other surface of the middle portion opposite to the one surface is formed to have a concave shape by using the grinding material.

8. The method according to claim 7, wherein: Forming the via hole further includes: disposing a mask on the insulating layer, the mask having through holes corresponding to the positions of the via holes; and A sandblasting process is performed on the insulating layer using the abrasive material.

9. The method according to claim 7, wherein: Forming the via filling includes: performing a sandblasting process on opposite surfaces of the insulating layer using the abrasive material to form a pair of via holes connected to each other through the through hole, thereby exposing opposite surfaces of the middle portion; and A pair of via fillers connected to each other through the through hole of the middle portion is formed.

10. The method according to claim 9, wherein: The via hole has an hourglass shape, and the middle portion of the pad is exposed from a position where a radius of the via hole is smallest.

11. The method according to claim 9, wherein: The sandblasting process is sequentially performed on one surface and the other surface of the insulating layer.

12. The method according to any one of claims 7 to 11, wherein: The insulating layer includes a reinforcement material including fibers or fillers.

13. The method according to any one of claims 7 to 11, wherein: The grinding material is ceramic powder, glass beads or plastic powder.

14. The method according to claim 13, wherein: The ceramic powder is aluminum oxide particles or silicon carbide particles.

15. A printed circuit board, comprising: an insulating layer, comprising a via hole, wherein the via hole has an hourglass shape; a pad disposed in the insulating layer and configured such that a portion of the pad protrudes from a side surface of the via hole and is located at a position where a radius of the via hole is minimum, the pad including a through hole located in the portion of the pad; as well as a via filler configured to fill the via hole and the through hole and bonded to the portion of the pad, One surface of the portion of the pad has a convex shape, and the other surface of the portion of the pad opposite to the one surface has a concave shape.

16. The printed circuit board according to claim 15, wherein The portion of the pad tapers toward the through hole.

17. The printed circuit board according to claim 15, wherein: The via hole includes opposing via holes formed on opposing surfaces of the portion, and the via filler includes a pair of via fillers connected to each other through the through hole.

18. The printed circuit board according to claim 16, wherein: The portion of the pad is inclined upward toward the through hole.

19. The printed circuit board according to claim 16, wherein: The portion of the pad is inclined downward toward the through hole.

20. The printed circuit board according to claim 15, wherein The insulating layer includes a reinforcement material, and the reinforcement material includes fibers or fillers.

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