A fault-tolerant method for dynamic adaptive sram type fpga system based on bram detection

Abstract

The invention relates to a dynamic adaptive SRAM type FPGA system fault-tolerant method based on BRAM detection, which belongs to the field of intelligent fault-tolerant systems and comprises the following steps: 1) dividing reconfigurable regions and static regions on the SRAM type FPGA; Part of the dynamic reconfiguration of the regional structure combines no-redundancy to multi-redundancy dynamic adaptive structure; 3) Design the SEU rate detection structure based on the BRAM embedded block, count the faults and detect and correct errors; 5) Calculate the current flip rate and judge The redundancy scheme that needs to be adopted; 6) Implement the redundancy scheme through the control unit of the FPGA system; 7) Calculate and evaluate the availability and performance of the adaptive FPGA system. The present invention comprehensively considers the situation in the actual application of the FPGA, weighs the contradiction between usability and performance resources, and dynamically changes the adaptive redundant structure of the FPGA system according to the expected radiation level (SEU rate), thereby improving the efficiency of the system when performing tasks, reducing the It ensures the power consumption of the system when there is no failure, and has good portability.

Description

technical field

[0001] The invention relates to a dynamic adaptive reconfigurable fault-tolerant method of an SRAM type FPGA system. It is mainly aimed at the use requirements of FPGA in the actual space environment, and uses the dynamic reconfiguration characteristics of FPGA devices to perform optimal adaptive dynamic reconfiguration of FPGA systems, which can be used in the fault-tolerant design of airborne and spaceborne key electronic systems to It can prevent devices from malfunctioning due to single-event effects, and can also be used in electronic products with ground radiation indicators, and belongs to the field of intelligent fault-tolerant systems. Background technique

[0002] Field Programmable Gate Array (FPGA, Field Programmable Gate Array) has changed the way of digital system design and has gradually become the core device in modern electronic products. The main feature of SRAM FPGA is that most of the programming methods are based on SRAM programming, whi...

Examples

Embodiment Construction

[0035] The specific implementation method described in the present invention takes the Virtex-4 XQR4VSX55 ​​SRAM type FPGA which can realize dynamic partial reconfiguration launched by Xilinx Company as an example, and it can be dynamically reconfigured.

[0036]Step 1: Select Xilinx's Virtex-4 XQR4VSX55 ​​SRAM FPGA, and use the ISE tool to divide the resources on the FPGA into a reconfigurable area and a static area. Configure the static area function, configure it as a partial reconfiguration controller (PRC, Partial Reconfiguration Controller), configuration interface and system internal connection line (PLB, Processor Local Bus), and the PLB connects all components and memory controllers to the control unit . Since the static area is configured with relatively critical modules, which occupy less resources and cannot be partially reconfigured, all structures in this area are protected by TMR to shield the accumulation of SEU in the static area.

[0037] Step 2: Construct a...

technical field

[0001] The invention relates to a dynamic adaptive reconfigurable fault-tolerant method of an SRAM type FPGA system. It is mainly aimed at the use requirements of FPGA in the actual space environment, and uses the dynamic reconfiguration characteristics of FPGA devices to perform optimal adaptive dynamic reconfiguration of FPGA systems, which can be used in the fault-tolerant design of airborne and spaceborne key electronic systems to It can prevent devices from malfunctioning due to single-event effects, and can also be used in electronic products with ground radiation indicators, and belongs to the field of intelligent fault-tolerant systems. Background technique

[0002] Field Programmable Gate Array (FPGA, Field Programmable Gate Array) has changed the way of digital system design and has gradually become the core device in modern electronic products. The main feature of SRAM FPGA is that most of the programming methods are based on SRAM programming, whi...

Examples

Embodiment Construction

[0035] The specific implementation method described in the present invention takes the Virtex-4 XQR4VSX55 ​​SRAM type FPGA which can realize dynamic partial reconfiguration launched by Xilinx Company as an example, and it can be dynamically reconfigured.

[0036]Step 1: Select Xilinx's Virtex-4 XQR4VSX55 ​​SRAM FPGA, and use the ISE tool to divide the resources on the FPGA into a reconfigurable area and a static area. Configure the static area function, configure it as a partial reconfiguration controller (PRC, Partial Reconfiguration Controller), configuration interface and system internal connection line (PLB, Processor Local Bus), and the PLB connects all components and memory controllers to the control unit . Since the static area is configured with relatively critical modules, which occupy less resources and cannot be partially reconfigured, all structures in this area are protected by TMR to shield the accumulation of SEU in the static area.

[0037] Step 2: Construct a...

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