Inductor system, system-on-chip, electronic device, and related methods

By integrating thermal interface material (TIM) on the surface of the power inductor, the problem of heat dissipation of the inductor at high current is solved, and the effect of higher power density and lower hot spot temperature is achieved.

CN111462983BActive Publication Date: 2025-06-20STEWARD FOSHAN MAGNETICS CO LTD
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Patent Information

Application Number
CN201910344030.7
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Priority Date
2019-01-21
Filing Date
2019-04-26
Publication Date
2025-06-20
Estimated Expiration
2039-04-26

AI Technical Summary

Technical Problem

The heat generated by existing power inductors is difficult to effectively dissipate at high currents, resulting in excessive temperature rise, affecting the operating characteristics of the inductor and the performance of related devices.

Method used

By integrating thermal interface material (TIM) on the surface of the inductor, a thermal conductivity path is provided to transfer heat from the inductor to the heat-exhaust structure, thereby reducing the hot spot temperature.

Benefits of technology

It realizes operation at higher power density at the same hot spot temperature, reduces the thermal resistance of the inductor, improves heat dissipation efficiency, and avoids overheating problems.

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Abstract

Exemplary embodiments disclose an inductor system, a system-on-chip, an electronic device, and related methods. The inductor system includes: an inductor; and a thermal interface material disposed along at least a portion of a surface of the inductor.
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Description

Technical Field

[0001] The present disclosure generally relates to integrated thermal interface material (TIM) inductors (e.g., power inductors, dual inductors, etc.), systems including integrated thermal interface material inductors, and related methods. Background Art

[0002] This section provides background information related to the present disclosure but not necessarily prior art.

[0003] Electrical components (such as semiconductors, integrated circuit packages, transistors, etc.) typically have a pre-designed temperature at which they operate optimally. Ideally, the pre-designed temperature approximates the temperature of the surrounding air. However, the operation of electrical components generates heat. If this heat is not removed, the electrical components may operate at a temperature significantly higher than their normal or desired operating temperature. Such excessive temperatures can adversely affect the operating characteristics of the electrical components as well as the operation of associated devices.

[0004] To avoid or at least reduce the adverse operating characteristics caused by heat generation, heat should be dissipated, for example, by conducting heat from the operating electrical components to a heat sink. The heat sink can then be cooled by conventional convection and / or radiation techniques. Summary of the Invention

[0005] This section provides an overall overview of the present disclosure but is not a full disclosure of its entire scope or all of its features.

[0006] Disclosed are exemplary embodiments of integrated thermal interface material (TIM) inductors (e.g., power inductors, dual inductors, etc.), systems including integrated thermal interface material inductors, and related methods.

[0007] In an exemplary embodiment, an inductor system includes an inductor and a thermal interface material (TIM). The TIM is disposed along at least a portion of the surface of the inductor.

[0008] The surface of the inductor may include an upper surface portion of the inductor. The TIM may be disposed along the upper surface portion of the inductor. The TIM may substantially or completely cover the upper surface portion of the inductor. The TIM may be disposed directly against and / or attached to the upper surface portion of the inductor.

[0009] The surface of the inductor may include a lower surface portion of the inductor. The TIM may be disposed along the lower surface portion of the inductor. The TIM may substantially or completely cover the lower surface portion of the inductor. The TIM may be disposed directly against and / or attached to the lower surface portion of the inductor.

[0010] Other aspects of applicability will become apparent from the description provided herein. The description and specific examples in this summary are for illustrative purposes only and are not intended to limit the scope of the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] The drawings described herein are for illustrative purposes only of selected embodiments and not all possible implementations, and are not intended to limit the scope of the present disclosure.

[0012] Figure 1 is a line graph showing the relationship between inductance in microhenries (μH) and temperature rise in degrees Celsius (°C) and DC current (IDC) in amperes (A) for a standard power inductor without integrated TIM.

[0013] Figure 2 illustrates a power inductor and a TIM along an upper surface portion of the power inductor according to an exemplary embodiment.

[0014] Figure 3 illustrates according to an exemplary embodiment Figure 2 the power inductor and TIM shown, where the power inductor is along a printed circuit board (PCB) which is in turn disposed between a heat sink and a heat spreader.

[0015] Corresponding reference numerals indicate corresponding (but not necessarily identical) components throughout the several views of the drawings. DETAILED DESCRIPTION

[0016] Example embodiments will now be described more fully with reference to the accompanying drawings.

[0017] By way of introduction, the inherent design challenges of electronic products include the ever-growing demand for higher performance, compelling multifunctional capabilities, miniaturization, and energy efficiency. These requirements have been passed down to the component level.

[0018] Power inductors used at the component level also need to handle more current, generate less heat, and do so within a smaller footprint or lower profile while maintaining a stable current flow in the power supply circuit. Packing an increasing amount of power into a smaller form factor not only presents design challenges for the coils and core materials of the power inductor, but also creates escalating thermal challenges as more power is added.

[0019] However, due to the size reduction, heat cannot be effectively dissipated from the power inductor. The contact area of the PCB is limited and the total surface area for radiation is smaller. As disclosed herein, the power inductor design can thus be improved (e.g., optimized, etc.) at the system level by considering various parameters such as power requirements, size limitations, and temperature thresholds.

[0020] Accordingly, what is disclosed herein are examples of multifunctional solutions for power inductors that have been improved (e.g., optimized, etc.) at the system level. For example, the disclosed exemplary embodiments may include an integrated TIM power inductor that is capable of dissipating more heat than a non-TIM integrated power inductor. The integrated TIM power inductor disclosed herein can operate at a higher power density at the same hot spot temperature, while also having the ability to be thinner or smaller and custom manufactured when space is limited.

[0021] The integrated TIM power inductor disclosed herein can be used in a wide range of applications, including system-on-chip (SoC), autonomous vehicle platforms, graphics cards, laptops, notebooks, telecommunications applications, etc. Accordingly, the integrated TIM power inductor disclosed herein should not be limited to use with only one specific application.

[0022] As recognized herein, multifunctionality can be used to address hybrid design challenges associated with power inductors. Previous designers have addressed problems with hybrid or mixed products that focus on power and dissipation issues, mechanical and EMI, or thermal and EMI. Typically, single-function products cannot address multiple thermal or EMI problems simultaneously. Even products that combine "multiple but single functions" may work, but doing so means it is difficult to assemble each separate product into a smaller, highly constrained space. Accordingly, the multifunctional solution disclosed herein provides the ability to combine different materials and technologies and mitigate system-level problems.

[0023] The multifunctional solution disclosed herein can have unique advantages over traditional single-function products. For example, the multifunctional solution disclosed herein can address multiple problems that designers face while also undergoing a solution at the system level (e.g., optimization, etc.). The heat transfer capabilities of the integrated TIM power inductor disclosed herein can be the result of optimized electrical and thermal simulations and extensive measurements that combine industry expertise and engineering techniques. Accordingly, at the same hot spot temperature, a higher current density can be achieved, which is equivalent to a higher power density and smaller component size.

[0024] The SoC (system-on-chip) on an autonomous vehicle platform is an application that has become increasingly complex and power-hungry. These SoCs typically require multiple power supply rails, each with its own requirements. A power inductor on each power supply rail is selected after considering inductance, size, DCR, current rating, and temperature gain. The challenge is to find an inductor that helps transfer heat at high current levels while still meeting the coverage area and height limitations. Table 1 below provides an example of the inductor requirements or target specifications for the power supply rails on an autonomous vehicle SoC.

[0025] Table 1: Target Specifications of Power Inductors for Autonomous Driving Vehicle SoCs

[0026]

[0027] In Table 1 above, DCR is the DC resistance. Irms(ΔT = 40 °C) is the root mean square current that causes the temperature to rise from the ambient temperature of 25 °C to 40 °C. The saturation current (Isat) is the current at which the inductance value of the power inductor drops below a specified amount of its measured value without DC current. The inductance drop is attributed to core saturation. The temperature rise can be attributed to the power dissipated by the current flowing through the winding, which is converted into heat. The power loss can be calculated according to the square of the current multiplied by the resistance of the wire (I 2 R). The DC current (IDC) is the current value at which it is not recommended to operate without testing the component in its intended application.

[0028] An example conventional power inductor may be able to meet the inductance, size, and DCR requirements, but not the Irms requirement. The inability to meet the Irms requirement is due to the heat generated by core loss and coil loss at a current of 28.6 A, which exceeds the design limit of the temperature rise. For example, see Table 2 below, which shows an increase in Irms of the MGV0603 series of molded power inductors from Laird Technologies, which causes the inductor to generate more heat, resulting in an increase in the temperature rise (ΔT).

[0029] Table 2

[0030]

[0031] The exemplary embodiments disclosed herein have improved or better Irms ratings than the standard molded power inductors mentioned above. As the Irms rating increases, the exemplary embodiments are configured to enhance the heat transfer ability to the PCB and / or include another heat conduction path to effectively transfer heat. As disclosed herein, the exemplary embodiments provide a solution by integrating a heat transfer layer or TIM along at least a portion of the surface of the inductor (e.g., the upper surface, etc.) and / or adjacent to at least a portion of the surface of the inductor (e.g., directly on it, etc.). The TIM provides a heat conduction path for the additional heat generated by the inductor with a higher Irms rating to transfer or dissipate the heat from the inductor to a heat rejection / dissipation structure or component, such as a radiator, etc. Using a heat transfer layer or TIM within the inductor system allows the transfer of the additional heat that minimally causes the additional ΔT in Table 2 above.

[0032] Figure 1It is a line graph showing the relationship between the inductance in microhenries (μH) and the temperature rise in degrees Celsius (°C) and the DC current (IDC) in amperes (A) for power inductors without integrated TIM (e.g., standard MGV0603 series molded power inductors from Laird Technologies, etc.). As Figure 1 shown, the additional heat generated by operating the power inductor at a current above its 20 A rated current (e.g., when the root mean square current (Irms) increases from 20 A to 28.6 A) may result in an additional temperature rise (ΔT is 26 °C).

[0033] For example, the standard MGV0603R33M-10 power inductor from Laird Technologies has a rating of 20 A Irms (ΔT = 40 °C). If the MGV0603R33M-10 power inductor is forced to operate at 28.6 A, the temperature gain may be as high as 66 °C. This level exceeds 40 °C by 26 °C. As disclosed herein, an exemplary embodiment may include or integrate a thermal management solution with the MGV0603R33M power inductor, thereby allowing the power inductor to handle the additional heat generated by the power inductor at higher currents, which may be equivalent to a hot spot temperature rise of 26 °C. Therefore, adding a thermal management solution to this power inductor can help avoid overheating at higher currents (e.g., 28.6 A current, etc.).

[0034] Conventionally, molded power inductors are optimized for selected iron powder materials based on electromagnetic limits. If a decision is made to use a new core material with a higher maximum flux density, there is no significant potential increase in power density. However, the maximum power is usually limited by the cause of heat. The maximum RMS current is given by the maximum hot spot temperature of the inductor. This avoids accelerated aging and insulation breakdown. Therefore, reducing the thermal resistance of the inductor and transferring more heat out of the inductor is more effective in improving its power density or reducing the hot spot temperature.

[0035] As disclosed herein, an exemplary embodiment includes a molded power inductor and at least one TIM. The power inductor can be configured to have a reduced top cover thickness. The TIM thickness can be changed based on the intended use or application. For example, the thickness of the TIM can be between about 0.075 mm and about 5 mm. Or, for example, the thickness of the TIM can be between about 0.1 mm and about 0.5 mm. As another example, the thickness of the TIM can be between about 0.2 mm and about 0.3 mm. As yet another example, the thickness of the TIM can be about 0.25 mm.

[0036] Example TIMs that can be used in exemplary embodiments include thermal gap fillers, thermal phase change materials, thermally conductive EMI absorbers or hybrid thermal / EMI absorbers, thermal putties, thermal pads, etc. By way of example, in some embodiments, the TIM can have a thermal conductivity of at least 2 W / mK. Also by way of example, the TIM can include: a silicone elastomer matrix filled with one or more suitable thermally conductive fillers; a two-component pourable liquid in-situ curing thermally sensitive gap filler; a thermal phase change material; a non-silicone gap filler; and / or a TIM capable of withstanding reflow processing.

[0037] In an exemplary embodiment, the TIM includes a two-component pourable liquid in-situ curing thermally sensitive gap filler based on silicone and filled with ceramic having a thermal conductivity of at least 2 W / mK and a hardness of about 45 or less (Shore 00, 3 seconds). In another exemplary embodiment, the TIM includes a non-silicone thermal phase change material having a thermal conductivity of at least about 5.4 W / mK, a hardness of about 85 or less (Shore 00, 3 seconds), and a non-reinforced film structure. In yet another exemplary embodiment, the TIM includes a non-silicone gap filler having a thermal conductivity of at least about 5.5 W / mK, a hardness of about 80 or less (Shore 00, 3 seconds), and a self-standing film structure.

[0038] Figure 2 Illustrated is a power inductor 102 according to an exemplary embodiment of one or more aspects of the present disclosure and a TIM 104 along an upper surface portion of the power inductor 102. As Figure 2 shown, the power inductor 102 includes a molded power inductor having a core 108 and a lead frame 112. Alternative embodiments may include power inductors having different configurations.

[0039] Although Figure 2 shown is the TIM 104 applied to the flat upper surface of the inductor, this is not required for all embodiments as one or more TIMs can be applied elsewhere, e.g., on top of any flat surface of the inductor and / or bottom, side surfaces, non-flat surfaces, etc. In Figure 2 the example, the TIM 104 is disposed along the upper surface of the inductor 102, which is preferred as heat dissipation occurs (e.g., mainly, substantially, completely, etc.) from the top of the inductor 102 to adjacent heat sink / dissipation structures such as a heat sink 116 ( Figure 3 ). Having the TIM 104 along the top of the inductor 102 can also help transfer heat out of the overall system rather than transferring heat generated by the inductor 102 to the PCB on which the inductor 102 is disposed (e.g., SMT (surface mount technology) mounted, etc.). This is also preferred as the PCB may already include many integrated circuits (ICs) and "running hot" components (broadly, heat sources).

[0040] In an exemplary embodiment where the power inductor is to be SMT-mounted, a TIM that can undergo a standard reflow process is preferably selected. For example, the TIM may be able to withstand solder reflow conditions with a temperature of at least about 280 degrees Celsius and maintain operational structural integrity after the solder reflow operation.

[0041] Figure 3 Illustrated Figure 2 the power inductor 102 and the TIM 104 shown in. The power inductor 102 is disposed along the first or upper surface of a printed circuit board (PCB) 120 (e.g., SMT-mounted, etc.). The PCB 120 is in turn disposed between a heat sink 116 and a heat dissipation layer 124 (broadly, a heat removal / dissipation structure).

[0042] A second TIM 128 is disposed between the heat dissipation layer 124 and the second or lower surface of the PCB 120. The second TIM 128 is generally aligned with or below the power inductor 102. The second TIM 128 includes the same material or a different material as the TIM 104 along the top of the inductor 102. For example, the TIM 104 along the top of the inductor 102 can be selected to be able to undergo a standard reflow process such that after applying the TIM 104 along the top of the power inductor 102, the power inductor 102 can be SMT-mounted to the PCB 120. In this example, the second TIM 128 can also undergo a standard reflow process, although a different TIM can also be selected for the second TIM 128.

[0043] In this example, the TIM 104 along the top of the inductor 102 is generally located between the heat sink 116 and at least a portion of the surface of the power inductor 102. Thus, the TIM 104 is operable to define or establish at least a portion of a heat conduction path from the top of the power inductor 102 to the heat sink 116 along which heat can be transferred from the power inductor 102 to the heat sink 116. The heat sink 116 can include aluminum and / or copper, etc. As shown, the heat sink 116 includes a base that will be in thermal contact with the TIM 104. The heat sink 116 also includes a plurality of spaced-apart fins extending upward from the base.

[0044] The second TIM 128 is operable to define or establish at least a portion of a heat conduction path from the second surface of the PCB 120 to the heat dissipation layer 124 along which heat can be transferred from the PCB 120 to the heat dissipation layer 124. The heat dissipation layer 124 can include graphite (e.g., natural graphite, synthetic graphite, etc.) and / or aluminum, etc.

[0045] Utilizing based on Figure 3The thermal simulation model of the system 100 shown performs a thermal simulation. Two application cases are simulated, namely, the PCB 120 with and without backside cooling. For the first case, as Figure 3 shown, the second TIM 128 and the heat dissipation layer 124 provide backside cooling. The heat dissipation layer 124 is added to estimate the effect of potential cooling methods applied to the bottom or backside of the PCB 120 in the case of backside cooling. For the second case without backside cooling, the bottom or backside of the PCB 120 is thermally insulated.

[0046] For both cases, heat generation is simulated based on an operating current of 28.6 A. As shown in Table 3 below, in the case without backside cooling, the hot spot temperature can be reduced by a minimum of 21.2 °C, and in the case with backside cooling, it can be reduced by 18.6 °C. Also, as shown in Table 3 below, compared with the standard MGV0603R33M power inductor without TIM, the MGV0603R33M power inductor with integrated TIM has a hot spot temperature reduction of 35.8 °C when both are operating at a current of 28.6 A.

[0047] Table 3

[0048]

[0049] Impact resistance is another advantage that can be achieved through the exemplary embodiments disclosed herein. Consumer electronics products require internal critical components to pass drop tests. Telecommunications requires components to pass vibration and shock tests. In the exemplary embodiments disclosed herein, an elastomeric TIM (e.g., silicone-based TIM, etc.) can be disposed on top of the power inductor. In addition to providing a thermal conduction path, the TIM can also provide a buffering function against impact forces. This can in turn allow the inductor system (including the power inductor and the TIM) to be more reliable and more resistant to damage caused by accidental drops or impacts on the components. In an exemplary embodiment, the inductor system can also be configured to meet the UL94V0 and AEC-Q200 standards.

[0050] Thus, the exemplary embodiments disclosed herein can thereby help address multiple and simultaneous challenges related to thermal loads that require high power density and more miniaturization. In an exemplary embodiment, both electrical and thermal performance can be optimized at the system level. The exemplary embodiments can enable designs that are cooler, smaller, or exhibit higher rated currents than standard power inductors.

[0051] Example thermal interface materials that can be used in the exemplary embodiments include thermal gap fillers, thermal phase change materials, thermally conductive EMI absorbers or hybrid thermal / EMI absorbers, thermal putties, thermal pads, etc.

[0052] In some embodiments, the TIM may include an elastomeric matrix (e.g., a silicone elastomeric matrix, etc.), a non-silicone matrix, etc. The elastomeric or other matrix of the TIM may be filled with one or more suitable thermal conductive fillers, such as zinc oxide, boron nitride, aluminum oxide, silicon nitride, aluminum nitride, iron, metal oxides, graphite, silver, copper, ceramics, combinations thereof, etc. Additionally, exemplary embodiments may also include the same (or different) thermal conductive fillers of different grades (e.g., different sizes, different purities, different shapes, etc.). For example, the thermal interface material may include two different sizes of boron nitride. Or, for example, the thermal interface material may include multiple grades of aluminum and / or multiple grades of aluminum oxide, where the grades have different average particle sizes and different particle size ranges. By changing the type and grade of the thermal conductive filler, the final properties (e.g., thermal conductivity, cost, hardness, etc.) of the thermal interface material can be changed as needed.

[0053] Other suitable fillers and / or additives may also be added to the thermal interface material to obtain various desired results (e.g., thixotropic and / or pourable putties, etc.). Examples of other fillers that may be added include: pigments, plasticizers, processing aids, flame retardants, extenders, electromagnetic interference (EMI) or microwave absorbers, conductive fillers, magnetic particles, etc.

[0054] In some embodiments, the TIM may include graphite sheets, metal foils, multi-layer structures, such as multi-layer structures of metal and plastic, multi-layer structures of metal and graphite, or multi-layer structures of metal, graphite, and plastic.

[0055] The TIM may include thermal interface materials from Laird Technologies, such as one or more of the following: Tputty TM 502 series thermal gap fillers, Tflex TM series gap fillers (e.g., Tflex TM 300 series thermal gap fillers, Tflex TM 600 series thermal gap fillers, Tflex TM 700 series thermal gap fillers, etc.), Tpcm TM series thermal phase change materials (e.g., Tpcm TM 580 series phase change materials, Tpcm TM 780 series phase change materials, Tpcm TM 900 series phase change materials, etc.), Tpli TM series gap fillers (e.g., Tpli TM 200 series thermal gap fillers, etc.), IceKap TM series thermal interface materials, and / or CoolZorb TM series thermal conductive microwave absorber materials (e.g., CoolZorb TM400 series thermal conductive microwave absorber materials, CoolZorb TM 500 series thermal conductive microwave absorber materials, CoolZorb TM 600 series thermal conductive microwave absorber materials, etc.), Tmate TM 2900 series reusable phase change materials, Tgon TM 800 series thermal interface materials or natural graphite plates, Tgon TM 8000 series thermal interface materials or graphite plates, Tgon TM 9000 series graphite sheets (e.g., Tgon TM 9017, 9025, 9040, 9070, 9100, etc.), Tgon TM Encapsulation or potting compounds, such as Tgon TM 455-18SH, other graphite sheets, etc.

[0056] In an exemplary embodiment, the TIM includes a two-component pourable TIM having a thermal conductivity of about 2 W / mK (e.g., Tflex TM CR200, etc.). In another exemplary embodiment, the TIM includes a thermal phase change material having a thermal conductivity of about 5.4 W / mK (e.g., Tpcm TM 780 series phase change materials, etc.). In another exemplary embodiment, the TIM includes a non-silicone resin thin gap filler having a thermal conductivity of about 5.5 W / mK (e.g., Slim TIM, etc.).

[0057] In some exemplary embodiments, the TIM may include a compliant gap filler having a high thermal conductivity. For example, the TIM may include Laird's thermal interface materials, such as one or more of the following: Tflex TM 200, Tflex TM CR200, Tflex TM HR200, Tflex TM 300, Tflex TM 300TG, Tflex TM HR400, Tflex TM 500, Tflex TM 600, Tflex TM HR600, Tflex TM SF600, Tflex TM 700, and / or Tflex TM SF800 thermal gap filler.

[0058] In some exemplary embodiments, the TIM may include a soft and compliant gap filler having a high thermal conductivity. The TIM may include elastomers and / or ceramic particles, metal particles, ferrite EMI / RFI absorbing particles, metal or glass fiber meshes based on rubber, gel, or wax, etc. The TIM may include compliant or conformable silicone pads, non-silicone-based materials (e.g., non-silicone-based gap fillers, thermoplastics and / or thermosetting polymers, elastic materials, etc.), screen materials, polyurethane foams or gels, thermal conductivity additives, etc. The TIM may be configured to have sufficient conformability, compliance, and / or softness (e.g., without having to undergo phase change or reflow, etc.) to adjust for tolerances or gaps by deflection at low temperatures (e.g., room temperature such as 20°C to 25°C, etc.) and / or to allow the thermal interface material to closely conform to (e.g., in a relatively tight fitting and encapsulating manner, etc.) the mating surface when placed in contact (e.g., pressed against, etc.) with the mating surface, including non-flat, curved, or uneven mating surfaces.

[0059] Depending on the specific materials used to prepare the thermal interface material and the loading percentage of the thermal conductivity filler (if any), the exemplary embodiments may include one or more thermal interface materials having a high thermal conductivity (e.g., 1 W / mK (watts per meter per kelvin), 2 W / mK, 3 W / mK, 4 W / mK, 5 W / mK, 5.4 W / mK, 5.5 W / mK, 6 W / mK, 7 W / mK, 8 W / mK, etc.). These thermal conductivities are merely examples, as other embodiments may include thermal interface materials having thermal conductivities higher than 8 W / mK, less than 1 W / mK, or other values and ranges between 1 and 8 W / mK. Thus, aspects of the present disclosure should not be limited to use with any specific thermal interface material, as the exemplary embodiments may include a wide range of thermal interface materials.

[0060] In exemplary embodiments, the TIM may include one or more graphite sheets, such as one or more Tgon TM Series 9000 graphite sheets. Tgon TM Series 9000 graphite sheets include synthetic graphite thermal interface materials having an in-plane carbon single crystal structure, and are ultra-thin, lightweight, flexible, and provide excellent in-plane thermal conductivity. Tgon TM Series 9000 graphite sheets are useful for a variety of heat transfer applications where in-plane thermal conductivity is dominant and in a limited space. Tgon TM Series 9000 graphite sheets may have a thermal conductivity of about 500 to about 1900 W / mK, can help reduce hot spots and protect sensitive areas, can enable a slender device design due to an ultra-thin sheet thickness of about 17 microns to 25 microns, and may have a density of about 2.05 g / cm 3 to 2.25 g / cm 3The light weight, can be flexible and capable of withstanding more than 10,000 bends with a radius of 5 millimeters.

[0061] In some exemplary embodiments, the thermal interface material can be configured for thermal management and EMI mitigation (e.g., thermally conductive microwave / RF / EMI absorbers, etc.). In such exemplary embodiments, the thermal interface material can include EMI absorbing materials (e.g., EMI absorbing particles, fillers, flakes, etc.), such as silicon carbide, carbonyl iron, alumina, manganese zinc (MnZn) ferrite, magnetic sheets, SENDUST (an alloy containing approximately 85% iron, 9.5% silicon, and 5.5% aluminum), permalloy (an alloy containing approximately 20% iron and 80% nickel), iron silicide, iron chromium compounds, silver metal, magnetic alloys, magnetic powders, magnetic particles, nickel-based alloys and powders, chromium alloys, combinations thereof, etc.

[0062] Figure 3 Exemplary embodiments of an integrated TIM power inductor for use with a heat sink (e.g., an aluminum and / or copper heat sink having outwardly extending spaced fins, etc.) and a heat dissipation layer (e.g., a graphite or aluminum heat dissipation layer, etc.) are illustrated. In this exemplary embodiment, the thermal interface material along the upper surface of the power inductor defines or establishes a thermal joint, interface, path, or heat conduction path along which heat can be transferred (e.g., conducted) from the power inductor to the heat sink. Although Figure 3 A heat sink and a heat dissipation layer are shown, but the exemplary embodiments disclosed herein can be used with a wide range of heat rejection / dissipation structures or components (e.g., heat dissipation layers, heat sinks, heat pipes, device enclosures or housings, etc.). Accordingly, aspects of the present disclosure should not be limited to any particular use with any single type of heat rejection / dissipation structure, etc.

[0063] Exemplary embodiments of integrated thermal interface material (TIM) inductors (e.g., power inductors, dual inductors, etc.), systems including the same, and related methods are disclosed. For example, exemplary methods for improving the current rating of an inductor are disclosed. Exemplary methods for achieving higher power density and maintaining cooling in an integrated TIM inductor are also disclosed.

[0064] In an exemplary embodiment, an inductor system generally includes an inductor. A thermal interface material (TIM) is disposed along at least a portion of the surface of the inductor.

[0065] The surface of the inductor can include an upper surface portion of the inductor. The TIM can be disposed along the upper surface portion of the inductor. The TIM can substantially or completely cover the upper surface portion of the inductor. The TIM can be disposed directly against and / or attached to the upper surface portion of the inductor.

[0066] The surface of the power inductor may include a lower surface portion of the inductor. The TIM may be disposed along the lower surface portion of the inductor. The TIM may substantially or completely cover the lower surface portion of the inductor. The TIM may be disposed directly against and / or attached to the lower surface portion of the inductor.

[0067] The thickness of the TIM may be between about 0.075 mm and about 5 mm. For example, the thickness of the TIM may be between about 0.1 mm and about 0.5 mm. Or, for example, the thickness of the TIM may be between about 0.2 mm and about 0.3 mm. As another example, the thickness of the TIM may be about 0.25 mm.

[0068] The thermal conductivity of the TIM may be at least 1 W / mK.

[0069] The TIM may include one or more of the following: a silicone elastomer matrix filled with one or more suitable thermal conductive fillers; a two-component pourable liquid in-situ curing thermal gap filler; a thermal phase change material; a non-silicone gap filler; and / or a TIM capable of withstanding reflow processing.

[0070] The TIM may include one or more of the following: a two-component pourable liquid in-situ curing thermal gap filler based on silicone and filled with ceramic having a thermal conductivity of at least 2 W / mK and / or a hardness of about 45 or less (Shore 00, 3 seconds); a silicone-free thermal phase change material having a thermal conductivity of at least about 5.4 W / mK, a hardness of about 85 or less (Shore 00, 3 seconds), and / or a non-reinforced film structure; and / or a non-silicone gap filler having a thermal conductivity of at least about 5.5 W / mK, a hardness of about 80 or less (Shore 00, 3 seconds), and / or a self-standing film structure.

[0071] The inductor system may have a rating of at least 28.6 A Irms (ΔT = 40 °C). The TIM may be configured such that the inductor can operate at a rating of at least 28.6 A Irms (ΔT = 40 °C).

[0072] The inductor system may be configured to have: an inductance of 0.22 microhenry, 0.33 microhenry, and 0.47 microhenry; a length of 6 mm or less, a width of 6 mm or less, and a height of 3 mm or less; a maximum DC resistance (DCR) of 7 milliohms; a saturation current (Isat) of at least 32.5 amperes; and a rating of at least 28.6 A Irms (ΔT = 40 °C).

[0073] The inductor system may further include a printed circuit board (PCB) having opposite first and second faces, and a heat rejection / dissipation structure. The inductor may be along and / or adjacent to the first face of the PCB. The heat rejection / dissipation structure may be positioned relative to the PCB to receive heat dissipated by the inductor. The heat rejection / dissipation structure may include a heat sink. The TIM may generally be located between the heat sink and at least a portion of the surface of the inductor. The TIM may operate to define or establish at least a portion of a heat conduction path from at least a portion of the surface of the inductor to the heat sink, along which heat may be transferred from the inductor to the heat sink. The heat sink may include a base in thermal contact with the TIM, and one or more fins extending outwardly from the base.

[0074] The inductor system may further include a second TIM that is along and / or adjacent to the second face of the PCB and generally aligned with the inductor. The second TIM may include the same material as or a different material from the TIM. The inductor system may further include a heat dissipation layer that may be along and / or adjacent to the second face of the PCB. The second TIM may operate to define or establish at least a portion of a heat conduction path from the portion of the second face of the PCB to the heat dissipation layer, along which heat may be transferred from the PCB to the heat dissipation layer. The heat dissipation layer may include graphite and / or aluminum.

[0075] The TIM is capable of withstanding solder reflow conditions and / or temperatures up to at least about 280 degrees Celsius. The inductor may be surface mount technology (SMT) mounted to the first face of the PCB.

[0076] The inductor may include a power inductor.

[0077] The inductor may include a dual inductor.

[0078] The inductor system may be configured to have: an inductance in the range of about 0.1 microhenry to about 33 microhenries; and / or a root mean square current Irms (ΔT = 40 °C) in the range of about 2 amperes to about 120 amperes.

[0079] A system on chip (SoC) may include at least one inductor system as disclosed herein. For example, a system on chip (SoC) for an autonomous vehicle platform may include multiple power supply rails. Each power supply rail may include at least one inductor system. Using the system on chip, the at least one inductor system is configured to have: inductances of 0.22 microhenry, 0.33 microhenry, and 0.47 microhenry; a length of 6 mm or less, a width of 6 mm or less, and a height of 3 mm or less; a maximum DC resistance (DCR) of 7 milliohms; a saturation current (Isat) of at least 32.5 amperes; and a rating of at least 28.6 A Irms (ΔT = 40 °C).

[0080] An electronic device may include at least one inductor system as disclosed herein. The electronic device may include a graphics card, a laptop computer, a notebook computer, etc.

[0081] Exemplary methods for improving the current rating of an inductor are also disclosed. In an exemplary embodiment, the method may include the steps of applying a thermal interface material (TIM) along at least a portion of the surface of the inductor.

[0082] The step of applying the TIM may include the steps of applying the TIM along an upper surface portion of the inductor; and / or applying the TIM along a lower surface portion of the inductor.

[0083] The step of applying the TIM may include the steps of applying the TIM along an upper surface portion of the inductor such that the TIM substantially or completely covers the upper surface of the inductor; and / or applying the TIM along a lower surface portion of the inductor such that the TIM substantially or completely covers the lower surface of the inductor.

[0084] The step of applying the TIM may include the steps of applying the TIM directly against the at least a portion of the surface of the inductor; and / or attaching the TIM to the at least a portion of the surface of the inductor.

[0085] In the exemplary methods disclosed herein, the TIM may have a thermal conductivity of at least 1 W / mK. The TIM may include one or more of the following: a silicone elastomer matrix filled with one or more suitable thermal conductive fillers; a two-component pourable liquid in-situ curing thermal gap filler; a thermal phase change material; a non-silicone gap filler; and / or a TIM capable of withstanding reflow processing. The TIM may include one or more of the following: a two-component pourable liquid in-situ curing thermal gap filler based on silicone and filled with ceramic having a thermal conductivity of at least 2 W / mK and / or a hardness of about 45 or less (Shore 00, 3 seconds); a silicone-free thermal phase change material having a thermal conductivity of at least about 5.4 W / mK, a hardness of about 85 or less (Shore 00, 3 seconds), and / or a non-reinforced film structure; and / or a non-silicone gap filler having a thermal conductivity of at least about 5.5 W / mK, a hardness of about 80 or less (Shore 00, 3 seconds), and / or a self-standing film structure.

[0086] The step of applying the TIM may include the steps of selecting the TIM based on a target current and / or an Irms specification.

[0087] The step of applying the TIM includes the steps of selecting a thickness of the TIM based on a target current and / or an Irms specification.

[0088] The inductor may include a power inductor.

[0089] The inductor may include a dual inductor.

[0090] The inductor system may be configured to have: an inductance in the range of about 0.1 microhenry to about 33 microhenry; and / or a root mean square current Irms (ΔT = 40 °C) in the range of about 2 amperes to about 120 amperes.

[0091] The provided example embodiments are intended to make the present disclosure thorough and to fully convey the scope of the present disclosure to those skilled in the art. Many specific details are set forth (such as examples of specific components, devices, and methods) to provide a thorough understanding of the embodiments of the present disclosure. It will be apparent to those skilled in the art that the exemplary embodiments may be implemented in many different forms without the use of the specific details described, and should not be construed as limiting the scope of the present disclosure. In some example embodiments, well-known processes, device structures, and techniques are not described in detail. Additionally, the advantages and improvements that can be achieved through one or more exemplary embodiments of the present disclosure are provided for illustrative purposes only and do not limit the scope of the present disclosure, because the exemplary embodiments disclosed herein may provide all of the above advantages and improvements or not provide the above advantages and improvements and still fall within the scope of the present disclosure.

[0092] The specific numerical dimensions and values, specific materials, and / or specific shapes disclosed herein are exemplary in nature and do not limit the scope of the present disclosure. The disclosure herein of specific values and specific value ranges for a given parameter does not exclude other values or value ranges that may be useful in one or more examples disclosed herein. Moreover, it is foreseeable that any two specific values of a specific parameter described herein can define the endpoints of a value range suitable for the given parameter (the disclosure of the first value and the second value for a given parameter can be interpreted as disclosing any value between the first value and the second value that can also be used for the given parameter). For example, if parameter X is exemplified herein as having a value A and is also exemplified as having a value Z, it is foreseeable that parameter X can have a value range from about A to about Z. Similarly, it is foreseeable that the disclosure of two or more value ranges of a parameter (regardless of whether these ranges are nested, overlapping, or distinct) includes all possible combinations of value ranges that can be claimed using the endpoints of the disclosed ranges. For example, if parameter X is exemplified herein as having a value in the range of 1-10 or 2-9 or 3-8, it is also foreseeable that parameter X can have other value ranges including 1-9, 1-8, 1-3, 1-2, 2-10, 2-8, 2-3, 3-10, and 3-9.

[0093] The terms used herein are merely for describing specific exemplary embodiments and are not intended to be limiting. For example, when permissive phrases such as "may comprise" or "may include" are used herein, at least one system includes or contains the features in at least one exemplary embodiment. As used herein, unless the context clearly indicates otherwise, a singular form of a description may be intended to include a plural form. The terms "comprise," "comprising," "includes," "including," "has," and "having" are inclusive and thus specify the presence of stated features, elements, steps, operations, components, and / or parts, but do not preclude the presence or addition of one or more other features, elements, steps, operations, components, parts, and / or their combinations. The method steps, processes, and operations described herein do not necessarily have to be performed in the specific order discussed or shown herein, unless the order of performance is specifically specified. It will also be understood that additional or alternative steps may be employed.

[0094] When a component or layer is referred to as being "on," "engaged to," "connected to," or "coupled to" another component or layer, it can be directly on, engaged, connected, or coupled to the other component or layer, or intervening components or layers may also be present. In contrast, when a component is referred to as being "directly on," "directly engaged to," "directly connected to," or "directly coupled to" another component or layer, intervening components or layers may not be present. Other words used to describe the relationship between components should be interpreted in the same way (e.g., "between" versus "directly between," "adjacent" versus "directly adjacent," etc.). As used herein, the term "and / or" includes any one or more of the associated listed items and all combinations thereof.

[0095] The term "about," when applied to a value, indicates some slight imprecision in the calculation or measurement of the value (the value being close to exact; about approximate or reasonably approximate; nearly). If, for some reason, the imprecision provided by "about" is not otherwise understood in the art in its ordinary sense, then as used herein, "about" represents at least the variation that may be caused by ordinary measurement methods or by the use of these parameters. For example, the terms "substantially," "about," and "essentially" may be used herein to indicate within manufacturing tolerances.

[0096] Although terms such as first, second, third, etc. may be used herein to describe various components, parts, regions, layers, and / or sections, these components, parts, regions, layers, and / or sections should not be limited by these terms. These terms may be used only to distinguish one component, part, region, layer, or section from another region, layer, or section. Unless the context clearly indicates otherwise, terms such as "first", "second", and other numerical terms used herein do not imply an order or sequence. Thus, a first component, part, region, layer, or section may also be referred to as a second component, part, region, layer, or section without departing from the teachings of the exemplary embodiments.

[0097] For ease of description, spatial relative terms such as "inner", "outer", "beneath", "below", "lower", "above", "upper", "top", "bottom", etc. may be used herein to describe the relationship of one component or feature shown in the figures to another component or feature. In addition to the orientation depicted in the figures, the spatial relative terms are intended to encompass different orientations of the device during use or operation. For example, if the device in the figures is flipped, a component described as "beneath" or "below" another component or feature will be oriented "above" the other component or feature. Thus, the exemplary term "below" can encompass both an upper and a lower orientation. The device may be otherwise oriented (rotated 90 degrees or at other orientations), and the spatial relative descriptions used herein should then be interpreted accordingly.

[0098] The embodiments described above are provided for purposes of illustration and description. They are not intended to be exhaustive or to limit the disclosure. The various components, intended uses, or features of a particular embodiment are not generally limited to that particular embodiment, but, where applicable, are interchangeable and can be used in a selected embodiment (even if not specifically shown or described). These embodiments can also vary in many ways. Such variations should not be regarded as a departure from the disclosure, and all such modifications are intended to be included within the scope of the disclosure.

Claims

1. An inductor system, the inductor system comprising: A printed circuit board (PCB), the PCB having opposite first and second sides; An inductor, the inductor being a molded power inductor, the inductor being along and / or adjacent to the first side of the PCB; A thermal interface material (TIM), the TIM being disposed along at least a portion of the surface of the inductor; A heat dissipation / dissipation structure, the heat dissipation / dissipation structure being positioned relative to the PCB to receive heat dissipated by the inductor; A heat dissipation layer; And A second TIM, the second TIM being along and / or adjacent to a portion of the second side of the PCB aligned with the inductor, the second TIM including the same material as or a different material from the TIM; Wherein, the second TIM is used to define or establish at least a portion of a heat conduction path from the portion of the second side of the PCB to the heat dissipation layer, and heat is transferred from the PCB to the heat dissipation layer along the heat conduction path; Wherein, the TIM can withstand solder reflow conditions and / or a temperature of up to at least 280 degrees Celsius, such that after the TIM is applied along the top of the inductor, the inductor is mounted to the first side of the PCB by surface mount technology.

2. The inductor system according to claim 1, wherein: The surface of the inductor includes an upper surface portion of the inductor; and The TIM is disposed along the upper surface portion of the inductor.

3. The inductor system according to claim 2, wherein: The TIM completely covers the upper surface portion of the inductor, and / or The TIM is directly against the upper surface portion of the inductor, and / or the TIM is attached to the upper surface portion of the inductor.

4. The inductor system according to claim 1, wherein: The surface of the inductor includes a lower surface portion of the inductor; and The TIM is disposed along the lower surface portion of the inductor.

5. The inductor system according to claim 4, wherein: The TIM completely covers the lower surface portion of the inductor; and / or The TIM is directly against the lower surface portion of the inductor, and / or the TIM is attached to the lower surface portion of the inductor.

6. The inductor system according to claim 1, wherein, The TIM has a thermal conductivity of at least 1 W / mK, and wherein, the thickness of the TIM is between 0.075 mm and 5 mm.

7. The inductor system according to claim 1, wherein, The TIM has a thermal conductivity of at least 1 W / mK, and wherein, the thickness of the TIM is between 0.1 mm and 0.5 mm.

8. The inductor system according to claim 1, wherein, The TIM has a thermal conductivity of at least 1 W / mK, and wherein, the thickness of the TIM is between 0.2 mm and 0.3 mm.

9. The inductor system according to claim 1, wherein, The TIM has a thermal conductivity of at least 1 W / mK, and wherein, the thickness of the TIM is 0.25 mm.

10. The inductor system according to claim 1, wherein, The TIM includes one or more of the following: A silicone elastomer matrix filled with one or more thermal conductive fillers; A two-component pourable liquid in-situ curing thermal gap filler; A thermal phase change material; And / or A non-silicone gap filler.

11. The inductor system according to claim 1, wherein, The TIM includes one or more of the following: A two-component pourable liquid in-situ curing thermal gap filler based on silicone and filled with ceramic, having a thermal conductivity of at least 2 W / mK and / or a Shore 00 hardness of 45 or less; A silicone resin-free thermally phase-changing material having a thermal conductivity of at least 5.4 W / mK, a Shore 00 hardness of 85 or less, and / or a non-reinforced film structure; and / or A non-silicone resin gap filler having a thermal conductivity of at least 5.5 W / mK, a Shore 00 hardness of 80 or less, and / or a self-standing film structure.

12. The inductor system according to claim 1, wherein: The inductor system has a root mean square current Irms rating of at least 28.6 A; and / or The TIM is configured such that the inductor operates at a root mean square current Irms rating of at least 28.6 A.

13. The inductor system according to claim 1, wherein, The inductor system is configured to have: Inductances of 0.22 microhenry, 0.33 microhenry, and 0.47 microhenry; A length of 6 mm or less, a width of 6 mm or less, and a height of 3 mm or less; A maximum DC resistance of 7 milliohms; A saturation current of at least 32.5 amperes; and A root mean square current Irms rating of at least 28.6 A.

14. The inductor system according to claim 1, wherein, The inductor includes a power inductor and / or a dual inductor.

15. The inductor system according to claim 1, wherein, The inductor system is configured to have: An inductance in the range of 0.1 microhenry to 33 microhenry; and / or A root mean square current Irms in the range of 2 amperes to 120 amperes.

16. The inductor system according to claim 1, wherein: The heat rejection / dissipation structure includes a heat sink; and The TIM is located between the heat sink and at least a portion of the surface of the inductor, whereby the TIM can act to define or establish at least a portion of a heat conduction path from at least a portion of the surface of the inductor to the heat sink, along which heat is transferred from the inductor to the heat sink.

17. The inductor system according to claim 16, wherein, The heat sink includes a base in thermal contact with the TIM, and one or more heat fins extending outward from the base.

18. The inductor system according to claim 1, the inductor system further comprising: A second TIM, which is along and / or adjacent to the second surface of the PCB and is aligned with the inductor, wherein the second TIM includes the same material as or a different material from the TIM.

19. The inductor system according to claim 1, wherein, The heat dissipation layer includes graphite and / or aluminum.

20. A system-on-chip, the system-on-chip comprising at least one inductor system according to any one of claims 1 to 19.

21. The system-on-chip according to claim 20, the system-on-chip being configured for an autonomous driving vehicle platform, wherein, The system-on-chip includes a plurality of power supply rails, each of the power supply rails including at least one inductor system.

22. The system-on-chip according to claim 21, wherein, The at least one inductor system is configured to have: Inductances of 0.22 microhenry, 0.33 microhenry, and 0.47 microhenry; A length of 6 mm or less, a width of 6 mm or less, and a height of 3 mm or less; A maximum DC resistance of 7 milliohms; A saturation current of at least 32.5 amperes; and A root mean square current Irms rating of at least 28.6 A.

23. An electronic device, the electronic device comprising at least one inductor system according to any one of claims 1 to 19.

24. The electronic device according to claim 23, wherein The electronic device includes a graphics card or a laptop computer.

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