Overlay alignment mark and overlay error measurement method
By setting up the incision alignment marks of specific solid features and hollow features in different layers of the semiconductor device, the problem of relying on special marks for measurement of incision error in lithography is solved, and the effect of accurately measuring the incision error when the special mark is missing is achieved.
Patent Information
- Application Number
- CN202010494717.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2020-06-03
- Publication Date
- 2025-04-29
- Estimated Expiration
- 2040-06-03
AI Technical Summary
In the manufacturing of semiconductor devices, in the photolithography process, the measurement of incision error depends on special incision measurement marks, resulting in the failure of the measurement method when the special marks are missing in certain specific occasions (such as during device development or later error detection).
Designing an incision alignment mark, including providing specific solid features and hollow features in the first and second layers of the wafer, such that the orthoprojection of a pair of solid features overlaps at least partially with the orthoprojection of the two pairs of hollow features, thereby measuring the incision error between different layers of the wafer by SEM imaging without relying on the dedicated mark.
It realizes accurate measurement of the incision error in the multi-layer lithography process of semiconductor devices without relying on special incision alignment marks, avoids measurement failure problems caused by the loss of special incision marks, simplifies the measurement steps and improves the measurement efficiency.
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Figure CN111522209B_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to the field of semiconductor manufacturing and inspection, and more particularly to an overlay alignment mark (especially for SEM imaging) and an overlay error measurement method. Background Art
[0002] In semiconductor device manufacturing technology, a photolithography process is usually used to transfer the mask pattern on the mask plate to the photoresist layer on the surface of the wafer. The photolithography process typically includes steps such as photoresist coating, masking, exposure, and development. As the integration of semiconductor devices continues to increase, the feature size of the device continues to shrink, and the process becomes more and more complicated. In order to achieve good device performance, each layer of photolithography patterns has strict feature size requirements. The way to reduce the size of semiconductor devices usually includes, in addition to increasing the layout density of the device by reducing the line width, further improving the integration of the device by increasing the number of photolithography layers. Therefore, in the multi-layer photolithography process, the alignment between each process layer is one of the basic requirements for the production process, so the inter-layer overlay error must be measured and corrected to achieve the required overlay accuracy to ensure accurate overlay alignment between the layers. Overlay error characterizes the degree of positional deviation of each pattern of the multi-layer, and the overlay accuracy in the photolithography process is usually evaluated by the overlay error between two or three layers. Overlay accuracy depends not only on the positioning accuracy of the machine and the accuracy of the processing technology, but also on the degree of perfection of the control system.
[0003] The importance of overlay accuracy to the lithography process and product yield is self-evident, so the detection of overlay error and the control of overlay accuracy are particularly important. A common feature in related technologies is to determine the overlay error by measuring the pre-designed special overlay measurement mark. However, in actual applications, especially in specific occasions (such as the development and research process of the device or in the later error checking process), the special overlay measurement mark may be missing, making the overlay error measurement method of the related technology invalid.
[0004] The disclosed embodiments more specifically relate to CDSEM measurement, i.e., using SEM to measure the critical dimensions of a pattern. The CD value measured by SEM is, for example, the size of a photoresist pattern formed after exposure and development of the photoresist. Subsequent processes such as ion implantation or etching are performed only when the SEM measurement results meet the requirements. Regarding CDSEM measurement, it is usually necessary to first perform alignment using an optical microscope, then perform alignment using the SEM, and then perform SEM measurement of the CD value. In order to achieve alignment using the SEM, it is necessary to set the SEM overlay alignment mark, in particular, to use the existing specific geometric pattern of the wafer after patterning to serve as the overlay alignment mark. Summary of the invention
[0005] In order to solve at least one aspect of the above problems and defects in the prior art, the present invention provides an overlay alignment mark and an overlay error measurement method.
[0006] To achieve the above purpose, the technical solution is as follows:
[0007] According to a first aspect of an embodiment of the present disclosure, there is provided an overlay alignment mark located in a patterned wafer, the wafer having a lower pattern located in a first layer of the wafer and an upper pattern located in a second layer above the first layer of the wafer, the overlay alignment mark comprising: a first pattern, as a part of the lower pattern and comprising: a pair of solid features formed in the first layer; a second pattern, as a part of the upper pattern and comprising: two pairs of hollow features formed in the second layer, a line connecting the geometric centers of a pair of hollow features and a line connecting the geometric centers of another pair of hollow features respectively extending in two orthogonal directions, the orthographic projections of the pair of solid features on the wafer at least partially overlapping with the orthographic projections of a corresponding pair of hollow features among the two pairs of hollow features on the wafer.
[0008] According to an exemplary embodiment of the present disclosure, the pair of solid features are designed as two solid patterns with strip cross-sections in the first layer that are centrally symmetrical and mirror-symmetrical about a first reference point, and the two pairs of hollow features are designed as two pairs of through holes with rectangular cross-sections in the second layer, and the geometric center lines of each pair of through holes extend along the two orthogonal directions, respectively, wherein one pair of through holes serves as the corresponding pair of hollow features through which the pair of solid features can be at least partially observed, and the other pair of through holes is centrally symmetrical and mirror-symmetrical about a second reference point, and the extension direction of the geometric center line of the corresponding pair of hollow features serves as the first direction; and the two opposite side edges of the strip cross-section extending along a second direction orthogonal to the first direction are at least partially exposed from the corresponding pair of hollow features.
[0009] According to an exemplary embodiment of the present disclosure, the upper pattern of the chip includes a plurality of through holes arranged in an array, and the two pairs of hollow features include: a first pair of through holes among the plurality of through holes arranged along one of the row direction and the column direction of the array and a second pair of through holes arranged along the other of the row direction and the column direction of the array, and two opposite side edges of the strip cross-section of the pair of solid features extending along one of the row direction and the column direction are at least partially exposed from the corresponding first pair of through holes or the second pair of through holes.
[0010] According to an exemplary embodiment of the present disclosure, the coordinate value of the first reference point in the first direction and the coordinate value of the second reference point in the first direction are designed to have a difference therebetween that is a first constant.
[0011] According to an exemplary embodiment of the present disclosure, the first constant is zero.
[0012] According to an exemplary embodiment of the present disclosure, the overlay error between different layers of a chip is the overlay error between the first layer and the second layer, and at least includes: the deviation between the first layer and the second layer along the first direction, which is defined as the deviation between the first pattern and the second pattern along the first direction minus the first constant.
[0013] According to an exemplary embodiment of the present disclosure, the deviation between the first pattern and the second pattern along the first direction is defined as a difference between a coordinate value of the first reference point in the first direction and a coordinate value of the second reference point in the first direction.
[0014] According to an exemplary embodiment of the present disclosure, the coordinate value of the first reference point in the first direction is defined as: half of the sum of the average values of the coordinate values of the two opposite sides of each of the pair of solid features in the first direction.
[0015] According to an exemplary embodiment of the present disclosure, the deviation between the first pattern and the second pattern along the first direction is defined as 1 / 2 of the difference between the distances between the center lines of each of the pair of solid features parallel to the second direction and the second reference point.
[0016] According to an exemplary embodiment of the present disclosure, the distance between the center line of each physical feature parallel to the second direction and the second reference point is defined as: the absolute value of the difference between the average of the coordinate values of the two opposite sides extending along the second direction of each physical feature in the first direction and the coordinate value of the second reference point in the first direction.
[0017] According to an exemplary embodiment of the present disclosure, another pair of hollow features in the two pairs of hollow features that is different from the corresponding pair of hollow features is designed so that the average of the coordinate values of their respective geometric center points in the first direction is the same as the coordinate value of the second reference point in the first direction.
[0018] According to an exemplary embodiment of the present disclosure, another pair of hollow features of the two pairs of hollow features that is different from the corresponding pair of hollow features is designed so that the coordinate values of their respective geometric center points in the first direction are the same.
[0019] According to an exemplary embodiment of the present disclosure, the coordinate value of the second reference point in the first direction is defined as: the average coordinate value of the geometric center point of the circular pattern or elliptical pattern into which the other pair of hollow features are each fitted in the first direction.
[0020] In addition, according to another aspect of the embodiment of the present disclosure, there is provided an overlay error measurement method, comprising: setting an overlay alignment mark in a wafer having a pattern formed thereon, the wafer having a lower layer pattern located in a first layer of the wafer and an upper layer pattern located in a second layer above the first layer of the wafer; and measuring the overlay error between different layers of the wafer by measuring the deviation between the portions of the overlay alignment mark located in different layers of the wafer. Wherein, setting the overlay alignment mark comprises: selecting a portion of the lower layer pattern as a first pattern, the first pattern comprising a pair of solid features formed in the first layer; selecting a portion of the upper layer pattern as a second pattern, the second pattern comprising two pairs of hollow features formed in the second layer, the geometric center line of a pair of hollow features and the geometric center line of another pair of hollow features respectively extending in two orthogonal directions, and the orthographic projection of the pair of solid features on the wafer at least partially overlaps with the orthographic projection of a corresponding pair of hollow features in the two pairs of hollow features on the wafer.
[0021] According to an exemplary embodiment of the present disclosure, selecting a part of the lower layer pattern as the first pattern includes: selecting two solid patterns in the first layer as the pair of solid features, the selected two solid patterns are centrally symmetrical and mirror-symmetrical about the first reference point and have a strip-shaped cross-section, and selecting a part of the upper layer pattern as the second pattern includes: selecting two pairs of through holes in the second layer as the two pairs of hollow features, the selected two pairs of through holes have a rectangular cross-section and the geometric center lines of each pair of through holes extend along the two orthogonal directions, respectively, wherein one pair of through holes serves as the corresponding pair of hollow features through which the pair of solid features can be at least partially observed, and the other pair of through holes are centrally symmetrical and mirror-symmetrical about the second reference point, the extension direction of the geometric center line of the corresponding pair of hollow features is set to the first direction, and the two opposite sides of the strip cross-section extending along the second direction orthogonal to the first direction are at least partially exposed from the corresponding pair of hollow features.
[0022] According to an exemplary embodiment of the present disclosure, the upper layer pattern of the chip includes a plurality of through holes arranged in an array, and selecting two pairs of through holes in the second layer as the two pairs of hollow features includes: selecting a first pair of through holes arranged along one of the row direction and the column direction of the array and a second pair of through holes arranged along the other of the row direction and the column direction of the array from the plurality of through holes, and two opposite sides of the strip cross-section of the pair of solid features extending along one of the row direction and the column direction are at least partially exposed from the corresponding first pair of through holes or the second pair of through holes.
[0023] According to an exemplary embodiment of the present disclosure, the coordinate value of the first reference point in the first direction and the coordinate value of the second reference point in the first direction are designed to have a difference therebetween that is a first constant.
[0024] According to an exemplary embodiment of the present disclosure, the first constant is preset to zero.
[0025] According to an exemplary embodiment of the present disclosure, measuring the overlay error between different layers of a chip by measuring the deviation between parts of the overlay alignment mark located in different layers of the chip at least includes: obtaining the deviation between the first layer and the second layer along the first direction by measuring the deviation between the first pattern and the second pattern along the first direction and subtracting the first constant.
[0026] According to an exemplary embodiment of the present disclosure, measuring the deviation between the first pattern and the second pattern along the first direction includes: measuring a difference between a coordinate value of the first reference point in the first direction and a coordinate value of the second reference point in the first direction.
[0027] According to an exemplary embodiment of the present disclosure, the coordinate value of the first reference point in the first direction is obtained by measuring half of the sum of the average values of the coordinate values of the two opposite sides of each of the pair of physical features in the first direction.
[0028] According to an exemplary embodiment of the present disclosure, measuring the deviation between the first pattern and the second pattern along the first direction includes: measuring 1 / 2 of the difference between the distances between the center lines of each of the pair of solid features parallel to the second direction and the second reference point.
[0029] According to an exemplary embodiment of the present disclosure, by measuring the absolute value of the difference between the average of the coordinate values of the two opposite sides of each physical feature extending along the second direction in the first direction and the coordinate value of the second reference point in the first direction, the distance between the center line of each physical feature parallel to the second direction and the second reference point is obtained.
[0030] According to an exemplary embodiment of the present disclosure, another pair of hollow features in the two pairs of hollow features that is different from the corresponding pair of hollow features is designed so that the average of the coordinate values of their respective geometric center points in the first direction is the same as the coordinate value of the second reference point in the first direction.
[0031] According to an exemplary embodiment of the present disclosure, another pair of hollow features of the two pairs of hollow features that is different from the corresponding pair of hollow features is designed so that the coordinate values of their respective geometric center points in the first direction are the same.
[0032] According to an exemplary embodiment of the present disclosure, the coordinate value of the second reference point in the first direction is obtained by fitting the other pair of hollow features into a circular pattern or an elliptical pattern respectively, and calculating the average of the coordinate values of the geometric center points of the circular pattern or the elliptical pattern in the first direction. BRIEF DESCRIPTION OF THE DRAWINGS
[0033] Embodiments of the present disclosure will now be described, by way of example only, with reference to the accompanying schematic drawings, in which corresponding reference numerals indicate corresponding parts. A brief description of the drawings is as follows:
[0034] FIG. 1( a ) shows in top view a layout of an exemplary arrangement of overlay alignment marks as part of a patterned wafer pattern according to an embodiment of the present disclosure;
[0035] FIG. 1( b ) schematically shows in top view the actual pattern formed after processing of the overlay alignment mark as part of the patterned wafer pattern shown in FIG. 1( a );
[0036] FIG. 1( c ) schematically shows in top view a design layout of an overlay alignment mark as a part of a patterned wafer pattern according to an extended embodiment of the present disclosure;
[0037] FIG2( a ) shows a schematic layout of the overlay alignment marks shown in FIG1( a ) in a top view;
[0038] FIG. 2( b ) shows a top view of a schematic layout of a typical example of an overlay alignment mark as described in FIG. 2( a );
[0039] 3( a ) and 3( b ) are cross-sectional views taken along section lines AA′ and BB′ in FIG. 2( a ), respectively;
[0040] 4(a) and 4(b) schematically show in top view portions of the overlay alignment mark shown in FIG. 2(a) respectively located in the second layer as the current layer and the first layer as the previous layer;
[0041] Figure 5 Schematically illustrating how to obtain the overlay error between two different layers using the overlay alignment mark shown in FIG. 2( a ) according to an embodiment of the present disclosure;
[0042] Figure 6 Schematically showing that in a graph formed after actual processing as shown in FIG. 1( b ), the coordinate value of a first reference point of a first pattern in a first direction is obtained based on a first definition, and the coordinate value of a second reference point of a second pattern in the first direction is obtained by graph fitting;
[0043] FIG. 7( a) schematically illustrates how to obtain the coordinate value of a first reference point of a first pattern in a first direction based on a second definition according to some other embodiments of the present disclosure;
[0044] FIG7( b ) schematically shows a more specific method of obtaining the coordinate value of the first reference point in the first direction as shown in FIG7( a );
[0045] Figure 8 A method for measuring overlay error according to an embodiment of the present disclosure is shown;
[0046] Fig. 9 Schematically showing the case where the overlay alignment mark is formed on two layers, as shown in FIG. Figure 8 A schematic block diagram of step S101 of the overlay error measurement method shown;
[0047] Fig.10 In some embodiments of the present disclosure, Figure 8 FIG. 1 is a schematic block diagram of step S102 of the overlay error measurement method. DETAILED DESCRIPTION
[0048] The technical solution of the present disclosure will be further explained in detail below by way of examples in combination with the accompanying drawings. In the specification, the same or similar reference numerals and letters indicate the same or similar parts. The following description of the embodiments of the present disclosure with reference to the accompanying drawings is intended to explain the overall inventive concept of the present disclosure and should not be construed as a limitation of the present disclosure.
[0049] The accompanying drawings are used to illustrate the contents of the present disclosure. The sizes and shapes of the components in the drawings do not reflect the actual scale of the components used for the various layers and overlay alignment marks of the semiconductor device used in the embodiments of the present disclosure.
[0050] In the related art, during the implementation of the multi-layer lithography process, the overlay error is usually obtained by measuring the overlay alignment marks of the multi-layer in the two-dimensional directions (x direction and y direction) of the plane parallel to the wafer substrate. In addition, in the related art, when implementing CDSEM measurement for the multi-layer lithography process, it is usually necessary to first perform a rough alignment using an optical microscope, then perform a fine alignment using a SEM, and then perform SEM measurement of the CD value. In order to achieve alignment using the SEM, the overlay alignment marks of the SEM need to be reasonably set.
[0051] The setting of the overlay alignment marks in the related art takes into account at least the following two factors: first, a set of fixed overlay alignment marks is used to measure the overlay error in two orthogonal directions (e.g., the x-direction and the y-direction) at the same time; second, it is necessary to measure the overlay accuracy between multiple layers (at least two layers) by measuring the overlay error between multiple layers. However, more specifically, when using SEM images to measure the overlay accuracy of multiple layers in the related art, for example, the overlay error is typically determined by measuring the special overlay measurement marks designed and preset in advance. However, in actual applications, especially in specific occasions (such as the development and research process of the device or in the later error checking process), the special overlay measurement marks may be missing, making the overlay error measurement method of the related art invalid.
[0052] Therefore, there is an urgent need in the art for an improved overlay alignment mark that can target a specific chip pattern when acquiring SEM images to measure overlay errors. Instead, the mark utilizes the geometry of the chip pattern itself and uses the tools provided by the software. The operator selects measurement points and sets calculation formulas. The CD-SEM device samples and takes images according to the set configuration scheme (Recipe), calculates and reports the overlay error results, thereby achieving overlay error measurement that does not rely on specially set dedicated overlay alignment marks.
[0053] Basic concept
[0054] FIG1( a ) is a top view showing a layout of an exemplary arrangement of overlay alignment marks as part of a patterned chip pattern according to an embodiment of the present disclosure; FIG1( b ) is a top view schematically showing a pattern formed after actual processing of the overlay alignment marks as part of a patterned chip pattern as shown in FIG1( a ).
[0055] According to the overall technical concept of the embodiments of the present disclosure, Figure 1(a) and 1(b) As shown, in one aspect of the embodiment of the present disclosure, an overlay alignment mark located in a wafer having a pattern formed thereon is provided, the wafer being, for example, to be imaged by SEM scanning, the wafer having a lower layer pattern located in a first layer of the wafer and an upper layer pattern located in a second layer above the first layer of the wafer, the overlay alignment mark comprising: a first pattern, as part of the lower layer pattern and comprising: a pair of solid features 101 formed in the first layer; and a second pattern, as part of the upper layer pattern and comprising: two pairs of hollow features 201, 202 formed in the second layer, the geometric center connecting line of a pair of hollow features 201 and the geometric center connecting line of another pair of hollow features 202 respectively extending in two orthogonal directions. Moreover, the orthographic projection of the pair of solid features 101 on the wafer at least partially overlaps with the orthographic projection of the corresponding pair of hollow features 201 of the two pairs of hollow features 201, 202 on the wafer.
[0056] Furthermore, FIG. 2( a ) shows a schematic layout of the overlay alignment marks shown in FIG. 1( a ) in a top view.
[0057] In a further embodiment of the present disclosure, for example, as shown in the figure, the pair of solid features 101 are designed as two solid patterns with strip cross-sections in the first layer that are centrally symmetrical and mirror-symmetrical about the first reference point O1, and the two pairs of hollow features 201 and 202 are designed as two pairs of through holes with rectangular cross-sections in the second layer, and the geometric center lines of each pair of through holes extend along the two orthogonal directions respectively (more specifically, the geometric center lines of the first pair of through holes 201 and the geometric center lines of the second pair of through holes 202 extend along the two orthogonal directions respectively), wherein a pair of through holes can be used as The corresponding pair of hollow features through which the pair of solid features can be at least partially observed, the other pair of through holes are centrally symmetric and mirror-symmetric about the second reference point O2, the extension direction of the geometric center line of the corresponding pair of hollow features is used as the first direction (for example, the horizontal direction x of the reference rectangular coordinate system shown in the lower left corner of Figure 2(a)); and the two opposite side edges of the strip cross-section extending along the second direction orthogonal to the first direction (for example, the vertical direction y of the reference rectangular coordinate system shown in the lower left corner of Figure 2(a)) are at least partially exposed from the corresponding pair of hollow features.
[0058] Figures 3(a) and 3(b) respectively show cross-sectional views along section lines A-A' and BB' in Figure 2(a); Figures 4(a) and 4(b) schematically show in top view the parts of the overlay alignment marks shown in Figure 2(a) which are respectively located in the second layer as the current layer and the first layer as the previous layer.
[0059] More specifically, for example, the specific layered arrangement of the overlay alignment mark shown in Figure 2(a) is schematically illustrated in Figures 3(a) and 3(b), showing that the overlay alignment mark includes: a first pattern 10, located in the first layer 1 of the chip and including: two first solid features 101 arranged opposite to each other in a first direction (for example, a horizontal direction x) and extending respectively along a second direction (for example, a vertical direction y) perpendicular to the first direction; and a second pattern 20, located in the second layer 2 above the first layer 1 of the chip and including: two first hollow features 201 arranged opposite to each other in the first direction x; and two second hollow features 202 arranged opposite to each other in the second direction y. Furthermore, two opposite side edges of each first solid feature 101 extending along the second direction y are at least partially exposed from the corresponding first hollow feature 201; in other words, the orthographic projections of the two first solid features 101 on the wafer at least partially overlap with the orthographic projections of the two first hollow features 201 on the wafer, respectively, and the orthographic projections of the two opposite side edges of each first solid feature 101 extending along the second direction y on the wafer fall within the orthographic projection range of the corresponding first hollow feature 201 on the wafer.
[0060] FIG. 4( a ) and FIG. 4( b ) schematically show in top view the portions of the overlay alignment mark shown in FIG. 2( a ) located in the second layer 2 as the current layer and the first layer 1 as the previous layer. Figure 3(a) to Figure 3(b) Corresponding to the illustrated situation, FIG4(a) shows the plan layout of the second pattern 20 in the overlay alignment mark located in the second layer 2 of the wafer in a top view, and FIG4(b) shows the plan layout of the first pattern 10 in the overlay alignment mark located in the first layer 1 of the wafer in a top view. Thus, for example, based on the combination of the specific layered arrangement of the overlay alignment mark shown in the cross-sectional view in FIG3(a) and FIG3(b) and the plan layout of the portion of the overlay alignment mark located in each layer shown in the top view in FIG4(a) and FIG4(b), in the first pattern 10 in the first layer 1 located below the second layer 2, the first solid feature 101 can be at least partially observed from above through the corresponding first hollow feature 201. Furthermore, while performing a single SEM imaging on the second pattern of the second layer 2, the first pattern 10 (specifically, the two first solid features 101) in the first layer 1 that is at least partially exposed via the two first hollow features 201 of the second pattern can also be imaged simultaneously. Thus, in the obtained single SEM image, the two first hollow features 201, the two second hollow features 202, and the two first solid features 101 are respectively imaged as corresponding parts, for example, referred to as the first hollow sub-image, the second hollow sub-image, and the first solid sub-image. Then, each side edge of each first solid feature 101 that is imaged as a side edge of the corresponding first solid sub-image in the single SEM image (for example, the outer side edge l1 and the inner side edge l2 extending along the second direction y as shown in FIG. 2(a)) is also at least partially exposed from the first hollow sub-image corresponding to the corresponding first hollow feature 201 superimposed on the first solid feature 101, and is thus observable.
[0061] For convenience, the second layer 2 formed with only hollow features is also referred to as a current layer, and the first layer 1 located below the first layer 1 is also referred to as a front layer.
[0062] FIG. 1( c ) schematically shows a top view of a design layout of an overlay alignment mark as a part of a patterned wafer pattern according to an extended embodiment of the present disclosure.
[0063] In a further extended embodiment, for example, as shown in FIG1(c), assuming that on the second layer, i.e., the current layer, of the wafer, the upper layer pattern includes a plurality of through holes arranged in an array, the two pairs of hollow features include: a second pair of through holes 202 arranged along one of the row and column directions of the array (e.g., the column direction shown in the figure) and a first pair of through holes 201 arranged along the other of the row and column directions of the array (e.g., the row direction shown in the figure), and the two opposite sides of the strip-shaped cross-section of the pair of solid features 101 extending along one of the row and column directions (e.g., the column direction shown in the figure) are at least partially exposed from the corresponding first pair of through holes or the second pair of through holes (shown as at least partially exposed from the first pair of through holes 201). That is, a solid feature 101 having a strip-shaped cross-section and capable of being at least partially observed through a corresponding pair of hollow features (e.g., the first pair of through holes 201 shown in the figure) is formed on the first layer 1, i.e., the front layer of the wafer; and the aforementioned two orthogonal directions can serve as the aforementioned first direction x and second direction y, such as the row direction and column direction here, respectively.
[0064] Therefore, for a patterned wafer with specific patterns on each layer, partial pattern features of the existing patterns on the previous layer and the current layer can be used as overlay alignment marks, without the need to form additional dedicated overlay alignment marks. Thus, the problem of failure of overlay error measurement in the related art due to the lack of additional dedicated overlay alignment marks during device preparation and application is avoided.
[0065] Basic Example of Overlay Reference Marks
[0066] In an exemplary embodiment, a first pattern 10, such as the two first solid features 101, is formed in the first layer 1; and a second pattern 20, such as the two first hollow features 201 and the two second hollow features 202, is formed in the second layer 2, as shown in the cross-sectional views of FIG. 3(a) and FIG. 3(b). The first layer 1 is, for example, a silicon substrate, a conductive layer or an insulating layer, and the second layer 2 is, for example, a conductive layer or an insulating layer. Moreover, the two first solid features 101 are, for example, solid patterns designed to have a strip-shaped cross-section, such as a columnar or truncated pyramid structure formed in the first layer 1, or a columnar or truncated pyramid structure protruding from the surface of other material layers below the first layer 1; the two first hollow features 201 and the two second hollow features 202 are, for example, groove structures sunken in the second layer 2.
[0067] Through the arrangement based on the above overall technical concept, that is, the first solid feature 101 in the first layer 1 and the first hollow feature 201 in the second layer 2 at least partially overlap, so that the two side edges of the two first solid features 101 that are opposite in the first direction x and extend in the second direction y are at least partially exposed from the two first hollow features 201, then the first solid feature 101 in the first layer 1 that is essentially the front layer can be observed from above at least partially through the first hollow feature 201 in the second layer 2 that is the current layer, that is, when performing SEM imaging on the first layer 1, the two first solid features 101 in the second layer 2 that are at least partially exposed through the two first hollow features 201 can also be imaged simultaneously. Thus, in contrast to the solution in the related art in which the portions of the overlay alignment mark in each layer are arranged so that their respective orthographic projections on the wafer are staggered with each other (i.e., they do not overlap at all), and thus the SEM pattern needs to be collected layer by layer, in the solution of the embodiment of the present disclosure, since the first solid feature 101 in the front layer is at least partially overlapped with the first hollow feature 201 in the current layer and can be observed from above through the latter, the portions of the overlay alignment mark located in different layers (i.e., the first pattern 101 and the second pattern 201) can be simultaneously acquired by only collecting an SEM image once for the superimposed front layer and the current layer. Pattern 20), thereby avoiding the interference of multiple movements of the SEM device in the process of collecting SEM images layer by layer and the displacement of the SEM device relative to the position where the electron beam scanning of the wafer to be measured is expected, on the measurement of the overlay error, and there is no need to adjust the electron beam energy of the SEM device multiple times; and the overlay error between different layers of the wafer, such as the overlay error between the current layer and the previous layer (more specifically, the overlay error component in the first direction x) can be calculated based on the single SEM image only by collecting the SEM image once, thereby simplifying the steps of measuring the overlay error.
[0068] In an exemplary embodiment, as shown in FIG. 2( a ), for example, each first entity feature 101 is designed as a solid pattern having a strip-shaped cross-section, and the two first entity features 101 are designed to be centrally symmetric and mirror-symmetric about the first reference point O1 (i.e., the first reference point O1 serves as the center of central symmetry of the two first entity features 101; and since the two first entity features 101 are relatively arranged in the first direction x and extend respectively along the second direction y, the axis parallel to the second direction y and passing through the first reference point O1 serves as the axis of mirror symmetry of the two first entity features 101, i.e., the first reference point O1, referred to as such, also serves as the center of mirror symmetry of the two first entity features 101). Thus, hereinafter referred to as the first reference point O1, serves as the center of symmetry of the two first entity features 101. And, for example, each first hollow feature 201 and each second hollow feature 202 are designed to be a through hole with a rectangular cross-section, and one of the two first hollow features 201 and the two second hollow features 202 (for example, the two second hollow features 202 that do not overlap with the two first solid features 101 at all as shown in the figure, that is, another pair of hollow features different from the corresponding pair of hollow features) are designed to be centrally symmetrical and mirror-symmetrical about the second reference point O2 (for example, the second reference point O2 serves as the center of central symmetry of the two second hollow features 202; and since the two second hollow features 202 are opposite to each other in the second direction y, the axis parallel to the first direction x and passing through the second reference point O2 serves as the axis of mirror-symmetry of the two second hollow features 202, that is, the second reference point O2, referred to as such, also serves as the center of mirror-symmetry of the two second hollow features 202). Therefore, the second reference point O2, referred to as such below, serves as the center of symmetry of the two second hollow features 202. Further, the coordinate value of the first reference point O1 in the first direction x and the coordinate value of the second reference point O2 in the first direction x are designed to be expected to have a difference of a first constant. And, in an ideal case, the first constant is set to zero, for example, that is, the difference between the coordinate value of the first reference point O1 in the first direction x and the coordinate value of the second reference point O2 in the first direction x is a first constant of zero value (that is, the coordinate value of the first reference point O1 in the first direction x and the coordinate value of the second reference point O2 in the first direction x should be equal at this time).
[0069] As shown in Figures 3(a) and 3(b), the first reference point O1 and the second reference point O2 are substantially presented as the first axis and the second axis along the normal direction of the wafer in the cross-sectional view, and thus appear as points in the top view as shown in Figures 2(a) and 2(b).
[0070] FIG2(b) shows a top view of a schematic layout of a typical example of the overlay alignment mark as described in FIG2(a). In a typical embodiment, for example, as shown in FIG2(b), the coordinate value of the first reference point O1 in the first direction x and the coordinate value of the second reference point O2 in the first direction x are designed to be expected to differ from each other by a first constant, and the coordinate values in the second direction y are designed to be expected to differ from each other by a second constant; and, in an ideal case, the first constant is set to zero, for example, that is, the difference between the coordinate value of the first reference point O1 in the first direction x and the coordinate value of the second reference point O2 in the first direction x is the first constant with a value of zero (that is, the two should be equal at this time); and the second constant is set to zero, for example, that is, the difference between the coordinate value of the first reference point O1 in the second direction y and the coordinate value of the second reference point O2 in the second direction y is the second constant with a value of zero (that is, the two should be equal at this time), that is, the first reference point O1 and the second reference point O2 are designed to be expected to coincide with each other in an ideal case.
[0071] Through such a specific setting, the deviation between the coordinate values of the symmetry centers O1 of the two first solid features 101 in the first direction x and the coordinate values of the symmetry centers O2 of the two second hollow features 202 in the first direction x can be simply calculated based on the single SEM image collected for the superimposed first layer 1 and the second layer 2 as above (the coordinate values of the symmetry centers O1 of the two first solid features 101 in the first direction x and the coordinate values of the symmetry centers O2 of the two second hollow features 202 in the first direction x should originally differ by a first constant in the design, and the first constant is, for example, zero), thereby obtaining the overlay error between the current layer and the previous layer, for example, the component in the first direction x.
[0072] Some Examples of Overlay Error Based on Overlay Reference Marks
[0073] According to some embodiments of the present disclosure, based on the basic embodiment of the overlay reference mark as described above, and further, when the overlay alignment mark is formed in two layers of a chip, and the coordinate values of the parts of the overlay alignment mark in the two layers respectively at the centers (for example, the symmetry centers of their respective features (the solid features or the hollow features), serving as the first reference point O1 and the second reference point O2) along a direction have a constant difference from each other (typically, for example, the difference is zero, that is, the two are equal), then at least the deviation in the overlay error between the two layers at least along this direction (for example, the first direction x) can be calculated.
[0074] For example, the overlay error between different layers of a wafer, such as the overlay error between the first layer 1 and the second layer 2, includes at least: the deviation between the first pattern 10 and the second pattern 20 along the first direction x minus the first constant (for example, the aforementioned value is zero), as the deviation between the first layer and the second layer along the first direction, which is here the component of the overlay error in the first direction x, for example, also called the X deviation component (X component deviation).
[0075] Specifically, as an example, the deviation between the first pattern 10 and the second pattern 20 along the first direction x is directly defined as: the difference between the actually measured coordinate value of the first reference point O1 in the first direction x and the coordinate value of the second reference point O2 in the first direction x (the coordinate value of the first reference point O1 in the first direction x and the coordinate value of the second reference point O2 in the first direction x should originally differ by a first constant in the design, and the first constant is, for example, zero).
[0076] Figure 5 The schematic diagram shows how to obtain the overlay error between two different layers using the overlay alignment mark shown in FIG2(a) according to an embodiment of the present disclosure. Thus, based on the aforementioned overlay alignment mark, especially the arrangement of the first pattern 10 and the second pattern 20 thereof, when the overlay alignment mark is formed in two layers of the wafer, and the centers of the parts of the overlay alignment mark in the two layers (e.g., the symmetry centers of the respective sub-patterns, serving as the aforementioned first reference point O1 and second reference point O2) have coordinate values along a single same direction (the first direction x or the second direction y) that differ from each other by a constant (e.g., the first constant or the second constant), then the overlay error between different layers of the wafer (here, the two layers) has, for example, a first definition, for example, Figure 5 As shown, it at least includes: the deviation of the first pattern 10 and the second pattern 20 along the direction minus the first constant or the second constant in the direction; specifically, the difference between the coordinate value of the symmetry center O1 of the two first physical features 101 in, for example, the first direction x and the coordinate value of the symmetry center O2 of the two second hollow features 202 in, for example, the first direction x (the coordinate value of the symmetry center O1 of the two first physical features 101 in, for example, the first direction x and the coordinate value of the symmetry center O2 of the two second hollow features 202 in, for example, the first direction x should originally be designed to differ by a first constant, and the first constant is, for example, zero) directly serves as the deviation of the first pattern 10 and the second pattern 20 along the direction, and then, the deviation minus the constant in the direction can be regarded as the component of the overlay error between the current layer and the previous layer, for example, in the direction.
[0077] Based on the above basic embodiment of the overlay alignment mark and the first definition of the deviation between two layers along the first direction x, in some embodiments, for example, Figure 5 As shown, when the two first entity features 101 are designed to be centrally symmetrical and mirror-symmetrical about the first reference point O1, and thus the first reference point O1 serves as the symmetry center of the two first entity features 101, the center line extending along the second direction y is obtained by performing edge extraction on each first entity feature 101, and the center lines extending along the second direction y of the two first entity features 101 are averaged to obtain the coordinate value of the first reference point O1 in the first direction x. For example, the center line of each first entity sub-image along the second direction y is obtained by performing edge extraction on the corresponding first entity sub-image obtained by imaging each first entity feature 101 in a single SEM image, and the coordinate values of the center lines of the two first entity sub-images along the second direction y in the first direction x are averaged.
[0078] In a specific embodiment, for example, Figure 5 As shown, the coordinate value of the first reference point O1 in the first direction x is further defined as: the average of the coordinate values of the center lines of the two first solid features 101 parallel to the second direction y that are centrally symmetric and mirror-symmetric about the first reference point O1 in the first direction x.
[0079] In a more specific embodiment, for example, Figure 5 As shown, the coordinate value of the center line of each first physical feature 101 parallel to the second direction y in the first direction x is further defined as: the average value of the coordinate values of the two opposite sides extending along the second direction y of each first physical feature 101 in the first direction x. Therefore, the coordinate value of the first reference point in the first direction is defined as: half of the sum of the average values of the coordinate values of the two opposite sides of the pair of physical features 101 in the first direction.
[0080] In a specific implementation, the edge extraction and coordinate calculation of each first solid feature 101 is achieved by performing edge extraction based on the corresponding first solid sub-image obtained by imaging each first solid feature 101 through the corresponding first hollow feature 201 superimposed thereon in the single SEM image. Figure 5 As shown, firstly, measuring points are set on the SEM image at four edges of the first entity sub-image that extend substantially along the second direction and are opposite to each other in the first direction. Figure 5The coordinate values of the measurement points on the four edges measured in the first direction are, for example, a, b, c, and d; then, based on the measurement points on the four edges extracted above, the coordinate values of the center positions of the two first entity sub-images in the x direction are calculated, e and f, where e = (a + b) / 2; f = (c + d) / 2; finally, the coordinate values of the center lines of the two first entity sub-images along the second direction y in the first direction x are averaged, i.e., (e + f) / 2, as the coordinate value of the first reference point O1 in the first direction x. That is, the average value of the coordinate values of the two opposite sides extending along the second direction y of each first entity feature 101 in the first direction x is actually considered to be equal to the average value of the coordinate values of the two opposite sides extending along the second direction y of each first entity sub-image in the single SEM image in the first direction x.
[0081] In other words, when calculating the component of the overlay error between the current layer and the previous layer in the first direction x based on the first definition, for example, by extracting the two side edges extending along the second direction y of each first entity feature 101 and finding the median (this is achieved, for example, by extracting the two side edges extending along the second direction y of each first entity sub-image in the single SEM image and finding the median), the coordinate value of the center line of each first entity feature 101 extending along the second direction y in the first direction x is obtained; then, by averaging the coordinate values of the center lines of the two first entity features 101 along the second direction y in the first direction x, the coordinate value of the center of symmetry O1 of the two first entity features 101 in, for example, the first direction x is finally obtained.
[0082] Furthermore, based on the above basic embodiment of the overlay alignment mark and the first definition of the deviation between the two layers along the first direction x, for example, in some embodiments, when the two second hollow features 202 (i.e., another pair of hollow features in the two pairs of hollow features that are different from the corresponding pair of hollow features) that do not overlap with the two first solid features 101 at all as shown in, for example, FIG. 7( a) and FIG. 7( b) are designed so that the average of the coordinate values of their respective geometric center points in the first direction is the same as the coordinate value of the second reference point in the first direction, and thus the second reference point O2 serves as the symmetry center of the two second hollow features 202, the geometric center point O of each second hollow feature 202 is obtained by performing graphic fitting on each second hollow feature 202. 202 , O 202’ And find and the geometric center point O of the two second hollow features 202 202 , O 202’The coordinate values in the first direction x are averaged (for example, by fitting the corresponding second hollowed-out sub-images obtained by imaging each second hollowed-out feature 202 in the single SEM image into a circle or an ellipse, and extracting and averaging the coordinate values of the geometric centers of the figures obtained by fitting the two second hollowed-out sub-images in the first direction x). In a more typical embodiment, for example, another pair of hollowed-out features in the two pairs of hollowed-out features that is different from the corresponding pair of hollowed-out features is further designed so that the coordinate values of their respective geometric center points in the first direction are the same.
[0083] In a specific embodiment, for example, the coordinate value of the second reference point O2 in the first direction x is further defined as: the average of the coordinate values of the geometric center points of the two second hollow features 202 that do not overlap with the two first solid features 101 at all and are centrally symmetric and mirror-symmetric about the second reference point O2 in the first direction x.
[0084] In a more specific embodiment, for example, the geometric center point of each second hollow feature 202 is further defined as: the geometric center point of the figure (eg, a circular pattern or an elliptical pattern) into which the second hollow feature 202 is fitted.
[0085] In a specific implementation, the graphic fitting and geometric center point coordinates of each second hollow feature 202 are obtained by performing graphic fitting and extracting the geometric center point in the single SEM image based on the corresponding second hollow sub-image obtained by imaging each second hollow feature 202. For example, in the case where each second hollow feature 202 is designed to have a square cross-section, usually, its corresponding second hollow sub-image in the single SEM image is fitted into a circle through a graphic fitting method; more specifically, for example, an outer circle that completely surrounds the edge of the corresponding sub-image and an inner circle that completely falls inside the edge of the corresponding sub-image are constructed respectively, and the outer circle is gradually reduced inwardly and the inner circle is gradually expanded outwardly, so that the inner circle and the outer circle are approached until they are respectively in point contact with the edge of the corresponding sub-image, and at this time, a circle located in a closed loop region between the inner circle and the outer circle is defined as the fitted circle. Alternatively, for example, when each second hollow feature 202 is designed to have a rectangular cross section, an ellipse can be fitted for the corresponding second hollow sub-image in a similar manner of approaching each other from the inner and outer sides. The ellipse pattern is, for example, a regular ellipse whose major axis and minor axis are parallel to the first direction x and the second direction y, respectively; or an inclined ellipse whose major axis forms a non-zero angle with both the first direction x and the second direction y.
[0086] Figure 6 It schematically shows that in the pattern formed after actual processing as shown in FIG. 1( b ), the coordinate value of the first reference point of the first pattern in the first direction is obtained based on the first definition, and the coordinate value of the second reference point of the second pattern in the first direction is obtained by pattern fitting, without setting a dedicated overlay alignment mark. In a further extended embodiment, for example, Figure 6 As shown, based on the existing pattern on the wafer (e.g., the geometric pattern of the chip itself), using the first definition of the deviation in at least one direction in the overlay error as described above, it is possible to use part of the graphic features of the existing pattern on the previous layer and the current layer as overlay alignment marks, without having to form a dedicated overlay alignment mark, thereby obtaining the overlay error between the current layer and the previous layer, for example, the component in the first direction x. And more specifically, for example, a hollow feature with a strip cross-section such as a plurality of through holes designed to be rectangular or circular. And more specifically, for example, a solid feature with a strip cross-section such as a columnar or truncated pyramid structure formed in the first layer 1, or a columnar structure or truncated pyramid structure protruding from the surface of other material layers below the first layer 1.
[0087] As an example, Figure 6 As shown, firstly, measuring points are set on the SEM image at four edges of the first entity sub-image that extend substantially along the second direction and are opposite to each other in the first direction. Figure 5 The coordinate values of the measurement points on the four edges measured in the first direction are, for example, a, b, c, and d; then, based on the measurement points on the four edges extracted above, the coordinate values of the center positions of the two first entity sub-images in the x direction are calculated, e, f, where e = (a + b) / 2; f = (c + d) / 2; finally, the coordinate values of the center lines of the two first entity sub-images along the second direction y in the first direction x are averaged, i.e., g = (e + f) / 2, and g is used as the coordinate value of the first reference point O1 in the first direction x. In addition, a graphic fitting is performed on the SEM image for the second hollow sub-image formed corresponding to the second hollow feature to obtain the coordinate values of the geometric center points of the two second hollow sub-images in the first direction x (illustrated as h, i), and then the coordinate values h, i of the geometric center points of the two second hollow sub-images in the first direction x are averaged to obtain j = (h + i) / 2, and j is used as the coordinate value of the second reference point O2 in the first direction x. Therefore, the deviation between the first pattern and the second pattern in the first direction is gj, and the first constant is subtracted to serve as the deviation between the first layer and the second layer in the first direction x.
[0088] In a further extended embodiment, for example as shown in FIG. 1( c ), it is assumed that the upper pattern formed on the second layer 2 of the wafer, i.e., the current layer, includes a plurality of through holes arranged in an array, and the two pairs of hollow features include: a first pair of through holes arranged along one of the row direction and the column direction of the array among the plurality of through holes and a second pair of through holes arranged along the other of the row direction and the column direction of the array, and the two opposite sides of the strip cross-section of the pair of solid features extending along one of the row direction and the column direction are at least partially exposed from the corresponding first pair of through holes or the second pair of through holes, and the lower pattern formed on the first layer 1 of the wafer, i.e., the front layer, includes a pair of solid features having a strip cross-section and being observable through the corresponding pair of hollow features. Then the two solid features respectively serve as the two first solid features 101 of the first pattern 10, and the two hollow features respectively serve as the two second hollow features 202 of the second pattern 20; and the two orthogonal directions can respectively serve as the aforementioned first direction x and second direction y. In this way, based on the first definition of the deviation in at least one direction in the overlay error as mentioned above, partial graphic features of the existing patterns on the previous layer and the current layer can be used as overlay alignment marks without having to additionally form dedicated overlay alignment marks, thereby obtaining the overlay error between the current layer and the previous layer, for example, the component in the first direction x, in relatively simplified steps.
[0089] In an alternative or additional embodiment, for example, under the same assumptions, by rotating the overlay alignment mark by 90 degrees, or additionally setting another overlay alignment mark having the same pattern as the current overlay alignment mark but with an orthogonal orientation (for example, by setting the other overlay alignment mark to have the same pattern as the current overlay alignment mark, but rotating the pattern by 90 degrees, thereby specifically setting the first pattern 10 and the second pattern 20 to be arranged in the first direction x and the second direction y respectively, which is exactly opposite to the aforementioned embodiment (for example, the actual y direction serves as the first direction and the x direction serves as the second direction)), it is also convenient to facilitate the first definition of the deviation in at least one direction in the overlay error as described above, so that partial graphic features of the existing patterns on the previous layer and the current layer can be used as overlay alignment marks without having to additionally form dedicated overlay alignment marks, thereby obtaining the overlay error between the current layer and the previous layer, for example, the component in the second direction y, in relatively simplified steps, and the details are not repeated here.
[0090] Furthermore, in order to obtain the coordinate value of the first reference point in the first direction, another configuration is proposed in an alternative embodiment of the present disclosure.
[0091] Assuming that there are two superimposed layers such as a reference layer and an offset layer, and two strip patterns extending parallel to each other are provided in the offset layer, then when the two strip patterns are symmetrical (for example, mirror symmetrical) relative to a point O in the reference layer, a Cartesian coordinate system is established with point O as the origin of the coordinate system and the extension direction of the two strip patterns as the y direction. In the x direction of the Cartesian coordinate system, the initial coordinate value of the center line of the left strip pattern extending along the y direction of the Cartesian coordinate system is -d, and the coordinate value of the center line of the right strip pattern extending along the y direction of the Cartesian coordinate system is +d accordingly. The distance between the center line of each of the two patterns extending along the y direction and the origin O (i.e., X1, X2 in the figure) is d. Subsequently, the offset layer is shifted relative to the reference layer, and the component of the shift in the x-direction is Δd as shown in the figure. Then, in the x-direction, the coordinate value of the center line of the left-side strip pattern extending along the y-direction becomes -d+Δd, and the coordinate value of the center line of the right-side strip pattern extending along the y-direction becomes d+Δd accordingly; thus, the distance X1 between the center line of the left-side strip pattern extending along the y-direction and the origin O becomes [0-(-d+Δd)], and the distance X2 between the center line of the right-side strip pattern extending along the y-direction and the origin O becomes [(d+Δd)-0]. The absolute value of the difference between the two distances is equal to 2Δd, that is, |X1-X2|=2Δd. Then, for two strip patterns symmetrically located on the offset layer and extending in one direction (y direction, or x direction orthogonal to the y direction) with respect to the origin O on the reference layer, the absolute value of the difference in spacing between the center lines of each of the two strip patterns along the direction and the origin O can be considered to be equal to twice the displacement of the offset layer relative to the reference layer in another direction orthogonal to the direction (x direction, or y direction orthogonal to the x direction). Based on this principle, when the symmetry center of the first pattern 10 of the first layer 1, i.e., the first reference point O1, and the symmetry center of the second pattern 20 of the second layer 2, i.e., the second reference point O2, coincide with each other or even have a slight pre-shift (for example, the difference between the coordinate values of the two in the first direction and / or the second direction is a constant), a second definition of the overlay error between the first layer 1 and the second layer 2 of the wafer to be inspected can be established.
[0092] FIG7(a) schematically shows how the coordinate value of the first reference point of the first pattern in the first direction is obtained based on the second definition according to some other embodiments of the present disclosure. Thus, based on the above-mentioned arrangement of the overlay alignment mark, especially the first pattern 10 and the second pattern 20 thereof, when the overlay alignment mark is formed in two layers (the current layer and the front layer) of the wafer, and the difference between the coordinate values of the centers of the parts of the overlay alignment mark in the two layers (for example, the first reference point O1 and the second reference point O2) along the first direction x is a first constant (the first constant is usually, for example, zero), that is, the first reference point O1 and the second reference point O2 are slightly offset from each other in advance (for example, the difference between the coordinate values of the two in the first direction is a constant), then the overlay error between the two layers has, for example, the second definition. Specifically, the definition of the deviation along the first direction x in the overlay error between the first layer 1 and the second layer 2 is, for example, as shown in Figure 7(a), and at least includes: the deviation between the first pattern 10 and the second pattern 20 along the first direction x minus the first constant, and the deviation between the first pattern 10 and the second pattern 20 along the first direction x is defined as 1 / 2 of the difference between the distances between the center lines of each of the two first physical features 101 parallel to the second direction y and the second reference point O2 (i.e., |X1-X2| / 2 shown in the figure).
[0093] FIG7(b) schematically shows a more specific way of obtaining the coordinate value of the first reference point in the first direction as shown in FIG7(a). Based on the above basic embodiment of the overlay alignment mark and the second definition of the deviation between the two layers along the first direction x, in some embodiments, for example, as shown in FIG7(b), the two first physical features 101 are designed to be centrally symmetrical and mirror-symmetrical about the first reference point O1, the two second physical features 102 are designed to be centrally symmetrical and mirror-symmetrical about the first reference point O1, and the first reference point O1 and the second reference point O2 are slightly offset from each other in advance (for example, the difference between the coordinate values of the two in the first direction and / or the second direction is a constant; further, the two constants in the first direction and the second direction are zero when the two constants are both zero). For example, when the coordinate value of the first reference point O1 in the first direction x and the coordinate value of the second reference point O2 in the first direction x are designed to differ from each other by a first constant (the two are equal when the first constant is zero), the center line extending along the second direction y is obtained by performing edge extraction on each first physical feature 101.
[0094] In a specific embodiment, for example, as shown in Figure 7(b), the distance between the center line of each first entity feature 101 parallel to the second direction y and the second reference point O2 is defined as: the absolute value of the difference between the coordinate value of the center line of each first entity feature 101 parallel to the second direction y in the first direction x and the coordinate value of the second reference point O2 in the first direction x.
[0095] In a more specific embodiment, for example, as shown in FIG7( b ), the coordinate value of the center line of each first entity feature 101 parallel to the second direction y in the first direction x is defined as: the average value of the coordinate values of the two opposite sides extending along the second direction y of each first entity feature 101 in the first direction x, that is, e'=(a'+b') / 2 and f'=(c'+d') / 2. In a specific implementation, this is achieved, for example, by performing edge extraction along the second direction y on the corresponding first entity sub-image obtained by imaging each first entity feature 101 in a single SEM image to obtain the center line of each first entity sub-image along the second direction y.
[0096] In this way, by using the single SEM image collected for the superimposed first layer 1 and the second layer 2 as above, for example, for each of the two second hollowed-out sub-images formed by the two second hollowed-out features 202 symmetrically with respect to the symmetry center O2, a graphic fitting is performed to obtain the coordinate value of the second reference point (i.e., the symmetry center O2 of the two second hollowed-out features 202) in the first direction x, and based on the first definition or the second definition of the deviation along at least one direction in the overlay error as described above, by extracting the edges of each of the two solid sub-images formed by the two first solid features 101 symmetrically with respect to the symmetry center O1 and obtaining the median, the first reference point (i.e., the symmetry center of the two first solid features 101) is obtained. The coordinate value of the symmetry center O1) in the first direction x is obtained by calculating the coordinate value of the symmetry center O1 of the two first solid features 101 in the first direction x and the coordinate value of the symmetry center O2 of the two second hollow features 202 in the first direction x (the coordinate value of the symmetry center O1 of the two first solid features 101 in the first direction x and the coordinate value of the symmetry center O2 of the two second hollow features 202 in the first direction x should originally differ by a first constant in the design, and the first constant is, for example, zero), and then the first constant is subtracted, so as to obtain the overlay error between the current layer and the previous layer, for example, the component in the first direction x in a relatively simplified step.
[0097] Furthermore, in an alternative embodiment of the present disclosure, for example, in a similar setting as the above-mentioned edge extraction for each first solid feature 101 to obtain the coordinate value of the center line extending along the second direction y in the first direction x, edge extraction can also be performed on each second hollow feature 202 to obtain the coordinate value of the center line extending along the second direction y in the first direction x, thereby further calculating the coordinate value of the second reference point in the first direction x by averaging, which will not be repeated here.
[0098] In an alternative or additional embodiment, for example, under the same assumptions, by rotating the overlay alignment mark by 90 degrees, or additionally setting another overlay alignment mark having the same pattern as the current overlay alignment mark but with an orthogonal orientation (for example, by setting the other overlay alignment mark to have the same pattern as the current overlay alignment mark, but rotating the pattern by 90 degrees, thereby specifically setting the first pattern 10 and the second pattern 20 to be arranged in the first direction x and the second direction y respectively, which is exactly opposite to the aforementioned embodiment (for example, the actual y direction serves as the first direction and the x direction serves as the second direction)), it is also convenient to facilitate the first definition of the deviation in at least one direction in the overlay error as described above, so that partial graphic features of the existing patterns on the previous layer and the current layer can be used as overlay alignment marks without having to additionally form dedicated overlay alignment marks, thereby obtaining the overlay error between the current layer and the previous layer, for example, the component in the second direction y, in relatively simplified steps, and the details are not repeated here.
[0099] According to the overall technical concept of the embodiments of the present disclosure, on the other hand, a method for measuring an overlay error is provided, comprising: providing an overlay alignment mark according to the aforementioned method; and measuring the overlay error between different layers of the chip by measuring the deviation between parts of the overlay alignment mark located in different layers of the chip.
[0100] Figure 8 A method for measuring overlay error according to an embodiment of the present disclosure is shown.
[0101] As an example, a basic embodiment of an overlay error measurement method is provided, such as Figure 8 As shown and combined with the previous Figure 1(a) to Figure 2(b) ,include:
[0102] S101: setting an overlay alignment mark in a patterned wafer, the wafer having a lower pattern in a first layer of the wafer and an upper pattern in a second layer above the first layer of the wafer; and
[0103] S102: measuring the overlay error between different layers of the wafer by measuring the deviation between the parts of the overlay alignment mark located in different layers of the wafer.
[0104] Fig. 9 Schematically showing the case where the overlay alignment mark is formed on two layers, as shown in FIG. Figure 8 FIG. 1 is a schematic block diagram of step S101 of the overlay error measurement method.
[0105] Specifically, Fig. 9 As shown, step S101, namely "setting an overlay alignment mark in the patterned wafer", for example includes:
[0106] S1011: selecting a portion of the lower layer pattern as a first pattern 10, wherein the first pattern includes a pair of entity features 101 formed on the first layer 1; and
[0107] S1012: Select a portion of the upper layer pattern as the second pattern 20, the second pattern including two pairs of hollow features 201, 202 formed on the second layer 2, the geometric center line of one pair of hollow features 201 and the geometric center line of the other pair of hollow features 202 extend in two orthogonal directions respectively, and the orthographic projection of the pair of solid features 101 on the chip at least partially overlaps with the orthographic projection of a corresponding pair of hollow features 201 among the two pairs of hollow features 201, 202 on the chip.
[0108] In a further embodiment of the present disclosure, for example, as shown in the figure, step S1011, i.e., "selecting a part of the lower layer pattern as the first pattern 10", includes: selecting two solid patterns 101 in the first layer 1 as the pair of solid features, the selected two solid patterns are centrally symmetrical and mirror-symmetrical about the first reference point O1 and have a strip-shaped cross-section; step S1012, i.e., "selecting a part of the upper layer pattern as the second pattern 20", includes: selecting two pairs of through holes 201 and 202 in the second layer 2 as the two pairs of hollow features, the selected two pairs of through holes 201 and 202 have a rectangular cross-section and the geometric center lines of each pair of through holes extend along the two orthogonal directions (more specifically, the geometric center lines of the first pair of through holes 201 and 202 extend along the two orthogonal directions, respectively). The center line and the geometric center line of the second pair of through holes 202 extend along the two orthogonal directions respectively), wherein a pair of through holes 201 serves as the corresponding pair of hollow features through which the pair of solid features 101 can be at least partially observed, and the other pair of through holes 202 are centrally symmetric and mirror-symmetric about the second reference point O2, and the extension direction of the geometric center line of the corresponding pair of hollow features is set to a first direction (for example, the horizontal direction x of the reference rectangular coordinate system shown in the lower left corner of Figure 2(a)), and the two opposite side edges of the strip cross-section extending along a second direction orthogonal to the first direction (for example, the vertical direction y of the reference rectangular coordinate system shown in the lower left corner of Figure 2(a)) are at least partially exposed from the corresponding pair of hollow features.
[0109] More specifically, for example, in combination with the schematic layout of the overlay alignment marks shown in FIG. 2( a) and the specific layered arrangement of the overlay alignment marks shown in FIG. 3( a) and FIG. 3( b), while performing a single SEM imaging of the second pattern of the second layer 2, the first pattern 10 (specifically, the two first solid features 101) in the first layer 1 that is at least partially exposed via the two first hollow features 201 of the second pattern can also be imaged simultaneously, and in the resulting single SEM image, the two first hollow features 201, the two second hollow features 202, and the two first solid features 101 are respectively imaged as corresponding parts, for example, referred to as a first hollow sub-image, a second hollow sub-image, and a first solid sub-image. Then, each side edge of each first solid feature 101 is imaged as a side edge of a corresponding first solid sub-image in the single SEM image (for example, the outer side edge l1 and the inner side edge l2 extending along the second direction y as shown in FIG. 2( a )) and is also at least partially exposed from the first hollow sub-image corresponding to the corresponding first hollow feature 201 superimposed on the first solid feature 101, and is thus observable.
[0110] In this way, interference with the measurement of overlay error caused by multiple movements of the SEM device during the process of acquiring SEM images layer by layer and the resulting displacement of the SEM device relative to the position where the electron beam scanning of the wafer to be tested is expected is avoided, and there is no need to adjust the electron beam energy of the SEM device multiple times; and the overlay error between the current layer and the previous layer (more specifically, the component of the overlay error in the first direction x) can be calculated based on the single SEM image only by acquiring the SEM image once, thereby simplifying the steps of measuring the overlay error.
[0111] In a further extended embodiment, for example, in combination with FIG1(c), assuming that on the second layer of the chip, i.e., the current layer, the upper layer pattern of the chip includes a plurality of through holes arranged in an array, then "selecting two pairs of through holes 201, 202 in the second layer 2 as the two pairs of hollow features" includes: selecting a first pair of through holes 201 arranged along one of the row direction and the column direction of the array and a second pair of through holes 202 arranged along the other of the row direction and the column direction of the array from the plurality of through holes, and two opposite side edges (l1, l2) of the strip cross-section of the pair of solid features 101 extending along one of the row direction and the column direction are at least partially exposed from the corresponding first pair of through holes 201 or the second pair of through holes 202 (for example, the first pair of through holes 201).
[0112] Therefore, for a patterned wafer with specific patterns on each layer, partial pattern features of the existing patterns on the previous layer and the current layer can be used as overlay alignment marks, without the need to form additional dedicated overlay alignment marks. Thus, the problem of failure of overlay error measurement in the related art due to the lack of additional dedicated overlay alignment marks during device preparation and application is avoided.
[0113] Moreover, in combination with FIG. 2( a ), for example, as described above, the first reference point O1 serves as the symmetry center of the two first solid features 101, and the second reference point O2 also serves as the mirror symmetry center of the two second hollow features 202. Further, the coordinate value of the first reference point O1 in the first direction x and the coordinate value of the second reference point O2 in the first direction x are designed to be expected to have a difference of a first constant. Moreover, in an ideal case, the first constant is set to zero, for example, that is, the difference between the coordinate value of the first reference point O1 in the first direction x and the coordinate value of the second reference point O2 in the first direction x is a first constant whose value is preset to zero (that is, the coordinate value of the first reference point O1 in the first direction x and the coordinate value of the second reference point O2 in the first direction x should be equal at this time).
[0114] Through such a specific setting, the deviation between the coordinate values of the symmetry centers O1 of the two first solid features 101 in the first direction x and the coordinate values of the symmetry centers O2 of the two second hollow features 202 in the first direction x can be simply calculated based on the single SEM image collected for the superimposed first layer 1 and the second layer 2 as above (the coordinate values of the symmetry centers O1 of the two first solid features 101 in the first direction x and the coordinate values of the symmetry centers O2 of the two second hollow features 202 in the first direction x should originally differ by a first constant in the design, and the first constant is, for example, zero), thereby obtaining the overlay error between the current layer and the previous layer, for example, the component in the first direction x.
[0115] Fig.10 In some embodiments of the present disclosure, Figure 8 FIG. 1 is a schematic block diagram of step S102 of the overlay error measurement method.
[0116] Specifically, as an example, in conjunction with FIG. 2( a ), the coordinate value of the first reference point O1 in the first direction x and the coordinate value of the second reference point O2 in the first direction x are designed to have a difference of a first constant, and when the first constant is zero as shown in the figure, the two are equal. In this case, specifically, for example, Fig.10As shown, step S102, i.e., "measuring the overlay error between different layers of the wafer by measuring the deviation between the parts of the overlay alignment mark located in different layers of the wafer", for example, at least includes: S1021: obtaining the deviation between the first layer 1 and the second layer 2 along the first direction x by measuring the deviation between the first pattern 10 and the second pattern 20 along the first direction x minus the first constant. Specifically, for example, by measuring the difference between the coordinate value of the first reference point O1 in the first direction x and the coordinate value of the second reference point O2 in the first direction x, the deviation between the first pattern 10 and the second pattern 20 along the first direction x is measured.
[0117] In other words, as an example, measuring the deviation between the first pattern 10 and the second pattern 20 along the first direction x includes: measuring the difference between the coordinate value of the first reference point O1 in the first direction x and the coordinate value of the second reference point O2 in the first direction x (the coordinate value of the first reference point O1 in the first direction x and the coordinate value of the second reference point O2 in the first direction x should originally differ by a first constant in the design, and the first constant is typically preset to zero, for example).
[0118] 3(a) and 3(b), the first reference point O1 and the second reference point O2 are substantially presented as the first axis and the second axis along the normal of the wafer in the cross-sectional view, and thus appear as points in the top view as shown in FIG. 2(a) and FIG. 2(b).
[0119] Combination Figure 5 As shown, more specifically, for example, based on the above-mentioned basic embodiment of the overlay alignment mark and the first definition of the deviation between the two layers along the first direction x, measuring the difference between the coordinate value of the first reference point O1 in the first direction x and the coordinate value of the second reference point O2 in the first direction x includes: obtaining the coordinate value of the first reference point in the first direction by measuring half of the sum of the mean values of the coordinate values of the two opposite sides of each of the pair of physical features 101 in the first direction.
[0120] The coordinate value of the first reference point O1 in the first direction x is obtained by measuring half of the average sum of the coordinate values of the two opposite sides extending along the second direction y of each of the two first entity features 101. In a specific implementation, the edge extraction and coordinate calculation of each first entity feature 101 are achieved in the following manner, namely: in the single SEM image, the center line of each first entity sub-image along the second direction y is obtained based on the edge extraction of the corresponding first entity sub-image obtained by imaging each first entity feature 101 through the corresponding first hollow feature 201 superimposed thereon, and the coordinate values of the center lines of the two first entity sub-images along the second direction y in the first direction x are averaged. The specific measurement and calculation are as described above in reference Figure 5 The above is discussed in the embodiments of the present invention and will not be described in detail here.
[0121] For example, in some embodiments, when the two second hollow features 202 (i.e., another pair of hollow features 202 in the two pairs of hollow features 201, 202 that are completely non-overlapping with the two first solid features 101) are designed to have an average value of coordinate values of their respective geometric center points in the first direction that is the same as the coordinate value of the second reference point in the first direction, and thus the second reference point O2 serves as the symmetry center of the two second hollow features 202, the geometric center point O of each second hollow feature 202 is obtained by performing graphic fitting on each second hollow feature 202. 202 , O 202’ And find and the geometric center point O of the two second hollow features 202 202 , O 202’ The coordinate values in the first direction x are averaged (for example, by fitting the corresponding second hollowed-out sub-images obtained by imaging each second hollowed-out feature 202 in the single SEM image into a circle or an ellipse, and extracting the coordinate values of the geometric centers of the figures obtained by fitting the two second hollowed-out sub-images in the first direction x and averaging them), to obtain the coordinate value of the second reference point O2 in the first direction x. In a more typical embodiment, for example, another pair of hollowed-out features 202 of the two pairs of hollowed-out features 201, 202 that is different from the corresponding pair of hollowed-out features 201 is further designed so that the coordinate values of their respective geometric center points in the first direction are the same.
[0122] In a specific implementation, the graphic fitting and geometric center point coordinates of each second hollow feature 202 are obtained by performing graphic fitting and extracting the geometric center point in the single SEM image based on the corresponding second hollow sub-image obtained by imaging each second hollow feature 202. The specific measurement and calculation are as described above in reference Figure 5 and Figure 6 The above is discussed in the embodiments of the present invention and will not be described in detail here.
[0123] In an alternative or additional embodiment, by rotating the overlay alignment mark by 90 degrees, or additionally setting another overlay alignment mark having the same pattern as the current overlay alignment mark but with an orthogonal orientation (for example, by setting the other overlay alignment mark to have the same pattern as the current overlay alignment mark but rotating the pattern by 90 degrees, thereby specifically setting the first pattern 10 and the second pattern 20 to be respectively arranged in the first direction x and the second direction y in the opposite manner to the aforementioned embodiment), it is also convenient to obtain the overlay error between the current layer and the previous layer, for example, the component in the second direction y, in a relatively simplified step based on the above-mentioned first definition, which will not be repeated here.
[0124] Furthermore, in order to obtain the coordinate value of the first reference point in the first direction, another configuration is proposed in an alternative embodiment of the present disclosure.
[0125] Based on the above basic embodiment of the overlay alignment mark and the second definition of the deviation between the two layers along the first direction x, combined with Figure 7(a) and 7(b) As shown, specifically, the definition of the deviation along the first direction x in the overlay error between the first layer 1 and the second layer 2 is, for example, as shown in Figure 7(a), and at least includes: the deviation between the first pattern 10 and the second pattern 20 along the first direction x minus the first constant; and measuring the deviation between the first pattern 10 and the second pattern 20 along the first direction x includes: measuring 1 / 2 of the difference between the distances between the center lines of each of the pair of physical features 101 parallel to the second direction y and the second reference point O2 (i.e., |X1-X2| / 2 shown in the figure).
[0126] Furthermore, based on the second definition of the deviation between the two layers along the first direction x and as shown in combination with FIG7 , in a specific embodiment, by measuring the absolute value of the difference between the average of the coordinate values of the two opposite sides extending along the second direction y of each physical feature 101 in the first direction x and the coordinate value of the second reference point O2 in the first direction x, the distance between the center line of each physical feature 101 parallel to the second direction y and the second reference point O2 is obtained. The specific measurement and calculation are as discussed in the above embodiments and will not be repeated here.
[0127] In an alternative or additional embodiment, for example, under the same assumptions, by rotating the overlay alignment mark by 90 degrees, or additionally setting another overlay alignment mark having the same pattern as the current overlay alignment mark but with an orthogonal orientation (for example, by setting the other overlay alignment mark to have the same pattern as the current overlay alignment mark, but rotating the pattern by 90 degrees, thereby specifically setting the first pattern 10 and the second pattern 20 to be arranged in the first direction x and the second direction y respectively, which is exactly opposite to the aforementioned embodiment (for example, the actual y direction serves as the first direction and the x direction serves as the second direction)), it is also convenient to facilitate the first definition of the deviation in at least one direction in the overlay error as described above, so that partial graphic features of the existing patterns on the previous layer and the current layer can be used as overlay alignment marks without having to additionally form dedicated overlay alignment marks, thereby obtaining the overlay error between the current layer and the previous layer, for example, the component in the second direction y, in relatively simplified steps, and the details are not repeated here.
[0128] The overlay measurement method correspondingly includes all the graphic features and corresponding advantages of the aforementioned overlay alignment mark, which will not be described in detail here.
[0129] Compared with the related art, the embodiments of the present disclosure have the following superior technical effects:
[0130] The disclosed embodiment proposes an overlay alignment mark and an overlay error measurement method. By setting the overlay alignment mark as described in the disclosed embodiment, for a patterned wafer with specific patterns on each layer, partial graphic features of the existing patterns on the previous layer and the current layer can be used as overlay alignment marks, and the operator can select measurement points and set calculation formulas by using the geometric shape of the wafer pattern itself and the tools provided by the software. The CD-SEM device samples and takes pictures according to the set configuration scheme (Recipe), calculates and reports the overlay error results. This achieves that it does not rely on specially set dedicated overlay alignment marks, but uses the chip's own geometry, uses the CD-SEM device to perform SEM imaging according to the set configuration scheme to measure and uses a preset calculation formula to calculate the overlay error without having to form additional dedicated overlay alignment marks. Thus, the problem of failure of overlay error measurement in related technologies due to the lack of additional dedicated overlay alignment marks in the preparation and application of devices is avoided.
[0131] Furthermore, by providing through holes in the current layer or even at least one previous layer, and providing physical features such as linear sub-patterns in the previous layer that at least partially overlap with the through holes, the physical features can be observed through the corresponding through holes that at least partially overlap with them, thereby avoiding interference with the measurement of overlay error caused by multiple movements of the SEM device during the process of acquiring SEM images layer by layer and the displacement of the SEM device relative to the position where the electron beam scanning of the wafer to be tested is expected, and there is no need to adjust the electron beam energy of the SEM device multiple times; and the overlay error between different layers of the wafer, such as the overlay error between the current layer and the previous layer (more specifically, the component of the overlay error in the first direction x) can be calculated based on the single SEM image by acquiring the SEM image only once, thereby simplifying the steps of measuring the overlay error.
[0132] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims
1. An overlay alignment mark located in a wafer having a pattern formed thereon, using part of the graphic features of the existing pattern as the overlay alignment mark, the wafer having a lower layer pattern located in a first layer of the wafer and an upper layer pattern located in a second layer above the first layer of the wafer, the overlay alignment mark comprising: A first pattern, being part of the underlying pattern and comprising: a pair of solid features formed in the first layer; The second pattern, as a part of the upper pattern, comprises: two pairs of hollow features formed on the second layer, wherein a line connecting the geometric centers of one pair of hollow features and a line connecting the geometric centers of the other pair of hollow features extend in two orthogonal directions respectively; The orthographic projections of the pair of solid features on the wafer at least partially overlap with the orthographic projections of a corresponding pair of hollow features in the two pairs of hollow features on the wafer.
2. The overlay alignment mark according to claim 1, wherein: The pair of solid features are designed as two solid patterns with strip-shaped cross-sections in the first layer that are centrally symmetric and mirror-symmetric about the first reference point. The two pairs of hollow features are designed as two pairs of through holes with rectangular cross-sections in the second layer, and the geometric center lines of each pair of through holes extend along the two orthogonal directions respectively, one pair of through holes serves as the corresponding pair of hollow features through which the pair of solid features can be at least partially observed, the other pair of through holes is centrally symmetric and mirror-symmetric about the second reference point, and the extension direction of the geometric center line of the corresponding pair of hollow features serves as the first direction; and Two opposite side edges of the strip-shaped cross-section extending along a second direction orthogonal to the first direction are at least partially exposed from the corresponding pair of hollow features.
3. The overlay alignment mark according to claim 2, wherein: The upper pattern of the chip includes a plurality of through holes arranged in an array, and the two pairs of hollow features include: a first pair of through holes among the plurality of through holes arranged along one of the row direction and the column direction of the array and a second pair of through holes arranged along the other of the row direction and the column direction of the array, and two opposite side edges of the strip-shaped cross-section of the pair of solid features extending along one of the row direction and the column direction are at least partially exposed from the corresponding first pair of through holes or the second pair of through holes.
4. The overlay alignment mark according to claim 2, wherein: The coordinate value of the first reference point in the first direction and the coordinate value of the second reference point in the first direction are designed so that the difference between them is a first constant.
5. The overlay alignment mark according to claim 4, wherein: The first constant is zero.
6. The overlay alignment mark according to claim 4, wherein: The overlay error between different layers of the wafer is the overlay error between the first layer and the second layer, and includes at least: The deviation between the first layer and the second layer along the first direction is defined as the deviation between the first pattern and the second pattern along the first direction minus the first constant.
7. The overlay alignment mark according to claim 6, wherein: The deviation between the first pattern and the second pattern along the first direction is defined as a difference between a coordinate value of the first reference point in the first direction and a coordinate value of the second reference point in the first direction.
8. The overlay alignment mark according to claim 7, wherein: The coordinate value of the first reference point in the first direction is defined as: half of the sum of the average values of the coordinate values of the two opposite sides of each of the pair of solid features in the first direction.
9. The overlay alignment mark according to claim 6, wherein: The deviation between the first pattern and the second pattern along the first direction is defined as 1 / 2 of the difference between the distances between the center lines of each of the pair of solid features parallel to the second direction and the second reference point.
10. The overlay alignment mark according to claim 9, wherein: The distance between the center line of each physical feature parallel to the second direction and the second reference point is defined as: the absolute value of the difference between the average of the coordinate values of the two opposite sides extending along the second direction of each physical feature in the first direction and the coordinate value of the second reference point in the first direction.
11. The overlay alignment mark according to any one of claims 7 to 10, wherein: Another pair of hollow features of the two pairs of hollow features that is different from the corresponding pair of hollow features is designed so that an average value of coordinate values of their respective geometric center points in the first direction is the same as the coordinate value of the second reference point in the first direction.
12. The overlay alignment mark according to claim 11, wherein: Another pair of hollow features of the two pairs of hollow features that is different from the corresponding pair of hollow features is designed so that the coordinate values of their respective geometric center points in the first direction are the same.
13. The overlay alignment mark according to claim 11 or 12, wherein: The coordinate value of the second reference point in the first direction is defined as: the average value of the coordinate values of the geometric center points of the circular pattern or the elliptical pattern into which the other pair of hollow features are each fitted in the first direction.
14. A method for measuring overlay error, comprising: An overlay alignment mark is set in a wafer with a pattern formed thereon, and a part of the graphic features of the existing pattern is used as the overlay alignment mark. The wafer has a lower layer pattern located in a first layer of the wafer and an upper layer pattern located in a second layer above the first layer of the wafer. Setting the overlay alignment mark includes: selecting a portion of the lower layer pattern as a first pattern, the first pattern comprising a pair of solid features formed on the first layer; A portion of the upper layer pattern is selected as a second pattern, the second pattern includes two pairs of hollow features formed on the second layer, a line connecting geometric centers of one pair of hollow features and a line connecting geometric centers of another pair of hollow features extend in two orthogonal directions respectively, and an orthographic projection of the pair of solid features on the wafer overlaps at least partially with an orthographic projection of a corresponding pair of hollow features in the two pairs of hollow features on the wafer; and By measuring the deviation between the portions of the overlay alignment mark located in different layers of the wafer, the overlay error between different layers of the wafer is measured.
15. The overlay error measurement method according to claim 14, wherein: Selecting a part of the lower layer pattern as the first pattern includes: selecting two solid patterns in the first layer as the pair of solid features, the selected two solid patterns are centrally symmetrical and mirror-symmetrical about the first reference point and have a strip-shaped cross section, Selecting a part of the upper layer pattern as the second pattern includes: selecting two pairs of through holes in the second layer as the two pairs of hollow features, the selected two pairs of through holes have rectangular cross-sections and the geometric center lines of each pair of through holes extend along the two orthogonal directions respectively, one pair of through holes serves as the corresponding pair of hollow features through which the pair of solid features can be at least partially observed, and the other pair of through holes is centrally symmetric and mirror-symmetric about a second reference point, The extension direction of the geometric center line of the corresponding pair of hollow features is set to a first direction, and two opposite side edges of the strip cross section extending along a second direction orthogonal to the first direction are at least partially exposed from the corresponding pair of hollow features.
16. The overlay error measurement method according to claim 15, wherein: The upper layer pattern of the chip includes a plurality of through holes arranged in an array, and selecting two pairs of through holes in the second layer as the two pairs of hollow features includes: selecting a first pair of through holes arranged along one of the row direction and the column direction of the array and a second pair of through holes arranged along the other of the row direction and the column direction of the array from the plurality of through holes, and two opposite side edges of the strip cross-section of the pair of solid features extending along one of the row direction and the column direction are at least partially exposed from the corresponding first pair of through holes or the second pair of through holes.
17. The overlay error measurement method according to claim 15, wherein: The coordinate value of the first reference point in the first direction and the coordinate value of the second reference point in the first direction are designed so that the difference between them is a first constant.
18. The overlay error measurement method according to claim 17, wherein: The first constant is preset to zero.
19. The overlay error measurement method according to claim 17, wherein: Measuring the overlay error between different layers of the wafer by measuring the deviation between the portions of the overlay alignment mark located in different layers of the wafer at least comprises: The deviation between the first layer and the second layer along the first direction is obtained by measuring the deviation between the first pattern and the second pattern along the first direction and subtracting the first constant.
20. The overlay error measurement method according to claim 19, wherein: Measuring the deviation between the first pattern and the second pattern along the first direction includes: measuring the difference between the coordinate value of the first reference point in the first direction and the coordinate value of the second reference point in the first direction.
21. The overlay error measurement method according to claim 20, wherein: The coordinate value of the first reference point in the first direction is obtained by measuring half of the sum of the average values of the coordinate values of the two opposite sides of each of the pair of physical features in the first direction.
22. The overlay error measurement method according to claim 19, wherein: Measuring the deviation between the first pattern and the second pattern along the first direction includes: measuring 1 / 2 of the difference between the distance between the center line of each of the pair of physical features parallel to the second direction and the second reference point.
23. The overlay error measurement method according to claim 22, wherein: By measuring the absolute value of the difference between the average of the coordinate values of the two opposite sides of each physical feature extending along the second direction in the first direction and the coordinate value of the second reference point in the first direction, the distance between the center line of each physical feature parallel to the second direction and the second reference point is obtained.
24. The overlay error measurement method according to any one of claims 20 to 23, wherein: Another pair of hollow features of the two pairs of hollow features that is different from the corresponding pair of hollow features is designed so that an average value of coordinate values of their respective geometric center points in the first direction is the same as the coordinate value of the second reference point in the first direction.
25. The overlay error measurement method according to claim 24, wherein: Another pair of hollow features of the two pairs of hollow features that is different from the corresponding pair of hollow features is designed so that the coordinate values of their respective geometric center points in the first direction are the same.
26. The overlay error measurement method according to claim 24 or 25, wherein: The coordinate value of the second reference point in the first direction is obtained by fitting the other pair of hollow features into circular patterns or elliptical patterns respectively and calculating the average of the coordinate values of the geometric center points of the circular patterns or elliptical patterns in the first direction.
Citation Information
Patent Citations
Overlay alignment mark
CN212515348U