Drive circuit

Abstract

The driving circuit of the present invention can make the control circuit driving the power device operate normally even after a negative voltage is generated on a node connected to the power device. The driving circuit includes: a setting side level shift circuit that generates a level shift completion setting signal by level shifting a setting signal; a reset side level shift circuit that generates a level shift completion reset signal by level shifting a reset signal; a control circuit that outputs a driving signal that changes between a first logic level that turns off the power device based on the level shift completion reset signal and a second logic level that turns on the power device based on the level shift completion setting signal; and a guarantee circuit that guarantees, based on the driving signal, a state in which the control circuit turns on the power device based on the level shift completion setting signal and turns off the power device based on the level shift completion reset signal.

Description

Technical Field

[0001] The invention relates to a driving circuit for driving a power device. Background Art

[0002] As disclosed in Patent Documents 1 and 2, a half-bridge circuit has a first and a second power switch element connected in series between a high potential terminal and a low potential terminal of a power supply, and a node between the first power switch element and the second power switch element is connected to a load such as a motor. The first power switch element is turned on and off, and the second power switch element is turned on and off complementarily to the first power switch element, thereby driving the load. The second power switch element is driven by a low-side control circuit that operates with the potential of the low potential terminal of the power supply as a reference potential, thereby turning on and off. The first power switch element is driven by a high-side control circuit that operates with the potential of the node between the first power switch element and the second power switch element as a reference potential, thereby turning on and off.

[0003] The front stage of the high-side control circuit is connected to the level shift circuit, and the front stage of the level shift circuit is connected to the front stage circuit. The high-side control circuit and the level shift circuit operate at a high voltage, and the front stage circuit operates at a low voltage. The front stage circuit generates a pulse-type set signal and a reset signal based on a logic input signal from the outside, and the level shift circuit performs level shifting on the set signal and the reset signal. The high-side control circuit generates a drive signal based on the set signal and the reset signal that have completed the level shift, and turns the first power switch element on, off, and on according to the drive signal.

[0004] Prior art literature

[0005] Patent Literature

[0006] Patent Document 1: International Publication No. 2016 / 163142

[0007] Patent Document 2: International Publication No. 2016 / 009719 Summary of the invention

[0008] Technical problem to be solved by the invention

[0009] However, if the first and second power switch elements are switched on and off, the potential of the node between the first power switch element and the second power switch element may sometimes be lower than the potential of the low potential terminal of the power supply due to the influence of the mutual inductance of the load, and the voltage of the node becomes a negative voltage. If a negative voltage such as the above is generated, the voltage of the set output terminal and the reset output terminal of the level shift circuit rises. Then, if the negative voltage such as the above is eliminated, the voltage of the set output terminal and the reset output terminal of the level shift circuit will drop due to ringing. When the high-side control circuit is set, if the voltage of the reset output terminal exceeds the threshold voltage due to ringing, the high-side control circuit will be reset by mistake and malfunction. On the other hand, when the high-side control circuit is reset, if the voltage of the set output terminal exceeds the threshold voltage due to ringing, the high-side control circuit will be set by mistake and malfunction.

[0010] The present invention has been made in view of the above-mentioned conventional problems, and an object of the present invention is to enable a control circuit for driving a power device to operate normally even when a negative voltage is generated at a node connected to the power device.

[0011] Technical solutions adopted to solve technical problems

[0012] The main invention for achieving the above-mentioned purpose is a driving circuit, which includes: a setting side level shift circuit, which generates a level shift completion setting signal by level shifting the setting signal; a reset side level shift circuit, which generates a level shift completion reset signal by level shifting the reset signal; a control circuit, which outputs a driving signal that changes between a first logic level for turning off a power device based on the level shift completion reset signal and a second logic level for turning on the power device based on the level shift completion setting signal; and a guarantee circuit, which, based on the driving signal, guarantees that the control circuit turns on the power device based on the level shift completion setting signal and turns off the power device based on the level shift completion reset signal.

[0013] Effects of the Invention

[0014] According to the embodiment of the present invention, the control circuit for driving the power switching element can be operated normally. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 This is a diagram showing the configuration of a drive circuit together with an output circuit, a load, and a power supply.

[0016] Figure 2It is a timing diagram showing the relationship between the high-side input signal, the low-side input signal, the set signal, the level shift completion set signal, the reset signal, the level shift completion reset signal, the output of the latch circuit, the output signal, and the state of each switching element.

[0017] Figure 3 It is a timing chart showing the waveforms of the voltage of the node after the high-side power switch element is switched from on to off, the input signal, the output signal, the level shift completion set signal, and the level shift completion reset signal.

[0018] Figure 4 Yes Figure 3 The figure shown is obtained by overlapping the waveforms of the level shift completion set signal and the level shift completion reset signal.

[0019] Figure 5 It is a timing chart showing the waveforms of the voltage of the node after the high-side power switch element is switched from off to on, the input signal, the output signal, the level shift completion set signal, and the level shift completion reset signal.

[0020] Figure 6 Yes Figure 5 The figure shown is obtained by overlapping the waveforms of the level shift completion set signal and the level shift completion reset signal.

[0021] Figure 7 This is a diagram showing the configuration of a drive circuit according to another embodiment together with an output circuit, a load, and a power supply. DETAILED DESCRIPTION

[0022] At least the following matters are clear from the description of this specification and the drawings.

[0023] ======Present Implementation Method======

[0024] Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. In the embodiments described below, various preferred technical limitations are added to implement the present invention, so the scope of the present invention is not limited to the following embodiments and accompanying drawings.

[0025] <<<1. Overview of drive circuit and output circuit>>>

[0026] Figure 1 1 is a diagram showing a drive circuit 1 , an output circuit 5 , a load 9 , and the like. Figure 2It is a timing diagram showing the relationship between the input signal HIN, the input signal LIN, the set signal set, the level shift completion set signal setdrn, the reset signal res, the level shift completion reset signal resdrn, the output of the latch circuit 222, the drive signal HO, and the states of the switching elements 232a, 232b, 241a, and 241b.

[0027] The high-side input signal HIN and the low-side input signal LIN are input from the microcomputer to the drive circuit 1, whereby the drive circuit 1 operates. The details will be described later. The input signal HIN is input to the input circuit 11, and the input signal LIN is input to the low-side control circuit 40. The input signal HIN and the input signal LIN are logic input signals that repeatedly switch between the first logic level and the second logic level. Here, the first logic level is called a low level, and the second logic level is called a high level.

[0028] The input signal HIN and the input signal LIN have a complementary relationship, that is, when the input signal HIN is at a high level, the input signal LIN is at a low level, and when the input signal HIN is at a low level, the input signal LIN is at a high level.

[0029] The drive circuit 1 controls the output circuit 5 based on the high-side input signal HIN and the low-side input signal LIN, and the output circuit 5 alternately switches the state of the load 9 to a voltage application state in which the voltage of the high-voltage DC power supply 8 is applied, and a ground voltage application state in which the ground voltage is applied. The drive signal HO is a logic signal that repeatedly switches between a low level (a first logic level) and a high level (a second logic level). In addition, if the signal delay in the drive circuit 1 is not considered, the drive signal HO that drives the power device on the high side changes synchronously with the input signal HIN.

[0030] The output circuit 5 is configured to include power switching elements 51 and 52 constituting a half bridge. The power switching elements 51 and 52 are N-channel power MOSFETs, but may also be power devices such as IGBTs or bipolar transistors. The power switching elements 51 and 52 are connected in series between the high potential output terminal and the low potential output terminal of the high voltage DC power supply 8. The node N1 between the power switching element 52 and the low potential output terminal of the high voltage DC power supply 8 is connected to the reference potential wiring L1, and the reference potential wiring L1 is grounded. Therefore, the reference potential wiring L1 and the node N1 become the reference potential (ground potential) of the drive circuit 1. The node N2 between the power switching element 51 and the power switching element 52 is connected to one end of the load 9. The other end of the load 9 is grounded through the reference potential wiring L1 and becomes the reference potential. The node N2 is connected to the low potential output terminal of the high side DC power supply 6. The high potential output terminal of the high side DC power supply 6 is connected to the high potential wiring L7, and the output voltage of the high side DC power supply 6 based on the potential of the node N2 is applied to the high potential wiring L7.

[0031] The drive circuit 1 turns on and off the power switch element 51 on the high side based on the input signal HIN on the high side. In addition, the drive circuit 1 turns on and off the power switch element 52 on the low side in a complementary manner to the power switch element 51 based on the input signal LIN on the low side. If the power switch element 51 is turned on and the power switch element 52 is turned off, the potential of the node N2 becomes the output voltage of the high-voltage DC power supply 8, and the load 9 is in a voltage application state. If the power switch element 51 is turned off and the power switch element 52 is turned on, the potential of the node N2 becomes the reference potential, and the load 9 is in a ground voltage application state. Therefore, the potential of the node N2 can vary between the reference potential and the output voltage of the high-voltage DC power supply 8. Here, the load 9 switches from the voltage application state to the ground voltage application state through the dead time, but the power switch elements 51 and 52 are both turned off during the dead time, thereby preventing the short circuit and penetration current of the high-voltage DC power supply 8. Similarly, the load 9 switches from the ground voltage application state to the voltage application state through the dead time.

[0032] <<<2. Structure of drive circuit>>>

[0033] The driving circuit 1 includes a front-stage circuit 10 , a rear-stage circuit 20 , and a low-side control circuit 40 .

[0034] The driving circuit 1 is built into one chip. However, the front-stage circuit 10 and the rear-stage circuit 20 may be built into a common chip, and the low-side control circuit 40 may be built into other chips. Alternatively, the front-stage circuit 10 and the low-side control circuit 40 may be built into a common chip, and the rear-stage circuit 20 may be built into other chips. Alternatively, the rear-stage circuit 20 and the low-side control circuit 40 may be built into a common chip, and the front-stage circuit 10 may be built into other chips. Alternatively, the front-stage circuit 10, the rear-stage circuit 20 and the low-side control circuit 40 may be built into separate chips.

[0035] The front-stage circuit 10 operates at a low voltage, and the rear-stage circuit 20 operates at a high voltage.

[0036] The front-stage circuit 10 includes an input circuit 11 and a pulse generating circuit 12. The rear-stage circuit 20 includes a level shift circuit 21, a high-side control circuit 22, an adjustment circuit 23, a guarantee circuit 24, and diodes 28 and 29.

[0037] <<<2-1. Low-side control circuit>>>

[0038] The low-side control circuit 40 is supplied with power from the low-side DC power supply 7 and receives an input signal LIN from the microcomputer. The low-side control circuit 40 turns on and off the power switch element 52 in a complementary manner to the power switch element 51 based on the input signal LIN.

[0039] <<<2-2. Input circuit>>>

[0040] The input circuit 11 includes a comparator (not shown) that compares the input signal HIN with a reference voltage to determine whether the input signal HIN is at a high level or a low level, and a noise filter (not shown) that removes noise from the output signal of the comparator and outputs the signal. If the delay of the input circuit 11 is not considered, the output signal of the input circuit 11, that is, the output signal of the noise filter, is synchronized with the input signal HIN.

[0041] <<<2-3. Pulse generation circuit>>>

[0042] The pulse generating circuit 12 generates a pulse when the output signal of the input circuit 11 rises from a low level to a high level, and outputs a set signal set (see Figure 2 ). In addition, the pulse generating circuit 12 generates a pulse when the output signal of the input circuit 11 drops from a high level to a low level, and outputs a reset signal res which is a high level when the pulse is generated and a low level when the pulse disappears (refer to Figure 2The time when the set signal set is at a high level is shifted in time from the time when the reset signal res is at a high level. The set signal set and the reset signal res are input to the level shift circuit 21 of the subsequent circuit 20.

[0043] <<<2-4. Level shift circuit and clamping diode>>>

[0044] like Figure 1 As shown in FIG. 1 , the level shift circuit 21 includes a set-side level shift circuit 21a and a reset-side level shift circuit 21b. The set-side level shift circuit 21a inverts the set signal set outputted from the pulse generating circuit 12 and shifts the DC level, and outputs a level shift-completed set signal setdrn (see FIG. 1 ). Figure 2 ) is output to the high-side control circuit 22. The reset-side level shift circuit 21b inverts the reset signal res output by the pulse generating circuit 12, shifts the DC level, and outputs the reset signal resdrn as the level shift completion setting signal (refer to Figure 2 ) is output to the high-side control circuit 22.

[0045] The set-side level shift circuit 21a includes a set-side level shift switch element 211a and a set-side resistor 212a. The reset-side level shift circuit 21b includes a reset-side level shift switch element 211b and a reset-side resistor 212b.

[0046] The level shift switch elements 211 a and 211 b are high-voltage N-channel MOSFETs, but may be IGBTs, bipolar transistors, or the like.

[0047] The setting side resistor 212a and the setting side level shift switch element 211a are connected in series between the high potential wiring L7 and the reference potential wiring L1. That is, the drain of the setting side level shift switch element 211a is connected to the high potential wiring L7 via the setting side resistor 212a, and the source of the setting side level shift switch element 211a is connected to the reference potential wiring L1.

[0048] The reset side resistor 212b and the reset side level shift switch element 211b are connected in series between the high potential wiring L7 and the reference potential wiring L1. That is, the drain of the reset side level shift switch element 211b is connected to the high potential wiring L7 via the reset side resistor 212b, and the source of the reset side level shift switch element 211b is connected to the reference potential wiring L1.

[0049] The anode of the diode 28 is connected to the node N2, and the cathode of the diode 28 is connected to the node N5 between the setting side resistor 212a and the setting side level shift switch element 211a. The diode 28 clamps the potential of the node N5 to the potential of the node N2, so that the voltage of the node N5 is based on the potential of the node N2. Therefore, an overvoltage is not input to the high-side control circuit 22.

[0050] The anode of the diode 29 is connected to the node N2, and the cathode of the diode 29 is connected to the node N6 between the reset side resistor 212b and the reset side level shift switch element 211b. The diode 29 clamps the potential of the node N6 to the potential of the node N2, so that the voltage of the node N6 is based on the potential of the node N2. Therefore, the overvoltage is not input to the high-side control circuit 22.

[0051] The gate of the setting side level shift switch element 211a is connected to the setting side output terminal of the pulse generating circuit 12, and the setting signal set output by the pulse generating circuit 12 is input to the gate of the setting side level shift switch element 211a. The setting side level shift switch element 211a is turned on and off based on the setting signal set. If the setting side level shift switch element 211a is turned off, the drain voltage (the voltage of the node N5) is increased by the high side DC power supply 6 and becomes a high level. If the setting side level shift switch element 211a is turned on, the voltage of the node N5 is grounded and reduced to a low level. The voltage of the node N5 is input to the high side control circuit 22 as the level shift completion setting signal setdrn. Therefore, the node N5 is the output node of the setting side level shift circuit 21a, and is the setting side input node of the high side control circuit 22.

[0052] The gate of the reset side level shift switch element 211b is connected to the reset side output terminal of the pulse generating circuit 12, and the reset signal res output by the pulse generating circuit 12 is input to the gate of the reset side level shift switch element 211b. The reset side level shift switch element 211b is turned on and off based on the reset signal res. If the reset side level shift switch element 211b is turned off, the voltage of the node N6 is increased by the high side DC power supply 6 and becomes a high level. If the reset side level shift switch element 211b is turned on, the voltage of the node N6 is grounded and reduced to a low level. The voltage of the node N6 is input to the high side control circuit 22 as the level shift completion reset signal resdrn. Therefore, the node N6 is the output node of the reset side level shift circuit 21b, and is the reset side input node of the high side control circuit 22.

[0053] In addition, the timing when the set signal set goes high is different from the timing when the reset signal res goes high. Therefore, the timing when the level shift completion set signal setdrn goes low is also different from the timing when the level shift completion reset signal resdrn goes low.

[0054] <<<2-4. High-side control circuit>>>

[0055] The high-side control circuit 22 generates a drive signal HO based on the level shift completion set signal setdrn and the level shift completion reset signal resdrn, and outputs the drive signal HO to the gate of the power switch element 51. As a result, the high-side control circuit 22 turns the power switch element 51 on and off. When the level shift completion set signal setdrn is at a low level and the level shift completion reset signal resdrn is at a high level, the high-side control circuit 22 sets the drive signal HO to a high level. On the other hand, when the level shift completion set signal setdrn is at a high level and the level shift completion reset signal resdrn is at a low level, the high-side control circuit 22 sets the drive signal HO to a low level. In addition, when the level shift completion set signal setdrn and the level shift completion reset signal resdrn are both at a low level or a high level, the high-side control circuit 22 maintains the level of the drive signal HO.

[0056] Here, the reference voltage used by the high-side control circuit 22 to detect the low level of the level shift completion set signal setdrn is called a set threshold voltage, and the reference voltage used by the high-side control circuit 22 to detect the low level of the level shift completion reset signal resdrn is called a reset threshold voltage.

[0057] The high-side control circuit 22 includes a protection circuit 221 , a latch circuit 222 and a high-side driver 223 .

[0058] The output voltage of the high-side DC power supply 6 based on the potential of the node N2 is provided to the protection circuit 221. In addition, the level shift completion set signal setdrn and the level shift completion reset signal resdrn are input to the protection circuit 221. The protection circuit 221 controls the latch circuit 222 based on the level shift completion set signal setdrn and the level shift completion reset signal resdrn. Figure 2As shown, when the level shift completion set signal setdrn is low and the level shift completion reset signal resdrn is high, the protection circuit 221 outputs a high-level signal to the latch circuit 222. When the level shift completion set signal setdrn is high and the level shift completion reset signal resdrn is low, the protection circuit 221 outputs a low-level signal to the latch circuit 222. When both the level shift completion set signal setdrn and the level shift completion reset signal resdrn are low or high, the protection circuit 221 makes the output high impedance. In addition, the setting threshold voltage and the resetting threshold voltage are determined by the structure of the protection circuit 221.

[0059] The output voltage of the high-side DC power supply 6 based on the potential of the node N2 is provided to the latch circuit 222. The latch circuit 222 is controlled according to the output of the protection circuit 221. If the output of the protection circuit 221 (the input of the latch circuit 222) is high or low, the latch circuit 222 stores the value and outputs it. In addition, if the output of the protection circuit 221 is high impedance, the latch circuit 222 holds and outputs the value stored before the output of the protection circuit 221 becomes high impedance.

[0060] Here, when the driving circuit 1 is normal, when the level shift completion set signal setdrn is low and the level shift completion reset signal resdrn is high, the output of the latch circuit 222 is high. Thereafter, when the level shift completion set signal setdrn and the level shift completion reset signal resdrn are both low or high, the output of the latch circuit 222 remains at a high level. When the level shift completion set signal setdrn is high and the level shift completion reset signal resdrn is low, the output of the latch circuit 222 is low. Thereafter, when the level shift completion set signal setdrn and the level shift completion reset signal resdrn are both low or high, the output of the latch circuit 222 remains at a low level.

[0061] The output voltage of the high-side DC power supply 6 based on the potential of the node N2 is provided to the high-side driver 223. In addition, the output of the latch circuit 222 is input to the high-side driver 223. The high-side driver 223 generates a drive signal HO corresponding to the output of the latch circuit 222, and outputs the drive signal HO to the gate of the power switch element 52. That is, if the output of the latch circuit 222 is low, the high-side driver 223 sets the drive signal HO to a low level, and if the output of the latch circuit 222 is high, the high-side driver 223 sets the drive signal HO to a high level.

[0062] <<<2-5. Adjustment circuit>>>

[0063] The adjustment circuit 23 controls the impedance between the node N5 of the set-side level shift circuit 21a and the high-potential wiring L7, and the impedance between the node N6 of the reset-side level shift circuit 21b and the high-potential wiring L7, based on the drive signal HO of the high-side control circuit 22. Thus, the adjustment circuit 23 controls the magnitude relationship of the above impedances in synchronization with the drive signal HO of the high-side control circuit 22.

[0064] Specifically, when the driving signal HO of the high-side control circuit 22 is at a high level, the adjustment circuit 23 increases the impedance between the node N5 of the set-side level shift circuit 21a and the high-potential wiring L7. Furthermore, when the driving signal HO of the high-side control circuit 22 is at a high level, the adjustment circuit 23 reduces the impedance between the node N6 of the reset-side level shift circuit 21b and the high-potential wiring L7. Therefore, when the driving signal HO of the high-side control circuit 22 is at a high level, the impedance between the node N5 of the set-side level shift circuit 21a and the high-potential wiring L7 is higher than the impedance between the node N6 of the reset-side level shift circuit 21b and the high-potential wiring L7.

[0065] On the other hand, when the driving signal HO of the high-side control circuit 22 is at a low level, the adjustment circuit 23 reduces the impedance between the node N5 of the set-side level shift circuit 21a and the high-potential wiring L7. Furthermore, when the driving signal HO of the high-side control circuit 22 is at a low level, the adjustment circuit 23 increases the impedance between the node N6 of the reset-side level shift circuit 21b and the high-potential wiring L7. Therefore, when the driving signal HO of the high-side control circuit 22 is at a low level, the impedance between the node N5 of the set-side level shift circuit 21a and the high-potential wiring L7 is lower than the impedance between the node N6 of the reset-side level shift circuit 21b and the high-potential wiring L7.

[0066] The adjustment circuit 23 includes an inverter 231 , a second setting-side switching element 232 a , a second resetting-side switching element 232 b , a second setting-side resistor 233 a , and a second resetting-side resistor 233 b .

[0067] The switching elements 232a and 232b are P-channel MOSFETs.

[0068] The second setting side switch element 232a and the second setting side resistor 233a are connected in series between the high potential wiring L7 and the node N5 of the setting side level shift circuit 21a. The second reset side switch element 232b and the second reset side resistor 233b are connected in series between the high potential wiring L7 and the node N6 of the reset side level shift circuit 21b. In addition, the second setting side resistor 233a and the second setting side switch element 232a may be connected in series between the high potential wiring L7 and the node N5 to replace the second setting side switch element 232a and the second setting side resistor 233a. The same is true for the second reset side switch element 232b and the second reset side resistor 233b.

[0069] The gate of the second set-side switch element 232a is connected to the output terminal of the high-side driver 223. The gate of the second reset-side switch element 232b is connected to the output terminal of the inverter 231, and the input terminal of the inverter 231 is connected to the output terminal of the high-side driver 223.

[0070] The drive signal HO output by the high-side driver 223 is input to the gate of the second setting-side switch element 232a. The inverter 231 inverts the drive signal HO and inputs the inverted signal to the gate of the second reset-side switch element 232b. Therefore, the second setting-side switch element 232a is turned on and off based on the drive signal HO, and the second reset-side switch element 232b is turned on and off complementarily to the second setting-side switch element 232a.

[0071] When the drive signal HO is at a high level, the second reset-side switch element 232b is turned on, and the second set-side switch element 232a is turned off. Therefore, the second reset-side resistor 233b is connected in parallel with the reset-side resistor 212b between the node N6 and the high-potential wiring L7, and the impedance between the node N6 and the high-potential wiring L7 is low. In contrast, the set-side resistor 212a is connected between the node N5 and the high-potential wiring L7, so the impedance between the node N5 and the high-potential wiring L7 becomes high. Therefore, the impedance between the node N5 and the high-potential wiring L7 is higher than the impedance between the node N6 and the high-potential wiring L7. Therefore, when dv / dt noise is generated due to the parasitic capacitance of the level shift switch elements 211a and 211b, the voltage of the node N5 rises more slowly than the voltage of the node N6. Therefore, even when dv / dt noise is generated, the high-side control circuit 22 is necessarily set, and the drive signal HO of the high-side driver 223 is maintained at a high level. Thus, malfunction of the high-side control circuit 22 due to dv / dt noise can be prevented.

[0072] When the drive signal HO is at a low level, the second setting side switch element 232a is turned on, and the second reset side switch element 232b is turned off. Therefore, the second setting side resistor 233a is connected in parallel with the setting side resistor 212a between the node N5 and the high potential wiring L7, and the impedance between the node N5 and the high potential wiring L7 is low. On the contrary, the reset side resistor 212b is connected between the node N6 and the high potential wiring L7, so the impedance between the node N6 and the high potential wiring L7 becomes high. Therefore, the impedance between the node N6 and the high potential wiring L7 is higher than the impedance between the node N5 and the high potential wiring L7. Therefore, when dv / dt noise is generated due to the parasitic capacitance of the level shift switch elements 211a and 211b, the voltage of the node N6 rises more slowly than the voltage of the node N5. Therefore, even when dv / dt noise is generated, the high-side control circuit 22 is necessarily reset, and the drive signal HO of the high-side driver 223 is maintained at a low level. Thus, malfunction of the high-side control circuit 22 due to dv / dt noise can be prevented.

[0073] <<<2-6. Guarantee circuit>>>

[0074] The guarantee circuit 24 is configured to include an inverter 231, a set-side switching element 241a, a reset-side switching element 241b, a set-side diode 242a, and a reset-side diode 242b. The inverter 231 is a common component of the guarantee circuit 24 and the adjustment circuit 23, but the guarantee circuit 24 and the adjustment circuit 23 may each have an inverter.

[0075] The switching elements 241 a and 241 b are P-channel MOSFETs.

[0076] The anode of the setting side diode 242a is connected to the node N5. The cathode of the setting side diode 242a is connected to the high potential wiring L7 via the setting side switch element 241a. In other words, the cathode of the setting side diode 242a is connected to the drain of the setting side switch element 241a, and the cathode of the setting side switch element 241a is connected to the high potential wiring L7.

[0077] The anode of the reset side diode 242b is connected to the node N6. The cathode of the reset side diode 242b is connected to the high potential wiring L7 via the reset side switch element 241b. In other words, the cathode of the reset side diode 242b is connected to the drain of the reset side switch element 241b, and the cathode of the reset side switch element 241b is connected to the high potential wiring L7.

[0078] The gate of the set-side switching element 241 a is connected to the output terminal of the inverter 231 . The gate of the reset-side switching element 241 b is connected to the output terminal of the high-side driver 223 .

[0079] The drive signal HO of the high-side driver 223 is input to the gate of the reset-side switch element 241b. The inverter 231 inverts the drive signal HO of the high-side driver 223, and the inverted signal is input to the gate of the set-side switch element 241a. Therefore, the reset-side switch element 241b is turned on and off based on the drive signal HO, and the set-side switch element 241a is turned on and off complementarily to the reset-side switch element 241b.

[0080] The guarantee circuit 24 turns on and off the setting side switch element 241a based on the driving signal HO, thereby executing the establishment and release of the connection of the setting side diode 242a between the node N5 and the high potential wiring L7. In addition, the establishment of the connection refers to the state of connecting between the node N5 and the high potential wiring L7 via the setting side diode 242a, and the release of the connection refers to the disconnection state between the node N5 and the high potential wiring L7. In addition, the guarantee circuit 24 turns on and off the reset side switch element 241b based on the driving signal HO, thereby complementarily executing the establishment and release of the connection of the reset side diode 242b between the node N6 and the high potential wiring L7 with respect to the establishment and release of the connection of the setting side diode 242a. The details are as follows.

[0081] When the drive signal HO of the high-side driver 223 is at a high level, the set-side switch element 241a is turned on. Therefore, the connection between the cathode of the set-side diode 242a and the high-potential wiring L7 is established, and the connection between the set-side diode 242a between the node N5 and the high-potential wiring L7 is established. In addition, when the drive signal HO of the high-side driver 223 is at a high level, the reset-side switch element 241b is turned off. Therefore, the connection between the cathode of the reset-side diode 242b and the high-potential wiring L7 is released, and the connection between the reset-side diode 242b between the node N6 and the high-potential wiring L7 is released (disconnected).

[0082] When the driving signal HO of the high-side driver 223 is at a low level, the reset-side switch element 241b is turned on. Therefore, the connection between the cathode of the reset-side diode 242b and the high-potential wiring L7 is established, and the connection between the reset-side diode 242b between the node N6 and the high-potential wiring L7 is established. When the driving signal HO of the high-side driver 223 is at a low level, the set-side switch element 241a is turned off. Therefore, the connection between the cathode of the set-side diode 242a and the high-potential wiring L7 is released, and the connection between the set-side diode 242a between the node N5 and the high-potential wiring L7 is released.

[0083] Here, in normal state, the node N5 is at a lower potential than the high potential wiring L7, so the set side diode 242a is reverse biased. Similarly, the node N6 is at a lower potential than the high potential wiring L7, so the reset side diode 242b is reverse biased.

[0084] Alternatively, the setting side switch element 241a and the setting side diode 242a may be interchanged. That is, the connection may be made so that the setting side switch element 241a opens and closes the circuit from the high potential wiring L7 to the node N5 via the setting side diode 242a. The same is true for the reset side switch element 241b and the reset side diode 242b.

[0085] <<<3. When Negative Voltage is Generated>>>

[0086] After the power switch elements 51 and 52 are switched on and off, due to the influence of the mutual inductance and dv / dt of the load 9, as shown in FIG. Figure 3 to Figure 5 As shown in the diagram, node N2 may become a negative voltage. When node N2 becomes a negative voltage, the voltages of nodes N5 and N6 based on node N2 rise. Afterwards, if the negative voltage of node N2 is eliminated, the voltages of nodes N5 and N6 (level shift completion set signal setdrn and level shift completion reset signal resdrn) generate ringing. In this embodiment, a guarantee circuit 24 is used to prevent malfunction of the high-side control circuit 22 caused by the ringing. After the negative voltage of node N2 is eliminated, the drive signal HO of the high-side control circuit 22 is maintained in the state before node N2 becomes a negative voltage. This point will be described in more detail below.

[0087] in addition, Figure 3 1 is a timing chart showing waveforms of the voltage of the node N2 after the high-side power switch element 51 is switched from on to off, the input signal HIN, the drive signal HO, the level shift completion set signal setdrn, and the level shift completion reset signal resdrn. Figure 4 Yes Figure 3 The figure shown is obtained by overlapping the waveforms of the level shift completion set signal setdrn and the level shift completion reset signal resdrn. Figure 5 1 is a timing diagram showing waveforms of the voltage of the node N2 after the high-side power switch element is switched from off to on, the input signal HIN, the drive signal HO, the level shift completion set signal setdrn, and the level shift completion reset signal resdrn. Figure 6 Yes Figure 5 The figure shown is obtained by overlapping the waveforms of the level shift completion set signal setdrn and the level shift completion reset signal resdrn.

[0088] <<<3-1. When the drive signal HO is at a low level>>>

[0089] If the input signal HIN falls, after the level shift completion reset signal resdrn temporarily becomes low level, the level shift completion reset signal resdrn and the level shift completion set signal setdrn both become high level (refer to Figure 2 ). Therefore, the driving signal HO of the high-side control circuit 22 becomes a low level.

[0090] After the power switch elements 51 and 52 are turned on and off, as shown in FIG. Figure 3 and Figure 4 As shown, node N2 becomes a negative voltage, thereby the voltages of nodes N5 and N6 rise. Specifically, nodes N5 and N6 are grounded (0V) via the parasitic capacitance of the set-side level shift switch element 211a and the reset-side level shift switch element 211b, and thus become a voltage higher than the negative voltage. At this time, the connection of the reset-side diode 242b between node N6 and the high-potential wiring L7 is established. As a result, the reset-side diode 242b is turned on due to the voltage rise of node N6, and the forward current flows through the reset-side diode 242b, and the voltage of node N6 is clamped by the voltage of the high-potential wiring L7. In contrast, the connection of the set-side diode 242a between node N5 and the high-potential wiring L7 is released, so the voltage of node N5 is not clamped by the voltage of the high-potential wiring L7. As a result, the voltage of node N6 rises more slowly than the voltage of node N5.

[0091] After that, the voltages of nodes N5 and N6 drop due to ringing, and the voltage of node N6 becomes lower than the voltage of high potential wiring L7. Therefore, the reset side diode 242b is not immediately turned off, and the reset side diode 242b generates a reverse recovery phenomenon, and a reverse current flows through the reset side diode 242b. Therefore, the voltage of node N6 drops more than the voltage of node N5.

[0092] The clamping and reverse recovery phenomenon of the reset side diode 242b as described above helps to make the voltage of the node N6 lower than the voltage of the node N5. In addition, the clamping and reverse recovery phenomenon helps to easily make the voltage of the node N6 lower than the reset threshold voltage. Therefore, even after the negative voltage of the node N2 is eliminated, the high-side control circuit 22 is not set, and the drive signal HO of the high-side control circuit 22 maintains the state before the node N2 becomes a negative voltage. In other words, after the negative voltage of the node N2 is eliminated, the drive signal HO of the high-side control circuit 22 is still maintained at a low level.

[0093] Therefore, the guarantee circuit 24 guarantees the state that the high-side control circuit 22 turns off the power switch element 51 based on the level shift completion reset signal resdrn based on the drive signal HO. In addition, in the present embodiment, the impedance between the node N6 and the high potential wiring L7 is higher than the impedance between the node N5 and the high potential wiring L7, so there is a tendency that the voltage of the node N6 rises more slowly than the voltage of the node N5. Therefore, the adjustment circuit 23 can further maintain the state in which the power switch element 51 is set to be turned off.

[0094] <<<3-2. When the drive signal HO is at a high level>>>

[0095] After the input signal HIN rises, when the level shifting completion reset signal resdrn and the level shifting completion set signal setdrn are both at high level, the driving signal HO is at high level (refer to Figure 2 ). At this time, if Figure 5 and Figure 6 As shown in FIG. 1 , if the node N2 becomes a negative voltage, the voltages of the nodes N5 and N6 rise. At this time, the connection of the set side diode 242a between the node N5 and the high potential wiring L7 is established. Therefore, since the set side diode 242a is turned on, the forward current flows through the set side diode 242a, and the voltage of the node N5 is clamped by the voltage of the high potential wiring L7. In contrast, the connection of the reset side diode 242b between the node N6 and the high potential wiring L7 is released, so the voltage of the node N6 is not clamped by the voltage of the high potential wiring L7. As a result, the voltage of the node N5 rises more slowly than the voltage of the node N6.

[0096] After that, the voltages of the nodes N5 and N6 drop due to ringing, and the voltage of the node N5 becomes lower than the voltage of the high potential wiring L7. As a result, the setting side diode 242a is not immediately turned off, and the setting side diode 242a undergoes a reverse recovery phenomenon, and a reverse current flows through the setting side diode 242a. Therefore, the voltage of the node N5 drops more than the voltage of the node N6.

[0097] The clamping and reverse recovery phenomenon of the set-side diode 242a as described above helps to make the voltage of the node N5 further lower than the voltage of the node N6. In addition, the clamping and reverse recovery phenomenon helps to easily make the voltage of the node N5 lower than the set threshold voltage. Therefore, even after the negative voltage of the node N2 is eliminated, the high-side control circuit 22 is not reset, and the drive signal HO of the high-side control circuit 22 maintains the state before the node N2 becomes a negative voltage. In other words, after the negative voltage of the node N2 is eliminated, the drive signal HO of the high-side control circuit 22 is still maintained at a high level.

[0098] Therefore, the guarantee circuit 24 guarantees the state that the high-side control circuit 22 turns on the power switch element 51 based on the level shift completion setting signal setdrn based on the drive signal HO. In addition, in the present embodiment, the impedance between the node N5 and the high potential wiring L7 is higher than the impedance between the node N6 and the high potential wiring L7, so there is a tendency that the voltage of the node N5 rises more slowly than the voltage of the node N6. Therefore, the adjustment circuit 23 can further maintain the state in which the power switch element 51 is set to be turned on.

[0099] <<<4. Modifications>>>

[0100] The above-mentioned embodiments are used to facilitate the understanding of the present invention, but are not used to limit and explain the present invention. In addition, the present invention can be changed or improved without departing from its main purpose, and its equivalent content is of course also included in the present invention. For example, it can be changed as shown in the following (1) and (2). It is also possible to apply the following (1) and (2) in combination.

[0101] (1) Figure 7 The driving circuit 1A shown in the figure has Figure 1 The driving circuit 1 shown includes guarantee diodes 27a and 27b in addition to the components.

[0102] The set side ensuring diode 27a is connected in parallel with the set side resistor 212a between the high potential wiring L7 and the node N5. The anode of the set side ensuring diode 27a is connected to the node N5, and the cathode of the set side ensuring diode 27a is connected to the high potential wiring L7. The reset side ensuring diode 27b is connected in parallel with the reset side resistor 212b between the high potential wiring L7 and the node N6. The anode of the reset side ensuring diode 27b is connected to the node N6, and the cathode of the reset side ensuring diode 27b is connected to the high potential wiring L7.

[0103] When the driving signal HO of the high-side control circuit 22 is at a low level, if the node N2 becomes a negative voltage, the voltages of the nodes N5 and N6 rise (see Figure 3 and 5), so the diodes 27a and 27b are turned on. Therefore, the forward current flows through the diodes 27a and 27b, and the nodes N5 and N6 are clamped by the high potential wiring L7. Here, the forward current of the diodes 27a and 27b is smaller than the forward current of the reset side diode 242b.

[0104] After that, the voltage of the nodes N5 and N6 decreases due to the ringing. If the voltage of the nodes N5 and N6 becomes lower than the voltage of the high potential wiring L7, the guarantee diodes 27a and 27b are not immediately cut off, and the guarantee diodes 27a and 27b produce a reverse recovery phenomenon, and a reverse current flows through the guarantee diodes 27a and 27b. The reverse current of the guarantee diodes 27a and 27b is smaller than the reverse current of the reset side diode 242b.

[0105] When the driving signal HO of the high-side control circuit 22 is at a high level, if the node N2 becomes a negative voltage, the voltages of the nodes N5 and N6 rise (see Figure 3 and Figure 5 ), so the diodes 27a and 27b are turned on. Therefore, the forward current flows through the diodes 27a and 27b, and the nodes N5 and N6 are clamped by the high potential wiring L7. Here, the forward current of the diodes 27a and 27b is smaller than the forward current of the set side diode 242a.

[0106] After that, the voltage of the nodes N5 and N6 decreases due to the ringing. If the voltage of the nodes N5 and N6 becomes lower than the voltage of the high potential wiring L7, the diodes 27a and 27b are not immediately turned off, and the diodes 27a and 27b undergo a reverse recovery phenomenon, and a reverse current flows through the diodes 27a and 27b. The reverse current of the diodes 27a and 27b is smaller than the reverse current of the set side diode 242a.

[0107] In addition, the guarantee diodes 27a and 27b may be replaced with diode-connected MOS.

[0108] (2) The diodes 27a and 242b may be replaced with diode-connected MOS.

[0109] <<<5. Conclusion>>>

[0110] (1) When the drive signal HO is at a low level, if the node N2 is at a negative voltage, the clamping and reverse recovery phenomena of the reset side diode 242b occur, but the clamping and reverse recovery phenomena of the set side diode 242a do not occur. Therefore, the voltage of the node N6 is lower than the voltage of the node N5, and it is easy to make the voltage of the node N6 lower than the reset threshold voltage. Therefore, even after the negative voltage of the node N2 is eliminated, the high-side control circuit 22 is not set, and the drive signal HO of the high-side control circuit 22 is maintained at a low level.

[0111] (2) When the drive signal HO is at a high level, if the node N2 is at a negative voltage, the clamping and reverse recovery phenomena of the set side diode 242a occur, but the clamping and reverse recovery phenomena of the reset side diode 242b do not occur. Therefore, the voltage of the node N5 is lower than the voltage of the node N6, and it is easy to make the voltage of the node N5 lower than the set threshold voltage. Therefore, after the negative voltage of the node N2 is eliminated, the high-side control circuit 22 is not reset, and the drive signal HO of the high-side control circuit 22 is maintained at a high level.

[0112] Description of symbols

[0113] 6 High-side DC power supply

[0114] 21a Set side level shift circuit

[0115] 21b Reset side level shift circuit

[0116] 22 High-side control circuit

[0117] 23 Adjustment circuit

[0118] 24 Guarantee circuit

[0119] 27a Set side guarantee diode

[0120] 27b Reset side guarantee diode

[0121] 51 Power switching elements (power devices)

[0122] 211a Setting side level shift switch element

[0123] 211b Reset side level shift switch element

[0124] 212a Set side resistor

[0125] 212b Reset side resistor

[0126] 232a Second setting side switch element

[0127] 232b Second reset side switch element

[0128] 233a Second setting side resistor

[0129] 233b 2nd reset side resistor

[0130] 241a Set-side switch element

[0131] 241b Reset side switch element

[0132] 242a Set side diode

[0133] 242b Reset side diode

[0134] L1 Reference potential wiring

[0135] L7 High Potential Wiring

[0136] N5 Output node of the level shift circuit on the set side

[0137] N6 Output node of the reset side level shift circuit

Claims

1. A driving circuit, characterized in that: include: A setting side level shift circuit, which generates a level shift completion setting signal by level shifting the setting signal; A reset-side level shift circuit, which generates a level shift completion reset signal by level shifting the reset signal; a control circuit that outputs a drive signal that changes between a first logic level and a second logic level, wherein the first logic level turns off the power device based on the level shift completion reset signal, and the second logic level turns on the power device based on the level shift completion set signal; as well as a guarantee circuit that guarantees, based on the drive signal, a state in which the control circuit turns on the power device based on the level shift completion set signal and turns off the power device based on the level shift completion reset signal, The setting side level shift circuit generates the level shift completion setting signal that changes between a reference potential and a high potential higher than the reference potential. The reset-side level shift circuit generates the level shift completion reset signal that changes between the reference potential and the high potential, The guarantee circuit comprises: a set-side diode having a cathode connected to the high-potential wiring and an anode connected to an output node of the set-side level shift circuit when the drive signal is at the second logic level; as well as a reset-side diode whose cathode is connected to the high-potential wiring and whose anode is connected to the output node of the set-side level shift circuit when the drive signal is at the first logic level; When the drive signal is at the first logic level, the state in which the cathode of the setting-side diode is connected to the high-potential wiring and the anode of the setting-side diode is connected to the output node of the setting-side level shift circuit is released. When the drive signal is at the second logic level, the reset-side diode is released from a state in which the cathode thereof is connected to the high-potential wiring and the anode thereof is connected to the output node of the reset-side level shift circuit.

2. The driving circuit according to claim 1, characterized in that: The guarantee circuit comprises: a setting-side switch element connected in series with the setting-side diode between the high-potential wiring and the output node of the setting-side level shift circuit, turned on when the drive signal is at the second logic level, and turned off when the drive signal is at the first logic level; and A reset side switch element is connected in series with the reset side diode between the high potential wiring and the output node of the reset side level shift circuit, is turned on when the drive signal is the first logic level, and is turned off when the drive signal is the second logic level.

3. The driving circuit according to claim 1, wherein: The adjustment circuit is provided with an adjustment circuit, which reduces the impedance between the high-potential wiring and the output node of the set-side level shift circuit and increases the impedance between the high-potential wiring and the output node of the reset-side level shift circuit when the drive signal is the first logic level, and increases the impedance between the high-potential wiring and the output node of the set-side level shift circuit and reduces the impedance between the high-potential wiring and the output node of the reset-side level shift circuit when the drive signal is the second logic level.

4. The driving circuit according to claim 3, characterized in that: The setting side level shift circuit comprises: a setting-side resistor connected to the wiring of the high potential; and a setting-side level shift switch element connected in series with the setting-side resistor between the high-potential wiring and the reference-potential wiring, and turned on and off based on the setting signal, A node between the setting-side level shift switch element and the setting-side resistor is an output node of the setting-side level shift circuit. The reset-side level shift circuit comprises: a reset-side resistor connected to the wiring of the high potential; and a reset-side level shift switch element connected in series with the reset-side resistor between the high-potential wiring and the reference-potential wiring and turned on and off based on the reset signal, A node between the reset-side level shift switch element and the reset-side resistor is an output node of the reset-side level shift circuit. The adjustment circuit comprises: a second setting resistor having one end connected to the high potential wiring and the other end connected to the output node of the setting side level shift circuit when the drive signal is at the first logic level; and A second reset-side resistor having one end connected to the high-potential wiring and the other end connected to the output node of the reset-side level shift circuit when the drive signal is at the second logic level.

5. The driving circuit according to claim 4, characterized in that: When the drive signal is at the second logic level, the second setting resistor is released from a state in which one end is connected to the high potential wiring and the other end is connected to the output node of the setting level shift circuit. When the drive signal is at the first logic level, the second reset-side resistor is released from a state in which one end thereof is connected to the high-potential wiring and the other end thereof is connected to the output node of the reset-side level shift circuit.

6. The driving circuit according to claim 4 or 5, characterized in that: The adjustment circuit comprises: a second setting-side switch element connected in series with the second setting-side resistor between the high-potential wiring and the output node of the setting-side level shift circuit, turned off when the drive signal is at the second logic level, and turned on when the drive signal is at the first logic level; and A second reset side switch element is connected in series with the second reset side resistor between the high potential wiring and the output node of the reset side level shift circuit, is turned on when the drive signal is the second logic level, and is turned off when the drive signal is the first logic level.

7. The driving circuit according to claim 4 or 5, characterized in that: include: a setting side ensuring diode having an anode connected to the output node of the setting side level shift circuit and a cathode connected to the high potential wiring; and A reset-side guarantee diode has an anode connected to the output node of the reset-side level shift circuit and a cathode connected to the high-potential wiring.

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